Patrick Pollet / USBDevice

usb device

USBDevice/USBHAL_LPC17.cpp@0:c1e89c49eae5, 2022-05-14 (annotated)

Committer:
ppo
Date:
Sat May 14 17:24:10 2022 +0000
Revision:
0:c1e89c49eae5
commit

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ppo 0:c1e89c49eae5 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
ppo 0:c1e89c49eae5 2 *
ppo 0:c1e89c49eae5 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
ppo 0:c1e89c49eae5 4 * and associated documentation files (the "Software"), to deal in the Software without
ppo 0:c1e89c49eae5 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
ppo 0:c1e89c49eae5 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
ppo 0:c1e89c49eae5 7 * Software is furnished to do so, subject to the following conditions:
ppo 0:c1e89c49eae5 8 *
ppo 0:c1e89c49eae5 9 * The above copyright notice and this permission notice shall be included in all copies or
ppo 0:c1e89c49eae5 10 * substantial portions of the Software.
ppo 0:c1e89c49eae5 11 *
ppo 0:c1e89c49eae5 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
ppo 0:c1e89c49eae5 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
ppo 0:c1e89c49eae5 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
ppo 0:c1e89c49eae5 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
ppo 0:c1e89c49eae5 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
ppo 0:c1e89c49eae5 17 */
ppo 0:c1e89c49eae5 18
ppo 0:c1e89c49eae5 19 #ifdef TARGET_LPC1768
ppo 0:c1e89c49eae5 20
ppo 0:c1e89c49eae5 21 #include "USBHAL.h"
ppo 0:c1e89c49eae5 22
ppo 0:c1e89c49eae5 23
ppo 0:c1e89c49eae5 24 // Get endpoint direction
ppo 0:c1e89c49eae5 25 #define IN_EP(endpoint) ((endpoint) & 1U ? true : false)
ppo 0:c1e89c49eae5 26 #define OUT_EP(endpoint) ((endpoint) & 1U ? false : true)
ppo 0:c1e89c49eae5 27
ppo 0:c1e89c49eae5 28 // Convert physical endpoint number to register bit
ppo 0:c1e89c49eae5 29 #define EP(endpoint) (1UL<<endpoint)
ppo 0:c1e89c49eae5 30
ppo 0:c1e89c49eae5 31 // Power Control for Peripherals register
ppo 0:c1e89c49eae5 32 #define PCUSB (1UL<<31)
ppo 0:c1e89c49eae5 33
ppo 0:c1e89c49eae5 34 // USB Clock Control register
ppo 0:c1e89c49eae5 35 #define DEV_CLK_EN (1UL<<1)
ppo 0:c1e89c49eae5 36 #define AHB_CLK_EN (1UL<<4)
ppo 0:c1e89c49eae5 37
ppo 0:c1e89c49eae5 38 // USB Clock Status register
ppo 0:c1e89c49eae5 39 #define DEV_CLK_ON (1UL<<1)
ppo 0:c1e89c49eae5 40 #define AHB_CLK_ON (1UL<<4)
ppo 0:c1e89c49eae5 41
ppo 0:c1e89c49eae5 42 // USB Device Interupt registers
ppo 0:c1e89c49eae5 43 #define FRAME (1UL<<0)
ppo 0:c1e89c49eae5 44 #define EP_FAST (1UL<<1)
ppo 0:c1e89c49eae5 45 #define EP_SLOW (1UL<<2)
ppo 0:c1e89c49eae5 46 #define DEV_STAT (1UL<<3)
ppo 0:c1e89c49eae5 47 #define CCEMPTY (1UL<<4)
ppo 0:c1e89c49eae5 48 #define CDFULL (1UL<<5)
ppo 0:c1e89c49eae5 49 #define RxENDPKT (1UL<<6)
ppo 0:c1e89c49eae5 50 #define TxENDPKT (1UL<<7)
ppo 0:c1e89c49eae5 51 #define EP_RLZED (1UL<<8)
ppo 0:c1e89c49eae5 52 #define ERR_INT (1UL<<9)
ppo 0:c1e89c49eae5 53
ppo 0:c1e89c49eae5 54 // USB Control register
ppo 0:c1e89c49eae5 55 #define RD_EN (1<<0)
ppo 0:c1e89c49eae5 56 #define WR_EN (1<<1)
ppo 0:c1e89c49eae5 57 #define LOG_ENDPOINT(endpoint) ((endpoint>>1)<<2)
ppo 0:c1e89c49eae5 58
ppo 0:c1e89c49eae5 59 // USB Receive Packet Length register
ppo 0:c1e89c49eae5 60 #define DV (1UL<<10)
ppo 0:c1e89c49eae5 61 #define PKT_RDY (1UL<<11)
ppo 0:c1e89c49eae5 62 #define PKT_LNGTH_MASK (0x3ff)
ppo 0:c1e89c49eae5 63
ppo 0:c1e89c49eae5 64 // Serial Interface Engine (SIE)
ppo 0:c1e89c49eae5 65 #define SIE_WRITE (0x01)
ppo 0:c1e89c49eae5 66 #define SIE_READ (0x02)
ppo 0:c1e89c49eae5 67 #define SIE_COMMAND (0x05)
ppo 0:c1e89c49eae5 68 #define SIE_CMD_CODE(phase, data) ((phase<<8)|(data<<16))
ppo 0:c1e89c49eae5 69
ppo 0:c1e89c49eae5 70 // SIE Command codes
ppo 0:c1e89c49eae5 71 #define SIE_CMD_SET_ADDRESS (0xD0)
ppo 0:c1e89c49eae5 72 #define SIE_CMD_CONFIGURE_DEVICE (0xD8)
ppo 0:c1e89c49eae5 73 #define SIE_CMD_SET_MODE (0xF3)
ppo 0:c1e89c49eae5 74 #define SIE_CMD_READ_FRAME_NUMBER (0xF5)
ppo 0:c1e89c49eae5 75 #define SIE_CMD_READ_TEST_REGISTER (0xFD)
ppo 0:c1e89c49eae5 76 #define SIE_CMD_SET_DEVICE_STATUS (0xFE)
ppo 0:c1e89c49eae5 77 #define SIE_CMD_GET_DEVICE_STATUS (0xFE)
ppo 0:c1e89c49eae5 78 #define SIE_CMD_GET_ERROR_CODE (0xFF)
ppo 0:c1e89c49eae5 79 #define SIE_CMD_READ_ERROR_STATUS (0xFB)
ppo 0:c1e89c49eae5 80
ppo 0:c1e89c49eae5 81 #define SIE_CMD_SELECT_ENDPOINT(endpoint) (0x00+endpoint)
ppo 0:c1e89c49eae5 82 #define SIE_CMD_SELECT_ENDPOINT_CLEAR_INTERRUPT(endpoint) (0x40+endpoint)
ppo 0:c1e89c49eae5 83 #define SIE_CMD_SET_ENDPOINT_STATUS(endpoint) (0x40+endpoint)
ppo 0:c1e89c49eae5 84
ppo 0:c1e89c49eae5 85 #define SIE_CMD_CLEAR_BUFFER (0xF2)
ppo 0:c1e89c49eae5 86 #define SIE_CMD_VALIDATE_BUFFER (0xFA)
ppo 0:c1e89c49eae5 87
ppo 0:c1e89c49eae5 88 // SIE Device Status register
ppo 0:c1e89c49eae5 89 #define SIE_DS_CON (1<<0)
ppo 0:c1e89c49eae5 90 #define SIE_DS_CON_CH (1<<1)
ppo 0:c1e89c49eae5 91 #define SIE_DS_SUS (1<<2)
ppo 0:c1e89c49eae5 92 #define SIE_DS_SUS_CH (1<<3)
ppo 0:c1e89c49eae5 93 #define SIE_DS_RST (1<<4)
ppo 0:c1e89c49eae5 94
ppo 0:c1e89c49eae5 95 // SIE Device Set Address register
ppo 0:c1e89c49eae5 96 #define SIE_DSA_DEV_EN (1<<7)
ppo 0:c1e89c49eae5 97
ppo 0:c1e89c49eae5 98 // SIE Configue Device register
ppo 0:c1e89c49eae5 99 #define SIE_CONF_DEVICE (1<<0)
ppo 0:c1e89c49eae5 100
ppo 0:c1e89c49eae5 101 // Select Endpoint register
ppo 0:c1e89c49eae5 102 #define SIE_SE_FE (1<<0)
ppo 0:c1e89c49eae5 103 #define SIE_SE_ST (1<<1)
ppo 0:c1e89c49eae5 104 #define SIE_SE_STP (1<<2)
ppo 0:c1e89c49eae5 105 #define SIE_SE_PO (1<<3)
ppo 0:c1e89c49eae5 106 #define SIE_SE_EPN (1<<4)
ppo 0:c1e89c49eae5 107 #define SIE_SE_B_1_FULL (1<<5)
ppo 0:c1e89c49eae5 108 #define SIE_SE_B_2_FULL (1<<6)
ppo 0:c1e89c49eae5 109
ppo 0:c1e89c49eae5 110 // Set Endpoint Status command
ppo 0:c1e89c49eae5 111 #define SIE_SES_ST (1<<0)
ppo 0:c1e89c49eae5 112 #define SIE_SES_DA (1<<5)
ppo 0:c1e89c49eae5 113 #define SIE_SES_RF_MO (1<<6)
ppo 0:c1e89c49eae5 114 #define SIE_SES_CND_ST (1<<7)
ppo 0:c1e89c49eae5 115
ppo 0:c1e89c49eae5 116
ppo 0:c1e89c49eae5 117 USBHAL * USBHAL::instance;
ppo 0:c1e89c49eae5 118
ppo 0:c1e89c49eae5 119 volatile int epComplete;
ppo 0:c1e89c49eae5 120 uint32_t endpointStallState;
ppo 0:c1e89c49eae5 121
ppo 0:c1e89c49eae5 122 static void SIECommand(uint32_t command) {
ppo 0:c1e89c49eae5 123 // The command phase of a SIE transaction
ppo 0:c1e89c49eae5 124 LPC_USB->USBDevIntClr = CCEMPTY;
ppo 0:c1e89c49eae5 125 LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_COMMAND, command);
ppo 0:c1e89c49eae5 126 while (!(LPC_USB->USBDevIntSt & CCEMPTY));
ppo 0:c1e89c49eae5 127 }
ppo 0:c1e89c49eae5 128
ppo 0:c1e89c49eae5 129 static void SIEWriteData(uint8_t data) {
ppo 0:c1e89c49eae5 130 // The data write phase of a SIE transaction
ppo 0:c1e89c49eae5 131 LPC_USB->USBDevIntClr = CCEMPTY;
ppo 0:c1e89c49eae5 132 LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_WRITE, data);
ppo 0:c1e89c49eae5 133 while (!(LPC_USB->USBDevIntSt & CCEMPTY));
ppo 0:c1e89c49eae5 134 }
ppo 0:c1e89c49eae5 135
ppo 0:c1e89c49eae5 136 static uint8_t SIEReadData(uint32_t command) {
ppo 0:c1e89c49eae5 137 // The data read phase of a SIE transaction
ppo 0:c1e89c49eae5 138 LPC_USB->USBDevIntClr = CDFULL;
ppo 0:c1e89c49eae5 139 LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_READ, command);
ppo 0:c1e89c49eae5 140 while (!(LPC_USB->USBDevIntSt & CDFULL));
ppo 0:c1e89c49eae5 141 return (uint8_t)LPC_USB->USBCmdData;
ppo 0:c1e89c49eae5 142 }
ppo 0:c1e89c49eae5 143
ppo 0:c1e89c49eae5 144 static void SIEsetDeviceStatus(uint8_t status) {
ppo 0:c1e89c49eae5 145 // Write SIE device status register
ppo 0:c1e89c49eae5 146 SIECommand(SIE_CMD_SET_DEVICE_STATUS);
ppo 0:c1e89c49eae5 147 SIEWriteData(status);
ppo 0:c1e89c49eae5 148 }
ppo 0:c1e89c49eae5 149
ppo 0:c1e89c49eae5 150 static uint8_t SIEgetDeviceStatus(void) {
ppo 0:c1e89c49eae5 151 // Read SIE device status register
ppo 0:c1e89c49eae5 152 SIECommand(SIE_CMD_GET_DEVICE_STATUS);
ppo 0:c1e89c49eae5 153 return SIEReadData(SIE_CMD_GET_DEVICE_STATUS);
ppo 0:c1e89c49eae5 154 }
ppo 0:c1e89c49eae5 155
ppo 0:c1e89c49eae5 156 void SIEsetAddress(uint8_t address) {
ppo 0:c1e89c49eae5 157 // Write SIE device address register
ppo 0:c1e89c49eae5 158 SIECommand(SIE_CMD_SET_ADDRESS);
ppo 0:c1e89c49eae5 159 SIEWriteData((address & 0x7f) | SIE_DSA_DEV_EN);
ppo 0:c1e89c49eae5 160 }
ppo 0:c1e89c49eae5 161
ppo 0:c1e89c49eae5 162 static uint8_t SIEselectEndpoint(uint8_t endpoint) {
ppo 0:c1e89c49eae5 163 // SIE select endpoint command
ppo 0:c1e89c49eae5 164 SIECommand(SIE_CMD_SELECT_ENDPOINT(endpoint));
ppo 0:c1e89c49eae5 165 return SIEReadData(SIE_CMD_SELECT_ENDPOINT(endpoint));
ppo 0:c1e89c49eae5 166 }
ppo 0:c1e89c49eae5 167
ppo 0:c1e89c49eae5 168 static uint8_t SIEclearBuffer(void) {
ppo 0:c1e89c49eae5 169 // SIE clear buffer command
ppo 0:c1e89c49eae5 170 SIECommand(SIE_CMD_CLEAR_BUFFER);
ppo 0:c1e89c49eae5 171 return SIEReadData(SIE_CMD_CLEAR_BUFFER);
ppo 0:c1e89c49eae5 172 }
ppo 0:c1e89c49eae5 173
ppo 0:c1e89c49eae5 174 static void SIEvalidateBuffer(void) {
ppo 0:c1e89c49eae5 175 // SIE validate buffer command
ppo 0:c1e89c49eae5 176 SIECommand(SIE_CMD_VALIDATE_BUFFER);
ppo 0:c1e89c49eae5 177 }
ppo 0:c1e89c49eae5 178
ppo 0:c1e89c49eae5 179 static void SIEsetEndpointStatus(uint8_t endpoint, uint8_t status) {
ppo 0:c1e89c49eae5 180 // SIE set endpoint status command
ppo 0:c1e89c49eae5 181 SIECommand(SIE_CMD_SET_ENDPOINT_STATUS(endpoint));
ppo 0:c1e89c49eae5 182 SIEWriteData(status);
ppo 0:c1e89c49eae5 183 }
ppo 0:c1e89c49eae5 184
ppo 0:c1e89c49eae5 185 static uint16_t SIEgetFrameNumber(void) __attribute__ ((unused));
ppo 0:c1e89c49eae5 186 static uint16_t SIEgetFrameNumber(void) {
ppo 0:c1e89c49eae5 187 // Read current frame number
ppo 0:c1e89c49eae5 188 uint16_t lowByte;
ppo 0:c1e89c49eae5 189 uint16_t highByte;
ppo 0:c1e89c49eae5 190
ppo 0:c1e89c49eae5 191 SIECommand(SIE_CMD_READ_FRAME_NUMBER);
ppo 0:c1e89c49eae5 192 lowByte = SIEReadData(SIE_CMD_READ_FRAME_NUMBER);
ppo 0:c1e89c49eae5 193 highByte = SIEReadData(SIE_CMD_READ_FRAME_NUMBER);
ppo 0:c1e89c49eae5 194
ppo 0:c1e89c49eae5 195 return (highByte << 8) | lowByte;
ppo 0:c1e89c49eae5 196 }
ppo 0:c1e89c49eae5 197
ppo 0:c1e89c49eae5 198 static void SIEconfigureDevice(void) {
ppo 0:c1e89c49eae5 199 // SIE Configure device command
ppo 0:c1e89c49eae5 200 SIECommand(SIE_CMD_CONFIGURE_DEVICE);
ppo 0:c1e89c49eae5 201 SIEWriteData(SIE_CONF_DEVICE);
ppo 0:c1e89c49eae5 202 }
ppo 0:c1e89c49eae5 203
ppo 0:c1e89c49eae5 204 static void SIEunconfigureDevice(void) {
ppo 0:c1e89c49eae5 205 // SIE Configure device command
ppo 0:c1e89c49eae5 206 SIECommand(SIE_CMD_CONFIGURE_DEVICE);
ppo 0:c1e89c49eae5 207 SIEWriteData(0);
ppo 0:c1e89c49eae5 208 }
ppo 0:c1e89c49eae5 209
ppo 0:c1e89c49eae5 210 static void SIEconnect(void) {
ppo 0:c1e89c49eae5 211 // Connect USB device
ppo 0:c1e89c49eae5 212 uint8_t status;
ppo 0:c1e89c49eae5 213
ppo 0:c1e89c49eae5 214 status = SIEgetDeviceStatus();
ppo 0:c1e89c49eae5 215 SIEsetDeviceStatus(status | SIE_DS_CON);
ppo 0:c1e89c49eae5 216 }
ppo 0:c1e89c49eae5 217
ppo 0:c1e89c49eae5 218
ppo 0:c1e89c49eae5 219 static void SIEdisconnect(void) {
ppo 0:c1e89c49eae5 220 // Disconnect USB device
ppo 0:c1e89c49eae5 221 uint8_t status;
ppo 0:c1e89c49eae5 222
ppo 0:c1e89c49eae5 223 status = SIEgetDeviceStatus();
ppo 0:c1e89c49eae5 224 SIEsetDeviceStatus(status & ~SIE_DS_CON);
ppo 0:c1e89c49eae5 225 }
ppo 0:c1e89c49eae5 226
ppo 0:c1e89c49eae5 227
ppo 0:c1e89c49eae5 228 static uint8_t selectEndpointClearInterrupt(uint8_t endpoint) {
ppo 0:c1e89c49eae5 229 // Implemented using using EP_INT_CLR.
ppo 0:c1e89c49eae5 230 LPC_USB->USBEpIntClr = EP(endpoint);
ppo 0:c1e89c49eae5 231 while (!(LPC_USB->USBDevIntSt & CDFULL));
ppo 0:c1e89c49eae5 232 return (uint8_t)LPC_USB->USBCmdData;
ppo 0:c1e89c49eae5 233 }
ppo 0:c1e89c49eae5 234
ppo 0:c1e89c49eae5 235
ppo 0:c1e89c49eae5 236
ppo 0:c1e89c49eae5 237
ppo 0:c1e89c49eae5 238
ppo 0:c1e89c49eae5 239 static void enableEndpointEvent(uint8_t endpoint) {
ppo 0:c1e89c49eae5 240 // Enable an endpoint interrupt
ppo 0:c1e89c49eae5 241 LPC_USB->USBEpIntEn |= EP(endpoint);
ppo 0:c1e89c49eae5 242 }
ppo 0:c1e89c49eae5 243
ppo 0:c1e89c49eae5 244 static void disableEndpointEvent(uint8_t endpoint) __attribute__ ((unused));
ppo 0:c1e89c49eae5 245 static void disableEndpointEvent(uint8_t endpoint) {
ppo 0:c1e89c49eae5 246 // Disable an endpoint interrupt
ppo 0:c1e89c49eae5 247 LPC_USB->USBEpIntEn &= ~EP(endpoint);
ppo 0:c1e89c49eae5 248 }
ppo 0:c1e89c49eae5 249
ppo 0:c1e89c49eae5 250 static volatile uint32_t __attribute__((used)) dummyRead;
ppo 0:c1e89c49eae5 251
ppo 0:c1e89c49eae5 252
ppo 0:c1e89c49eae5 253 uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) {
ppo 0:c1e89c49eae5 254 // Read from an OUT endpoint
ppo 0:c1e89c49eae5 255 uint32_t size;
ppo 0:c1e89c49eae5 256 uint32_t i;
ppo 0:c1e89c49eae5 257 uint32_t data = 0;
ppo 0:c1e89c49eae5 258 uint8_t offset;
ppo 0:c1e89c49eae5 259
ppo 0:c1e89c49eae5 260 LPC_USB->USBCtrl = LOG_ENDPOINT(endpoint) | RD_EN;
ppo 0:c1e89c49eae5 261 while (!(LPC_USB->USBRxPLen & PKT_RDY));
ppo 0:c1e89c49eae5 262
ppo 0:c1e89c49eae5 263 size = LPC_USB->USBRxPLen & PKT_LNGTH_MASK;
ppo 0:c1e89c49eae5 264
ppo 0:c1e89c49eae5 265 offset = 0;
ppo 0:c1e89c49eae5 266
ppo 0:c1e89c49eae5 267 if (size > 0) {
ppo 0:c1e89c49eae5 268 for (i=0; i<size; i++) {
ppo 0:c1e89c49eae5 269 if (offset==0) {
ppo 0:c1e89c49eae5 270 // Fetch up to four bytes of data as a word
ppo 0:c1e89c49eae5 271 data = LPC_USB->USBRxData;
ppo 0:c1e89c49eae5 272 }
ppo 0:c1e89c49eae5 273
ppo 0:c1e89c49eae5 274 // extract a byte
ppo 0:c1e89c49eae5 275 *buffer = (data>>offset) & 0xff;
ppo 0:c1e89c49eae5 276 buffer++;
ppo 0:c1e89c49eae5 277
ppo 0:c1e89c49eae5 278 // move on to the next byte
ppo 0:c1e89c49eae5 279 offset = (offset + 8) % 32;
ppo 0:c1e89c49eae5 280 }
ppo 0:c1e89c49eae5 281 } else {
ppo 0:c1e89c49eae5 282 dummyRead = LPC_USB->USBRxData;
ppo 0:c1e89c49eae5 283 }
ppo 0:c1e89c49eae5 284
ppo 0:c1e89c49eae5 285 LPC_USB->USBCtrl = 0;
ppo 0:c1e89c49eae5 286
ppo 0:c1e89c49eae5 287 if ((endpoint >> 1) % 3 || (endpoint >> 1) == 0) {
ppo 0:c1e89c49eae5 288 SIEselectEndpoint(endpoint);
ppo 0:c1e89c49eae5 289 SIEclearBuffer();
ppo 0:c1e89c49eae5 290 }
ppo 0:c1e89c49eae5 291
ppo 0:c1e89c49eae5 292 return size;
ppo 0:c1e89c49eae5 293 }
ppo 0:c1e89c49eae5 294
ppo 0:c1e89c49eae5 295 static void endpointWritecore(uint8_t endpoint, uint8_t *buffer, uint32_t size) {
ppo 0:c1e89c49eae5 296 // Write to an IN endpoint
ppo 0:c1e89c49eae5 297 uint32_t temp, data;
ppo 0:c1e89c49eae5 298 uint8_t offset;
ppo 0:c1e89c49eae5 299
ppo 0:c1e89c49eae5 300 LPC_USB->USBCtrl = LOG_ENDPOINT(endpoint) | WR_EN;
ppo 0:c1e89c49eae5 301
ppo 0:c1e89c49eae5 302 LPC_USB->USBTxPLen = size;
ppo 0:c1e89c49eae5 303 offset = 0;
ppo 0:c1e89c49eae5 304 data = 0;
ppo 0:c1e89c49eae5 305
ppo 0:c1e89c49eae5 306 if (size>0) {
ppo 0:c1e89c49eae5 307 do {
ppo 0:c1e89c49eae5 308 // Fetch next data byte into a word-sized temporary variable
ppo 0:c1e89c49eae5 309 temp = *buffer++;
ppo 0:c1e89c49eae5 310
ppo 0:c1e89c49eae5 311 // Add to current data word
ppo 0:c1e89c49eae5 312 temp = temp << offset;
ppo 0:c1e89c49eae5 313 data = data | temp;
ppo 0:c1e89c49eae5 314
ppo 0:c1e89c49eae5 315 // move on to the next byte
ppo 0:c1e89c49eae5 316 offset = (offset + 8) % 32;
ppo 0:c1e89c49eae5 317 size--;
ppo 0:c1e89c49eae5 318
ppo 0:c1e89c49eae5 319 if ((offset==0) || (size==0)) {
ppo 0:c1e89c49eae5 320 // Write the word to the endpoint
ppo 0:c1e89c49eae5 321 LPC_USB->USBTxData = data;
ppo 0:c1e89c49eae5 322 data = 0;
ppo 0:c1e89c49eae5 323 }
ppo 0:c1e89c49eae5 324 } while (size>0);
ppo 0:c1e89c49eae5 325 } else {
ppo 0:c1e89c49eae5 326 LPC_USB->USBTxData = 0;
ppo 0:c1e89c49eae5 327 }
ppo 0:c1e89c49eae5 328
ppo 0:c1e89c49eae5 329 // Clear WR_EN to cover zero length packet case
ppo 0:c1e89c49eae5 330 LPC_USB->USBCtrl=0;
ppo 0:c1e89c49eae5 331
ppo 0:c1e89c49eae5 332 SIEselectEndpoint(endpoint);
ppo 0:c1e89c49eae5 333 SIEvalidateBuffer();
ppo 0:c1e89c49eae5 334 }
ppo 0:c1e89c49eae5 335
ppo 0:c1e89c49eae5 336
ppo 0:c1e89c49eae5 337
ppo 0:c1e89c49eae5 338
ppo 0:c1e89c49eae5 339
ppo 0:c1e89c49eae5 340
ppo 0:c1e89c49eae5 341
ppo 0:c1e89c49eae5 342 USBHAL::USBHAL(void) {
ppo 0:c1e89c49eae5 343 // Disable IRQ
ppo 0:c1e89c49eae5 344 NVIC_DisableIRQ(USB_IRQn);
ppo 0:c1e89c49eae5 345
ppo 0:c1e89c49eae5 346 // Enable power to USB device controller
ppo 0:c1e89c49eae5 347 LPC_SC->PCONP |= PCUSB;
ppo 0:c1e89c49eae5 348
ppo 0:c1e89c49eae5 349 // Enable USB clocks
ppo 0:c1e89c49eae5 350 LPC_USB->USBClkCtrl |= DEV_CLK_EN | AHB_CLK_EN;
ppo 0:c1e89c49eae5 351 while (LPC_USB->USBClkSt != (DEV_CLK_ON | AHB_CLK_ON));
ppo 0:c1e89c49eae5 352
ppo 0:c1e89c49eae5 353 // Configure pins P0.29 and P0.30 to be USB D+ and USB D-
ppo 0:c1e89c49eae5 354 LPC_PINCON->PINSEL1 &= 0xc3ffffff;
ppo 0:c1e89c49eae5 355 LPC_PINCON->PINSEL1 |= 0x14000000;
ppo 0:c1e89c49eae5 356
ppo 0:c1e89c49eae5 357 // Disconnect USB device
ppo 0:c1e89c49eae5 358 SIEdisconnect();
ppo 0:c1e89c49eae5 359
ppo 0:c1e89c49eae5 360 // Configure pin P2.9 to be Connect
ppo 0:c1e89c49eae5 361 LPC_PINCON->PINSEL4 &= 0xfffcffff;
ppo 0:c1e89c49eae5 362 LPC_PINCON->PINSEL4 |= 0x00040000;
ppo 0:c1e89c49eae5 363
ppo 0:c1e89c49eae5 364 // Connect must be low for at least 2.5uS
ppo 0:c1e89c49eae5 365 wait(0.3);
ppo 0:c1e89c49eae5 366
ppo 0:c1e89c49eae5 367 // Set the maximum packet size for the control endpoints
ppo 0:c1e89c49eae5 368 realiseEndpoint(EP0IN, MAX_PACKET_SIZE_EP0, 0);
ppo 0:c1e89c49eae5 369 realiseEndpoint(EP0OUT, MAX_PACKET_SIZE_EP0, 0);
ppo 0:c1e89c49eae5 370
ppo 0:c1e89c49eae5 371 // Attach IRQ
ppo 0:c1e89c49eae5 372 instance = this;
ppo 0:c1e89c49eae5 373 NVIC_SetVector(USB_IRQn, (uint32_t)&_usbisr);
ppo 0:c1e89c49eae5 374
ppo 0:c1e89c49eae5 375 // Enable interrupts for device events and EP0
ppo 0:c1e89c49eae5 376 LPC_USB->USBDevIntEn = EP_SLOW | DEV_STAT | FRAME;
ppo 0:c1e89c49eae5 377 enableEndpointEvent(EP0IN);
ppo 0:c1e89c49eae5 378 enableEndpointEvent(EP0OUT);
ppo 0:c1e89c49eae5 379 }
ppo 0:c1e89c49eae5 380
ppo 0:c1e89c49eae5 381 USBHAL::~USBHAL(void) {
ppo 0:c1e89c49eae5 382 // Ensure device disconnected
ppo 0:c1e89c49eae5 383 SIEdisconnect();
ppo 0:c1e89c49eae5 384
ppo 0:c1e89c49eae5 385 // Disable USB interrupts
ppo 0:c1e89c49eae5 386 NVIC_DisableIRQ(USB_IRQn);
ppo 0:c1e89c49eae5 387 }
ppo 0:c1e89c49eae5 388
ppo 0:c1e89c49eae5 389 void USBHAL::connect(void) {
ppo 0:c1e89c49eae5 390 NVIC_EnableIRQ(USB_IRQn);
ppo 0:c1e89c49eae5 391 // Connect USB device
ppo 0:c1e89c49eae5 392 SIEconnect();
ppo 0:c1e89c49eae5 393 }
ppo 0:c1e89c49eae5 394
ppo 0:c1e89c49eae5 395 void USBHAL::disconnect(void) {
ppo 0:c1e89c49eae5 396 NVIC_DisableIRQ(USB_IRQn);
ppo 0:c1e89c49eae5 397 // Disconnect USB device
ppo 0:c1e89c49eae5 398 SIEdisconnect();
ppo 0:c1e89c49eae5 399 }
ppo 0:c1e89c49eae5 400
ppo 0:c1e89c49eae5 401 void USBHAL::configureDevice(void) {
ppo 0:c1e89c49eae5 402 SIEconfigureDevice();
ppo 0:c1e89c49eae5 403 }
ppo 0:c1e89c49eae5 404
ppo 0:c1e89c49eae5 405 void USBHAL::unconfigureDevice(void) {
ppo 0:c1e89c49eae5 406 SIEunconfigureDevice();
ppo 0:c1e89c49eae5 407 }
ppo 0:c1e89c49eae5 408
ppo 0:c1e89c49eae5 409 void USBHAL::setAddress(uint8_t address) {
ppo 0:c1e89c49eae5 410 SIEsetAddress(address);
ppo 0:c1e89c49eae5 411 }
ppo 0:c1e89c49eae5 412
ppo 0:c1e89c49eae5 413 void USBHAL::EP0setup(uint8_t *buffer) {
ppo 0:c1e89c49eae5 414 endpointReadcore(EP0OUT, buffer);
ppo 0:c1e89c49eae5 415 }
ppo 0:c1e89c49eae5 416
ppo 0:c1e89c49eae5 417 void USBHAL::EP0read(void) {
ppo 0:c1e89c49eae5 418 // Not required
ppo 0:c1e89c49eae5 419 }
ppo 0:c1e89c49eae5 420
ppo 0:c1e89c49eae5 421 uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) {
ppo 0:c1e89c49eae5 422 return endpointReadcore(EP0OUT, buffer);
ppo 0:c1e89c49eae5 423 }
ppo 0:c1e89c49eae5 424
ppo 0:c1e89c49eae5 425 void USBHAL::EP0write(uint8_t *buffer, uint32_t size) {
ppo 0:c1e89c49eae5 426 endpointWritecore(EP0IN, buffer, size);
ppo 0:c1e89c49eae5 427 }
ppo 0:c1e89c49eae5 428
ppo 0:c1e89c49eae5 429 void USBHAL::EP0getWriteResult(void) {
ppo 0:c1e89c49eae5 430 // Not required
ppo 0:c1e89c49eae5 431 }
ppo 0:c1e89c49eae5 432
ppo 0:c1e89c49eae5 433 void USBHAL::EP0stall(void) {
ppo 0:c1e89c49eae5 434 // This will stall both control endpoints
ppo 0:c1e89c49eae5 435 stallEndpoint(EP0OUT);
ppo 0:c1e89c49eae5 436 }
ppo 0:c1e89c49eae5 437
ppo 0:c1e89c49eae5 438 EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) {
ppo 0:c1e89c49eae5 439 return EP_PENDING;
ppo 0:c1e89c49eae5 440 }
ppo 0:c1e89c49eae5 441
ppo 0:c1e89c49eae5 442 EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) {
ppo 0:c1e89c49eae5 443
ppo 0:c1e89c49eae5 444 //for isochronous endpoint, we don't wait an interrupt
ppo 0:c1e89c49eae5 445 if ((endpoint >> 1) % 3 || (endpoint >> 1) == 0) {
ppo 0:c1e89c49eae5 446 if (!(epComplete & EP(endpoint)))
ppo 0:c1e89c49eae5 447 return EP_PENDING;
ppo 0:c1e89c49eae5 448 }
ppo 0:c1e89c49eae5 449
ppo 0:c1e89c49eae5 450 *bytesRead = endpointReadcore(endpoint, buffer);
ppo 0:c1e89c49eae5 451 epComplete &= ~EP(endpoint);
ppo 0:c1e89c49eae5 452 return EP_COMPLETED;
ppo 0:c1e89c49eae5 453 }
ppo 0:c1e89c49eae5 454
ppo 0:c1e89c49eae5 455 EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) {
ppo 0:c1e89c49eae5 456 if (getEndpointStallState(endpoint)) {
ppo 0:c1e89c49eae5 457 return EP_STALLED;
ppo 0:c1e89c49eae5 458 }
ppo 0:c1e89c49eae5 459
ppo 0:c1e89c49eae5 460 epComplete &= ~EP(endpoint);
ppo 0:c1e89c49eae5 461
ppo 0:c1e89c49eae5 462 endpointWritecore(endpoint, data, size);
ppo 0:c1e89c49eae5 463 return EP_PENDING;
ppo 0:c1e89c49eae5 464 }
ppo 0:c1e89c49eae5 465
ppo 0:c1e89c49eae5 466 EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) {
ppo 0:c1e89c49eae5 467 if (epComplete & EP(endpoint)) {
ppo 0:c1e89c49eae5 468 epComplete &= ~EP(endpoint);
ppo 0:c1e89c49eae5 469 return EP_COMPLETED;
ppo 0:c1e89c49eae5 470 }
ppo 0:c1e89c49eae5 471
ppo 0:c1e89c49eae5 472 return EP_PENDING;
ppo 0:c1e89c49eae5 473 }
ppo 0:c1e89c49eae5 474
ppo 0:c1e89c49eae5 475 bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t flags) {
ppo 0:c1e89c49eae5 476 // Realise an endpoint
ppo 0:c1e89c49eae5 477 LPC_USB->USBDevIntClr = EP_RLZED;
ppo 0:c1e89c49eae5 478 LPC_USB->USBReEp |= EP(endpoint);
ppo 0:c1e89c49eae5 479 LPC_USB->USBEpInd = endpoint;
ppo 0:c1e89c49eae5 480 LPC_USB->USBMaxPSize = maxPacket;
ppo 0:c1e89c49eae5 481
ppo 0:c1e89c49eae5 482 while (!(LPC_USB->USBDevIntSt & EP_RLZED));
ppo 0:c1e89c49eae5 483 LPC_USB->USBDevIntClr = EP_RLZED;
ppo 0:c1e89c49eae5 484
ppo 0:c1e89c49eae5 485 // Clear stall state
ppo 0:c1e89c49eae5 486 endpointStallState &= ~EP(endpoint);
ppo 0:c1e89c49eae5 487
ppo 0:c1e89c49eae5 488 enableEndpointEvent(endpoint);
ppo 0:c1e89c49eae5 489 return true;
ppo 0:c1e89c49eae5 490 }
ppo 0:c1e89c49eae5 491
ppo 0:c1e89c49eae5 492 void USBHAL::stallEndpoint(uint8_t endpoint) {
ppo 0:c1e89c49eae5 493 // Stall an endpoint
ppo 0:c1e89c49eae5 494 if ( (endpoint==EP0IN) || (endpoint==EP0OUT) ) {
ppo 0:c1e89c49eae5 495 // Conditionally stall both control endpoints
ppo 0:c1e89c49eae5 496 SIEsetEndpointStatus(EP0OUT, SIE_SES_CND_ST);
ppo 0:c1e89c49eae5 497 } else {
ppo 0:c1e89c49eae5 498 SIEsetEndpointStatus(endpoint, SIE_SES_ST);
ppo 0:c1e89c49eae5 499
ppo 0:c1e89c49eae5 500 // Update stall state
ppo 0:c1e89c49eae5 501 endpointStallState |= EP(endpoint);
ppo 0:c1e89c49eae5 502 }
ppo 0:c1e89c49eae5 503 }
ppo 0:c1e89c49eae5 504
ppo 0:c1e89c49eae5 505 void USBHAL::unstallEndpoint(uint8_t endpoint) {
ppo 0:c1e89c49eae5 506 // Unstall an endpoint. The endpoint will also be reinitialised
ppo 0:c1e89c49eae5 507 SIEsetEndpointStatus(endpoint, 0);
ppo 0:c1e89c49eae5 508
ppo 0:c1e89c49eae5 509 // Update stall state
ppo 0:c1e89c49eae5 510 endpointStallState &= ~EP(endpoint);
ppo 0:c1e89c49eae5 511 }
ppo 0:c1e89c49eae5 512
ppo 0:c1e89c49eae5 513 bool USBHAL::getEndpointStallState(uint8_t endpoint) {
ppo 0:c1e89c49eae5 514 // Returns true if endpoint stalled
ppo 0:c1e89c49eae5 515 return endpointStallState & EP(endpoint);
ppo 0:c1e89c49eae5 516 }
ppo 0:c1e89c49eae5 517
ppo 0:c1e89c49eae5 518 void USBHAL::remoteWakeup(void) {
ppo 0:c1e89c49eae5 519 // Remote wakeup
ppo 0:c1e89c49eae5 520 uint8_t status;
ppo 0:c1e89c49eae5 521
ppo 0:c1e89c49eae5 522 // Enable USB clocks
ppo 0:c1e89c49eae5 523 LPC_USB->USBClkCtrl |= DEV_CLK_EN | AHB_CLK_EN;
ppo 0:c1e89c49eae5 524 while (LPC_USB->USBClkSt != (DEV_CLK_ON | AHB_CLK_ON));
ppo 0:c1e89c49eae5 525
ppo 0:c1e89c49eae5 526 status = SIEgetDeviceStatus();
ppo 0:c1e89c49eae5 527 SIEsetDeviceStatus(status & ~SIE_DS_SUS);
ppo 0:c1e89c49eae5 528 }
ppo 0:c1e89c49eae5 529
ppo 0:c1e89c49eae5 530
ppo 0:c1e89c49eae5 531
ppo 0:c1e89c49eae5 532
ppo 0:c1e89c49eae5 533
ppo 0:c1e89c49eae5 534 void USBHAL::_usbisr(void) {
ppo 0:c1e89c49eae5 535 instance->usbisr();
ppo 0:c1e89c49eae5 536 }
ppo 0:c1e89c49eae5 537
ppo 0:c1e89c49eae5 538
ppo 0:c1e89c49eae5 539 void USBHAL::usbisr(void) {
ppo 0:c1e89c49eae5 540 uint8_t devStat;
ppo 0:c1e89c49eae5 541
ppo 0:c1e89c49eae5 542 if (LPC_USB->USBDevIntSt & FRAME) {
ppo 0:c1e89c49eae5 543 // Start of frame event
ppo 0:c1e89c49eae5 544 SOF(SIEgetFrameNumber());
ppo 0:c1e89c49eae5 545 // Clear interrupt status flag
ppo 0:c1e89c49eae5 546 LPC_USB->USBDevIntClr = FRAME;
ppo 0:c1e89c49eae5 547 }
ppo 0:c1e89c49eae5 548
ppo 0:c1e89c49eae5 549 if (LPC_USB->USBDevIntSt & DEV_STAT) {
ppo 0:c1e89c49eae5 550 // Device Status interrupt
ppo 0:c1e89c49eae5 551 // Must clear the interrupt status flag before reading the device status from the SIE
ppo 0:c1e89c49eae5 552 LPC_USB->USBDevIntClr = DEV_STAT;
ppo 0:c1e89c49eae5 553
ppo 0:c1e89c49eae5 554 // Read device status from SIE
ppo 0:c1e89c49eae5 555 devStat = SIEgetDeviceStatus();
ppo 0:c1e89c49eae5 556 //printf("devStat: %d\r\n", devStat);
ppo 0:c1e89c49eae5 557
ppo 0:c1e89c49eae5 558 if (devStat & SIE_DS_SUS_CH) {
ppo 0:c1e89c49eae5 559 // Suspend status changed
ppo 0:c1e89c49eae5 560 if((devStat & SIE_DS_SUS) != 0) {
ppo 0:c1e89c49eae5 561 suspendStateChanged(0);
ppo 0:c1e89c49eae5 562 }
ppo 0:c1e89c49eae5 563 }
ppo 0:c1e89c49eae5 564
ppo 0:c1e89c49eae5 565 if (devStat & SIE_DS_RST) {
ppo 0:c1e89c49eae5 566 // Bus reset
ppo 0:c1e89c49eae5 567 if((devStat & SIE_DS_SUS) == 0) {
ppo 0:c1e89c49eae5 568 suspendStateChanged(1);
ppo 0:c1e89c49eae5 569 }
ppo 0:c1e89c49eae5 570 busReset();
ppo 0:c1e89c49eae5 571 }
ppo 0:c1e89c49eae5 572 }
ppo 0:c1e89c49eae5 573
ppo 0:c1e89c49eae5 574 if (LPC_USB->USBDevIntSt & EP_SLOW) {
ppo 0:c1e89c49eae5 575 // (Slow) Endpoint Interrupt
ppo 0:c1e89c49eae5 576
ppo 0:c1e89c49eae5 577 // Process each endpoint interrupt
ppo 0:c1e89c49eae5 578 if (LPC_USB->USBEpIntSt & EP(EP0OUT)) {
ppo 0:c1e89c49eae5 579 if (selectEndpointClearInterrupt(EP0OUT) & SIE_SE_STP) {
ppo 0:c1e89c49eae5 580 // this is a setup packet
ppo 0:c1e89c49eae5 581 EP0setupCallback();
ppo 0:c1e89c49eae5 582 } else {
ppo 0:c1e89c49eae5 583 EP0out();
ppo 0:c1e89c49eae5 584 }
ppo 0:c1e89c49eae5 585 LPC_USB->USBDevIntClr = EP_SLOW;
ppo 0:c1e89c49eae5 586 }
ppo 0:c1e89c49eae5 587
ppo 0:c1e89c49eae5 588 if (LPC_USB->USBEpIntSt & EP(EP0IN)) {
ppo 0:c1e89c49eae5 589 selectEndpointClearInterrupt(EP0IN);
ppo 0:c1e89c49eae5 590 LPC_USB->USBDevIntClr = EP_SLOW;
ppo 0:c1e89c49eae5 591 EP0in();
ppo 0:c1e89c49eae5 592 }
ppo 0:c1e89c49eae5 593
ppo 0:c1e89c49eae5 594 // TODO: This should cover all endpoints, not just EP1,2,3:
ppo 0:c1e89c49eae5 595 if (LPC_USB->USBEpIntSt & EP(EP1IN)) {
ppo 0:c1e89c49eae5 596 selectEndpointClearInterrupt(EP1IN);
ppo 0:c1e89c49eae5 597 epComplete |= EP(EP1IN);
ppo 0:c1e89c49eae5 598 LPC_USB->USBDevIntClr = EP_SLOW;
ppo 0:c1e89c49eae5 599 if (EP1_IN_callback())
ppo 0:c1e89c49eae5 600 epComplete &= ~EP(EP1IN);
ppo 0:c1e89c49eae5 601 }
ppo 0:c1e89c49eae5 602
ppo 0:c1e89c49eae5 603 if (LPC_USB->USBEpIntSt & EP(EP1OUT)) {
ppo 0:c1e89c49eae5 604 selectEndpointClearInterrupt(EP1OUT);
ppo 0:c1e89c49eae5 605 epComplete |= EP(EP1OUT);
ppo 0:c1e89c49eae5 606 LPC_USB->USBDevIntClr = EP_SLOW;
ppo 0:c1e89c49eae5 607 if (EP1_OUT_callback())
ppo 0:c1e89c49eae5 608 epComplete &= ~EP(EP1OUT);
ppo 0:c1e89c49eae5 609 }
ppo 0:c1e89c49eae5 610
ppo 0:c1e89c49eae5 611 if (LPC_USB->USBEpIntSt & EP(EP2IN)) {
ppo 0:c1e89c49eae5 612 selectEndpointClearInterrupt(EP2IN);
ppo 0:c1e89c49eae5 613 epComplete |= EP(EP2IN);
ppo 0:c1e89c49eae5 614 LPC_USB->USBDevIntClr = EP_SLOW;
ppo 0:c1e89c49eae5 615 if (EP2_IN_callback())
ppo 0:c1e89c49eae5 616 epComplete &= ~EP(EP2IN);
ppo 0:c1e89c49eae5 617 }
ppo 0:c1e89c49eae5 618
ppo 0:c1e89c49eae5 619 if (LPC_USB->USBEpIntSt & EP(EP2OUT)) {
ppo 0:c1e89c49eae5 620 selectEndpointClearInterrupt(EP2OUT);
ppo 0:c1e89c49eae5 621 epComplete |= EP(EP2OUT);
ppo 0:c1e89c49eae5 622 LPC_USB->USBDevIntClr = EP_SLOW;
ppo 0:c1e89c49eae5 623 if (EP2_OUT_callback())
ppo 0:c1e89c49eae5 624 epComplete &= ~EP(EP2OUT);
ppo 0:c1e89c49eae5 625 }
ppo 0:c1e89c49eae5 626
ppo 0:c1e89c49eae5 627 if (LPC_USB->USBEpIntSt & EP(EP3IN)) {
ppo 0:c1e89c49eae5 628 selectEndpointClearInterrupt(EP3IN);
ppo 0:c1e89c49eae5 629 epComplete |= EP(EP3IN);
ppo 0:c1e89c49eae5 630 LPC_USB->USBDevIntClr = EP_SLOW;
ppo 0:c1e89c49eae5 631 if (EP3_IN_callback())
ppo 0:c1e89c49eae5 632 epComplete &= ~EP(EP3IN);
ppo 0:c1e89c49eae5 633 }
ppo 0:c1e89c49eae5 634
ppo 0:c1e89c49eae5 635 if (LPC_USB->USBEpIntSt & EP(EP3OUT)) {
ppo 0:c1e89c49eae5 636 selectEndpointClearInterrupt(EP3OUT);
ppo 0:c1e89c49eae5 637 epComplete |= EP(EP3OUT);
ppo 0:c1e89c49eae5 638 LPC_USB->USBDevIntClr = EP_SLOW;
ppo 0:c1e89c49eae5 639 if (EP3_OUT_callback())
ppo 0:c1e89c49eae5 640 epComplete &= ~EP(EP3OUT);
ppo 0:c1e89c49eae5 641 }
ppo 0:c1e89c49eae5 642 }
ppo 0:c1e89c49eae5 643 }
ppo 0:c1e89c49eae5 644
ppo 0:c1e89c49eae5 645 #endif