Suga koubou / Mbed 2 deprecated XTouch-djay-bridge

X-TOUCH to djay bridge

Dependencies:   mbed mbed-rtos FATFileSystem

USBHost/targets/TARGET_RENESAS/TARGET_VK_RZ_A1H/ohci_wrapp_RZ_A1.h@1:0dac72ab5910, 2019-06-05 (annotated)

Committer:
okini3939
Date:
Wed Jun 05 04:54:37 2019 +0000
Revision:
1:0dac72ab5910
sample

Who changed what in which revision?

UserRevisionLine numberNew contents of line
okini3939 1:0dac72ab5910 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
okini3939 1:0dac72ab5910 2 *
okini3939 1:0dac72ab5910 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
okini3939 1:0dac72ab5910 4 * and associated documentation files (the "Software"), to deal in the Software without
okini3939 1:0dac72ab5910 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
okini3939 1:0dac72ab5910 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
okini3939 1:0dac72ab5910 7 * Software is furnished to do so, subject to the following conditions:
okini3939 1:0dac72ab5910 8 *
okini3939 1:0dac72ab5910 9 * The above copyright notice and this permission notice shall be included in all copies or
okini3939 1:0dac72ab5910 10 * substantial portions of the Software.
okini3939 1:0dac72ab5910 11 *
okini3939 1:0dac72ab5910 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
okini3939 1:0dac72ab5910 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
okini3939 1:0dac72ab5910 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
okini3939 1:0dac72ab5910 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
okini3939 1:0dac72ab5910 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
okini3939 1:0dac72ab5910 17 */
okini3939 1:0dac72ab5910 18
okini3939 1:0dac72ab5910 19 #ifndef OHCI_WRAPP_RZ_A1_H
okini3939 1:0dac72ab5910 20 #define OHCI_WRAPP_RZ_A1_H
okini3939 1:0dac72ab5910 21
okini3939 1:0dac72ab5910 22 #ifdef __cplusplus
okini3939 1:0dac72ab5910 23 extern "C" {
okini3939 1:0dac72ab5910 24 #endif
okini3939 1:0dac72ab5910 25
okini3939 1:0dac72ab5910 26 #define OHCI_REG_REVISION (0x00) /* HcRevision */
okini3939 1:0dac72ab5910 27 #define OHCI_REG_CONTROL (0x04) /* HcControl */
okini3939 1:0dac72ab5910 28 #define OHCI_REG_COMMANDSTATUS (0x08) /* HcCommandStatus */
okini3939 1:0dac72ab5910 29 #define OHCI_REG_INTERRUPTSTATUS (0x0C) /* HcInterruptStatus */
okini3939 1:0dac72ab5910 30 #define OHCI_REG_INTERRUPTENABLE (0x10) /* HcInterruptEnable */
okini3939 1:0dac72ab5910 31 #define OHCI_REG_INTERRUPTDISABLE (0x14) /* HcInterruptDisable */
okini3939 1:0dac72ab5910 32 #define OHCI_REG_HCCA (0x18) /* HcHCCA */
okini3939 1:0dac72ab5910 33 #define OHCI_REG_PERIODCURRENTED (0x1C) /* HcPeriodCurrentED */
okini3939 1:0dac72ab5910 34 #define OHCI_REG_CONTROLHEADED (0x20) /* HcControlHeadED */
okini3939 1:0dac72ab5910 35 #define OHCI_REG_CONTROLCURRENTED (0x24) /* HcControlCurrentED */
okini3939 1:0dac72ab5910 36 #define OHCI_REG_BULKHEADED (0x28) /* HcBulkHeadED */
okini3939 1:0dac72ab5910 37 #define OHCI_REG_BULKCURRENTED (0x2C) /* HcBulkCurrentED */
okini3939 1:0dac72ab5910 38 #define OHCI_REG_DONEHEADED (0x30) /* HcDoneHead */
okini3939 1:0dac72ab5910 39 #define OHCI_REG_FMINTERVAL (0x34) /* HcFmInterval */
okini3939 1:0dac72ab5910 40 #define OHCI_REG_FMREMAINING (0x38) /* HcFmRemaining */
okini3939 1:0dac72ab5910 41 #define OHCI_REG_FMNUMBER (0x3C) /* HcFmNumber */
okini3939 1:0dac72ab5910 42 #define OHCI_REG_PERIODICSTART (0x40) /* HcPeriodicStart */
okini3939 1:0dac72ab5910 43 #define OHCI_REG_LSTHRESHOLD (0x44) /* HcLSThreshold */
okini3939 1:0dac72ab5910 44 #define OHCI_REG_RHDESCRIPTORA (0x48) /* HcRhDescriptorA */
okini3939 1:0dac72ab5910 45 #define OHCI_REG_RHDESCRIPTORB (0x4C) /* HcRhDescriptorB */
okini3939 1:0dac72ab5910 46 #define OHCI_REG_RHSTATUS (0x50) /* HcRhStatus */
okini3939 1:0dac72ab5910 47 #define OHCI_REG_RHPORTSTATUS1 (0x54) /* HcRhPortStatus1 */
okini3939 1:0dac72ab5910 48
okini3939 1:0dac72ab5910 49 typedef void (usbisr_fnc_t)(void);
okini3939 1:0dac72ab5910 50
okini3939 1:0dac72ab5910 51 extern void ohciwrapp_init(usbisr_fnc_t *p_usbisr_fnc);
okini3939 1:0dac72ab5910 52 extern uint32_t ohciwrapp_reg_r(uint32_t reg_ofs);
okini3939 1:0dac72ab5910 53 extern void ohciwrapp_reg_w(uint32_t reg_ofs, uint32_t set_data);
okini3939 1:0dac72ab5910 54 extern void ohciwrapp_interrupt(uint32_t int_sense);
okini3939 1:0dac72ab5910 55
okini3939 1:0dac72ab5910 56 #ifdef __cplusplus
okini3939 1:0dac72ab5910 57 }
okini3939 1:0dac72ab5910 58 #endif
okini3939 1:0dac72ab5910 59
okini3939 1:0dac72ab5910 60 #endif /* OHCI_WRAPP_RZ_A1_H */