Trying to log data from UM6 sensor with GPS receiver LS20031. I have two problems: - I can't log to file at a fast rate (<0.5s) without data values freezing to a fixed value. Print to pc screen it works fine. Ideally I would do this with an interrupt (e.g. ticker) so that the time of each reading is a fixed interval - I removed this as I thought this was causing the problem. - I want to record GPS lat and long. I have setup the GPS ground speed so I know the sensor are communicating. So I possibly havent set the config file to correctly interpet these two signals.

Dependencies:   MODSERIAL mbed

Fork of UM6_IMU_AHRS_2012 by lhiggs CSUM

Committer:
njewin
Date:
Sat May 04 09:34:15 2013 +0000
Revision:
6:43029c69b9ac
Parent:
0:03c649c76388
publish version ; bugs need correcting for:; - logging to file at 10ms rate; - reading GPS lat and long data

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lhiggs 0:03c649c76388 1 /*
lhiggs 0:03c649c76388 2 Copyright (c) 2010 Andy Kirkham
lhiggs 0:03c649c76388 3
lhiggs 0:03c649c76388 4 Permission is hereby granted, free of charge, to any person obtaining a copy
lhiggs 0:03c649c76388 5 of this software and associated documentation files (the "Software"), to deal
lhiggs 0:03c649c76388 6 in the Software without restriction, including without limitation the rights
lhiggs 0:03c649c76388 7 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
lhiggs 0:03c649c76388 8 copies of the Software, and to permit persons to whom the Software is
lhiggs 0:03c649c76388 9 furnished to do so, subject to the following conditions:
lhiggs 0:03c649c76388 10
lhiggs 0:03c649c76388 11 The above copyright notice and this permission notice shall be included in
lhiggs 0:03c649c76388 12 all copies or substantial portions of the Software.
lhiggs 0:03c649c76388 13
lhiggs 0:03c649c76388 14 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
lhiggs 0:03c649c76388 15 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
lhiggs 0:03c649c76388 16 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
lhiggs 0:03c649c76388 17 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
lhiggs 0:03c649c76388 18 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
lhiggs 0:03c649c76388 19 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
lhiggs 0:03c649c76388 20 THE SOFTWARE.
lhiggs 0:03c649c76388 21
lhiggs 0:03c649c76388 22 @file MODSERIAL.h
lhiggs 0:03c649c76388 23 @purpose Extends Serial to provide fully buffered IO
lhiggs 0:03c649c76388 24 @version 1.6
lhiggs 0:03c649c76388 25 @date Nov 2010
lhiggs 0:03c649c76388 26 @author Andy Kirkham
lhiggs 0:03c649c76388 27 */
lhiggs 0:03c649c76388 28
lhiggs 0:03c649c76388 29 #include "MODSERIAL.h"
lhiggs 0:03c649c76388 30 #include "MACROS.h"
lhiggs 0:03c649c76388 31
lhiggs 0:03c649c76388 32 namespace AjK {
lhiggs 0:03c649c76388 33
lhiggs 0:03c649c76388 34 MODSERIAL::MODSERIAL( PinName tx, PinName rx, const char *name ) : Serial( tx, rx, name )
lhiggs 0:03c649c76388 35 {
lhiggs 0:03c649c76388 36 init( MODSERIAL_DEFAULT_TX_BUFFER_SIZE, MODSERIAL_DEFAULT_RX_BUFFER_SIZE );
lhiggs 0:03c649c76388 37 }
lhiggs 0:03c649c76388 38
lhiggs 0:03c649c76388 39 MODSERIAL::MODSERIAL( PinName tx, PinName rx, int bufferSize, const char *name ) : Serial( tx, rx, name )
lhiggs 0:03c649c76388 40 {
lhiggs 0:03c649c76388 41 init( bufferSize, bufferSize );
lhiggs 0:03c649c76388 42 }
lhiggs 0:03c649c76388 43
lhiggs 0:03c649c76388 44 MODSERIAL::MODSERIAL( PinName tx, PinName rx, int txSize, int rxSize, const char *name ) : Serial( tx, rx, name )
lhiggs 0:03c649c76388 45 {
lhiggs 0:03c649c76388 46 init( txSize, rxSize );
lhiggs 0:03c649c76388 47 }
lhiggs 0:03c649c76388 48
lhiggs 0:03c649c76388 49 MODSERIAL::~MODSERIAL()
lhiggs 0:03c649c76388 50 {
lhiggs 0:03c649c76388 51 disableIrq();
lhiggs 0:03c649c76388 52 if ( buffer[0] != NULL) free((char *)buffer[0] );
lhiggs 0:03c649c76388 53 if ( buffer[1] != NULL) free((char *)buffer[1] );
lhiggs 0:03c649c76388 54 }
lhiggs 0:03c649c76388 55
lhiggs 0:03c649c76388 56 bool
lhiggs 0:03c649c76388 57 MODSERIAL::txBufferFull( void )
lhiggs 0:03c649c76388 58 {
lhiggs 0:03c649c76388 59 return MODSERIAL_TX_BUFFER_FULL;
lhiggs 0:03c649c76388 60 }
lhiggs 0:03c649c76388 61
lhiggs 0:03c649c76388 62 bool
lhiggs 0:03c649c76388 63 MODSERIAL::rxBufferFull( void )
lhiggs 0:03c649c76388 64 {
lhiggs 0:03c649c76388 65 return MODSERIAL_RX_BUFFER_FULL;
lhiggs 0:03c649c76388 66 }
lhiggs 0:03c649c76388 67
lhiggs 0:03c649c76388 68 bool
lhiggs 0:03c649c76388 69 MODSERIAL::txBufferEmpty( void )
lhiggs 0:03c649c76388 70 {
lhiggs 0:03c649c76388 71 return MODSERIAL_TX_BUFFER_EMPTY;
lhiggs 0:03c649c76388 72 }
lhiggs 0:03c649c76388 73
lhiggs 0:03c649c76388 74 bool
lhiggs 0:03c649c76388 75 MODSERIAL::rxBufferEmpty( void )
lhiggs 0:03c649c76388 76 {
lhiggs 0:03c649c76388 77 return MODSERIAL_RX_BUFFER_EMPTY;
lhiggs 0:03c649c76388 78 }
lhiggs 0:03c649c76388 79
lhiggs 0:03c649c76388 80 bool
lhiggs 0:03c649c76388 81 MODSERIAL::txIsBusy( void )
lhiggs 0:03c649c76388 82 {
lhiggs 0:03c649c76388 83 return ( _LSR & ( 3UL << 5 ) == 0 ) ? true : false;
lhiggs 0:03c649c76388 84 }
lhiggs 0:03c649c76388 85
lhiggs 0:03c649c76388 86 void
lhiggs 0:03c649c76388 87 MODSERIAL::disableIrq( void )
lhiggs 0:03c649c76388 88 {
lhiggs 0:03c649c76388 89
lhiggs 0:03c649c76388 90 #ifdef __LPC11UXX_H__
lhiggs 0:03c649c76388 91 NVIC_DisableIRQ( UART_IRQn );
lhiggs 0:03c649c76388 92 #else
lhiggs 0:03c649c76388 93 switch(_uidx) {
lhiggs 0:03c649c76388 94 case 0: NVIC_DisableIRQ( UART0_IRQn ); break;
lhiggs 0:03c649c76388 95 case 1: NVIC_DisableIRQ( UART1_IRQn ); break;
lhiggs 0:03c649c76388 96 case 2: NVIC_DisableIRQ( UART2_IRQn ); break;
lhiggs 0:03c649c76388 97 case 3: NVIC_DisableIRQ( UART3_IRQn ); break;
lhiggs 0:03c649c76388 98 }
lhiggs 0:03c649c76388 99 #endif
lhiggs 0:03c649c76388 100 }
lhiggs 0:03c649c76388 101
lhiggs 0:03c649c76388 102 void
lhiggs 0:03c649c76388 103 MODSERIAL::enableIrq(void)
lhiggs 0:03c649c76388 104 {
lhiggs 0:03c649c76388 105 #ifdef __LPC11UXX_H__
lhiggs 0:03c649c76388 106 NVIC_EnableIRQ( UART_IRQn );
lhiggs 0:03c649c76388 107 #else
lhiggs 0:03c649c76388 108 switch( _uidx ) {
lhiggs 0:03c649c76388 109 case 0: NVIC_EnableIRQ( UART0_IRQn ); break;
lhiggs 0:03c649c76388 110 case 1: NVIC_EnableIRQ( UART1_IRQn ); break;
lhiggs 0:03c649c76388 111 case 2: NVIC_EnableIRQ( UART2_IRQn ); break;
lhiggs 0:03c649c76388 112 case 3: NVIC_EnableIRQ( UART3_IRQn ); break;
lhiggs 0:03c649c76388 113 }
lhiggs 0:03c649c76388 114 #endif
lhiggs 0:03c649c76388 115 }
lhiggs 0:03c649c76388 116
lhiggs 0:03c649c76388 117 int
lhiggs 0:03c649c76388 118 MODSERIAL::rxDiscardLastChar( void )
lhiggs 0:03c649c76388 119 {
lhiggs 0:03c649c76388 120 // This function can only be called indirectly from
lhiggs 0:03c649c76388 121 // an rxCallback function. Therefore, we know we
lhiggs 0:03c649c76388 122 // just placed a char into the buffer.
lhiggs 0:03c649c76388 123 char c = buffer[RxIrq][buffer_in[RxIrq]];
lhiggs 0:03c649c76388 124
lhiggs 0:03c649c76388 125 if (buffer_count[RxIrq]) {
lhiggs 0:03c649c76388 126 buffer_count[RxIrq]--;
lhiggs 0:03c649c76388 127 buffer_in[RxIrq]--;
lhiggs 0:03c649c76388 128 if (buffer_in[RxIrq] < 0) {
lhiggs 0:03c649c76388 129 buffer_in[RxIrq] = buffer_size[RxIrq] - 1;
lhiggs 0:03c649c76388 130 }
lhiggs 0:03c649c76388 131 }
lhiggs 0:03c649c76388 132
lhiggs 0:03c649c76388 133 return (int)c;
lhiggs 0:03c649c76388 134 }
lhiggs 0:03c649c76388 135
lhiggs 0:03c649c76388 136
lhiggs 0:03c649c76388 137 }; // namespace AjK ends