Eurobot2012_Primary

Dependencies:   mbed Eurobot_2012_Primary

Committer:
narshu
Date:
Wed Oct 17 22:22:47 2012 +0000
Revision:
26:0995f61cb7b8
Parent:
25:143b19c1fb05
Eurobot 2012 Primary;

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narshu 25:143b19c1fb05 1 /**
narshu 25:143b19c1fb05 2 * @author Aaron Berk
narshu 25:143b19c1fb05 3 *
narshu 25:143b19c1fb05 4 * @section LICENSE
narshu 25:143b19c1fb05 5 *
narshu 25:143b19c1fb05 6 * Copyright (c) 2010 ARM Limited
narshu 25:143b19c1fb05 7 *
narshu 25:143b19c1fb05 8 * Permission is hereby granted, free of charge, to any person obtaining a copy
narshu 25:143b19c1fb05 9 * of this software and associated documentation files (the "Software"), to deal
narshu 25:143b19c1fb05 10 * in the Software without restriction, including without limitation the rights
narshu 25:143b19c1fb05 11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
narshu 25:143b19c1fb05 12 * copies of the Software, and to permit persons to whom the Software is
narshu 25:143b19c1fb05 13 * furnished to do so, subject to the following conditions:
narshu 25:143b19c1fb05 14 *
narshu 25:143b19c1fb05 15 * The above copyright notice and this permission notice shall be included in
narshu 25:143b19c1fb05 16 * all copies or substantial portions of the Software.
narshu 25:143b19c1fb05 17 *
narshu 25:143b19c1fb05 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
narshu 25:143b19c1fb05 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
narshu 25:143b19c1fb05 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
narshu 25:143b19c1fb05 21 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
narshu 25:143b19c1fb05 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
narshu 25:143b19c1fb05 23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
narshu 25:143b19c1fb05 24 * THE SOFTWARE.
narshu 25:143b19c1fb05 25 *
narshu 25:143b19c1fb05 26 * @section DESCRIPTION
narshu 25:143b19c1fb05 27 *
narshu 25:143b19c1fb05 28 * Quadrature Encoder Interface.
narshu 25:143b19c1fb05 29 *
narshu 25:143b19c1fb05 30 * A quadrature encoder consists of two code tracks on a disc which are 90
narshu 25:143b19c1fb05 31 * degrees out of phase. It can be used to determine how far a wheel has
narshu 25:143b19c1fb05 32 * rotated, relative to a known starting position.
narshu 25:143b19c1fb05 33 *
narshu 25:143b19c1fb05 34 * Only one code track changes at a time leading to a more robust system than
narshu 25:143b19c1fb05 35 * a single track, because any jitter around any edge won't cause a state
narshu 25:143b19c1fb05 36 * change as the other track will remain constant.
narshu 25:143b19c1fb05 37 *
narshu 25:143b19c1fb05 38 * Encoders can be a homebrew affair, consisting of infrared emitters/receivers
narshu 25:143b19c1fb05 39 * and paper code tracks consisting of alternating black and white sections;
narshu 25:143b19c1fb05 40 * alternatively, complete disk and PCB emitter/receiver encoder systems can
narshu 25:143b19c1fb05 41 * be bought, but the interface, regardless of implementation is the same.
narshu 25:143b19c1fb05 42 *
narshu 25:143b19c1fb05 43 * +-----+ +-----+ +-----+
narshu 25:143b19c1fb05 44 * Channel A | ^ | | | | |
narshu 25:143b19c1fb05 45 * ---+ ^ +-----+ +-----+ +-----
narshu 25:143b19c1fb05 46 * ^ ^
narshu 25:143b19c1fb05 47 * ^ +-----+ +-----+ +-----+
narshu 25:143b19c1fb05 48 * Channel B ^ | | | | | |
narshu 25:143b19c1fb05 49 * ------+ +-----+ +-----+ +-----
narshu 25:143b19c1fb05 50 * ^ ^
narshu 25:143b19c1fb05 51 * ^ ^
narshu 25:143b19c1fb05 52 * 90deg
narshu 25:143b19c1fb05 53 *
narshu 25:143b19c1fb05 54 * The interface uses X2 encoding by default which calculates the pulse count
narshu 25:143b19c1fb05 55 * based on reading the current state after each rising and falling edge of
narshu 25:143b19c1fb05 56 * channel A.
narshu 25:143b19c1fb05 57 *
narshu 25:143b19c1fb05 58 * +-----+ +-----+ +-----+
narshu 25:143b19c1fb05 59 * Channel A | | | | | |
narshu 25:143b19c1fb05 60 * ---+ +-----+ +-----+ +-----
narshu 25:143b19c1fb05 61 * ^ ^ ^ ^ ^
narshu 25:143b19c1fb05 62 * ^ +-----+ ^ +-----+ ^ +-----+
narshu 25:143b19c1fb05 63 * Channel B ^ | ^ | ^ | ^ | ^ | |
narshu 25:143b19c1fb05 64 * ------+ ^ +-----+ ^ +-----+ +--
narshu 25:143b19c1fb05 65 * ^ ^ ^ ^ ^
narshu 25:143b19c1fb05 66 * ^ ^ ^ ^ ^
narshu 25:143b19c1fb05 67 * Pulse count 0 1 2 3 4 5 ...
narshu 25:143b19c1fb05 68 *
narshu 25:143b19c1fb05 69 * This interface can also use X4 encoding which calculates the pulse count
narshu 25:143b19c1fb05 70 * based on reading the current state after each rising and falling edge of
narshu 25:143b19c1fb05 71 * either channel.
narshu 25:143b19c1fb05 72 *
narshu 25:143b19c1fb05 73 * +-----+ +-----+ +-----+
narshu 25:143b19c1fb05 74 * Channel A | | | | | |
narshu 25:143b19c1fb05 75 * ---+ +-----+ +-----+ +-----
narshu 25:143b19c1fb05 76 * ^ ^ ^ ^ ^
narshu 25:143b19c1fb05 77 * ^ +-----+ ^ +-----+ ^ +-----+
narshu 25:143b19c1fb05 78 * Channel B ^ | ^ | ^ | ^ | ^ | |
narshu 25:143b19c1fb05 79 * ------+ ^ +-----+ ^ +-----+ +--
narshu 25:143b19c1fb05 80 * ^ ^ ^ ^ ^ ^ ^ ^ ^ ^
narshu 25:143b19c1fb05 81 * ^ ^ ^ ^ ^ ^ ^ ^ ^ ^
narshu 25:143b19c1fb05 82 * Pulse count 0 1 2 3 4 5 6 7 8 9 ...
narshu 25:143b19c1fb05 83 *
narshu 25:143b19c1fb05 84 * It defaults
narshu 25:143b19c1fb05 85 *
narshu 25:143b19c1fb05 86 * An optional index channel can be used which determines when a full
narshu 25:143b19c1fb05 87 * revolution has occured.
narshu 25:143b19c1fb05 88 *
narshu 25:143b19c1fb05 89 * If a 4 pules per revolution encoder was used, with X4 encoding,
narshu 25:143b19c1fb05 90 * the following would be observed.
narshu 25:143b19c1fb05 91 *
narshu 25:143b19c1fb05 92 * +-----+ +-----+ +-----+
narshu 25:143b19c1fb05 93 * Channel A | | | | | |
narshu 25:143b19c1fb05 94 * ---+ +-----+ +-----+ +-----
narshu 25:143b19c1fb05 95 * ^ ^ ^ ^ ^
narshu 25:143b19c1fb05 96 * ^ +-----+ ^ +-----+ ^ +-----+
narshu 25:143b19c1fb05 97 * Channel B ^ | ^ | ^ | ^ | ^ | |
narshu 25:143b19c1fb05 98 * ------+ ^ +-----+ ^ +-----+ +--
narshu 25:143b19c1fb05 99 * ^ ^ ^ ^ ^ ^ ^ ^ ^ ^
narshu 25:143b19c1fb05 100 * ^ ^ ^ ^ ^ ^ ^ ^ ^ ^
narshu 25:143b19c1fb05 101 * ^ ^ ^ +--+ ^ ^ +--+ ^
narshu 25:143b19c1fb05 102 * ^ ^ ^ | | ^ ^ | | ^
narshu 25:143b19c1fb05 103 * Index ------------+ +--------+ +-----------
narshu 25:143b19c1fb05 104 * ^ ^ ^ ^ ^ ^ ^ ^ ^ ^
narshu 25:143b19c1fb05 105 * Pulse count 0 1 2 3 4 5 6 7 8 9 ...
narshu 25:143b19c1fb05 106 * Rev. count 0 1 2
narshu 25:143b19c1fb05 107 *
narshu 25:143b19c1fb05 108 * Rotational position in degrees can be calculated by:
narshu 25:143b19c1fb05 109 *
narshu 25:143b19c1fb05 110 * (pulse count / X * N) * 360
narshu 25:143b19c1fb05 111 *
narshu 25:143b19c1fb05 112 * Where X is the encoding type [e.g. X4 encoding => X=4], and N is the number
narshu 25:143b19c1fb05 113 * of pulses per revolution.
narshu 25:143b19c1fb05 114 *
narshu 25:143b19c1fb05 115 * Linear position can be calculated by:
narshu 25:143b19c1fb05 116 *
narshu 25:143b19c1fb05 117 * (pulse count / X * N) * (1 / PPI)
narshu 25:143b19c1fb05 118 *
narshu 25:143b19c1fb05 119 * Where X is encoding type [e.g. X4 encoding => X=44], N is the number of
narshu 25:143b19c1fb05 120 * pulses per revolution, and PPI is pulses per inch, or the equivalent for
narshu 25:143b19c1fb05 121 * any other unit of displacement. PPI can be calculated by taking the
narshu 25:143b19c1fb05 122 * circumference of the wheel or encoder disk and dividing it by the number
narshu 25:143b19c1fb05 123 * of pulses per revolution.
narshu 25:143b19c1fb05 124 */
narshu 25:143b19c1fb05 125
narshu 25:143b19c1fb05 126 #ifndef QEI_H
narshu 25:143b19c1fb05 127 #define QEI_H
narshu 25:143b19c1fb05 128
narshu 25:143b19c1fb05 129 /**
narshu 25:143b19c1fb05 130 * Includes
narshu 25:143b19c1fb05 131 */
narshu 25:143b19c1fb05 132 #include "mbed.h"
narshu 25:143b19c1fb05 133
narshu 25:143b19c1fb05 134 /**
narshu 25:143b19c1fb05 135 * Defines
narshu 25:143b19c1fb05 136 */
narshu 25:143b19c1fb05 137 #define PREV_MASK 0x1 //Mask for the previous state in determining direction
narshu 25:143b19c1fb05 138 //of rotation.
narshu 25:143b19c1fb05 139 #define CURR_MASK 0x2 //Mask for the current state in determining direction
narshu 25:143b19c1fb05 140 //of rotation.
narshu 25:143b19c1fb05 141 #define INVALID 0x3 //XORing two states where both bits have changed.
narshu 25:143b19c1fb05 142
narshu 25:143b19c1fb05 143 /**
narshu 25:143b19c1fb05 144 * Quadrature Encoder Interface.
narshu 25:143b19c1fb05 145 */
narshu 25:143b19c1fb05 146 class QEI {
narshu 25:143b19c1fb05 147
narshu 25:143b19c1fb05 148 public:
narshu 25:143b19c1fb05 149
narshu 25:143b19c1fb05 150 typedef enum Encoding {
narshu 25:143b19c1fb05 151
narshu 25:143b19c1fb05 152 X2_ENCODING,
narshu 25:143b19c1fb05 153 X4_ENCODING
narshu 25:143b19c1fb05 154
narshu 25:143b19c1fb05 155 } Encoding;
narshu 25:143b19c1fb05 156
narshu 25:143b19c1fb05 157 /**
narshu 25:143b19c1fb05 158 * Constructor.
narshu 25:143b19c1fb05 159 *
narshu 25:143b19c1fb05 160 * Reads the current values on channel A and channel B to determine the
narshu 25:143b19c1fb05 161 * initial state.
narshu 25:143b19c1fb05 162 *
narshu 25:143b19c1fb05 163 * Attaches the encode function to the rise/fall interrupt edges of
narshu 25:143b19c1fb05 164 * channels A and B to perform X4 encoding.
narshu 25:143b19c1fb05 165 *
narshu 25:143b19c1fb05 166 * Attaches the index function to the rise interrupt edge of channel index
narshu 25:143b19c1fb05 167 * (if it is used) to count revolutions.
narshu 25:143b19c1fb05 168 *
narshu 25:143b19c1fb05 169 * @param channelA mbed pin for channel A input.
narshu 25:143b19c1fb05 170 * @param channelB mbed pin for channel B input.
narshu 25:143b19c1fb05 171 * @param index mbed pin for optional index channel input,
narshu 25:143b19c1fb05 172 * (pass NC if not needed).
narshu 25:143b19c1fb05 173 * @param pulsesPerRev Number of pulses in one revolution.
narshu 25:143b19c1fb05 174 * @param encoding The encoding to use. Uses X2 encoding by default. X2
narshu 25:143b19c1fb05 175 * encoding uses interrupts on the rising and falling edges
narshu 25:143b19c1fb05 176 * of only channel A where as X4 uses them on both
narshu 25:143b19c1fb05 177 * channels.
narshu 25:143b19c1fb05 178 */
narshu 25:143b19c1fb05 179 QEI(PinName channelA, PinName channelB, PinName index, int pulsesPerRev, Encoding encoding = X2_ENCODING);
narshu 25:143b19c1fb05 180
narshu 25:143b19c1fb05 181 /**
narshu 25:143b19c1fb05 182 * Reset the encoder.
narshu 25:143b19c1fb05 183 *
narshu 25:143b19c1fb05 184 * Sets the pulses and revolutions count to zero.
narshu 25:143b19c1fb05 185 */
narshu 25:143b19c1fb05 186 void reset(void);
narshu 25:143b19c1fb05 187
narshu 25:143b19c1fb05 188 /**
narshu 25:143b19c1fb05 189 * Read the state of the encoder.
narshu 25:143b19c1fb05 190 *
narshu 25:143b19c1fb05 191 * @return The current state of the encoder as a 2-bit number, where:
narshu 25:143b19c1fb05 192 * bit 1 = The reading from channel B
narshu 25:143b19c1fb05 193 * bit 2 = The reading from channel A
narshu 25:143b19c1fb05 194 */
narshu 25:143b19c1fb05 195 int getCurrentState(void);
narshu 25:143b19c1fb05 196
narshu 25:143b19c1fb05 197 /**
narshu 25:143b19c1fb05 198 * Read the number of pulses recorded by the encoder.
narshu 25:143b19c1fb05 199 *
narshu 25:143b19c1fb05 200 * @return Number of pulses which have occured.
narshu 25:143b19c1fb05 201 */
narshu 25:143b19c1fb05 202 int getPulses(void);
narshu 25:143b19c1fb05 203
narshu 25:143b19c1fb05 204 /**
narshu 25:143b19c1fb05 205 * Read the number of revolutions recorded by the encoder on the index channel.
narshu 25:143b19c1fb05 206 *
narshu 25:143b19c1fb05 207 * @return Number of revolutions which have occured on the index channel.
narshu 25:143b19c1fb05 208 */
narshu 25:143b19c1fb05 209 int getRevolutions(void);
narshu 25:143b19c1fb05 210
narshu 25:143b19c1fb05 211 private:
narshu 25:143b19c1fb05 212
narshu 25:143b19c1fb05 213 /**
narshu 25:143b19c1fb05 214 * Update the pulse count.
narshu 25:143b19c1fb05 215 *
narshu 25:143b19c1fb05 216 * Called on every rising/falling edge of channels A/B.
narshu 25:143b19c1fb05 217 *
narshu 25:143b19c1fb05 218 * Reads the state of the channels and determines whether a pulse forward
narshu 25:143b19c1fb05 219 * or backward has occured, updating the count appropriately.
narshu 25:143b19c1fb05 220 */
narshu 25:143b19c1fb05 221 void encode(void);
narshu 25:143b19c1fb05 222
narshu 25:143b19c1fb05 223 /**
narshu 25:143b19c1fb05 224 * Called on every rising edge of channel index to update revolution
narshu 25:143b19c1fb05 225 * count by one.
narshu 25:143b19c1fb05 226 */
narshu 25:143b19c1fb05 227 void index(void);
narshu 25:143b19c1fb05 228
narshu 25:143b19c1fb05 229 Encoding encoding_;
narshu 25:143b19c1fb05 230
narshu 25:143b19c1fb05 231 InterruptIn channelA_;
narshu 25:143b19c1fb05 232 InterruptIn channelB_;
narshu 25:143b19c1fb05 233 InterruptIn index_;
narshu 25:143b19c1fb05 234
narshu 25:143b19c1fb05 235 int pulsesPerRev_;
narshu 25:143b19c1fb05 236 int prevState_;
narshu 25:143b19c1fb05 237 int currState_;
narshu 25:143b19c1fb05 238
narshu 25:143b19c1fb05 239 volatile int pulses_;
narshu 25:143b19c1fb05 240 volatile int revolutions_;
narshu 25:143b19c1fb05 241
narshu 25:143b19c1fb05 242 };
narshu 25:143b19c1fb05 243
narshu 25:143b19c1fb05 244 #endif /* QEI_H */