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SPIHalfDuplex.h@43:e2ed12d17f06, 2012-10-26 (annotated)

Committer:
emilmont
Date:
Fri Oct 26 17:40:46 2012 +0100
Revision:
43:e2ed12d17f06
Parent:
30:3991a86798e3 
Update documentation

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 27:7110ebee3484 1 /* mbed Microcontroller Library - SPIHalfDuplex
emilmont 27:7110ebee3484 2 * Copyright (c) 2010-2011 ARM Limited. All rights reserved.
simon 20:029aa53d7323 3 */
simon 20:029aa53d7323 4
simon 20:029aa53d7323 5 #ifndef MBED_SPIHALFDUPLEX_H
simon 20:029aa53d7323 6 #define MBED_SPIHALFDUPLEX_H
simon 20:029aa53d7323 7
emilmont 27:7110ebee3484 8 #include "device.h"
emilmont 27:7110ebee3484 9
emilmont 30:3991a86798e3 10 #if DEVICE_SPI
emilmont 27:7110ebee3484 11
simon 20:029aa53d7323 12 #include "SPI.h"
simon 20:029aa53d7323 13
simon 20:029aa53d7323 14 namespace mbed {
simon 20:029aa53d7323 15
emilmont 43:e2ed12d17f06 16 /** A SPI half-duplex master, used for communicating with SPI slave devices
emilmont 43:e2ed12d17f06 17 * over a shared data line.
simon 20:029aa53d7323 18 *
emilmont 43:e2ed12d17f06 19 * The default format is set to 8-bits for both master and slave, and a
emilmont 43:e2ed12d17f06 20 * clock frequency of 1MHz
simon 20:029aa53d7323 21 *
emilmont 43:e2ed12d17f06 22 * Most SPI devies will also require Chip Select and Reset signals. These
emilmont 43:e2ed12d17f06 23 * can be controlled using <DigitalOut> pins.
simon 20:029aa53d7323 24 *
emilmont 43:e2ed12d17f06 25 * Although this is for a shared data line, both MISO and MOSI are defined,
emilmont 43:e2ed12d17f06 26 * and should be tied together externally to the mbed. This class handles
emilmont 43:e2ed12d17f06 27 * the tri-stating of the MOSI pin.
simon 20:029aa53d7323 28 *
simon 20:029aa53d7323 29 * Example:
emilmont 43:e2ed12d17f06 30 * @code
emilmont 43:e2ed12d17f06 31 * // Send a byte to a SPI half-duplex slave, and record the response
emilmont 43:e2ed12d17f06 32 *
emilmont 43:e2ed12d17f06 33 * #include "mbed.h"
emilmont 43:e2ed12d17f06 34 *
emilmont 43:e2ed12d17f06 35 * SPIHalfDuplex device(p5, p6, p7) // mosi, miso, sclk
emilmont 43:e2ed12d17f06 36 *
emilmont 43:e2ed12d17f06 37 * int main() {
emilmont 43:e2ed12d17f06 38 * int respone = device.write(0xAA);
emilmont 43:e2ed12d17f06 39 * }
emilmont 43:e2ed12d17f06 40 * @endcode
simon 20:029aa53d7323 41 */
simon 20:029aa53d7323 42
simon 20:029aa53d7323 43 class SPIHalfDuplex : public SPI {
simon 20:029aa53d7323 44
simon 20:029aa53d7323 45 public:
simon 20:029aa53d7323 46
emilmont 43:e2ed12d17f06 47 /** Create a SPI half-duplex master connected to the specified pins
simon 20:029aa53d7323 48 *
emilmont 43:e2ed12d17f06 49 * Pin Options:
emilmont 43:e2ed12d17f06 50 * (5, 6, 7) or (11, 12, 13)
simon 20:029aa53d7323 51 *
simon 20:029aa53d7323 52 * mosi or miso can be specfied as NC if not used
emilmont 43:e2ed12d17f06 53 *
emilmont 43:e2ed12d17f06 54 * @param mosi SPI Master Out, Slave In pin
emilmont 43:e2ed12d17f06 55 * @param miso SPI Master In, Slave Out pin
emilmont 43:e2ed12d17f06 56 * @param sclk SPI Clock pin
emilmont 43:e2ed12d17f06 57 * @param name (optional) A string to identify the object
simon 20:029aa53d7323 58 */
simon 20:029aa53d7323 59 SPIHalfDuplex(PinName mosi, PinName miso, PinName sclk,
simon 20:029aa53d7323 60 const char *name = NULL);
simon 20:029aa53d7323 61
simon 20:029aa53d7323 62 #if 0 // Inherited from SPI - documentation only
emilmont 43:e2ed12d17f06 63 /** Configure the data transmission format
simon 20:029aa53d7323 64 *
emilmont 43:e2ed12d17f06 65 * @param bits Number of bits per SPI frame (4 - 16)
emilmont 43:e2ed12d17f06 66 * @param mode Clock polarity and phase mode (0 - 3)
simon 20:029aa53d7323 67 *
emilmont 43:e2ed12d17f06 68 * @code
emilmont 43:e2ed12d17f06 69 * mode | POL PHA
emilmont 43:e2ed12d17f06 70 * -----+--------
emilmont 43:e2ed12d17f06 71 * 0 | 0 0
emilmont 43:e2ed12d17f06 72 * 1 | 0 1
emilmont 43:e2ed12d17f06 73 * 2 | 1 0
emilmont 43:e2ed12d17f06 74 * 3 | 1 1
emilmont 43:e2ed12d17f06 75 * @endcode
simon 20:029aa53d7323 76 */
simon 20:029aa53d7323 77 void format(int bits, int mode = 0);
simon 20:029aa53d7323 78
emilmont 43:e2ed12d17f06 79 /** Set the spi bus clock frequency
simon 20:029aa53d7323 80 *
emilmont 43:e2ed12d17f06 81 * @param hz SCLK frequency in hz (default = 1MHz)
simon 20:029aa53d7323 82 */
simon 20:029aa53d7323 83 void frequency(int hz = 1000000);
simon 20:029aa53d7323 84 #endif
simon 20:029aa53d7323 85
emilmont 43:e2ed12d17f06 86 /** Write to the SPI Slave and return the response
simon 20:029aa53d7323 87 *
emilmont 43:e2ed12d17f06 88 * @param value Data to be sent to the SPI slave
emilmont 43:e2ed12d17f06 89 *
emilmont 43:e2ed12d17f06 90 * @returns
emilmont 43:e2ed12d17f06 91 * Response from the SPI slave
simon 20:029aa53d7323 92 */
simon 20:029aa53d7323 93 virtual int write(int value);
simon 20:029aa53d7323 94
emilmont 43:e2ed12d17f06 95 /** Set the number of databits expected from the slave, from 4-16
simon 20:029aa53d7323 96 *
emilmont 43:e2ed12d17f06 97 * @param sbits Number of expected bits in the slave response
simon 20:029aa53d7323 98 */
simon 20:029aa53d7323 99 void slave_format(int sbits);
simon 20:029aa53d7323 100
simon 20:029aa53d7323 101 protected:
simon 20:029aa53d7323 102 PinName _mosi;
simon 20:029aa53d7323 103 PinName _miso;
simon 20:029aa53d7323 104 int _sbits;
simon 20:029aa53d7323 105
simon 20:029aa53d7323 106 }; // End of class
simon 20:029aa53d7323 107
simon 20:029aa53d7323 108 } // End of namespace mbed
simon 20:029aa53d7323 109
simon 20:029aa53d7323 110 #endif
emilmont 27:7110ebee3484 111
emilmont 27:7110ebee3484 112 #endif