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TARGET_WIZWIKI_W7500/cmsis_gcc.h@162:dbaafcfe0e9d, 2018-03-19 (annotated)

Committer:
AnnaBridge
Date:
Mon Mar 19 15:30:13 2018 +0000
Revision:
162:dbaafcfe0e9d
Child:
169:a7c7b631e539
mbed library. Release version 160

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 162:dbaafcfe0e9d 1 /**************************************************************************//**
AnnaBridge 162:dbaafcfe0e9d 2 * @file cmsis_gcc.h
AnnaBridge 162:dbaafcfe0e9d 3 * @brief CMSIS compiler GCC header file
AnnaBridge 162:dbaafcfe0e9d 4 * @version V5.0.2
AnnaBridge 162:dbaafcfe0e9d 5 * @date 13. February 2017
AnnaBridge 162:dbaafcfe0e9d 6 ******************************************************************************/
AnnaBridge 162:dbaafcfe0e9d 7 /*
AnnaBridge 162:dbaafcfe0e9d 8 * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
AnnaBridge 162:dbaafcfe0e9d 9 *
AnnaBridge 162:dbaafcfe0e9d 10 * SPDX-License-Identifier: Apache-2.0
AnnaBridge 162:dbaafcfe0e9d 11 *
AnnaBridge 162:dbaafcfe0e9d 12 * Licensed under the Apache License, Version 2.0 (the License); you may
AnnaBridge 162:dbaafcfe0e9d 13 * not use this file except in compliance with the License.
AnnaBridge 162:dbaafcfe0e9d 14 * You may obtain a copy of the License at
AnnaBridge 162:dbaafcfe0e9d 15 *
AnnaBridge 162:dbaafcfe0e9d 16 * www.apache.org/licenses/LICENSE-2.0
AnnaBridge 162:dbaafcfe0e9d 17 *
AnnaBridge 162:dbaafcfe0e9d 18 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 162:dbaafcfe0e9d 19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
AnnaBridge 162:dbaafcfe0e9d 20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 162:dbaafcfe0e9d 21 * See the License for the specific language governing permissions and
AnnaBridge 162:dbaafcfe0e9d 22 * limitations under the License.
AnnaBridge 162:dbaafcfe0e9d 23 */
AnnaBridge 162:dbaafcfe0e9d 24
AnnaBridge 162:dbaafcfe0e9d 25 #ifndef __CMSIS_GCC_H
AnnaBridge 162:dbaafcfe0e9d 26 #define __CMSIS_GCC_H
AnnaBridge 162:dbaafcfe0e9d 27
AnnaBridge 162:dbaafcfe0e9d 28 /* ignore some GCC warnings */
AnnaBridge 162:dbaafcfe0e9d 29 #pragma GCC diagnostic push
AnnaBridge 162:dbaafcfe0e9d 30 #pragma GCC diagnostic ignored "-Wsign-conversion"
AnnaBridge 162:dbaafcfe0e9d 31 #pragma GCC diagnostic ignored "-Wconversion"
AnnaBridge 162:dbaafcfe0e9d 32 #pragma GCC diagnostic ignored "-Wunused-parameter"
AnnaBridge 162:dbaafcfe0e9d 33
AnnaBridge 162:dbaafcfe0e9d 34 /* Fallback for __has_builtin */
AnnaBridge 162:dbaafcfe0e9d 35 #ifndef __has_builtin
AnnaBridge 162:dbaafcfe0e9d 36 #define __has_builtin(x) (0)
AnnaBridge 162:dbaafcfe0e9d 37 #endif
AnnaBridge 162:dbaafcfe0e9d 38
AnnaBridge 162:dbaafcfe0e9d 39 /* CMSIS compiler specific defines */
AnnaBridge 162:dbaafcfe0e9d 40 #ifndef __ASM
AnnaBridge 162:dbaafcfe0e9d 41 #define __ASM __asm
AnnaBridge 162:dbaafcfe0e9d 42 #endif
AnnaBridge 162:dbaafcfe0e9d 43 #ifndef __INLINE
AnnaBridge 162:dbaafcfe0e9d 44 #define __INLINE inline
AnnaBridge 162:dbaafcfe0e9d 45 #endif
AnnaBridge 162:dbaafcfe0e9d 46 #ifndef __STATIC_INLINE
AnnaBridge 162:dbaafcfe0e9d 47 #define __STATIC_INLINE static inline
AnnaBridge 162:dbaafcfe0e9d 48 #endif
AnnaBridge 162:dbaafcfe0e9d 49 #ifndef __NO_RETURN
AnnaBridge 162:dbaafcfe0e9d 50 #define __NO_RETURN __attribute__((noreturn))
AnnaBridge 162:dbaafcfe0e9d 51 #endif
AnnaBridge 162:dbaafcfe0e9d 52 #ifndef __USED
AnnaBridge 162:dbaafcfe0e9d 53 #define __USED __attribute__((used))
AnnaBridge 162:dbaafcfe0e9d 54 #endif
AnnaBridge 162:dbaafcfe0e9d 55 #ifndef __WEAK
AnnaBridge 162:dbaafcfe0e9d 56 #define __WEAK __attribute__((weak))
AnnaBridge 162:dbaafcfe0e9d 57 #endif
AnnaBridge 162:dbaafcfe0e9d 58 #ifndef __PACKED
AnnaBridge 162:dbaafcfe0e9d 59 #define __PACKED __attribute__((packed, aligned(1)))
AnnaBridge 162:dbaafcfe0e9d 60 #endif
AnnaBridge 162:dbaafcfe0e9d 61 #ifndef __PACKED_STRUCT
AnnaBridge 162:dbaafcfe0e9d 62 #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
AnnaBridge 162:dbaafcfe0e9d 63 #endif
AnnaBridge 162:dbaafcfe0e9d 64 #ifndef __PACKED_UNION
AnnaBridge 162:dbaafcfe0e9d 65 #define __PACKED_UNION union __attribute__((packed, aligned(1)))
AnnaBridge 162:dbaafcfe0e9d 66 #endif
AnnaBridge 162:dbaafcfe0e9d 67 #ifndef __UNALIGNED_UINT32 /* deprecated */
AnnaBridge 162:dbaafcfe0e9d 68 #pragma GCC diagnostic push
AnnaBridge 162:dbaafcfe0e9d 69 #pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge 162:dbaafcfe0e9d 70 #pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge 162:dbaafcfe0e9d 71 struct __attribute__((packed)) T_UINT32 { uint32_t v; };
AnnaBridge 162:dbaafcfe0e9d 72 #pragma GCC diagnostic pop
AnnaBridge 162:dbaafcfe0e9d 73 #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
AnnaBridge 162:dbaafcfe0e9d 74 #endif
AnnaBridge 162:dbaafcfe0e9d 75 #ifndef __UNALIGNED_UINT16_WRITE
AnnaBridge 162:dbaafcfe0e9d 76 #pragma GCC diagnostic push
AnnaBridge 162:dbaafcfe0e9d 77 #pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge 162:dbaafcfe0e9d 78 #pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge 162:dbaafcfe0e9d 79 __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
AnnaBridge 162:dbaafcfe0e9d 80 #pragma GCC diagnostic pop
AnnaBridge 162:dbaafcfe0e9d 81 #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 162:dbaafcfe0e9d 82 #endif
AnnaBridge 162:dbaafcfe0e9d 83 #ifndef __UNALIGNED_UINT16_READ
AnnaBridge 162:dbaafcfe0e9d 84 #pragma GCC diagnostic push
AnnaBridge 162:dbaafcfe0e9d 85 #pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge 162:dbaafcfe0e9d 86 #pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge 162:dbaafcfe0e9d 87 __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
AnnaBridge 162:dbaafcfe0e9d 88 #pragma GCC diagnostic pop
AnnaBridge 162:dbaafcfe0e9d 89 #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
AnnaBridge 162:dbaafcfe0e9d 90 #endif
AnnaBridge 162:dbaafcfe0e9d 91 #ifndef __UNALIGNED_UINT32_WRITE
AnnaBridge 162:dbaafcfe0e9d 92 #pragma GCC diagnostic push
AnnaBridge 162:dbaafcfe0e9d 93 #pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge 162:dbaafcfe0e9d 94 #pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge 162:dbaafcfe0e9d 95 __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
AnnaBridge 162:dbaafcfe0e9d 96 #pragma GCC diagnostic pop
AnnaBridge 162:dbaafcfe0e9d 97 #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 162:dbaafcfe0e9d 98 #endif
AnnaBridge 162:dbaafcfe0e9d 99 #ifndef __UNALIGNED_UINT32_READ
AnnaBridge 162:dbaafcfe0e9d 100 #pragma GCC diagnostic push
AnnaBridge 162:dbaafcfe0e9d 101 #pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge 162:dbaafcfe0e9d 102 #pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge 162:dbaafcfe0e9d 103 __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
AnnaBridge 162:dbaafcfe0e9d 104 #pragma GCC diagnostic pop
AnnaBridge 162:dbaafcfe0e9d 105 #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
AnnaBridge 162:dbaafcfe0e9d 106 #endif
AnnaBridge 162:dbaafcfe0e9d 107 #ifndef __ALIGNED
AnnaBridge 162:dbaafcfe0e9d 108 #define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge 162:dbaafcfe0e9d 109 #endif
AnnaBridge 162:dbaafcfe0e9d 110 #ifndef __RESTRICT
AnnaBridge 162:dbaafcfe0e9d 111 #define __RESTRICT __restrict
AnnaBridge 162:dbaafcfe0e9d 112 #endif
AnnaBridge 162:dbaafcfe0e9d 113
AnnaBridge 162:dbaafcfe0e9d 114
AnnaBridge 162:dbaafcfe0e9d 115 /* ########################### Core Function Access ########################### */
AnnaBridge 162:dbaafcfe0e9d 116 /** \ingroup CMSIS_Core_FunctionInterface
AnnaBridge 162:dbaafcfe0e9d 117 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
AnnaBridge 162:dbaafcfe0e9d 118 @{
AnnaBridge 162:dbaafcfe0e9d 119 */
AnnaBridge 162:dbaafcfe0e9d 120
AnnaBridge 162:dbaafcfe0e9d 121 /**
AnnaBridge 162:dbaafcfe0e9d 122 \brief Enable IRQ Interrupts
AnnaBridge 162:dbaafcfe0e9d 123 \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
AnnaBridge 162:dbaafcfe0e9d 124 Can only be executed in Privileged modes.
AnnaBridge 162:dbaafcfe0e9d 125 */
AnnaBridge 162:dbaafcfe0e9d 126 __attribute__((always_inline)) __STATIC_INLINE void __enable_irq(void)
AnnaBridge 162:dbaafcfe0e9d 127 {
AnnaBridge 162:dbaafcfe0e9d 128 __ASM volatile ("cpsie i" : : : "memory");
AnnaBridge 162:dbaafcfe0e9d 129 }
AnnaBridge 162:dbaafcfe0e9d 130
AnnaBridge 162:dbaafcfe0e9d 131
AnnaBridge 162:dbaafcfe0e9d 132 /**
AnnaBridge 162:dbaafcfe0e9d 133 \brief Disable IRQ Interrupts
AnnaBridge 162:dbaafcfe0e9d 134 \details Disables IRQ interrupts by setting the I-bit in the CPSR.
AnnaBridge 162:dbaafcfe0e9d 135 Can only be executed in Privileged modes.
AnnaBridge 162:dbaafcfe0e9d 136 */
AnnaBridge 162:dbaafcfe0e9d 137 __attribute__((always_inline)) __STATIC_INLINE void __disable_irq(void)
AnnaBridge 162:dbaafcfe0e9d 138 {
AnnaBridge 162:dbaafcfe0e9d 139 __ASM volatile ("cpsid i" : : : "memory");
AnnaBridge 162:dbaafcfe0e9d 140 }
AnnaBridge 162:dbaafcfe0e9d 141
AnnaBridge 162:dbaafcfe0e9d 142
AnnaBridge 162:dbaafcfe0e9d 143 /**
AnnaBridge 162:dbaafcfe0e9d 144 \brief Get Control Register
AnnaBridge 162:dbaafcfe0e9d 145 \details Returns the content of the Control Register.
AnnaBridge 162:dbaafcfe0e9d 146 \return Control Register value
AnnaBridge 162:dbaafcfe0e9d 147 */
AnnaBridge 162:dbaafcfe0e9d 148 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_CONTROL(void)
AnnaBridge 162:dbaafcfe0e9d 149 {
AnnaBridge 162:dbaafcfe0e9d 150 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 151
AnnaBridge 162:dbaafcfe0e9d 152 __ASM volatile ("MRS %0, control" : "=r" (result) );
AnnaBridge 162:dbaafcfe0e9d 153 return(result);
AnnaBridge 162:dbaafcfe0e9d 154 }
AnnaBridge 162:dbaafcfe0e9d 155
AnnaBridge 162:dbaafcfe0e9d 156
AnnaBridge 162:dbaafcfe0e9d 157 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 162:dbaafcfe0e9d 158 /**
AnnaBridge 162:dbaafcfe0e9d 159 \brief Get Control Register (non-secure)
AnnaBridge 162:dbaafcfe0e9d 160 \details Returns the content of the non-secure Control Register when in secure mode.
AnnaBridge 162:dbaafcfe0e9d 161 \return non-secure Control Register value
AnnaBridge 162:dbaafcfe0e9d 162 */
AnnaBridge 162:dbaafcfe0e9d 163 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_CONTROL_NS(void)
AnnaBridge 162:dbaafcfe0e9d 164 {
AnnaBridge 162:dbaafcfe0e9d 165 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 166
AnnaBridge 162:dbaafcfe0e9d 167 __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
AnnaBridge 162:dbaafcfe0e9d 168 return(result);
AnnaBridge 162:dbaafcfe0e9d 169 }
AnnaBridge 162:dbaafcfe0e9d 170 #endif
AnnaBridge 162:dbaafcfe0e9d 171
AnnaBridge 162:dbaafcfe0e9d 172
AnnaBridge 162:dbaafcfe0e9d 173 /**
AnnaBridge 162:dbaafcfe0e9d 174 \brief Set Control Register
AnnaBridge 162:dbaafcfe0e9d 175 \details Writes the given value to the Control Register.
AnnaBridge 162:dbaafcfe0e9d 176 \param [in] control Control Register value to set
AnnaBridge 162:dbaafcfe0e9d 177 */
AnnaBridge 162:dbaafcfe0e9d 178 __attribute__((always_inline)) __STATIC_INLINE void __set_CONTROL(uint32_t control)
AnnaBridge 162:dbaafcfe0e9d 179 {
AnnaBridge 162:dbaafcfe0e9d 180 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
AnnaBridge 162:dbaafcfe0e9d 181 }
AnnaBridge 162:dbaafcfe0e9d 182
AnnaBridge 162:dbaafcfe0e9d 183
AnnaBridge 162:dbaafcfe0e9d 184 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 162:dbaafcfe0e9d 185 /**
AnnaBridge 162:dbaafcfe0e9d 186 \brief Set Control Register (non-secure)
AnnaBridge 162:dbaafcfe0e9d 187 \details Writes the given value to the non-secure Control Register when in secure state.
AnnaBridge 162:dbaafcfe0e9d 188 \param [in] control Control Register value to set
AnnaBridge 162:dbaafcfe0e9d 189 */
AnnaBridge 162:dbaafcfe0e9d 190 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_CONTROL_NS(uint32_t control)
AnnaBridge 162:dbaafcfe0e9d 191 {
AnnaBridge 162:dbaafcfe0e9d 192 __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
AnnaBridge 162:dbaafcfe0e9d 193 }
AnnaBridge 162:dbaafcfe0e9d 194 #endif
AnnaBridge 162:dbaafcfe0e9d 195
AnnaBridge 162:dbaafcfe0e9d 196
AnnaBridge 162:dbaafcfe0e9d 197 /**
AnnaBridge 162:dbaafcfe0e9d 198 \brief Get IPSR Register
AnnaBridge 162:dbaafcfe0e9d 199 \details Returns the content of the IPSR Register.
AnnaBridge 162:dbaafcfe0e9d 200 \return IPSR Register value
AnnaBridge 162:dbaafcfe0e9d 201 */
AnnaBridge 162:dbaafcfe0e9d 202 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_IPSR(void)
AnnaBridge 162:dbaafcfe0e9d 203 {
AnnaBridge 162:dbaafcfe0e9d 204 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 205
AnnaBridge 162:dbaafcfe0e9d 206 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
AnnaBridge 162:dbaafcfe0e9d 207 return(result);
AnnaBridge 162:dbaafcfe0e9d 208 }
AnnaBridge 162:dbaafcfe0e9d 209
AnnaBridge 162:dbaafcfe0e9d 210
AnnaBridge 162:dbaafcfe0e9d 211 /**
AnnaBridge 162:dbaafcfe0e9d 212 \brief Get APSR Register
AnnaBridge 162:dbaafcfe0e9d 213 \details Returns the content of the APSR Register.
AnnaBridge 162:dbaafcfe0e9d 214 \return APSR Register value
AnnaBridge 162:dbaafcfe0e9d 215 */
AnnaBridge 162:dbaafcfe0e9d 216 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_APSR(void)
AnnaBridge 162:dbaafcfe0e9d 217 {
AnnaBridge 162:dbaafcfe0e9d 218 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 219
AnnaBridge 162:dbaafcfe0e9d 220 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
AnnaBridge 162:dbaafcfe0e9d 221 return(result);
AnnaBridge 162:dbaafcfe0e9d 222 }
AnnaBridge 162:dbaafcfe0e9d 223
AnnaBridge 162:dbaafcfe0e9d 224
AnnaBridge 162:dbaafcfe0e9d 225 /**
AnnaBridge 162:dbaafcfe0e9d 226 \brief Get xPSR Register
AnnaBridge 162:dbaafcfe0e9d 227 \details Returns the content of the xPSR Register.
AnnaBridge 162:dbaafcfe0e9d 228 \return xPSR Register value
AnnaBridge 162:dbaafcfe0e9d 229 */
AnnaBridge 162:dbaafcfe0e9d 230 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_xPSR(void)
AnnaBridge 162:dbaafcfe0e9d 231 {
AnnaBridge 162:dbaafcfe0e9d 232 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 233
AnnaBridge 162:dbaafcfe0e9d 234 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
AnnaBridge 162:dbaafcfe0e9d 235 return(result);
AnnaBridge 162:dbaafcfe0e9d 236 }
AnnaBridge 162:dbaafcfe0e9d 237
AnnaBridge 162:dbaafcfe0e9d 238
AnnaBridge 162:dbaafcfe0e9d 239 /**
AnnaBridge 162:dbaafcfe0e9d 240 \brief Get Process Stack Pointer
AnnaBridge 162:dbaafcfe0e9d 241 \details Returns the current value of the Process Stack Pointer (PSP).
AnnaBridge 162:dbaafcfe0e9d 242 \return PSP Register value
AnnaBridge 162:dbaafcfe0e9d 243 */
AnnaBridge 162:dbaafcfe0e9d 244 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSP(void)
AnnaBridge 162:dbaafcfe0e9d 245 {
AnnaBridge 162:dbaafcfe0e9d 246 register uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 247
AnnaBridge 162:dbaafcfe0e9d 248 __ASM volatile ("MRS %0, psp" : "=r" (result) );
AnnaBridge 162:dbaafcfe0e9d 249 return(result);
AnnaBridge 162:dbaafcfe0e9d 250 }
AnnaBridge 162:dbaafcfe0e9d 251
AnnaBridge 162:dbaafcfe0e9d 252
AnnaBridge 162:dbaafcfe0e9d 253 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 162:dbaafcfe0e9d 254 /**
AnnaBridge 162:dbaafcfe0e9d 255 \brief Get Process Stack Pointer (non-secure)
AnnaBridge 162:dbaafcfe0e9d 256 \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge 162:dbaafcfe0e9d 257 \return PSP Register value
AnnaBridge 162:dbaafcfe0e9d 258 */
AnnaBridge 162:dbaafcfe0e9d 259 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSP_NS(void)
AnnaBridge 162:dbaafcfe0e9d 260 {
AnnaBridge 162:dbaafcfe0e9d 261 register uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 262
AnnaBridge 162:dbaafcfe0e9d 263 __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
AnnaBridge 162:dbaafcfe0e9d 264 return(result);
AnnaBridge 162:dbaafcfe0e9d 265 }
AnnaBridge 162:dbaafcfe0e9d 266 #endif
AnnaBridge 162:dbaafcfe0e9d 267
AnnaBridge 162:dbaafcfe0e9d 268
AnnaBridge 162:dbaafcfe0e9d 269 /**
AnnaBridge 162:dbaafcfe0e9d 270 \brief Set Process Stack Pointer
AnnaBridge 162:dbaafcfe0e9d 271 \details Assigns the given value to the Process Stack Pointer (PSP).
AnnaBridge 162:dbaafcfe0e9d 272 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 162:dbaafcfe0e9d 273 */
AnnaBridge 162:dbaafcfe0e9d 274 __attribute__((always_inline)) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
AnnaBridge 162:dbaafcfe0e9d 275 {
AnnaBridge 162:dbaafcfe0e9d 276 __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
AnnaBridge 162:dbaafcfe0e9d 277 }
AnnaBridge 162:dbaafcfe0e9d 278
AnnaBridge 162:dbaafcfe0e9d 279
AnnaBridge 162:dbaafcfe0e9d 280 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 162:dbaafcfe0e9d 281 /**
AnnaBridge 162:dbaafcfe0e9d 282 \brief Set Process Stack Pointer (non-secure)
AnnaBridge 162:dbaafcfe0e9d 283 \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge 162:dbaafcfe0e9d 284 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 162:dbaafcfe0e9d 285 */
AnnaBridge 162:dbaafcfe0e9d 286 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
AnnaBridge 162:dbaafcfe0e9d 287 {
AnnaBridge 162:dbaafcfe0e9d 288 __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
AnnaBridge 162:dbaafcfe0e9d 289 }
AnnaBridge 162:dbaafcfe0e9d 290 #endif
AnnaBridge 162:dbaafcfe0e9d 291
AnnaBridge 162:dbaafcfe0e9d 292
AnnaBridge 162:dbaafcfe0e9d 293 /**
AnnaBridge 162:dbaafcfe0e9d 294 \brief Get Main Stack Pointer
AnnaBridge 162:dbaafcfe0e9d 295 \details Returns the current value of the Main Stack Pointer (MSP).
AnnaBridge 162:dbaafcfe0e9d 296 \return MSP Register value
AnnaBridge 162:dbaafcfe0e9d 297 */
AnnaBridge 162:dbaafcfe0e9d 298 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSP(void)
AnnaBridge 162:dbaafcfe0e9d 299 {
AnnaBridge 162:dbaafcfe0e9d 300 register uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 301
AnnaBridge 162:dbaafcfe0e9d 302 __ASM volatile ("MRS %0, msp" : "=r" (result) );
AnnaBridge 162:dbaafcfe0e9d 303 return(result);
AnnaBridge 162:dbaafcfe0e9d 304 }
AnnaBridge 162:dbaafcfe0e9d 305
AnnaBridge 162:dbaafcfe0e9d 306
AnnaBridge 162:dbaafcfe0e9d 307 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 162:dbaafcfe0e9d 308 /**
AnnaBridge 162:dbaafcfe0e9d 309 \brief Get Main Stack Pointer (non-secure)
AnnaBridge 162:dbaafcfe0e9d 310 \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge 162:dbaafcfe0e9d 311 \return MSP Register value
AnnaBridge 162:dbaafcfe0e9d 312 */
AnnaBridge 162:dbaafcfe0e9d 313 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSP_NS(void)
AnnaBridge 162:dbaafcfe0e9d 314 {
AnnaBridge 162:dbaafcfe0e9d 315 register uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 316
AnnaBridge 162:dbaafcfe0e9d 317 __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
AnnaBridge 162:dbaafcfe0e9d 318 return(result);
AnnaBridge 162:dbaafcfe0e9d 319 }
AnnaBridge 162:dbaafcfe0e9d 320 #endif
AnnaBridge 162:dbaafcfe0e9d 321
AnnaBridge 162:dbaafcfe0e9d 322
AnnaBridge 162:dbaafcfe0e9d 323 /**
AnnaBridge 162:dbaafcfe0e9d 324 \brief Set Main Stack Pointer
AnnaBridge 162:dbaafcfe0e9d 325 \details Assigns the given value to the Main Stack Pointer (MSP).
AnnaBridge 162:dbaafcfe0e9d 326 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 162:dbaafcfe0e9d 327 */
AnnaBridge 162:dbaafcfe0e9d 328 __attribute__((always_inline)) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
AnnaBridge 162:dbaafcfe0e9d 329 {
AnnaBridge 162:dbaafcfe0e9d 330 __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
AnnaBridge 162:dbaafcfe0e9d 331 }
AnnaBridge 162:dbaafcfe0e9d 332
AnnaBridge 162:dbaafcfe0e9d 333
AnnaBridge 162:dbaafcfe0e9d 334 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 162:dbaafcfe0e9d 335 /**
AnnaBridge 162:dbaafcfe0e9d 336 \brief Set Main Stack Pointer (non-secure)
AnnaBridge 162:dbaafcfe0e9d 337 \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge 162:dbaafcfe0e9d 338 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 162:dbaafcfe0e9d 339 */
AnnaBridge 162:dbaafcfe0e9d 340 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
AnnaBridge 162:dbaafcfe0e9d 341 {
AnnaBridge 162:dbaafcfe0e9d 342 __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
AnnaBridge 162:dbaafcfe0e9d 343 }
AnnaBridge 162:dbaafcfe0e9d 344 #endif
AnnaBridge 162:dbaafcfe0e9d 345
AnnaBridge 162:dbaafcfe0e9d 346
AnnaBridge 162:dbaafcfe0e9d 347 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 162:dbaafcfe0e9d 348 /**
AnnaBridge 162:dbaafcfe0e9d 349 \brief Get Stack Pointer (non-secure)
AnnaBridge 162:dbaafcfe0e9d 350 \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge 162:dbaafcfe0e9d 351 \return SP Register value
AnnaBridge 162:dbaafcfe0e9d 352 */
AnnaBridge 162:dbaafcfe0e9d 353 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_SP_NS(void)
AnnaBridge 162:dbaafcfe0e9d 354 {
AnnaBridge 162:dbaafcfe0e9d 355 register uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 356
AnnaBridge 162:dbaafcfe0e9d 357 __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
AnnaBridge 162:dbaafcfe0e9d 358 return(result);
AnnaBridge 162:dbaafcfe0e9d 359 }
AnnaBridge 162:dbaafcfe0e9d 360
AnnaBridge 162:dbaafcfe0e9d 361
AnnaBridge 162:dbaafcfe0e9d 362 /**
AnnaBridge 162:dbaafcfe0e9d 363 \brief Set Stack Pointer (non-secure)
AnnaBridge 162:dbaafcfe0e9d 364 \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge 162:dbaafcfe0e9d 365 \param [in] topOfStack Stack Pointer value to set
AnnaBridge 162:dbaafcfe0e9d 366 */
AnnaBridge 162:dbaafcfe0e9d 367 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_SP_NS(uint32_t topOfStack)
AnnaBridge 162:dbaafcfe0e9d 368 {
AnnaBridge 162:dbaafcfe0e9d 369 __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
AnnaBridge 162:dbaafcfe0e9d 370 }
AnnaBridge 162:dbaafcfe0e9d 371 #endif
AnnaBridge 162:dbaafcfe0e9d 372
AnnaBridge 162:dbaafcfe0e9d 373
AnnaBridge 162:dbaafcfe0e9d 374 /**
AnnaBridge 162:dbaafcfe0e9d 375 \brief Get Priority Mask
AnnaBridge 162:dbaafcfe0e9d 376 \details Returns the current state of the priority mask bit from the Priority Mask Register.
AnnaBridge 162:dbaafcfe0e9d 377 \return Priority Mask value
AnnaBridge 162:dbaafcfe0e9d 378 */
AnnaBridge 162:dbaafcfe0e9d 379 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PRIMASK(void)
AnnaBridge 162:dbaafcfe0e9d 380 {
AnnaBridge 162:dbaafcfe0e9d 381 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 382
AnnaBridge 162:dbaafcfe0e9d 383 __ASM volatile ("MRS %0, primask" : "=r" (result) );
AnnaBridge 162:dbaafcfe0e9d 384 return(result);
AnnaBridge 162:dbaafcfe0e9d 385 }
AnnaBridge 162:dbaafcfe0e9d 386
AnnaBridge 162:dbaafcfe0e9d 387
AnnaBridge 162:dbaafcfe0e9d 388 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 162:dbaafcfe0e9d 389 /**
AnnaBridge 162:dbaafcfe0e9d 390 \brief Get Priority Mask (non-secure)
AnnaBridge 162:dbaafcfe0e9d 391 \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
AnnaBridge 162:dbaafcfe0e9d 392 \return Priority Mask value
AnnaBridge 162:dbaafcfe0e9d 393 */
AnnaBridge 162:dbaafcfe0e9d 394 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PRIMASK_NS(void)
AnnaBridge 162:dbaafcfe0e9d 395 {
AnnaBridge 162:dbaafcfe0e9d 396 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 397
AnnaBridge 162:dbaafcfe0e9d 398 __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
AnnaBridge 162:dbaafcfe0e9d 399 return(result);
AnnaBridge 162:dbaafcfe0e9d 400 }
AnnaBridge 162:dbaafcfe0e9d 401 #endif
AnnaBridge 162:dbaafcfe0e9d 402
AnnaBridge 162:dbaafcfe0e9d 403
AnnaBridge 162:dbaafcfe0e9d 404 /**
AnnaBridge 162:dbaafcfe0e9d 405 \brief Set Priority Mask
AnnaBridge 162:dbaafcfe0e9d 406 \details Assigns the given value to the Priority Mask Register.
AnnaBridge 162:dbaafcfe0e9d 407 \param [in] priMask Priority Mask
AnnaBridge 162:dbaafcfe0e9d 408 */
AnnaBridge 162:dbaafcfe0e9d 409 __attribute__((always_inline)) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
AnnaBridge 162:dbaafcfe0e9d 410 {
AnnaBridge 162:dbaafcfe0e9d 411 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
AnnaBridge 162:dbaafcfe0e9d 412 }
AnnaBridge 162:dbaafcfe0e9d 413
AnnaBridge 162:dbaafcfe0e9d 414
AnnaBridge 162:dbaafcfe0e9d 415 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 162:dbaafcfe0e9d 416 /**
AnnaBridge 162:dbaafcfe0e9d 417 \brief Set Priority Mask (non-secure)
AnnaBridge 162:dbaafcfe0e9d 418 \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
AnnaBridge 162:dbaafcfe0e9d 419 \param [in] priMask Priority Mask
AnnaBridge 162:dbaafcfe0e9d 420 */
AnnaBridge 162:dbaafcfe0e9d 421 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
AnnaBridge 162:dbaafcfe0e9d 422 {
AnnaBridge 162:dbaafcfe0e9d 423 __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
AnnaBridge 162:dbaafcfe0e9d 424 }
AnnaBridge 162:dbaafcfe0e9d 425 #endif
AnnaBridge 162:dbaafcfe0e9d 426
AnnaBridge 162:dbaafcfe0e9d 427
AnnaBridge 162:dbaafcfe0e9d 428 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 429 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 430 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 162:dbaafcfe0e9d 431 /**
AnnaBridge 162:dbaafcfe0e9d 432 \brief Enable FIQ
AnnaBridge 162:dbaafcfe0e9d 433 \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
AnnaBridge 162:dbaafcfe0e9d 434 Can only be executed in Privileged modes.
AnnaBridge 162:dbaafcfe0e9d 435 */
AnnaBridge 162:dbaafcfe0e9d 436 __attribute__((always_inline)) __STATIC_INLINE void __enable_fault_irq(void)
AnnaBridge 162:dbaafcfe0e9d 437 {
AnnaBridge 162:dbaafcfe0e9d 438 __ASM volatile ("cpsie f" : : : "memory");
AnnaBridge 162:dbaafcfe0e9d 439 }
AnnaBridge 162:dbaafcfe0e9d 440
AnnaBridge 162:dbaafcfe0e9d 441
AnnaBridge 162:dbaafcfe0e9d 442 /**
AnnaBridge 162:dbaafcfe0e9d 443 \brief Disable FIQ
AnnaBridge 162:dbaafcfe0e9d 444 \details Disables FIQ interrupts by setting the F-bit in the CPSR.
AnnaBridge 162:dbaafcfe0e9d 445 Can only be executed in Privileged modes.
AnnaBridge 162:dbaafcfe0e9d 446 */
AnnaBridge 162:dbaafcfe0e9d 447 __attribute__((always_inline)) __STATIC_INLINE void __disable_fault_irq(void)
AnnaBridge 162:dbaafcfe0e9d 448 {
AnnaBridge 162:dbaafcfe0e9d 449 __ASM volatile ("cpsid f" : : : "memory");
AnnaBridge 162:dbaafcfe0e9d 450 }
AnnaBridge 162:dbaafcfe0e9d 451
AnnaBridge 162:dbaafcfe0e9d 452
AnnaBridge 162:dbaafcfe0e9d 453 /**
AnnaBridge 162:dbaafcfe0e9d 454 \brief Get Base Priority
AnnaBridge 162:dbaafcfe0e9d 455 \details Returns the current value of the Base Priority register.
AnnaBridge 162:dbaafcfe0e9d 456 \return Base Priority register value
AnnaBridge 162:dbaafcfe0e9d 457 */
AnnaBridge 162:dbaafcfe0e9d 458 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_BASEPRI(void)
AnnaBridge 162:dbaafcfe0e9d 459 {
AnnaBridge 162:dbaafcfe0e9d 460 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 461
AnnaBridge 162:dbaafcfe0e9d 462 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
AnnaBridge 162:dbaafcfe0e9d 463 return(result);
AnnaBridge 162:dbaafcfe0e9d 464 }
AnnaBridge 162:dbaafcfe0e9d 465
AnnaBridge 162:dbaafcfe0e9d 466
AnnaBridge 162:dbaafcfe0e9d 467 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 162:dbaafcfe0e9d 468 /**
AnnaBridge 162:dbaafcfe0e9d 469 \brief Get Base Priority (non-secure)
AnnaBridge 162:dbaafcfe0e9d 470 \details Returns the current value of the non-secure Base Priority register when in secure state.
AnnaBridge 162:dbaafcfe0e9d 471 \return Base Priority register value
AnnaBridge 162:dbaafcfe0e9d 472 */
AnnaBridge 162:dbaafcfe0e9d 473 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_BASEPRI_NS(void)
AnnaBridge 162:dbaafcfe0e9d 474 {
AnnaBridge 162:dbaafcfe0e9d 475 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 476
AnnaBridge 162:dbaafcfe0e9d 477 __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
AnnaBridge 162:dbaafcfe0e9d 478 return(result);
AnnaBridge 162:dbaafcfe0e9d 479 }
AnnaBridge 162:dbaafcfe0e9d 480 #endif
AnnaBridge 162:dbaafcfe0e9d 481
AnnaBridge 162:dbaafcfe0e9d 482
AnnaBridge 162:dbaafcfe0e9d 483 /**
AnnaBridge 162:dbaafcfe0e9d 484 \brief Set Base Priority
AnnaBridge 162:dbaafcfe0e9d 485 \details Assigns the given value to the Base Priority register.
AnnaBridge 162:dbaafcfe0e9d 486 \param [in] basePri Base Priority value to set
AnnaBridge 162:dbaafcfe0e9d 487 */
AnnaBridge 162:dbaafcfe0e9d 488 __attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
AnnaBridge 162:dbaafcfe0e9d 489 {
AnnaBridge 162:dbaafcfe0e9d 490 __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
AnnaBridge 162:dbaafcfe0e9d 491 }
AnnaBridge 162:dbaafcfe0e9d 492
AnnaBridge 162:dbaafcfe0e9d 493
AnnaBridge 162:dbaafcfe0e9d 494 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 162:dbaafcfe0e9d 495 /**
AnnaBridge 162:dbaafcfe0e9d 496 \brief Set Base Priority (non-secure)
AnnaBridge 162:dbaafcfe0e9d 497 \details Assigns the given value to the non-secure Base Priority register when in secure state.
AnnaBridge 162:dbaafcfe0e9d 498 \param [in] basePri Base Priority value to set
AnnaBridge 162:dbaafcfe0e9d 499 */
AnnaBridge 162:dbaafcfe0e9d 500 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
AnnaBridge 162:dbaafcfe0e9d 501 {
AnnaBridge 162:dbaafcfe0e9d 502 __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
AnnaBridge 162:dbaafcfe0e9d 503 }
AnnaBridge 162:dbaafcfe0e9d 504 #endif
AnnaBridge 162:dbaafcfe0e9d 505
AnnaBridge 162:dbaafcfe0e9d 506
AnnaBridge 162:dbaafcfe0e9d 507 /**
AnnaBridge 162:dbaafcfe0e9d 508 \brief Set Base Priority with condition
AnnaBridge 162:dbaafcfe0e9d 509 \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
AnnaBridge 162:dbaafcfe0e9d 510 or the new value increases the BASEPRI priority level.
AnnaBridge 162:dbaafcfe0e9d 511 \param [in] basePri Base Priority value to set
AnnaBridge 162:dbaafcfe0e9d 512 */
AnnaBridge 162:dbaafcfe0e9d 513 __attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
AnnaBridge 162:dbaafcfe0e9d 514 {
AnnaBridge 162:dbaafcfe0e9d 515 __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
AnnaBridge 162:dbaafcfe0e9d 516 }
AnnaBridge 162:dbaafcfe0e9d 517
AnnaBridge 162:dbaafcfe0e9d 518
AnnaBridge 162:dbaafcfe0e9d 519 /**
AnnaBridge 162:dbaafcfe0e9d 520 \brief Get Fault Mask
AnnaBridge 162:dbaafcfe0e9d 521 \details Returns the current value of the Fault Mask register.
AnnaBridge 162:dbaafcfe0e9d 522 \return Fault Mask register value
AnnaBridge 162:dbaafcfe0e9d 523 */
AnnaBridge 162:dbaafcfe0e9d 524 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
AnnaBridge 162:dbaafcfe0e9d 525 {
AnnaBridge 162:dbaafcfe0e9d 526 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 527
AnnaBridge 162:dbaafcfe0e9d 528 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
AnnaBridge 162:dbaafcfe0e9d 529 return(result);
AnnaBridge 162:dbaafcfe0e9d 530 }
AnnaBridge 162:dbaafcfe0e9d 531
AnnaBridge 162:dbaafcfe0e9d 532
AnnaBridge 162:dbaafcfe0e9d 533 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 162:dbaafcfe0e9d 534 /**
AnnaBridge 162:dbaafcfe0e9d 535 \brief Get Fault Mask (non-secure)
AnnaBridge 162:dbaafcfe0e9d 536 \details Returns the current value of the non-secure Fault Mask register when in secure state.
AnnaBridge 162:dbaafcfe0e9d 537 \return Fault Mask register value
AnnaBridge 162:dbaafcfe0e9d 538 */
AnnaBridge 162:dbaafcfe0e9d 539 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FAULTMASK_NS(void)
AnnaBridge 162:dbaafcfe0e9d 540 {
AnnaBridge 162:dbaafcfe0e9d 541 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 542
AnnaBridge 162:dbaafcfe0e9d 543 __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
AnnaBridge 162:dbaafcfe0e9d 544 return(result);
AnnaBridge 162:dbaafcfe0e9d 545 }
AnnaBridge 162:dbaafcfe0e9d 546 #endif
AnnaBridge 162:dbaafcfe0e9d 547
AnnaBridge 162:dbaafcfe0e9d 548
AnnaBridge 162:dbaafcfe0e9d 549 /**
AnnaBridge 162:dbaafcfe0e9d 550 \brief Set Fault Mask
AnnaBridge 162:dbaafcfe0e9d 551 \details Assigns the given value to the Fault Mask register.
AnnaBridge 162:dbaafcfe0e9d 552 \param [in] faultMask Fault Mask value to set
AnnaBridge 162:dbaafcfe0e9d 553 */
AnnaBridge 162:dbaafcfe0e9d 554 __attribute__((always_inline)) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
AnnaBridge 162:dbaafcfe0e9d 555 {
AnnaBridge 162:dbaafcfe0e9d 556 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
AnnaBridge 162:dbaafcfe0e9d 557 }
AnnaBridge 162:dbaafcfe0e9d 558
AnnaBridge 162:dbaafcfe0e9d 559
AnnaBridge 162:dbaafcfe0e9d 560 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 162:dbaafcfe0e9d 561 /**
AnnaBridge 162:dbaafcfe0e9d 562 \brief Set Fault Mask (non-secure)
AnnaBridge 162:dbaafcfe0e9d 563 \details Assigns the given value to the non-secure Fault Mask register when in secure state.
AnnaBridge 162:dbaafcfe0e9d 564 \param [in] faultMask Fault Mask value to set
AnnaBridge 162:dbaafcfe0e9d 565 */
AnnaBridge 162:dbaafcfe0e9d 566 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
AnnaBridge 162:dbaafcfe0e9d 567 {
AnnaBridge 162:dbaafcfe0e9d 568 __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
AnnaBridge 162:dbaafcfe0e9d 569 }
AnnaBridge 162:dbaafcfe0e9d 570 #endif
AnnaBridge 162:dbaafcfe0e9d 571
AnnaBridge 162:dbaafcfe0e9d 572 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 573 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 574 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 162:dbaafcfe0e9d 575
AnnaBridge 162:dbaafcfe0e9d 576
AnnaBridge 162:dbaafcfe0e9d 577 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 578 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 162:dbaafcfe0e9d 579
AnnaBridge 162:dbaafcfe0e9d 580 /**
AnnaBridge 162:dbaafcfe0e9d 581 \brief Get Process Stack Pointer Limit
AnnaBridge 162:dbaafcfe0e9d 582 \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
AnnaBridge 162:dbaafcfe0e9d 583 \return PSPLIM Register value
AnnaBridge 162:dbaafcfe0e9d 584 */
AnnaBridge 162:dbaafcfe0e9d 585 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSPLIM(void)
AnnaBridge 162:dbaafcfe0e9d 586 {
AnnaBridge 162:dbaafcfe0e9d 587 register uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 588
AnnaBridge 162:dbaafcfe0e9d 589 __ASM volatile ("MRS %0, psplim" : "=r" (result) );
AnnaBridge 162:dbaafcfe0e9d 590 return(result);
AnnaBridge 162:dbaafcfe0e9d 591 }
AnnaBridge 162:dbaafcfe0e9d 592
AnnaBridge 162:dbaafcfe0e9d 593
AnnaBridge 162:dbaafcfe0e9d 594 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 162:dbaafcfe0e9d 595 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 162:dbaafcfe0e9d 596 /**
AnnaBridge 162:dbaafcfe0e9d 597 \brief Get Process Stack Pointer Limit (non-secure)
AnnaBridge 162:dbaafcfe0e9d 598 \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge 162:dbaafcfe0e9d 599 \return PSPLIM Register value
AnnaBridge 162:dbaafcfe0e9d 600 */
AnnaBridge 162:dbaafcfe0e9d 601 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSPLIM_NS(void)
AnnaBridge 162:dbaafcfe0e9d 602 {
AnnaBridge 162:dbaafcfe0e9d 603 register uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 604
AnnaBridge 162:dbaafcfe0e9d 605 __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
AnnaBridge 162:dbaafcfe0e9d 606 return(result);
AnnaBridge 162:dbaafcfe0e9d 607 }
AnnaBridge 162:dbaafcfe0e9d 608 #endif
AnnaBridge 162:dbaafcfe0e9d 609
AnnaBridge 162:dbaafcfe0e9d 610
AnnaBridge 162:dbaafcfe0e9d 611 /**
AnnaBridge 162:dbaafcfe0e9d 612 \brief Set Process Stack Pointer Limit
AnnaBridge 162:dbaafcfe0e9d 613 \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
AnnaBridge 162:dbaafcfe0e9d 614 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge 162:dbaafcfe0e9d 615 */
AnnaBridge 162:dbaafcfe0e9d 616 __attribute__((always_inline)) __STATIC_INLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
AnnaBridge 162:dbaafcfe0e9d 617 {
AnnaBridge 162:dbaafcfe0e9d 618 __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
AnnaBridge 162:dbaafcfe0e9d 619 }
AnnaBridge 162:dbaafcfe0e9d 620
AnnaBridge 162:dbaafcfe0e9d 621
AnnaBridge 162:dbaafcfe0e9d 622 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 162:dbaafcfe0e9d 623 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 162:dbaafcfe0e9d 624 /**
AnnaBridge 162:dbaafcfe0e9d 625 \brief Set Process Stack Pointer (non-secure)
AnnaBridge 162:dbaafcfe0e9d 626 \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge 162:dbaafcfe0e9d 627 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge 162:dbaafcfe0e9d 628 */
AnnaBridge 162:dbaafcfe0e9d 629 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
AnnaBridge 162:dbaafcfe0e9d 630 {
AnnaBridge 162:dbaafcfe0e9d 631 __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
AnnaBridge 162:dbaafcfe0e9d 632 }
AnnaBridge 162:dbaafcfe0e9d 633 #endif
AnnaBridge 162:dbaafcfe0e9d 634
AnnaBridge 162:dbaafcfe0e9d 635
AnnaBridge 162:dbaafcfe0e9d 636 /**
AnnaBridge 162:dbaafcfe0e9d 637 \brief Get Main Stack Pointer Limit
AnnaBridge 162:dbaafcfe0e9d 638 \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
AnnaBridge 162:dbaafcfe0e9d 639 \return MSPLIM Register value
AnnaBridge 162:dbaafcfe0e9d 640 */
AnnaBridge 162:dbaafcfe0e9d 641 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSPLIM(void)
AnnaBridge 162:dbaafcfe0e9d 642 {
AnnaBridge 162:dbaafcfe0e9d 643 register uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 644
AnnaBridge 162:dbaafcfe0e9d 645 __ASM volatile ("MRS %0, msplim" : "=r" (result) );
AnnaBridge 162:dbaafcfe0e9d 646
AnnaBridge 162:dbaafcfe0e9d 647 return(result);
AnnaBridge 162:dbaafcfe0e9d 648 }
AnnaBridge 162:dbaafcfe0e9d 649
AnnaBridge 162:dbaafcfe0e9d 650
AnnaBridge 162:dbaafcfe0e9d 651 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 162:dbaafcfe0e9d 652 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 162:dbaafcfe0e9d 653 /**
AnnaBridge 162:dbaafcfe0e9d 654 \brief Get Main Stack Pointer Limit (non-secure)
AnnaBridge 162:dbaafcfe0e9d 655 \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
AnnaBridge 162:dbaafcfe0e9d 656 \return MSPLIM Register value
AnnaBridge 162:dbaafcfe0e9d 657 */
AnnaBridge 162:dbaafcfe0e9d 658 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSPLIM_NS(void)
AnnaBridge 162:dbaafcfe0e9d 659 {
AnnaBridge 162:dbaafcfe0e9d 660 register uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 661
AnnaBridge 162:dbaafcfe0e9d 662 __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
AnnaBridge 162:dbaafcfe0e9d 663 return(result);
AnnaBridge 162:dbaafcfe0e9d 664 }
AnnaBridge 162:dbaafcfe0e9d 665 #endif
AnnaBridge 162:dbaafcfe0e9d 666
AnnaBridge 162:dbaafcfe0e9d 667
AnnaBridge 162:dbaafcfe0e9d 668 /**
AnnaBridge 162:dbaafcfe0e9d 669 \brief Set Main Stack Pointer Limit
AnnaBridge 162:dbaafcfe0e9d 670 \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
AnnaBridge 162:dbaafcfe0e9d 671 \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
AnnaBridge 162:dbaafcfe0e9d 672 */
AnnaBridge 162:dbaafcfe0e9d 673 __attribute__((always_inline)) __STATIC_INLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
AnnaBridge 162:dbaafcfe0e9d 674 {
AnnaBridge 162:dbaafcfe0e9d 675 __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
AnnaBridge 162:dbaafcfe0e9d 676 }
AnnaBridge 162:dbaafcfe0e9d 677
AnnaBridge 162:dbaafcfe0e9d 678
AnnaBridge 162:dbaafcfe0e9d 679 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 162:dbaafcfe0e9d 680 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 162:dbaafcfe0e9d 681 /**
AnnaBridge 162:dbaafcfe0e9d 682 \brief Set Main Stack Pointer Limit (non-secure)
AnnaBridge 162:dbaafcfe0e9d 683 \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
AnnaBridge 162:dbaafcfe0e9d 684 \param [in] MainStackPtrLimit Main Stack Pointer value to set
AnnaBridge 162:dbaafcfe0e9d 685 */
AnnaBridge 162:dbaafcfe0e9d 686 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
AnnaBridge 162:dbaafcfe0e9d 687 {
AnnaBridge 162:dbaafcfe0e9d 688 __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
AnnaBridge 162:dbaafcfe0e9d 689 }
AnnaBridge 162:dbaafcfe0e9d 690 #endif
AnnaBridge 162:dbaafcfe0e9d 691
AnnaBridge 162:dbaafcfe0e9d 692 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 693 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 162:dbaafcfe0e9d 694
AnnaBridge 162:dbaafcfe0e9d 695
AnnaBridge 162:dbaafcfe0e9d 696 #if ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 697 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 162:dbaafcfe0e9d 698
AnnaBridge 162:dbaafcfe0e9d 699 /**
AnnaBridge 162:dbaafcfe0e9d 700 \brief Get FPSCR
AnnaBridge 162:dbaafcfe0e9d 701 \details Returns the current value of the Floating Point Status/Control register.
AnnaBridge 162:dbaafcfe0e9d 702 \return Floating Point Status/Control register value
AnnaBridge 162:dbaafcfe0e9d 703 */
AnnaBridge 162:dbaafcfe0e9d 704 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FPSCR(void)
AnnaBridge 162:dbaafcfe0e9d 705 {
AnnaBridge 162:dbaafcfe0e9d 706 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 162:dbaafcfe0e9d 707 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
AnnaBridge 162:dbaafcfe0e9d 708 #if __has_builtin(__builtin_arm_get_fpscr) || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
AnnaBridge 162:dbaafcfe0e9d 709 /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
AnnaBridge 162:dbaafcfe0e9d 710 return __builtin_arm_get_fpscr();
AnnaBridge 162:dbaafcfe0e9d 711 #else
AnnaBridge 162:dbaafcfe0e9d 712 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 713
AnnaBridge 162:dbaafcfe0e9d 714 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
AnnaBridge 162:dbaafcfe0e9d 715 return(result);
AnnaBridge 162:dbaafcfe0e9d 716 #endif
AnnaBridge 162:dbaafcfe0e9d 717 #else
AnnaBridge 162:dbaafcfe0e9d 718 return(0U);
AnnaBridge 162:dbaafcfe0e9d 719 #endif
AnnaBridge 162:dbaafcfe0e9d 720 }
AnnaBridge 162:dbaafcfe0e9d 721
AnnaBridge 162:dbaafcfe0e9d 722
AnnaBridge 162:dbaafcfe0e9d 723 /**
AnnaBridge 162:dbaafcfe0e9d 724 \brief Set FPSCR
AnnaBridge 162:dbaafcfe0e9d 725 \details Assigns the given value to the Floating Point Status/Control register.
AnnaBridge 162:dbaafcfe0e9d 726 \param [in] fpscr Floating Point Status/Control value to set
AnnaBridge 162:dbaafcfe0e9d 727 */
AnnaBridge 162:dbaafcfe0e9d 728 __attribute__((always_inline)) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
AnnaBridge 162:dbaafcfe0e9d 729 {
AnnaBridge 162:dbaafcfe0e9d 730 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 162:dbaafcfe0e9d 731 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
AnnaBridge 162:dbaafcfe0e9d 732 #if __has_builtin(__builtin_arm_set_fpscr) || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
AnnaBridge 162:dbaafcfe0e9d 733 /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
AnnaBridge 162:dbaafcfe0e9d 734 __builtin_arm_set_fpscr(fpscr);
AnnaBridge 162:dbaafcfe0e9d 735 #else
AnnaBridge 162:dbaafcfe0e9d 736 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
AnnaBridge 162:dbaafcfe0e9d 737 #endif
AnnaBridge 162:dbaafcfe0e9d 738 #else
AnnaBridge 162:dbaafcfe0e9d 739 (void)fpscr;
AnnaBridge 162:dbaafcfe0e9d 740 #endif
AnnaBridge 162:dbaafcfe0e9d 741 }
AnnaBridge 162:dbaafcfe0e9d 742
AnnaBridge 162:dbaafcfe0e9d 743 #endif /* ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 744 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 162:dbaafcfe0e9d 745
AnnaBridge 162:dbaafcfe0e9d 746
AnnaBridge 162:dbaafcfe0e9d 747
AnnaBridge 162:dbaafcfe0e9d 748 /*@} end of CMSIS_Core_RegAccFunctions */
AnnaBridge 162:dbaafcfe0e9d 749
AnnaBridge 162:dbaafcfe0e9d 750
AnnaBridge 162:dbaafcfe0e9d 751 /* ########################## Core Instruction Access ######################### */
AnnaBridge 162:dbaafcfe0e9d 752 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
AnnaBridge 162:dbaafcfe0e9d 753 Access to dedicated instructions
AnnaBridge 162:dbaafcfe0e9d 754 @{
AnnaBridge 162:dbaafcfe0e9d 755 */
AnnaBridge 162:dbaafcfe0e9d 756
AnnaBridge 162:dbaafcfe0e9d 757 /* Define macros for porting to both thumb1 and thumb2.
AnnaBridge 162:dbaafcfe0e9d 758 * For thumb1, use low register (r0-r7), specified by constraint "l"
AnnaBridge 162:dbaafcfe0e9d 759 * Otherwise, use general registers, specified by constraint "r" */
AnnaBridge 162:dbaafcfe0e9d 760 #if defined (__thumb__) && !defined (__thumb2__)
AnnaBridge 162:dbaafcfe0e9d 761 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
AnnaBridge 162:dbaafcfe0e9d 762 #define __CMSIS_GCC_RW_REG(r) "+l" (r)
AnnaBridge 162:dbaafcfe0e9d 763 #define __CMSIS_GCC_USE_REG(r) "l" (r)
AnnaBridge 162:dbaafcfe0e9d 764 #else
AnnaBridge 162:dbaafcfe0e9d 765 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
AnnaBridge 162:dbaafcfe0e9d 766 #define __CMSIS_GCC_RW_REG(r) "+r" (r)
AnnaBridge 162:dbaafcfe0e9d 767 #define __CMSIS_GCC_USE_REG(r) "r" (r)
AnnaBridge 162:dbaafcfe0e9d 768 #endif
AnnaBridge 162:dbaafcfe0e9d 769
AnnaBridge 162:dbaafcfe0e9d 770 /**
AnnaBridge 162:dbaafcfe0e9d 771 \brief No Operation
AnnaBridge 162:dbaafcfe0e9d 772 \details No Operation does nothing. This instruction can be used for code alignment purposes.
AnnaBridge 162:dbaafcfe0e9d 773 */
AnnaBridge 162:dbaafcfe0e9d 774 //__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
AnnaBridge 162:dbaafcfe0e9d 775 //{
AnnaBridge 162:dbaafcfe0e9d 776 // __ASM volatile ("nop");
AnnaBridge 162:dbaafcfe0e9d 777 //}
AnnaBridge 162:dbaafcfe0e9d 778 #define __NOP() __ASM volatile ("nop") /* This implementation generates debug information */
AnnaBridge 162:dbaafcfe0e9d 779
AnnaBridge 162:dbaafcfe0e9d 780 /**
AnnaBridge 162:dbaafcfe0e9d 781 \brief Wait For Interrupt
AnnaBridge 162:dbaafcfe0e9d 782 \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
AnnaBridge 162:dbaafcfe0e9d 783 */
AnnaBridge 162:dbaafcfe0e9d 784 //__attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
AnnaBridge 162:dbaafcfe0e9d 785 //{
AnnaBridge 162:dbaafcfe0e9d 786 // __ASM volatile ("wfi");
AnnaBridge 162:dbaafcfe0e9d 787 //}
AnnaBridge 162:dbaafcfe0e9d 788 #define __WFI() __ASM volatile ("wfi") /* This implementation generates debug information */
AnnaBridge 162:dbaafcfe0e9d 789
AnnaBridge 162:dbaafcfe0e9d 790
AnnaBridge 162:dbaafcfe0e9d 791 /**
AnnaBridge 162:dbaafcfe0e9d 792 \brief Wait For Event
AnnaBridge 162:dbaafcfe0e9d 793 \details Wait For Event is a hint instruction that permits the processor to enter
AnnaBridge 162:dbaafcfe0e9d 794 a low-power state until one of a number of events occurs.
AnnaBridge 162:dbaafcfe0e9d 795 */
AnnaBridge 162:dbaafcfe0e9d 796 //__attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
AnnaBridge 162:dbaafcfe0e9d 797 //{
AnnaBridge 162:dbaafcfe0e9d 798 // __ASM volatile ("wfe");
AnnaBridge 162:dbaafcfe0e9d 799 //}
AnnaBridge 162:dbaafcfe0e9d 800 #define __WFE() __ASM volatile ("wfe") /* This implementation generates debug information */
AnnaBridge 162:dbaafcfe0e9d 801
AnnaBridge 162:dbaafcfe0e9d 802
AnnaBridge 162:dbaafcfe0e9d 803 /**
AnnaBridge 162:dbaafcfe0e9d 804 \brief Send Event
AnnaBridge 162:dbaafcfe0e9d 805 \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
AnnaBridge 162:dbaafcfe0e9d 806 */
AnnaBridge 162:dbaafcfe0e9d 807 //__attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
AnnaBridge 162:dbaafcfe0e9d 808 //{
AnnaBridge 162:dbaafcfe0e9d 809 // __ASM volatile ("sev");
AnnaBridge 162:dbaafcfe0e9d 810 //}
AnnaBridge 162:dbaafcfe0e9d 811 #define __SEV() __ASM volatile ("sev") /* This implementation generates debug information */
AnnaBridge 162:dbaafcfe0e9d 812
AnnaBridge 162:dbaafcfe0e9d 813
AnnaBridge 162:dbaafcfe0e9d 814 /**
AnnaBridge 162:dbaafcfe0e9d 815 \brief Instruction Synchronization Barrier
AnnaBridge 162:dbaafcfe0e9d 816 \details Instruction Synchronization Barrier flushes the pipeline in the processor,
AnnaBridge 162:dbaafcfe0e9d 817 so that all instructions following the ISB are fetched from cache or memory,
AnnaBridge 162:dbaafcfe0e9d 818 after the instruction has been completed.
AnnaBridge 162:dbaafcfe0e9d 819 */
AnnaBridge 162:dbaafcfe0e9d 820 __attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
AnnaBridge 162:dbaafcfe0e9d 821 {
AnnaBridge 162:dbaafcfe0e9d 822 __ASM volatile ("isb 0xF":::"memory");
AnnaBridge 162:dbaafcfe0e9d 823 }
AnnaBridge 162:dbaafcfe0e9d 824
AnnaBridge 162:dbaafcfe0e9d 825
AnnaBridge 162:dbaafcfe0e9d 826 /**
AnnaBridge 162:dbaafcfe0e9d 827 \brief Data Synchronization Barrier
AnnaBridge 162:dbaafcfe0e9d 828 \details Acts as a special kind of Data Memory Barrier.
AnnaBridge 162:dbaafcfe0e9d 829 It completes when all explicit memory accesses before this instruction complete.
AnnaBridge 162:dbaafcfe0e9d 830 */
AnnaBridge 162:dbaafcfe0e9d 831 __attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
AnnaBridge 162:dbaafcfe0e9d 832 {
AnnaBridge 162:dbaafcfe0e9d 833 __ASM volatile ("dsb 0xF":::"memory");
AnnaBridge 162:dbaafcfe0e9d 834 }
AnnaBridge 162:dbaafcfe0e9d 835
AnnaBridge 162:dbaafcfe0e9d 836
AnnaBridge 162:dbaafcfe0e9d 837 /**
AnnaBridge 162:dbaafcfe0e9d 838 \brief Data Memory Barrier
AnnaBridge 162:dbaafcfe0e9d 839 \details Ensures the apparent order of the explicit memory operations before
AnnaBridge 162:dbaafcfe0e9d 840 and after the instruction, without ensuring their completion.
AnnaBridge 162:dbaafcfe0e9d 841 */
AnnaBridge 162:dbaafcfe0e9d 842 __attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
AnnaBridge 162:dbaafcfe0e9d 843 {
AnnaBridge 162:dbaafcfe0e9d 844 __ASM volatile ("dmb 0xF":::"memory");
AnnaBridge 162:dbaafcfe0e9d 845 }
AnnaBridge 162:dbaafcfe0e9d 846
AnnaBridge 162:dbaafcfe0e9d 847
AnnaBridge 162:dbaafcfe0e9d 848 /**
AnnaBridge 162:dbaafcfe0e9d 849 \brief Reverse byte order (32 bit)
AnnaBridge 162:dbaafcfe0e9d 850 \details Reverses the byte order in unsigned integer value.
AnnaBridge 162:dbaafcfe0e9d 851 \param [in] value Value to reverse
AnnaBridge 162:dbaafcfe0e9d 852 \return Reversed value
AnnaBridge 162:dbaafcfe0e9d 853 */
AnnaBridge 162:dbaafcfe0e9d 854 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
AnnaBridge 162:dbaafcfe0e9d 855 {
AnnaBridge 162:dbaafcfe0e9d 856 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
AnnaBridge 162:dbaafcfe0e9d 857 return __builtin_bswap32(value);
AnnaBridge 162:dbaafcfe0e9d 858 #else
AnnaBridge 162:dbaafcfe0e9d 859 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 860
AnnaBridge 162:dbaafcfe0e9d 861 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 162:dbaafcfe0e9d 862 return(result);
AnnaBridge 162:dbaafcfe0e9d 863 #endif
AnnaBridge 162:dbaafcfe0e9d 864 }
AnnaBridge 162:dbaafcfe0e9d 865
AnnaBridge 162:dbaafcfe0e9d 866
AnnaBridge 162:dbaafcfe0e9d 867 /**
AnnaBridge 162:dbaafcfe0e9d 868 \brief Reverse byte order (16 bit)
AnnaBridge 162:dbaafcfe0e9d 869 \details Reverses the byte order in unsigned short value.
AnnaBridge 162:dbaafcfe0e9d 870 \param [in] value Value to reverse
AnnaBridge 162:dbaafcfe0e9d 871 \return Reversed value
AnnaBridge 162:dbaafcfe0e9d 872 */
AnnaBridge 162:dbaafcfe0e9d 873 __attribute__((always_inline)) __STATIC_INLINE uint16_t __REV16(uint16_t value)
AnnaBridge 162:dbaafcfe0e9d 874 {
AnnaBridge 162:dbaafcfe0e9d 875 uint16_t result;
AnnaBridge 162:dbaafcfe0e9d 876
AnnaBridge 162:dbaafcfe0e9d 877 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 162:dbaafcfe0e9d 878 return(result);
AnnaBridge 162:dbaafcfe0e9d 879 }
AnnaBridge 162:dbaafcfe0e9d 880
AnnaBridge 162:dbaafcfe0e9d 881
AnnaBridge 162:dbaafcfe0e9d 882 /**
AnnaBridge 162:dbaafcfe0e9d 883 \brief Reverse byte order in signed short value
AnnaBridge 162:dbaafcfe0e9d 884 \details Reverses the byte order in a signed short value with sign extension to integer.
AnnaBridge 162:dbaafcfe0e9d 885 \param [in] value Value to reverse
AnnaBridge 162:dbaafcfe0e9d 886 \return Reversed value
AnnaBridge 162:dbaafcfe0e9d 887 */
AnnaBridge 162:dbaafcfe0e9d 888 __attribute__((always_inline)) __STATIC_INLINE int16_t __REVSH(int16_t value)
AnnaBridge 162:dbaafcfe0e9d 889 {
AnnaBridge 162:dbaafcfe0e9d 890 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge 162:dbaafcfe0e9d 891 return (int16_t)__builtin_bswap16(value);
AnnaBridge 162:dbaafcfe0e9d 892 #else
AnnaBridge 162:dbaafcfe0e9d 893 int16_t result;
AnnaBridge 162:dbaafcfe0e9d 894
AnnaBridge 162:dbaafcfe0e9d 895 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 162:dbaafcfe0e9d 896 return result;
AnnaBridge 162:dbaafcfe0e9d 897 #endif
AnnaBridge 162:dbaafcfe0e9d 898 }
AnnaBridge 162:dbaafcfe0e9d 899
AnnaBridge 162:dbaafcfe0e9d 900
AnnaBridge 162:dbaafcfe0e9d 901 /**
AnnaBridge 162:dbaafcfe0e9d 902 \brief Rotate Right in unsigned value (32 bit)
AnnaBridge 162:dbaafcfe0e9d 903 \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
AnnaBridge 162:dbaafcfe0e9d 904 \param [in] op1 Value to rotate
AnnaBridge 162:dbaafcfe0e9d 905 \param [in] op2 Number of Bits to rotate
AnnaBridge 162:dbaafcfe0e9d 906 \return Rotated value
AnnaBridge 162:dbaafcfe0e9d 907 */
AnnaBridge 162:dbaafcfe0e9d 908 __attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 909 {
AnnaBridge 162:dbaafcfe0e9d 910 return (op1 >> op2) | (op1 << (32U - op2));
AnnaBridge 162:dbaafcfe0e9d 911 }
AnnaBridge 162:dbaafcfe0e9d 912
AnnaBridge 162:dbaafcfe0e9d 913
AnnaBridge 162:dbaafcfe0e9d 914 /**
AnnaBridge 162:dbaafcfe0e9d 915 \brief Breakpoint
AnnaBridge 162:dbaafcfe0e9d 916 \details Causes the processor to enter Debug state.
AnnaBridge 162:dbaafcfe0e9d 917 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
AnnaBridge 162:dbaafcfe0e9d 918 \param [in] value is ignored by the processor.
AnnaBridge 162:dbaafcfe0e9d 919 If required, a debugger can use it to store additional information about the breakpoint.
AnnaBridge 162:dbaafcfe0e9d 920 */
AnnaBridge 162:dbaafcfe0e9d 921 #define __BKPT(value) __ASM volatile ("bkpt "#value)
AnnaBridge 162:dbaafcfe0e9d 922
AnnaBridge 162:dbaafcfe0e9d 923
AnnaBridge 162:dbaafcfe0e9d 924 /**
AnnaBridge 162:dbaafcfe0e9d 925 \brief Reverse bit order of value
AnnaBridge 162:dbaafcfe0e9d 926 \details Reverses the bit order of the given value.
AnnaBridge 162:dbaafcfe0e9d 927 \param [in] value Value to reverse
AnnaBridge 162:dbaafcfe0e9d 928 \return Reversed value
AnnaBridge 162:dbaafcfe0e9d 929 */
AnnaBridge 162:dbaafcfe0e9d 930 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
AnnaBridge 162:dbaafcfe0e9d 931 {
AnnaBridge 162:dbaafcfe0e9d 932 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 933
AnnaBridge 162:dbaafcfe0e9d 934 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 935 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 936 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 162:dbaafcfe0e9d 937 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
AnnaBridge 162:dbaafcfe0e9d 938 #else
AnnaBridge 162:dbaafcfe0e9d 939 uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
AnnaBridge 162:dbaafcfe0e9d 940
AnnaBridge 162:dbaafcfe0e9d 941 result = value; /* r will be reversed bits of v; first get LSB of v */
AnnaBridge 162:dbaafcfe0e9d 942 for (value >>= 1U; value != 0U; value >>= 1U)
AnnaBridge 162:dbaafcfe0e9d 943 {
AnnaBridge 162:dbaafcfe0e9d 944 result <<= 1U;
AnnaBridge 162:dbaafcfe0e9d 945 result |= value & 1U;
AnnaBridge 162:dbaafcfe0e9d 946 s--;
AnnaBridge 162:dbaafcfe0e9d 947 }
AnnaBridge 162:dbaafcfe0e9d 948 result <<= s; /* shift when v's highest bits are zero */
AnnaBridge 162:dbaafcfe0e9d 949 #endif
AnnaBridge 162:dbaafcfe0e9d 950 return result;
AnnaBridge 162:dbaafcfe0e9d 951 }
AnnaBridge 162:dbaafcfe0e9d 952
AnnaBridge 162:dbaafcfe0e9d 953
AnnaBridge 162:dbaafcfe0e9d 954 /**
AnnaBridge 162:dbaafcfe0e9d 955 \brief Count leading zeros
AnnaBridge 162:dbaafcfe0e9d 956 \details Counts the number of leading zeros of a data value.
AnnaBridge 162:dbaafcfe0e9d 957 \param [in] value Value to count the leading zeros
AnnaBridge 162:dbaafcfe0e9d 958 \return number of leading zeros in value
AnnaBridge 162:dbaafcfe0e9d 959 */
AnnaBridge 162:dbaafcfe0e9d 960 #define __CLZ __builtin_clz
AnnaBridge 162:dbaafcfe0e9d 961
AnnaBridge 162:dbaafcfe0e9d 962
AnnaBridge 162:dbaafcfe0e9d 963 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 964 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 965 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 966 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 162:dbaafcfe0e9d 967 /**
AnnaBridge 162:dbaafcfe0e9d 968 \brief LDR Exclusive (8 bit)
AnnaBridge 162:dbaafcfe0e9d 969 \details Executes a exclusive LDR instruction for 8 bit value.
AnnaBridge 162:dbaafcfe0e9d 970 \param [in] ptr Pointer to data
AnnaBridge 162:dbaafcfe0e9d 971 \return value of type uint8_t at (*ptr)
AnnaBridge 162:dbaafcfe0e9d 972 */
AnnaBridge 162:dbaafcfe0e9d 973 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
AnnaBridge 162:dbaafcfe0e9d 974 {
AnnaBridge 162:dbaafcfe0e9d 975 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 976
AnnaBridge 162:dbaafcfe0e9d 977 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge 162:dbaafcfe0e9d 978 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
AnnaBridge 162:dbaafcfe0e9d 979 #else
AnnaBridge 162:dbaafcfe0e9d 980 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge 162:dbaafcfe0e9d 981 accepted by assembler. So has to use following less efficient pattern.
AnnaBridge 162:dbaafcfe0e9d 982 */
AnnaBridge 162:dbaafcfe0e9d 983 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
AnnaBridge 162:dbaafcfe0e9d 984 #endif
AnnaBridge 162:dbaafcfe0e9d 985 return ((uint8_t) result); /* Add explicit type cast here */
AnnaBridge 162:dbaafcfe0e9d 986 }
AnnaBridge 162:dbaafcfe0e9d 987
AnnaBridge 162:dbaafcfe0e9d 988
AnnaBridge 162:dbaafcfe0e9d 989 /**
AnnaBridge 162:dbaafcfe0e9d 990 \brief LDR Exclusive (16 bit)
AnnaBridge 162:dbaafcfe0e9d 991 \details Executes a exclusive LDR instruction for 16 bit values.
AnnaBridge 162:dbaafcfe0e9d 992 \param [in] ptr Pointer to data
AnnaBridge 162:dbaafcfe0e9d 993 \return value of type uint16_t at (*ptr)
AnnaBridge 162:dbaafcfe0e9d 994 */
AnnaBridge 162:dbaafcfe0e9d 995 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
AnnaBridge 162:dbaafcfe0e9d 996 {
AnnaBridge 162:dbaafcfe0e9d 997 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 998
AnnaBridge 162:dbaafcfe0e9d 999 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge 162:dbaafcfe0e9d 1000 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
AnnaBridge 162:dbaafcfe0e9d 1001 #else
AnnaBridge 162:dbaafcfe0e9d 1002 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge 162:dbaafcfe0e9d 1003 accepted by assembler. So has to use following less efficient pattern.
AnnaBridge 162:dbaafcfe0e9d 1004 */
AnnaBridge 162:dbaafcfe0e9d 1005 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
AnnaBridge 162:dbaafcfe0e9d 1006 #endif
AnnaBridge 162:dbaafcfe0e9d 1007 return ((uint16_t) result); /* Add explicit type cast here */
AnnaBridge 162:dbaafcfe0e9d 1008 }
AnnaBridge 162:dbaafcfe0e9d 1009
AnnaBridge 162:dbaafcfe0e9d 1010
AnnaBridge 162:dbaafcfe0e9d 1011 /**
AnnaBridge 162:dbaafcfe0e9d 1012 \brief LDR Exclusive (32 bit)
AnnaBridge 162:dbaafcfe0e9d 1013 \details Executes a exclusive LDR instruction for 32 bit values.
AnnaBridge 162:dbaafcfe0e9d 1014 \param [in] ptr Pointer to data
AnnaBridge 162:dbaafcfe0e9d 1015 \return value of type uint32_t at (*ptr)
AnnaBridge 162:dbaafcfe0e9d 1016 */
AnnaBridge 162:dbaafcfe0e9d 1017 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
AnnaBridge 162:dbaafcfe0e9d 1018 {
AnnaBridge 162:dbaafcfe0e9d 1019 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1020
AnnaBridge 162:dbaafcfe0e9d 1021 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
AnnaBridge 162:dbaafcfe0e9d 1022 return(result);
AnnaBridge 162:dbaafcfe0e9d 1023 }
AnnaBridge 162:dbaafcfe0e9d 1024
AnnaBridge 162:dbaafcfe0e9d 1025
AnnaBridge 162:dbaafcfe0e9d 1026 /**
AnnaBridge 162:dbaafcfe0e9d 1027 \brief STR Exclusive (8 bit)
AnnaBridge 162:dbaafcfe0e9d 1028 \details Executes a exclusive STR instruction for 8 bit values.
AnnaBridge 162:dbaafcfe0e9d 1029 \param [in] value Value to store
AnnaBridge 162:dbaafcfe0e9d 1030 \param [in] ptr Pointer to location
AnnaBridge 162:dbaafcfe0e9d 1031 \return 0 Function succeeded
AnnaBridge 162:dbaafcfe0e9d 1032 \return 1 Function failed
AnnaBridge 162:dbaafcfe0e9d 1033 */
AnnaBridge 162:dbaafcfe0e9d 1034 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
AnnaBridge 162:dbaafcfe0e9d 1035 {
AnnaBridge 162:dbaafcfe0e9d 1036 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1037
AnnaBridge 162:dbaafcfe0e9d 1038 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
AnnaBridge 162:dbaafcfe0e9d 1039 return(result);
AnnaBridge 162:dbaafcfe0e9d 1040 }
AnnaBridge 162:dbaafcfe0e9d 1041
AnnaBridge 162:dbaafcfe0e9d 1042
AnnaBridge 162:dbaafcfe0e9d 1043 /**
AnnaBridge 162:dbaafcfe0e9d 1044 \brief STR Exclusive (16 bit)
AnnaBridge 162:dbaafcfe0e9d 1045 \details Executes a exclusive STR instruction for 16 bit values.
AnnaBridge 162:dbaafcfe0e9d 1046 \param [in] value Value to store
AnnaBridge 162:dbaafcfe0e9d 1047 \param [in] ptr Pointer to location
AnnaBridge 162:dbaafcfe0e9d 1048 \return 0 Function succeeded
AnnaBridge 162:dbaafcfe0e9d 1049 \return 1 Function failed
AnnaBridge 162:dbaafcfe0e9d 1050 */
AnnaBridge 162:dbaafcfe0e9d 1051 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
AnnaBridge 162:dbaafcfe0e9d 1052 {
AnnaBridge 162:dbaafcfe0e9d 1053 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1054
AnnaBridge 162:dbaafcfe0e9d 1055 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
AnnaBridge 162:dbaafcfe0e9d 1056 return(result);
AnnaBridge 162:dbaafcfe0e9d 1057 }
AnnaBridge 162:dbaafcfe0e9d 1058
AnnaBridge 162:dbaafcfe0e9d 1059
AnnaBridge 162:dbaafcfe0e9d 1060 /**
AnnaBridge 162:dbaafcfe0e9d 1061 \brief STR Exclusive (32 bit)
AnnaBridge 162:dbaafcfe0e9d 1062 \details Executes a exclusive STR instruction for 32 bit values.
AnnaBridge 162:dbaafcfe0e9d 1063 \param [in] value Value to store
AnnaBridge 162:dbaafcfe0e9d 1064 \param [in] ptr Pointer to location
AnnaBridge 162:dbaafcfe0e9d 1065 \return 0 Function succeeded
AnnaBridge 162:dbaafcfe0e9d 1066 \return 1 Function failed
AnnaBridge 162:dbaafcfe0e9d 1067 */
AnnaBridge 162:dbaafcfe0e9d 1068 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
AnnaBridge 162:dbaafcfe0e9d 1069 {
AnnaBridge 162:dbaafcfe0e9d 1070 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1071
AnnaBridge 162:dbaafcfe0e9d 1072 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
AnnaBridge 162:dbaafcfe0e9d 1073 return(result);
AnnaBridge 162:dbaafcfe0e9d 1074 }
AnnaBridge 162:dbaafcfe0e9d 1075
AnnaBridge 162:dbaafcfe0e9d 1076
AnnaBridge 162:dbaafcfe0e9d 1077 /**
AnnaBridge 162:dbaafcfe0e9d 1078 \brief Remove the exclusive lock
AnnaBridge 162:dbaafcfe0e9d 1079 \details Removes the exclusive lock which is created by LDREX.
AnnaBridge 162:dbaafcfe0e9d 1080 */
AnnaBridge 162:dbaafcfe0e9d 1081 __attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
AnnaBridge 162:dbaafcfe0e9d 1082 {
AnnaBridge 162:dbaafcfe0e9d 1083 __ASM volatile ("clrex" ::: "memory");
AnnaBridge 162:dbaafcfe0e9d 1084 }
AnnaBridge 162:dbaafcfe0e9d 1085
AnnaBridge 162:dbaafcfe0e9d 1086 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 1087 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 1088 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 1089 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 162:dbaafcfe0e9d 1090
AnnaBridge 162:dbaafcfe0e9d 1091
AnnaBridge 162:dbaafcfe0e9d 1092 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 1093 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 1094 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 162:dbaafcfe0e9d 1095 /**
AnnaBridge 162:dbaafcfe0e9d 1096 \brief Signed Saturate
AnnaBridge 162:dbaafcfe0e9d 1097 \details Saturates a signed value.
AnnaBridge 162:dbaafcfe0e9d 1098 \param [in] ARG1 Value to be saturated
AnnaBridge 162:dbaafcfe0e9d 1099 \param [in] ARG2 Bit position to saturate to (1..32)
AnnaBridge 162:dbaafcfe0e9d 1100 \return Saturated value
AnnaBridge 162:dbaafcfe0e9d 1101 */
AnnaBridge 162:dbaafcfe0e9d 1102 #define __SSAT(ARG1,ARG2) \
AnnaBridge 162:dbaafcfe0e9d 1103 __extension__ \
AnnaBridge 162:dbaafcfe0e9d 1104 ({ \
AnnaBridge 162:dbaafcfe0e9d 1105 int32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 162:dbaafcfe0e9d 1106 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 162:dbaafcfe0e9d 1107 __RES; \
AnnaBridge 162:dbaafcfe0e9d 1108 })
AnnaBridge 162:dbaafcfe0e9d 1109
AnnaBridge 162:dbaafcfe0e9d 1110
AnnaBridge 162:dbaafcfe0e9d 1111 /**
AnnaBridge 162:dbaafcfe0e9d 1112 \brief Unsigned Saturate
AnnaBridge 162:dbaafcfe0e9d 1113 \details Saturates an unsigned value.
AnnaBridge 162:dbaafcfe0e9d 1114 \param [in] ARG1 Value to be saturated
AnnaBridge 162:dbaafcfe0e9d 1115 \param [in] ARG2 Bit position to saturate to (0..31)
AnnaBridge 162:dbaafcfe0e9d 1116 \return Saturated value
AnnaBridge 162:dbaafcfe0e9d 1117 */
AnnaBridge 162:dbaafcfe0e9d 1118 #define __USAT(ARG1,ARG2) \
AnnaBridge 162:dbaafcfe0e9d 1119 __extension__ \
AnnaBridge 162:dbaafcfe0e9d 1120 ({ \
AnnaBridge 162:dbaafcfe0e9d 1121 uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 162:dbaafcfe0e9d 1122 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 162:dbaafcfe0e9d 1123 __RES; \
AnnaBridge 162:dbaafcfe0e9d 1124 })
AnnaBridge 162:dbaafcfe0e9d 1125
AnnaBridge 162:dbaafcfe0e9d 1126
AnnaBridge 162:dbaafcfe0e9d 1127 /**
AnnaBridge 162:dbaafcfe0e9d 1128 \brief Rotate Right with Extend (32 bit)
AnnaBridge 162:dbaafcfe0e9d 1129 \details Moves each bit of a bitstring right by one bit.
AnnaBridge 162:dbaafcfe0e9d 1130 The carry input is shifted in at the left end of the bitstring.
AnnaBridge 162:dbaafcfe0e9d 1131 \param [in] value Value to rotate
AnnaBridge 162:dbaafcfe0e9d 1132 \return Rotated value
AnnaBridge 162:dbaafcfe0e9d 1133 */
AnnaBridge 162:dbaafcfe0e9d 1134 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
AnnaBridge 162:dbaafcfe0e9d 1135 {
AnnaBridge 162:dbaafcfe0e9d 1136 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1137
AnnaBridge 162:dbaafcfe0e9d 1138 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 162:dbaafcfe0e9d 1139 return(result);
AnnaBridge 162:dbaafcfe0e9d 1140 }
AnnaBridge 162:dbaafcfe0e9d 1141
AnnaBridge 162:dbaafcfe0e9d 1142
AnnaBridge 162:dbaafcfe0e9d 1143 /**
AnnaBridge 162:dbaafcfe0e9d 1144 \brief LDRT Unprivileged (8 bit)
AnnaBridge 162:dbaafcfe0e9d 1145 \details Executes a Unprivileged LDRT instruction for 8 bit value.
AnnaBridge 162:dbaafcfe0e9d 1146 \param [in] ptr Pointer to data
AnnaBridge 162:dbaafcfe0e9d 1147 \return value of type uint8_t at (*ptr)
AnnaBridge 162:dbaafcfe0e9d 1148 */
AnnaBridge 162:dbaafcfe0e9d 1149 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *ptr)
AnnaBridge 162:dbaafcfe0e9d 1150 {
AnnaBridge 162:dbaafcfe0e9d 1151 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1152
AnnaBridge 162:dbaafcfe0e9d 1153 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge 162:dbaafcfe0e9d 1154 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 162:dbaafcfe0e9d 1155 #else
AnnaBridge 162:dbaafcfe0e9d 1156 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge 162:dbaafcfe0e9d 1157 accepted by assembler. So has to use following less efficient pattern.
AnnaBridge 162:dbaafcfe0e9d 1158 */
AnnaBridge 162:dbaafcfe0e9d 1159 __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
AnnaBridge 162:dbaafcfe0e9d 1160 #endif
AnnaBridge 162:dbaafcfe0e9d 1161 return ((uint8_t) result); /* Add explicit type cast here */
AnnaBridge 162:dbaafcfe0e9d 1162 }
AnnaBridge 162:dbaafcfe0e9d 1163
AnnaBridge 162:dbaafcfe0e9d 1164
AnnaBridge 162:dbaafcfe0e9d 1165 /**
AnnaBridge 162:dbaafcfe0e9d 1166 \brief LDRT Unprivileged (16 bit)
AnnaBridge 162:dbaafcfe0e9d 1167 \details Executes a Unprivileged LDRT instruction for 16 bit values.
AnnaBridge 162:dbaafcfe0e9d 1168 \param [in] ptr Pointer to data
AnnaBridge 162:dbaafcfe0e9d 1169 \return value of type uint16_t at (*ptr)
AnnaBridge 162:dbaafcfe0e9d 1170 */
AnnaBridge 162:dbaafcfe0e9d 1171 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *ptr)
AnnaBridge 162:dbaafcfe0e9d 1172 {
AnnaBridge 162:dbaafcfe0e9d 1173 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1174
AnnaBridge 162:dbaafcfe0e9d 1175 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge 162:dbaafcfe0e9d 1176 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 162:dbaafcfe0e9d 1177 #else
AnnaBridge 162:dbaafcfe0e9d 1178 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge 162:dbaafcfe0e9d 1179 accepted by assembler. So has to use following less efficient pattern.
AnnaBridge 162:dbaafcfe0e9d 1180 */
AnnaBridge 162:dbaafcfe0e9d 1181 __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
AnnaBridge 162:dbaafcfe0e9d 1182 #endif
AnnaBridge 162:dbaafcfe0e9d 1183 return ((uint16_t) result); /* Add explicit type cast here */
AnnaBridge 162:dbaafcfe0e9d 1184 }
AnnaBridge 162:dbaafcfe0e9d 1185
AnnaBridge 162:dbaafcfe0e9d 1186
AnnaBridge 162:dbaafcfe0e9d 1187 /**
AnnaBridge 162:dbaafcfe0e9d 1188 \brief LDRT Unprivileged (32 bit)
AnnaBridge 162:dbaafcfe0e9d 1189 \details Executes a Unprivileged LDRT instruction for 32 bit values.
AnnaBridge 162:dbaafcfe0e9d 1190 \param [in] ptr Pointer to data
AnnaBridge 162:dbaafcfe0e9d 1191 \return value of type uint32_t at (*ptr)
AnnaBridge 162:dbaafcfe0e9d 1192 */
AnnaBridge 162:dbaafcfe0e9d 1193 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *ptr)
AnnaBridge 162:dbaafcfe0e9d 1194 {
AnnaBridge 162:dbaafcfe0e9d 1195 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1196
AnnaBridge 162:dbaafcfe0e9d 1197 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 162:dbaafcfe0e9d 1198 return(result);
AnnaBridge 162:dbaafcfe0e9d 1199 }
AnnaBridge 162:dbaafcfe0e9d 1200
AnnaBridge 162:dbaafcfe0e9d 1201
AnnaBridge 162:dbaafcfe0e9d 1202 /**
AnnaBridge 162:dbaafcfe0e9d 1203 \brief STRT Unprivileged (8 bit)
AnnaBridge 162:dbaafcfe0e9d 1204 \details Executes a Unprivileged STRT instruction for 8 bit values.
AnnaBridge 162:dbaafcfe0e9d 1205 \param [in] value Value to store
AnnaBridge 162:dbaafcfe0e9d 1206 \param [in] ptr Pointer to location
AnnaBridge 162:dbaafcfe0e9d 1207 */
AnnaBridge 162:dbaafcfe0e9d 1208 __attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 162:dbaafcfe0e9d 1209 {
AnnaBridge 162:dbaafcfe0e9d 1210 __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 162:dbaafcfe0e9d 1211 }
AnnaBridge 162:dbaafcfe0e9d 1212
AnnaBridge 162:dbaafcfe0e9d 1213
AnnaBridge 162:dbaafcfe0e9d 1214 /**
AnnaBridge 162:dbaafcfe0e9d 1215 \brief STRT Unprivileged (16 bit)
AnnaBridge 162:dbaafcfe0e9d 1216 \details Executes a Unprivileged STRT instruction for 16 bit values.
AnnaBridge 162:dbaafcfe0e9d 1217 \param [in] value Value to store
AnnaBridge 162:dbaafcfe0e9d 1218 \param [in] ptr Pointer to location
AnnaBridge 162:dbaafcfe0e9d 1219 */
AnnaBridge 162:dbaafcfe0e9d 1220 __attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 162:dbaafcfe0e9d 1221 {
AnnaBridge 162:dbaafcfe0e9d 1222 __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 162:dbaafcfe0e9d 1223 }
AnnaBridge 162:dbaafcfe0e9d 1224
AnnaBridge 162:dbaafcfe0e9d 1225
AnnaBridge 162:dbaafcfe0e9d 1226 /**
AnnaBridge 162:dbaafcfe0e9d 1227 \brief STRT Unprivileged (32 bit)
AnnaBridge 162:dbaafcfe0e9d 1228 \details Executes a Unprivileged STRT instruction for 32 bit values.
AnnaBridge 162:dbaafcfe0e9d 1229 \param [in] value Value to store
AnnaBridge 162:dbaafcfe0e9d 1230 \param [in] ptr Pointer to location
AnnaBridge 162:dbaafcfe0e9d 1231 */
AnnaBridge 162:dbaafcfe0e9d 1232 __attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 162:dbaafcfe0e9d 1233 {
AnnaBridge 162:dbaafcfe0e9d 1234 __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
AnnaBridge 162:dbaafcfe0e9d 1235 }
AnnaBridge 162:dbaafcfe0e9d 1236
AnnaBridge 162:dbaafcfe0e9d 1237 #else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 1238 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 1239 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 162:dbaafcfe0e9d 1240
AnnaBridge 162:dbaafcfe0e9d 1241 /**
AnnaBridge 162:dbaafcfe0e9d 1242 \brief Signed Saturate
AnnaBridge 162:dbaafcfe0e9d 1243 \details Saturates a signed value.
AnnaBridge 162:dbaafcfe0e9d 1244 \param [in] value Value to be saturated
AnnaBridge 162:dbaafcfe0e9d 1245 \param [in] sat Bit position to saturate to (1..32)
AnnaBridge 162:dbaafcfe0e9d 1246 \return Saturated value
AnnaBridge 162:dbaafcfe0e9d 1247 */
AnnaBridge 162:dbaafcfe0e9d 1248 __attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
AnnaBridge 162:dbaafcfe0e9d 1249 {
AnnaBridge 162:dbaafcfe0e9d 1250 if ((sat >= 1U) && (sat <= 32U)) {
AnnaBridge 162:dbaafcfe0e9d 1251 const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
AnnaBridge 162:dbaafcfe0e9d 1252 const int32_t min = -1 - max ;
AnnaBridge 162:dbaafcfe0e9d 1253 if (val > max) {
AnnaBridge 162:dbaafcfe0e9d 1254 return max;
AnnaBridge 162:dbaafcfe0e9d 1255 } else if (val < min) {
AnnaBridge 162:dbaafcfe0e9d 1256 return min;
AnnaBridge 162:dbaafcfe0e9d 1257 }
AnnaBridge 162:dbaafcfe0e9d 1258 }
AnnaBridge 162:dbaafcfe0e9d 1259 return val;
AnnaBridge 162:dbaafcfe0e9d 1260 }
AnnaBridge 162:dbaafcfe0e9d 1261
AnnaBridge 162:dbaafcfe0e9d 1262 /**
AnnaBridge 162:dbaafcfe0e9d 1263 \brief Unsigned Saturate
AnnaBridge 162:dbaafcfe0e9d 1264 \details Saturates an unsigned value.
AnnaBridge 162:dbaafcfe0e9d 1265 \param [in] value Value to be saturated
AnnaBridge 162:dbaafcfe0e9d 1266 \param [in] sat Bit position to saturate to (0..31)
AnnaBridge 162:dbaafcfe0e9d 1267 \return Saturated value
AnnaBridge 162:dbaafcfe0e9d 1268 */
AnnaBridge 162:dbaafcfe0e9d 1269 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
AnnaBridge 162:dbaafcfe0e9d 1270 {
AnnaBridge 162:dbaafcfe0e9d 1271 if (sat <= 31U) {
AnnaBridge 162:dbaafcfe0e9d 1272 const uint32_t max = ((1U << sat) - 1U);
AnnaBridge 162:dbaafcfe0e9d 1273 if (val > (int32_t)max) {
AnnaBridge 162:dbaafcfe0e9d 1274 return max;
AnnaBridge 162:dbaafcfe0e9d 1275 } else if (val < 0) {
AnnaBridge 162:dbaafcfe0e9d 1276 return 0U;
AnnaBridge 162:dbaafcfe0e9d 1277 }
AnnaBridge 162:dbaafcfe0e9d 1278 }
AnnaBridge 162:dbaafcfe0e9d 1279 return (uint32_t)val;
AnnaBridge 162:dbaafcfe0e9d 1280 }
AnnaBridge 162:dbaafcfe0e9d 1281
AnnaBridge 162:dbaafcfe0e9d 1282 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 1283 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 1284 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 162:dbaafcfe0e9d 1285
AnnaBridge 162:dbaafcfe0e9d 1286
AnnaBridge 162:dbaafcfe0e9d 1287 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 1288 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 162:dbaafcfe0e9d 1289 /**
AnnaBridge 162:dbaafcfe0e9d 1290 \brief Load-Acquire (8 bit)
AnnaBridge 162:dbaafcfe0e9d 1291 \details Executes a LDAB instruction for 8 bit value.
AnnaBridge 162:dbaafcfe0e9d 1292 \param [in] ptr Pointer to data
AnnaBridge 162:dbaafcfe0e9d 1293 \return value of type uint8_t at (*ptr)
AnnaBridge 162:dbaafcfe0e9d 1294 */
AnnaBridge 162:dbaafcfe0e9d 1295 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAB(volatile uint8_t *ptr)
AnnaBridge 162:dbaafcfe0e9d 1296 {
AnnaBridge 162:dbaafcfe0e9d 1297 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1298
AnnaBridge 162:dbaafcfe0e9d 1299 __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 162:dbaafcfe0e9d 1300 return ((uint8_t) result);
AnnaBridge 162:dbaafcfe0e9d 1301 }
AnnaBridge 162:dbaafcfe0e9d 1302
AnnaBridge 162:dbaafcfe0e9d 1303
AnnaBridge 162:dbaafcfe0e9d 1304 /**
AnnaBridge 162:dbaafcfe0e9d 1305 \brief Load-Acquire (16 bit)
AnnaBridge 162:dbaafcfe0e9d 1306 \details Executes a LDAH instruction for 16 bit values.
AnnaBridge 162:dbaafcfe0e9d 1307 \param [in] ptr Pointer to data
AnnaBridge 162:dbaafcfe0e9d 1308 \return value of type uint16_t at (*ptr)
AnnaBridge 162:dbaafcfe0e9d 1309 */
AnnaBridge 162:dbaafcfe0e9d 1310 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAH(volatile uint16_t *ptr)
AnnaBridge 162:dbaafcfe0e9d 1311 {
AnnaBridge 162:dbaafcfe0e9d 1312 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1313
AnnaBridge 162:dbaafcfe0e9d 1314 __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 162:dbaafcfe0e9d 1315 return ((uint16_t) result);
AnnaBridge 162:dbaafcfe0e9d 1316 }
AnnaBridge 162:dbaafcfe0e9d 1317
AnnaBridge 162:dbaafcfe0e9d 1318
AnnaBridge 162:dbaafcfe0e9d 1319 /**
AnnaBridge 162:dbaafcfe0e9d 1320 \brief Load-Acquire (32 bit)
AnnaBridge 162:dbaafcfe0e9d 1321 \details Executes a LDA instruction for 32 bit values.
AnnaBridge 162:dbaafcfe0e9d 1322 \param [in] ptr Pointer to data
AnnaBridge 162:dbaafcfe0e9d 1323 \return value of type uint32_t at (*ptr)
AnnaBridge 162:dbaafcfe0e9d 1324 */
AnnaBridge 162:dbaafcfe0e9d 1325 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDA(volatile uint32_t *ptr)
AnnaBridge 162:dbaafcfe0e9d 1326 {
AnnaBridge 162:dbaafcfe0e9d 1327 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1328
AnnaBridge 162:dbaafcfe0e9d 1329 __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 162:dbaafcfe0e9d 1330 return(result);
AnnaBridge 162:dbaafcfe0e9d 1331 }
AnnaBridge 162:dbaafcfe0e9d 1332
AnnaBridge 162:dbaafcfe0e9d 1333
AnnaBridge 162:dbaafcfe0e9d 1334 /**
AnnaBridge 162:dbaafcfe0e9d 1335 \brief Store-Release (8 bit)
AnnaBridge 162:dbaafcfe0e9d 1336 \details Executes a STLB instruction for 8 bit values.
AnnaBridge 162:dbaafcfe0e9d 1337 \param [in] value Value to store
AnnaBridge 162:dbaafcfe0e9d 1338 \param [in] ptr Pointer to location
AnnaBridge 162:dbaafcfe0e9d 1339 */
AnnaBridge 162:dbaafcfe0e9d 1340 __attribute__((always_inline)) __STATIC_INLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 162:dbaafcfe0e9d 1341 {
AnnaBridge 162:dbaafcfe0e9d 1342 __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 162:dbaafcfe0e9d 1343 }
AnnaBridge 162:dbaafcfe0e9d 1344
AnnaBridge 162:dbaafcfe0e9d 1345
AnnaBridge 162:dbaafcfe0e9d 1346 /**
AnnaBridge 162:dbaafcfe0e9d 1347 \brief Store-Release (16 bit)
AnnaBridge 162:dbaafcfe0e9d 1348 \details Executes a STLH instruction for 16 bit values.
AnnaBridge 162:dbaafcfe0e9d 1349 \param [in] value Value to store
AnnaBridge 162:dbaafcfe0e9d 1350 \param [in] ptr Pointer to location
AnnaBridge 162:dbaafcfe0e9d 1351 */
AnnaBridge 162:dbaafcfe0e9d 1352 __attribute__((always_inline)) __STATIC_INLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 162:dbaafcfe0e9d 1353 {
AnnaBridge 162:dbaafcfe0e9d 1354 __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 162:dbaafcfe0e9d 1355 }
AnnaBridge 162:dbaafcfe0e9d 1356
AnnaBridge 162:dbaafcfe0e9d 1357
AnnaBridge 162:dbaafcfe0e9d 1358 /**
AnnaBridge 162:dbaafcfe0e9d 1359 \brief Store-Release (32 bit)
AnnaBridge 162:dbaafcfe0e9d 1360 \details Executes a STL instruction for 32 bit values.
AnnaBridge 162:dbaafcfe0e9d 1361 \param [in] value Value to store
AnnaBridge 162:dbaafcfe0e9d 1362 \param [in] ptr Pointer to location
AnnaBridge 162:dbaafcfe0e9d 1363 */
AnnaBridge 162:dbaafcfe0e9d 1364 __attribute__((always_inline)) __STATIC_INLINE void __STL(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 162:dbaafcfe0e9d 1365 {
AnnaBridge 162:dbaafcfe0e9d 1366 __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 162:dbaafcfe0e9d 1367 }
AnnaBridge 162:dbaafcfe0e9d 1368
AnnaBridge 162:dbaafcfe0e9d 1369
AnnaBridge 162:dbaafcfe0e9d 1370 /**
AnnaBridge 162:dbaafcfe0e9d 1371 \brief Load-Acquire Exclusive (8 bit)
AnnaBridge 162:dbaafcfe0e9d 1372 \details Executes a LDAB exclusive instruction for 8 bit value.
AnnaBridge 162:dbaafcfe0e9d 1373 \param [in] ptr Pointer to data
AnnaBridge 162:dbaafcfe0e9d 1374 \return value of type uint8_t at (*ptr)
AnnaBridge 162:dbaafcfe0e9d 1375 */
AnnaBridge 162:dbaafcfe0e9d 1376 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
AnnaBridge 162:dbaafcfe0e9d 1377 {
AnnaBridge 162:dbaafcfe0e9d 1378 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1379
AnnaBridge 162:dbaafcfe0e9d 1380 __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 162:dbaafcfe0e9d 1381 return ((uint8_t) result);
AnnaBridge 162:dbaafcfe0e9d 1382 }
AnnaBridge 162:dbaafcfe0e9d 1383
AnnaBridge 162:dbaafcfe0e9d 1384
AnnaBridge 162:dbaafcfe0e9d 1385 /**
AnnaBridge 162:dbaafcfe0e9d 1386 \brief Load-Acquire Exclusive (16 bit)
AnnaBridge 162:dbaafcfe0e9d 1387 \details Executes a LDAH exclusive instruction for 16 bit values.
AnnaBridge 162:dbaafcfe0e9d 1388 \param [in] ptr Pointer to data
AnnaBridge 162:dbaafcfe0e9d 1389 \return value of type uint16_t at (*ptr)
AnnaBridge 162:dbaafcfe0e9d 1390 */
AnnaBridge 162:dbaafcfe0e9d 1391 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
AnnaBridge 162:dbaafcfe0e9d 1392 {
AnnaBridge 162:dbaafcfe0e9d 1393 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1394
AnnaBridge 162:dbaafcfe0e9d 1395 __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 162:dbaafcfe0e9d 1396 return ((uint16_t) result);
AnnaBridge 162:dbaafcfe0e9d 1397 }
AnnaBridge 162:dbaafcfe0e9d 1398
AnnaBridge 162:dbaafcfe0e9d 1399
AnnaBridge 162:dbaafcfe0e9d 1400 /**
AnnaBridge 162:dbaafcfe0e9d 1401 \brief Load-Acquire Exclusive (32 bit)
AnnaBridge 162:dbaafcfe0e9d 1402 \details Executes a LDA exclusive instruction for 32 bit values.
AnnaBridge 162:dbaafcfe0e9d 1403 \param [in] ptr Pointer to data
AnnaBridge 162:dbaafcfe0e9d 1404 \return value of type uint32_t at (*ptr)
AnnaBridge 162:dbaafcfe0e9d 1405 */
AnnaBridge 162:dbaafcfe0e9d 1406 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDAEX(volatile uint32_t *ptr)
AnnaBridge 162:dbaafcfe0e9d 1407 {
AnnaBridge 162:dbaafcfe0e9d 1408 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1409
AnnaBridge 162:dbaafcfe0e9d 1410 __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 162:dbaafcfe0e9d 1411 return(result);
AnnaBridge 162:dbaafcfe0e9d 1412 }
AnnaBridge 162:dbaafcfe0e9d 1413
AnnaBridge 162:dbaafcfe0e9d 1414
AnnaBridge 162:dbaafcfe0e9d 1415 /**
AnnaBridge 162:dbaafcfe0e9d 1416 \brief Store-Release Exclusive (8 bit)
AnnaBridge 162:dbaafcfe0e9d 1417 \details Executes a STLB exclusive instruction for 8 bit values.
AnnaBridge 162:dbaafcfe0e9d 1418 \param [in] value Value to store
AnnaBridge 162:dbaafcfe0e9d 1419 \param [in] ptr Pointer to location
AnnaBridge 162:dbaafcfe0e9d 1420 \return 0 Function succeeded
AnnaBridge 162:dbaafcfe0e9d 1421 \return 1 Function failed
AnnaBridge 162:dbaafcfe0e9d 1422 */
AnnaBridge 162:dbaafcfe0e9d 1423 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 162:dbaafcfe0e9d 1424 {
AnnaBridge 162:dbaafcfe0e9d 1425 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1426
AnnaBridge 162:dbaafcfe0e9d 1427 __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 162:dbaafcfe0e9d 1428 return(result);
AnnaBridge 162:dbaafcfe0e9d 1429 }
AnnaBridge 162:dbaafcfe0e9d 1430
AnnaBridge 162:dbaafcfe0e9d 1431
AnnaBridge 162:dbaafcfe0e9d 1432 /**
AnnaBridge 162:dbaafcfe0e9d 1433 \brief Store-Release Exclusive (16 bit)
AnnaBridge 162:dbaafcfe0e9d 1434 \details Executes a STLH exclusive instruction for 16 bit values.
AnnaBridge 162:dbaafcfe0e9d 1435 \param [in] value Value to store
AnnaBridge 162:dbaafcfe0e9d 1436 \param [in] ptr Pointer to location
AnnaBridge 162:dbaafcfe0e9d 1437 \return 0 Function succeeded
AnnaBridge 162:dbaafcfe0e9d 1438 \return 1 Function failed
AnnaBridge 162:dbaafcfe0e9d 1439 */
AnnaBridge 162:dbaafcfe0e9d 1440 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 162:dbaafcfe0e9d 1441 {
AnnaBridge 162:dbaafcfe0e9d 1442 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1443
AnnaBridge 162:dbaafcfe0e9d 1444 __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 162:dbaafcfe0e9d 1445 return(result);
AnnaBridge 162:dbaafcfe0e9d 1446 }
AnnaBridge 162:dbaafcfe0e9d 1447
AnnaBridge 162:dbaafcfe0e9d 1448
AnnaBridge 162:dbaafcfe0e9d 1449 /**
AnnaBridge 162:dbaafcfe0e9d 1450 \brief Store-Release Exclusive (32 bit)
AnnaBridge 162:dbaafcfe0e9d 1451 \details Executes a STL exclusive instruction for 32 bit values.
AnnaBridge 162:dbaafcfe0e9d 1452 \param [in] value Value to store
AnnaBridge 162:dbaafcfe0e9d 1453 \param [in] ptr Pointer to location
AnnaBridge 162:dbaafcfe0e9d 1454 \return 0 Function succeeded
AnnaBridge 162:dbaafcfe0e9d 1455 \return 1 Function failed
AnnaBridge 162:dbaafcfe0e9d 1456 */
AnnaBridge 162:dbaafcfe0e9d 1457 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 162:dbaafcfe0e9d 1458 {
AnnaBridge 162:dbaafcfe0e9d 1459 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1460
AnnaBridge 162:dbaafcfe0e9d 1461 __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 162:dbaafcfe0e9d 1462 return(result);
AnnaBridge 162:dbaafcfe0e9d 1463 }
AnnaBridge 162:dbaafcfe0e9d 1464
AnnaBridge 162:dbaafcfe0e9d 1465 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 162:dbaafcfe0e9d 1466 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 162:dbaafcfe0e9d 1467
AnnaBridge 162:dbaafcfe0e9d 1468 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
AnnaBridge 162:dbaafcfe0e9d 1469
AnnaBridge 162:dbaafcfe0e9d 1470
AnnaBridge 162:dbaafcfe0e9d 1471 /* ################### Compiler specific Intrinsics ########################### */
AnnaBridge 162:dbaafcfe0e9d 1472 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
AnnaBridge 162:dbaafcfe0e9d 1473 Access to dedicated SIMD instructions
AnnaBridge 162:dbaafcfe0e9d 1474 @{
AnnaBridge 162:dbaafcfe0e9d 1475 */
AnnaBridge 162:dbaafcfe0e9d 1476
AnnaBridge 162:dbaafcfe0e9d 1477 #if (__ARM_FEATURE_DSP == 1) /* ToDo ARMCLANG: This should be ARCH >= ARMv7-M + SIMD */
AnnaBridge 162:dbaafcfe0e9d 1478
AnnaBridge 162:dbaafcfe0e9d 1479 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1480 {
AnnaBridge 162:dbaafcfe0e9d 1481 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1482
AnnaBridge 162:dbaafcfe0e9d 1483 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1484 return(result);
AnnaBridge 162:dbaafcfe0e9d 1485 }
AnnaBridge 162:dbaafcfe0e9d 1486
AnnaBridge 162:dbaafcfe0e9d 1487 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1488 {
AnnaBridge 162:dbaafcfe0e9d 1489 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1490
AnnaBridge 162:dbaafcfe0e9d 1491 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1492 return(result);
AnnaBridge 162:dbaafcfe0e9d 1493 }
AnnaBridge 162:dbaafcfe0e9d 1494
AnnaBridge 162:dbaafcfe0e9d 1495 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1496 {
AnnaBridge 162:dbaafcfe0e9d 1497 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1498
AnnaBridge 162:dbaafcfe0e9d 1499 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1500 return(result);
AnnaBridge 162:dbaafcfe0e9d 1501 }
AnnaBridge 162:dbaafcfe0e9d 1502
AnnaBridge 162:dbaafcfe0e9d 1503 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1504 {
AnnaBridge 162:dbaafcfe0e9d 1505 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1506
AnnaBridge 162:dbaafcfe0e9d 1507 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1508 return(result);
AnnaBridge 162:dbaafcfe0e9d 1509 }
AnnaBridge 162:dbaafcfe0e9d 1510
AnnaBridge 162:dbaafcfe0e9d 1511 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1512 {
AnnaBridge 162:dbaafcfe0e9d 1513 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1514
AnnaBridge 162:dbaafcfe0e9d 1515 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1516 return(result);
AnnaBridge 162:dbaafcfe0e9d 1517 }
AnnaBridge 162:dbaafcfe0e9d 1518
AnnaBridge 162:dbaafcfe0e9d 1519 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1520 {
AnnaBridge 162:dbaafcfe0e9d 1521 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1522
AnnaBridge 162:dbaafcfe0e9d 1523 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1524 return(result);
AnnaBridge 162:dbaafcfe0e9d 1525 }
AnnaBridge 162:dbaafcfe0e9d 1526
AnnaBridge 162:dbaafcfe0e9d 1527
AnnaBridge 162:dbaafcfe0e9d 1528 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1529 {
AnnaBridge 162:dbaafcfe0e9d 1530 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1531
AnnaBridge 162:dbaafcfe0e9d 1532 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1533 return(result);
AnnaBridge 162:dbaafcfe0e9d 1534 }
AnnaBridge 162:dbaafcfe0e9d 1535
AnnaBridge 162:dbaafcfe0e9d 1536 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1537 {
AnnaBridge 162:dbaafcfe0e9d 1538 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1539
AnnaBridge 162:dbaafcfe0e9d 1540 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1541 return(result);
AnnaBridge 162:dbaafcfe0e9d 1542 }
AnnaBridge 162:dbaafcfe0e9d 1543
AnnaBridge 162:dbaafcfe0e9d 1544 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1545 {
AnnaBridge 162:dbaafcfe0e9d 1546 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1547
AnnaBridge 162:dbaafcfe0e9d 1548 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1549 return(result);
AnnaBridge 162:dbaafcfe0e9d 1550 }
AnnaBridge 162:dbaafcfe0e9d 1551
AnnaBridge 162:dbaafcfe0e9d 1552 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1553 {
AnnaBridge 162:dbaafcfe0e9d 1554 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1555
AnnaBridge 162:dbaafcfe0e9d 1556 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1557 return(result);
AnnaBridge 162:dbaafcfe0e9d 1558 }
AnnaBridge 162:dbaafcfe0e9d 1559
AnnaBridge 162:dbaafcfe0e9d 1560 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1561 {
AnnaBridge 162:dbaafcfe0e9d 1562 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1563
AnnaBridge 162:dbaafcfe0e9d 1564 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1565 return(result);
AnnaBridge 162:dbaafcfe0e9d 1566 }
AnnaBridge 162:dbaafcfe0e9d 1567
AnnaBridge 162:dbaafcfe0e9d 1568 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1569 {
AnnaBridge 162:dbaafcfe0e9d 1570 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1571
AnnaBridge 162:dbaafcfe0e9d 1572 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1573 return(result);
AnnaBridge 162:dbaafcfe0e9d 1574 }
AnnaBridge 162:dbaafcfe0e9d 1575
AnnaBridge 162:dbaafcfe0e9d 1576
AnnaBridge 162:dbaafcfe0e9d 1577 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1578 {
AnnaBridge 162:dbaafcfe0e9d 1579 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1580
AnnaBridge 162:dbaafcfe0e9d 1581 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1582 return(result);
AnnaBridge 162:dbaafcfe0e9d 1583 }
AnnaBridge 162:dbaafcfe0e9d 1584
AnnaBridge 162:dbaafcfe0e9d 1585 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1586 {
AnnaBridge 162:dbaafcfe0e9d 1587 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1588
AnnaBridge 162:dbaafcfe0e9d 1589 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1590 return(result);
AnnaBridge 162:dbaafcfe0e9d 1591 }
AnnaBridge 162:dbaafcfe0e9d 1592
AnnaBridge 162:dbaafcfe0e9d 1593 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1594 {
AnnaBridge 162:dbaafcfe0e9d 1595 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1596
AnnaBridge 162:dbaafcfe0e9d 1597 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1598 return(result);
AnnaBridge 162:dbaafcfe0e9d 1599 }
AnnaBridge 162:dbaafcfe0e9d 1600
AnnaBridge 162:dbaafcfe0e9d 1601 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1602 {
AnnaBridge 162:dbaafcfe0e9d 1603 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1604
AnnaBridge 162:dbaafcfe0e9d 1605 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1606 return(result);
AnnaBridge 162:dbaafcfe0e9d 1607 }
AnnaBridge 162:dbaafcfe0e9d 1608
AnnaBridge 162:dbaafcfe0e9d 1609 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1610 {
AnnaBridge 162:dbaafcfe0e9d 1611 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1612
AnnaBridge 162:dbaafcfe0e9d 1613 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1614 return(result);
AnnaBridge 162:dbaafcfe0e9d 1615 }
AnnaBridge 162:dbaafcfe0e9d 1616
AnnaBridge 162:dbaafcfe0e9d 1617 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1618 {
AnnaBridge 162:dbaafcfe0e9d 1619 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1620
AnnaBridge 162:dbaafcfe0e9d 1621 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1622 return(result);
AnnaBridge 162:dbaafcfe0e9d 1623 }
AnnaBridge 162:dbaafcfe0e9d 1624
AnnaBridge 162:dbaafcfe0e9d 1625 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1626 {
AnnaBridge 162:dbaafcfe0e9d 1627 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1628
AnnaBridge 162:dbaafcfe0e9d 1629 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1630 return(result);
AnnaBridge 162:dbaafcfe0e9d 1631 }
AnnaBridge 162:dbaafcfe0e9d 1632
AnnaBridge 162:dbaafcfe0e9d 1633 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1634 {
AnnaBridge 162:dbaafcfe0e9d 1635 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1636
AnnaBridge 162:dbaafcfe0e9d 1637 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1638 return(result);
AnnaBridge 162:dbaafcfe0e9d 1639 }
AnnaBridge 162:dbaafcfe0e9d 1640
AnnaBridge 162:dbaafcfe0e9d 1641 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1642 {
AnnaBridge 162:dbaafcfe0e9d 1643 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1644
AnnaBridge 162:dbaafcfe0e9d 1645 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1646 return(result);
AnnaBridge 162:dbaafcfe0e9d 1647 }
AnnaBridge 162:dbaafcfe0e9d 1648
AnnaBridge 162:dbaafcfe0e9d 1649 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1650 {
AnnaBridge 162:dbaafcfe0e9d 1651 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1652
AnnaBridge 162:dbaafcfe0e9d 1653 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1654 return(result);
AnnaBridge 162:dbaafcfe0e9d 1655 }
AnnaBridge 162:dbaafcfe0e9d 1656
AnnaBridge 162:dbaafcfe0e9d 1657 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1658 {
AnnaBridge 162:dbaafcfe0e9d 1659 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1660
AnnaBridge 162:dbaafcfe0e9d 1661 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1662 return(result);
AnnaBridge 162:dbaafcfe0e9d 1663 }
AnnaBridge 162:dbaafcfe0e9d 1664
AnnaBridge 162:dbaafcfe0e9d 1665 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1666 {
AnnaBridge 162:dbaafcfe0e9d 1667 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1668
AnnaBridge 162:dbaafcfe0e9d 1669 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1670 return(result);
AnnaBridge 162:dbaafcfe0e9d 1671 }
AnnaBridge 162:dbaafcfe0e9d 1672
AnnaBridge 162:dbaafcfe0e9d 1673 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1674 {
AnnaBridge 162:dbaafcfe0e9d 1675 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1676
AnnaBridge 162:dbaafcfe0e9d 1677 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1678 return(result);
AnnaBridge 162:dbaafcfe0e9d 1679 }
AnnaBridge 162:dbaafcfe0e9d 1680
AnnaBridge 162:dbaafcfe0e9d 1681 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1682 {
AnnaBridge 162:dbaafcfe0e9d 1683 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1684
AnnaBridge 162:dbaafcfe0e9d 1685 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1686 return(result);
AnnaBridge 162:dbaafcfe0e9d 1687 }
AnnaBridge 162:dbaafcfe0e9d 1688
AnnaBridge 162:dbaafcfe0e9d 1689 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1690 {
AnnaBridge 162:dbaafcfe0e9d 1691 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1692
AnnaBridge 162:dbaafcfe0e9d 1693 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1694 return(result);
AnnaBridge 162:dbaafcfe0e9d 1695 }
AnnaBridge 162:dbaafcfe0e9d 1696
AnnaBridge 162:dbaafcfe0e9d 1697 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1698 {
AnnaBridge 162:dbaafcfe0e9d 1699 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1700
AnnaBridge 162:dbaafcfe0e9d 1701 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1702 return(result);
AnnaBridge 162:dbaafcfe0e9d 1703 }
AnnaBridge 162:dbaafcfe0e9d 1704
AnnaBridge 162:dbaafcfe0e9d 1705 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1706 {
AnnaBridge 162:dbaafcfe0e9d 1707 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1708
AnnaBridge 162:dbaafcfe0e9d 1709 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1710 return(result);
AnnaBridge 162:dbaafcfe0e9d 1711 }
AnnaBridge 162:dbaafcfe0e9d 1712
AnnaBridge 162:dbaafcfe0e9d 1713 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1714 {
AnnaBridge 162:dbaafcfe0e9d 1715 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1716
AnnaBridge 162:dbaafcfe0e9d 1717 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1718 return(result);
AnnaBridge 162:dbaafcfe0e9d 1719 }
AnnaBridge 162:dbaafcfe0e9d 1720
AnnaBridge 162:dbaafcfe0e9d 1721 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1722 {
AnnaBridge 162:dbaafcfe0e9d 1723 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1724
AnnaBridge 162:dbaafcfe0e9d 1725 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1726 return(result);
AnnaBridge 162:dbaafcfe0e9d 1727 }
AnnaBridge 162:dbaafcfe0e9d 1728
AnnaBridge 162:dbaafcfe0e9d 1729 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1730 {
AnnaBridge 162:dbaafcfe0e9d 1731 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1732
AnnaBridge 162:dbaafcfe0e9d 1733 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1734 return(result);
AnnaBridge 162:dbaafcfe0e9d 1735 }
AnnaBridge 162:dbaafcfe0e9d 1736
AnnaBridge 162:dbaafcfe0e9d 1737 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1738 {
AnnaBridge 162:dbaafcfe0e9d 1739 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1740
AnnaBridge 162:dbaafcfe0e9d 1741 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1742 return(result);
AnnaBridge 162:dbaafcfe0e9d 1743 }
AnnaBridge 162:dbaafcfe0e9d 1744
AnnaBridge 162:dbaafcfe0e9d 1745 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1746 {
AnnaBridge 162:dbaafcfe0e9d 1747 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1748
AnnaBridge 162:dbaafcfe0e9d 1749 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1750 return(result);
AnnaBridge 162:dbaafcfe0e9d 1751 }
AnnaBridge 162:dbaafcfe0e9d 1752
AnnaBridge 162:dbaafcfe0e9d 1753 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1754 {
AnnaBridge 162:dbaafcfe0e9d 1755 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1756
AnnaBridge 162:dbaafcfe0e9d 1757 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1758 return(result);
AnnaBridge 162:dbaafcfe0e9d 1759 }
AnnaBridge 162:dbaafcfe0e9d 1760
AnnaBridge 162:dbaafcfe0e9d 1761 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1762 {
AnnaBridge 162:dbaafcfe0e9d 1763 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1764
AnnaBridge 162:dbaafcfe0e9d 1765 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1766 return(result);
AnnaBridge 162:dbaafcfe0e9d 1767 }
AnnaBridge 162:dbaafcfe0e9d 1768
AnnaBridge 162:dbaafcfe0e9d 1769 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1770 {
AnnaBridge 162:dbaafcfe0e9d 1771 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1772
AnnaBridge 162:dbaafcfe0e9d 1773 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1774 return(result);
AnnaBridge 162:dbaafcfe0e9d 1775 }
AnnaBridge 162:dbaafcfe0e9d 1776
AnnaBridge 162:dbaafcfe0e9d 1777 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 162:dbaafcfe0e9d 1778 {
AnnaBridge 162:dbaafcfe0e9d 1779 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1780
AnnaBridge 162:dbaafcfe0e9d 1781 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 162:dbaafcfe0e9d 1782 return(result);
AnnaBridge 162:dbaafcfe0e9d 1783 }
AnnaBridge 162:dbaafcfe0e9d 1784
AnnaBridge 162:dbaafcfe0e9d 1785 #define __SSAT16(ARG1,ARG2) \
AnnaBridge 162:dbaafcfe0e9d 1786 ({ \
AnnaBridge 162:dbaafcfe0e9d 1787 int32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 162:dbaafcfe0e9d 1788 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 162:dbaafcfe0e9d 1789 __RES; \
AnnaBridge 162:dbaafcfe0e9d 1790 })
AnnaBridge 162:dbaafcfe0e9d 1791
AnnaBridge 162:dbaafcfe0e9d 1792 #define __USAT16(ARG1,ARG2) \
AnnaBridge 162:dbaafcfe0e9d 1793 ({ \
AnnaBridge 162:dbaafcfe0e9d 1794 uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 162:dbaafcfe0e9d 1795 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 162:dbaafcfe0e9d 1796 __RES; \
AnnaBridge 162:dbaafcfe0e9d 1797 })
AnnaBridge 162:dbaafcfe0e9d 1798
AnnaBridge 162:dbaafcfe0e9d 1799 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
AnnaBridge 162:dbaafcfe0e9d 1800 {
AnnaBridge 162:dbaafcfe0e9d 1801 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1802
AnnaBridge 162:dbaafcfe0e9d 1803 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 162:dbaafcfe0e9d 1804 return(result);
AnnaBridge 162:dbaafcfe0e9d 1805 }
AnnaBridge 162:dbaafcfe0e9d 1806
AnnaBridge 162:dbaafcfe0e9d 1807 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1808 {
AnnaBridge 162:dbaafcfe0e9d 1809 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1810
AnnaBridge 162:dbaafcfe0e9d 1811 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1812 return(result);
AnnaBridge 162:dbaafcfe0e9d 1813 }
AnnaBridge 162:dbaafcfe0e9d 1814
AnnaBridge 162:dbaafcfe0e9d 1815 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
AnnaBridge 162:dbaafcfe0e9d 1816 {
AnnaBridge 162:dbaafcfe0e9d 1817 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1818
AnnaBridge 162:dbaafcfe0e9d 1819 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 162:dbaafcfe0e9d 1820 return(result);
AnnaBridge 162:dbaafcfe0e9d 1821 }
AnnaBridge 162:dbaafcfe0e9d 1822
AnnaBridge 162:dbaafcfe0e9d 1823 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1824 {
AnnaBridge 162:dbaafcfe0e9d 1825 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1826
AnnaBridge 162:dbaafcfe0e9d 1827 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1828 return(result);
AnnaBridge 162:dbaafcfe0e9d 1829 }
AnnaBridge 162:dbaafcfe0e9d 1830
AnnaBridge 162:dbaafcfe0e9d 1831 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1832 {
AnnaBridge 162:dbaafcfe0e9d 1833 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1834
AnnaBridge 162:dbaafcfe0e9d 1835 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1836 return(result);
AnnaBridge 162:dbaafcfe0e9d 1837 }
AnnaBridge 162:dbaafcfe0e9d 1838
AnnaBridge 162:dbaafcfe0e9d 1839 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1840 {
AnnaBridge 162:dbaafcfe0e9d 1841 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1842
AnnaBridge 162:dbaafcfe0e9d 1843 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1844 return(result);
AnnaBridge 162:dbaafcfe0e9d 1845 }
AnnaBridge 162:dbaafcfe0e9d 1846
AnnaBridge 162:dbaafcfe0e9d 1847 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 162:dbaafcfe0e9d 1848 {
AnnaBridge 162:dbaafcfe0e9d 1849 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1850
AnnaBridge 162:dbaafcfe0e9d 1851 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 162:dbaafcfe0e9d 1852 return(result);
AnnaBridge 162:dbaafcfe0e9d 1853 }
AnnaBridge 162:dbaafcfe0e9d 1854
AnnaBridge 162:dbaafcfe0e9d 1855 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 162:dbaafcfe0e9d 1856 {
AnnaBridge 162:dbaafcfe0e9d 1857 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1858
AnnaBridge 162:dbaafcfe0e9d 1859 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 162:dbaafcfe0e9d 1860 return(result);
AnnaBridge 162:dbaafcfe0e9d 1861 }
AnnaBridge 162:dbaafcfe0e9d 1862
AnnaBridge 162:dbaafcfe0e9d 1863 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 162:dbaafcfe0e9d 1864 {
AnnaBridge 162:dbaafcfe0e9d 1865 union llreg_u{
AnnaBridge 162:dbaafcfe0e9d 1866 uint32_t w32[2];
AnnaBridge 162:dbaafcfe0e9d 1867 uint64_t w64;
AnnaBridge 162:dbaafcfe0e9d 1868 } llr;
AnnaBridge 162:dbaafcfe0e9d 1869 llr.w64 = acc;
AnnaBridge 162:dbaafcfe0e9d 1870
AnnaBridge 162:dbaafcfe0e9d 1871 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 162:dbaafcfe0e9d 1872 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 162:dbaafcfe0e9d 1873 #else /* Big endian */
AnnaBridge 162:dbaafcfe0e9d 1874 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 162:dbaafcfe0e9d 1875 #endif
AnnaBridge 162:dbaafcfe0e9d 1876
AnnaBridge 162:dbaafcfe0e9d 1877 return(llr.w64);
AnnaBridge 162:dbaafcfe0e9d 1878 }
AnnaBridge 162:dbaafcfe0e9d 1879
AnnaBridge 162:dbaafcfe0e9d 1880 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 162:dbaafcfe0e9d 1881 {
AnnaBridge 162:dbaafcfe0e9d 1882 union llreg_u{
AnnaBridge 162:dbaafcfe0e9d 1883 uint32_t w32[2];
AnnaBridge 162:dbaafcfe0e9d 1884 uint64_t w64;
AnnaBridge 162:dbaafcfe0e9d 1885 } llr;
AnnaBridge 162:dbaafcfe0e9d 1886 llr.w64 = acc;
AnnaBridge 162:dbaafcfe0e9d 1887
AnnaBridge 162:dbaafcfe0e9d 1888 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 162:dbaafcfe0e9d 1889 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 162:dbaafcfe0e9d 1890 #else /* Big endian */
AnnaBridge 162:dbaafcfe0e9d 1891 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 162:dbaafcfe0e9d 1892 #endif
AnnaBridge 162:dbaafcfe0e9d 1893
AnnaBridge 162:dbaafcfe0e9d 1894 return(llr.w64);
AnnaBridge 162:dbaafcfe0e9d 1895 }
AnnaBridge 162:dbaafcfe0e9d 1896
AnnaBridge 162:dbaafcfe0e9d 1897 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1898 {
AnnaBridge 162:dbaafcfe0e9d 1899 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1900
AnnaBridge 162:dbaafcfe0e9d 1901 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1902 return(result);
AnnaBridge 162:dbaafcfe0e9d 1903 }
AnnaBridge 162:dbaafcfe0e9d 1904
AnnaBridge 162:dbaafcfe0e9d 1905 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1906 {
AnnaBridge 162:dbaafcfe0e9d 1907 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1908
AnnaBridge 162:dbaafcfe0e9d 1909 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1910 return(result);
AnnaBridge 162:dbaafcfe0e9d 1911 }
AnnaBridge 162:dbaafcfe0e9d 1912
AnnaBridge 162:dbaafcfe0e9d 1913 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 162:dbaafcfe0e9d 1914 {
AnnaBridge 162:dbaafcfe0e9d 1915 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1916
AnnaBridge 162:dbaafcfe0e9d 1917 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 162:dbaafcfe0e9d 1918 return(result);
AnnaBridge 162:dbaafcfe0e9d 1919 }
AnnaBridge 162:dbaafcfe0e9d 1920
AnnaBridge 162:dbaafcfe0e9d 1921 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 162:dbaafcfe0e9d 1922 {
AnnaBridge 162:dbaafcfe0e9d 1923 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1924
AnnaBridge 162:dbaafcfe0e9d 1925 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 162:dbaafcfe0e9d 1926 return(result);
AnnaBridge 162:dbaafcfe0e9d 1927 }
AnnaBridge 162:dbaafcfe0e9d 1928
AnnaBridge 162:dbaafcfe0e9d 1929 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 162:dbaafcfe0e9d 1930 {
AnnaBridge 162:dbaafcfe0e9d 1931 union llreg_u{
AnnaBridge 162:dbaafcfe0e9d 1932 uint32_t w32[2];
AnnaBridge 162:dbaafcfe0e9d 1933 uint64_t w64;
AnnaBridge 162:dbaafcfe0e9d 1934 } llr;
AnnaBridge 162:dbaafcfe0e9d 1935 llr.w64 = acc;
AnnaBridge 162:dbaafcfe0e9d 1936
AnnaBridge 162:dbaafcfe0e9d 1937 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 162:dbaafcfe0e9d 1938 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 162:dbaafcfe0e9d 1939 #else /* Big endian */
AnnaBridge 162:dbaafcfe0e9d 1940 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 162:dbaafcfe0e9d 1941 #endif
AnnaBridge 162:dbaafcfe0e9d 1942
AnnaBridge 162:dbaafcfe0e9d 1943 return(llr.w64);
AnnaBridge 162:dbaafcfe0e9d 1944 }
AnnaBridge 162:dbaafcfe0e9d 1945
AnnaBridge 162:dbaafcfe0e9d 1946 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 162:dbaafcfe0e9d 1947 {
AnnaBridge 162:dbaafcfe0e9d 1948 union llreg_u{
AnnaBridge 162:dbaafcfe0e9d 1949 uint32_t w32[2];
AnnaBridge 162:dbaafcfe0e9d 1950 uint64_t w64;
AnnaBridge 162:dbaafcfe0e9d 1951 } llr;
AnnaBridge 162:dbaafcfe0e9d 1952 llr.w64 = acc;
AnnaBridge 162:dbaafcfe0e9d 1953
AnnaBridge 162:dbaafcfe0e9d 1954 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 162:dbaafcfe0e9d 1955 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 162:dbaafcfe0e9d 1956 #else /* Big endian */
AnnaBridge 162:dbaafcfe0e9d 1957 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 162:dbaafcfe0e9d 1958 #endif
AnnaBridge 162:dbaafcfe0e9d 1959
AnnaBridge 162:dbaafcfe0e9d 1960 return(llr.w64);
AnnaBridge 162:dbaafcfe0e9d 1961 }
AnnaBridge 162:dbaafcfe0e9d 1962
AnnaBridge 162:dbaafcfe0e9d 1963 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1964 {
AnnaBridge 162:dbaafcfe0e9d 1965 uint32_t result;
AnnaBridge 162:dbaafcfe0e9d 1966
AnnaBridge 162:dbaafcfe0e9d 1967 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1968 return(result);
AnnaBridge 162:dbaafcfe0e9d 1969 }
AnnaBridge 162:dbaafcfe0e9d 1970
AnnaBridge 162:dbaafcfe0e9d 1971 __attribute__((always_inline)) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1972 {
AnnaBridge 162:dbaafcfe0e9d 1973 int32_t result;
AnnaBridge 162:dbaafcfe0e9d 1974
AnnaBridge 162:dbaafcfe0e9d 1975 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1976 return(result);
AnnaBridge 162:dbaafcfe0e9d 1977 }
AnnaBridge 162:dbaafcfe0e9d 1978
AnnaBridge 162:dbaafcfe0e9d 1979 __attribute__((always_inline)) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2)
AnnaBridge 162:dbaafcfe0e9d 1980 {
AnnaBridge 162:dbaafcfe0e9d 1981 int32_t result;
AnnaBridge 162:dbaafcfe0e9d 1982
AnnaBridge 162:dbaafcfe0e9d 1983 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 162:dbaafcfe0e9d 1984 return(result);
AnnaBridge 162:dbaafcfe0e9d 1985 }
AnnaBridge 162:dbaafcfe0e9d 1986
AnnaBridge 162:dbaafcfe0e9d 1987 #if 0
AnnaBridge 162:dbaafcfe0e9d 1988 #define __PKHBT(ARG1,ARG2,ARG3) \
AnnaBridge 162:dbaafcfe0e9d 1989 ({ \
AnnaBridge 162:dbaafcfe0e9d 1990 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 162:dbaafcfe0e9d 1991 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 162:dbaafcfe0e9d 1992 __RES; \
AnnaBridge 162:dbaafcfe0e9d 1993 })
AnnaBridge 162:dbaafcfe0e9d 1994
AnnaBridge 162:dbaafcfe0e9d 1995 #define __PKHTB(ARG1,ARG2,ARG3) \
AnnaBridge 162:dbaafcfe0e9d 1996 ({ \
AnnaBridge 162:dbaafcfe0e9d 1997 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 162:dbaafcfe0e9d 1998 if (ARG3 == 0) \
AnnaBridge 162:dbaafcfe0e9d 1999 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
AnnaBridge 162:dbaafcfe0e9d 2000 else \
AnnaBridge 162:dbaafcfe0e9d 2001 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 162:dbaafcfe0e9d 2002 __RES; \
AnnaBridge 162:dbaafcfe0e9d 2003 })
AnnaBridge 162:dbaafcfe0e9d 2004 #endif
AnnaBridge 162:dbaafcfe0e9d 2005
AnnaBridge 162:dbaafcfe0e9d 2006 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
AnnaBridge 162:dbaafcfe0e9d 2007 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
AnnaBridge 162:dbaafcfe0e9d 2008
AnnaBridge 162:dbaafcfe0e9d 2009 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
AnnaBridge 162:dbaafcfe0e9d 2010 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
AnnaBridge 162:dbaafcfe0e9d 2011
AnnaBridge 162:dbaafcfe0e9d 2012 __attribute__((always_inline)) __STATIC_INLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
AnnaBridge 162:dbaafcfe0e9d 2013 {
AnnaBridge 162:dbaafcfe0e9d 2014 int32_t result;
AnnaBridge 162:dbaafcfe0e9d 2015
AnnaBridge 162:dbaafcfe0e9d 2016 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 162:dbaafcfe0e9d 2017 return(result);
AnnaBridge 162:dbaafcfe0e9d 2018 }
AnnaBridge 162:dbaafcfe0e9d 2019
AnnaBridge 162:dbaafcfe0e9d 2020 #endif /* (__ARM_FEATURE_DSP == 1) */
AnnaBridge 162:dbaafcfe0e9d 2021 /*@} end of group CMSIS_SIMD_intrinsics */
AnnaBridge 162:dbaafcfe0e9d 2022
AnnaBridge 162:dbaafcfe0e9d 2023
AnnaBridge 162:dbaafcfe0e9d 2024 #pragma GCC diagnostic pop
AnnaBridge 162:dbaafcfe0e9d 2025
AnnaBridge 162:dbaafcfe0e9d 2026 #endif /* __CMSIS_GCC_H */