mbed - The official Mbed 2 C/C++ SDK provides the softwa…

Users » mbed_official » Code » mbed

mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents: hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_L152RE/stm32l1xx_i2c.h@81:7d30d6019079, 2014-03-19 (annotated)

Committer:: bogdanm
Date:: Wed Mar 19 18:28:32 2014 +0000
Revision:: 81:7d30d6019079
Parent:: 77:869cf507173a

Release 81 of the mbed library



Main changes:



- Updates and fixes for many targets

- LPC1768: serial interface code fixes

- nRF51822 targets now output a .hex file

- More exporters

- More flexible GPIO API

Who changed what in which revision?

User	Revision	Line number	New contents of line
emilmont	77:869cf507173a	1	/**
emilmont	77:869cf507173a	2	******************************************************************************
emilmont	77:869cf507173a	3	* @file stm32l1xx_i2c.h
emilmont	77:869cf507173a	4	* @author MCD Application Team
emilmont	77:869cf507173a	5	* @version V1.3.0
emilmont	77:869cf507173a	6	* @date 31-January-2014
emilmont	77:869cf507173a	7	* @brief This file contains all the functions prototypes for the I2C firmware
emilmont	77:869cf507173a	8	* library.
emilmont	77:869cf507173a	9	******************************************************************************
emilmont	77:869cf507173a	10	* @attention
emilmont	77:869cf507173a	11	*
bogdanm	81:7d30d6019079	12	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont	77:869cf507173a	13	*
bogdanm	81:7d30d6019079	14	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	81:7d30d6019079	15	* are permitted provided that the following conditions are met:
bogdanm	81:7d30d6019079	16	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	81:7d30d6019079	17	* this list of conditions and the following disclaimer.
bogdanm	81:7d30d6019079	18	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	81:7d30d6019079	19	* this list of conditions and the following disclaimer in the documentation
bogdanm	81:7d30d6019079	20	* and/or other materials provided with the distribution.
bogdanm	81:7d30d6019079	21	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	81:7d30d6019079	22	* may be used to endorse or promote products derived from this software
bogdanm	81:7d30d6019079	23	* without specific prior written permission.
emilmont	77:869cf507173a	24	*
bogdanm	81:7d30d6019079	25	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	81:7d30d6019079	26	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	81:7d30d6019079	27	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	81:7d30d6019079	28	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	81:7d30d6019079	29	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	81:7d30d6019079	30	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	81:7d30d6019079	31	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	81:7d30d6019079	32	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	81:7d30d6019079	33	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	81:7d30d6019079	34	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont	77:869cf507173a	35	*
emilmont	77:869cf507173a	36	******************************************************************************
emilmont	77:869cf507173a	37	*/
emilmont	77:869cf507173a	38
emilmont	77:869cf507173a	39	/* Define to prevent recursive inclusion -------------------------------------*/
emilmont	77:869cf507173a	40	#ifndef __STM32L1xx_I2C_H
emilmont	77:869cf507173a	41	#define __STM32L1xx_I2C_H
emilmont	77:869cf507173a	42
emilmont	77:869cf507173a	43	#ifdef __cplusplus
emilmont	77:869cf507173a	44	extern "C" {
emilmont	77:869cf507173a	45	#endif
emilmont	77:869cf507173a	46
emilmont	77:869cf507173a	47	/* Includes ------------------------------------------------------------------*/
emilmont	77:869cf507173a	48	#include "stm32l1xx.h"
emilmont	77:869cf507173a	49
emilmont	77:869cf507173a	50	/** @addtogroup STM32L1xx_StdPeriph_Driver
emilmont	77:869cf507173a	51	* @{
emilmont	77:869cf507173a	52	*/
emilmont	77:869cf507173a	53
emilmont	77:869cf507173a	54	/** @addtogroup I2C
emilmont	77:869cf507173a	55	* @{
emilmont	77:869cf507173a	56	*/
emilmont	77:869cf507173a	57
emilmont	77:869cf507173a	58	/* Exported types ------------------------------------------------------------*/
emilmont	77:869cf507173a	59
emilmont	77:869cf507173a	60	/**
emilmont	77:869cf507173a	61	* @brief I2C Init structure definition
emilmont	77:869cf507173a	62	*/
emilmont	77:869cf507173a	63
emilmont	77:869cf507173a	64	typedef struct
emilmont	77:869cf507173a	65	{
emilmont	77:869cf507173a	66	uint32_t I2C_ClockSpeed; /*!< Specifies the clock frequency.
emilmont	77:869cf507173a	67	This parameter must be set to a value lower than 400kHz */
emilmont	77:869cf507173a	68
emilmont	77:869cf507173a	69	uint16_t I2C_Mode; /*!< Specifies the I2C mode.
emilmont	77:869cf507173a	70	This parameter can be a value of @ref I2C_mode */
emilmont	77:869cf507173a	71
emilmont	77:869cf507173a	72	uint16_t I2C_DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
emilmont	77:869cf507173a	73	This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
emilmont	77:869cf507173a	74
emilmont	77:869cf507173a	75	uint16_t I2C_OwnAddress1; /*!< Specifies the first device own address.
emilmont	77:869cf507173a	76	This parameter can be a 7-bit or 10-bit address. */
emilmont	77:869cf507173a	77
emilmont	77:869cf507173a	78	uint16_t I2C_Ack; /*!< Enables or disables the acknowledgement.
emilmont	77:869cf507173a	79	This parameter can be a value of @ref I2C_acknowledgement */
emilmont	77:869cf507173a	80
emilmont	77:869cf507173a	81	uint16_t I2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged.
emilmont	77:869cf507173a	82	This parameter can be a value of @ref I2C_acknowledged_address */
emilmont	77:869cf507173a	83	}I2C_InitTypeDef;
emilmont	77:869cf507173a	84
emilmont	77:869cf507173a	85	/* Exported constants --------------------------------------------------------*/
emilmont	77:869cf507173a	86
emilmont	77:869cf507173a	87
emilmont	77:869cf507173a	88	/** @defgroup I2C_Exported_Constants
emilmont	77:869cf507173a	89	* @{
emilmont	77:869cf507173a	90	*/
emilmont	77:869cf507173a	91
emilmont	77:869cf507173a	92	#define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) \|\| \
emilmont	77:869cf507173a	93	((PERIPH) == I2C2))
emilmont	77:869cf507173a	94	/** @defgroup I2C_mode
emilmont	77:869cf507173a	95	* @{
emilmont	77:869cf507173a	96	*/
emilmont	77:869cf507173a	97
emilmont	77:869cf507173a	98	#define I2C_Mode_I2C ((uint16_t)0x0000)
emilmont	77:869cf507173a	99	#define I2C_Mode_SMBusDevice ((uint16_t)0x0002)
emilmont	77:869cf507173a	100	#define I2C_Mode_SMBusHost ((uint16_t)0x000A)
emilmont	77:869cf507173a	101	#define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) \|\| \
emilmont	77:869cf507173a	102	((MODE) == I2C_Mode_SMBusDevice) \|\| \
emilmont	77:869cf507173a	103	((MODE) == I2C_Mode_SMBusHost))
emilmont	77:869cf507173a	104	/**
emilmont	77:869cf507173a	105	* @}
emilmont	77:869cf507173a	106	*/
emilmont	77:869cf507173a	107
emilmont	77:869cf507173a	108	/** @defgroup I2C_duty_cycle_in_fast_mode
emilmont	77:869cf507173a	109	* @{
emilmont	77:869cf507173a	110	*/
emilmont	77:869cf507173a	111
emilmont	77:869cf507173a	112	#define I2C_DutyCycle_16_9 ((uint16_t)0x4000) /!< I2C fast mode Tlow/Thigh = 16/9 /
emilmont	77:869cf507173a	113	#define I2C_DutyCycle_2 ((uint16_t)0xBFFF) /!< I2C fast mode Tlow/Thigh = 2 /
emilmont	77:869cf507173a	114	#define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DutyCycle_16_9) \|\| \
emilmont	77:869cf507173a	115	((CYCLE) == I2C_DutyCycle_2))
emilmont	77:869cf507173a	116	/**
emilmont	77:869cf507173a	117	* @}
emilmont	77:869cf507173a	118	*/
emilmont	77:869cf507173a	119
emilmont	77:869cf507173a	120	/** @defgroup I2C_acknowledgement
emilmont	77:869cf507173a	121	* @{
emilmont	77:869cf507173a	122	*/
emilmont	77:869cf507173a	123
emilmont	77:869cf507173a	124	#define I2C_Ack_Enable ((uint16_t)0x0400)
emilmont	77:869cf507173a	125	#define I2C_Ack_Disable ((uint16_t)0x0000)
emilmont	77:869cf507173a	126	#define IS_I2C_ACK_STATE(STATE) (((STATE) == I2C_Ack_Enable) \|\| \
emilmont	77:869cf507173a	127	((STATE) == I2C_Ack_Disable))
emilmont	77:869cf507173a	128	/**
emilmont	77:869cf507173a	129	* @}
emilmont	77:869cf507173a	130	*/
emilmont	77:869cf507173a	131
emilmont	77:869cf507173a	132	/** @defgroup I2C_transfer_direction
emilmont	77:869cf507173a	133	* @{
emilmont	77:869cf507173a	134	*/
emilmont	77:869cf507173a	135
emilmont	77:869cf507173a	136	#define I2C_Direction_Transmitter ((uint8_t)0x00)
emilmont	77:869cf507173a	137	#define I2C_Direction_Receiver ((uint8_t)0x01)
emilmont	77:869cf507173a	138	#define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) \|\| \
emilmont	77:869cf507173a	139	((DIRECTION) == I2C_Direction_Receiver))
emilmont	77:869cf507173a	140	/**
emilmont	77:869cf507173a	141	* @}
emilmont	77:869cf507173a	142	*/
emilmont	77:869cf507173a	143
emilmont	77:869cf507173a	144	/** @defgroup I2C_acknowledged_address
emilmont	77:869cf507173a	145	* @{
emilmont	77:869cf507173a	146	*/
emilmont	77:869cf507173a	147
emilmont	77:869cf507173a	148	#define I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000)
emilmont	77:869cf507173a	149	#define I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000)
emilmont	77:869cf507173a	150	#define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) \|\| \
emilmont	77:869cf507173a	151	((ADDRESS) == I2C_AcknowledgedAddress_10bit))
emilmont	77:869cf507173a	152	/**
emilmont	77:869cf507173a	153	* @}
emilmont	77:869cf507173a	154	*/
emilmont	77:869cf507173a	155
emilmont	77:869cf507173a	156	/** @defgroup I2C_registers
emilmont	77:869cf507173a	157	* @{
emilmont	77:869cf507173a	158	*/
emilmont	77:869cf507173a	159
emilmont	77:869cf507173a	160	#define I2C_Register_CR1 ((uint8_t)0x00)
emilmont	77:869cf507173a	161	#define I2C_Register_CR2 ((uint8_t)0x04)
emilmont	77:869cf507173a	162	#define I2C_Register_OAR1 ((uint8_t)0x08)
emilmont	77:869cf507173a	163	#define I2C_Register_OAR2 ((uint8_t)0x0C)
emilmont	77:869cf507173a	164	#define I2C_Register_DR ((uint8_t)0x10)
emilmont	77:869cf507173a	165	#define I2C_Register_SR1 ((uint8_t)0x14)
emilmont	77:869cf507173a	166	#define I2C_Register_SR2 ((uint8_t)0x18)
emilmont	77:869cf507173a	167	#define I2C_Register_CCR ((uint8_t)0x1C)
emilmont	77:869cf507173a	168	#define I2C_Register_TRISE ((uint8_t)0x20)
emilmont	77:869cf507173a	169	#define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) \|\| \
emilmont	77:869cf507173a	170	((REGISTER) == I2C_Register_CR2) \|\| \
emilmont	77:869cf507173a	171	((REGISTER) == I2C_Register_OAR1) \|\| \
emilmont	77:869cf507173a	172	((REGISTER) == I2C_Register_OAR2) \|\| \
emilmont	77:869cf507173a	173	((REGISTER) == I2C_Register_DR) \|\| \
emilmont	77:869cf507173a	174	((REGISTER) == I2C_Register_SR1) \|\| \
emilmont	77:869cf507173a	175	((REGISTER) == I2C_Register_SR2) \|\| \
emilmont	77:869cf507173a	176	((REGISTER) == I2C_Register_CCR) \|\| \
emilmont	77:869cf507173a	177	((REGISTER) == I2C_Register_TRISE))
emilmont	77:869cf507173a	178	/**
emilmont	77:869cf507173a	179	* @}
emilmont	77:869cf507173a	180	*/
emilmont	77:869cf507173a	181
emilmont	77:869cf507173a	182	/** @defgroup I2C_SMBus_alert_pin_level
emilmont	77:869cf507173a	183	* @{
emilmont	77:869cf507173a	184	*/
emilmont	77:869cf507173a	185
emilmont	77:869cf507173a	186	#define I2C_SMBusAlert_Low ((uint16_t)0x2000)
emilmont	77:869cf507173a	187	#define I2C_SMBusAlert_High ((uint16_t)0xDFFF)
emilmont	77:869cf507173a	188	#define IS_I2C_SMBUS_ALERT(ALERT) (((ALERT) == I2C_SMBusAlert_Low) \|\| \
emilmont	77:869cf507173a	189	((ALERT) == I2C_SMBusAlert_High))
emilmont	77:869cf507173a	190	/**
emilmont	77:869cf507173a	191	* @}
emilmont	77:869cf507173a	192	*/
emilmont	77:869cf507173a	193
emilmont	77:869cf507173a	194	/** @defgroup I2C_PEC_position
emilmont	77:869cf507173a	195	* @{
emilmont	77:869cf507173a	196	*/
emilmont	77:869cf507173a	197
emilmont	77:869cf507173a	198	#define I2C_PECPosition_Next ((uint16_t)0x0800)
emilmont	77:869cf507173a	199	#define I2C_PECPosition_Current ((uint16_t)0xF7FF)
emilmont	77:869cf507173a	200	#define IS_I2C_PEC_POSITION(POSITION) (((POSITION) == I2C_PECPosition_Next) \|\| \
emilmont	77:869cf507173a	201	((POSITION) == I2C_PECPosition_Current))
emilmont	77:869cf507173a	202	/**
emilmont	77:869cf507173a	203	* @}
emilmont	77:869cf507173a	204	*/
emilmont	77:869cf507173a	205
emilmont	77:869cf507173a	206	/** @defgroup I2C_NACK_position
emilmont	77:869cf507173a	207	* @{
emilmont	77:869cf507173a	208	*/
emilmont	77:869cf507173a	209
emilmont	77:869cf507173a	210	#define I2C_NACKPosition_Next ((uint16_t)0x0800)
emilmont	77:869cf507173a	211	#define I2C_NACKPosition_Current ((uint16_t)0xF7FF)
emilmont	77:869cf507173a	212	#define IS_I2C_NACK_POSITION(POSITION) (((POSITION) == I2C_NACKPosition_Next) \|\| \
emilmont	77:869cf507173a	213	((POSITION) == I2C_NACKPosition_Current))
emilmont	77:869cf507173a	214	/**
emilmont	77:869cf507173a	215	* @}
emilmont	77:869cf507173a	216	*/
emilmont	77:869cf507173a	217
emilmont	77:869cf507173a	218	/** @defgroup I2C_interrupts_definition
emilmont	77:869cf507173a	219	* @{
emilmont	77:869cf507173a	220	*/
emilmont	77:869cf507173a	221
emilmont	77:869cf507173a	222	#define I2C_IT_BUF ((uint16_t)0x0400)
emilmont	77:869cf507173a	223	#define I2C_IT_EVT ((uint16_t)0x0200)
emilmont	77:869cf507173a	224	#define I2C_IT_ERR ((uint16_t)0x0100)
emilmont	77:869cf507173a	225	#define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint16_t)0xF8FF) == 0x00) && ((IT) != 0x00))
emilmont	77:869cf507173a	226	/**
emilmont	77:869cf507173a	227	* @}
emilmont	77:869cf507173a	228	*/
emilmont	77:869cf507173a	229
emilmont	77:869cf507173a	230	/** @defgroup I2C_interrupts_definition
emilmont	77:869cf507173a	231	* @{
emilmont	77:869cf507173a	232	*/
emilmont	77:869cf507173a	233
emilmont	77:869cf507173a	234	#define I2C_IT_SMBALERT ((uint32_t)0x01008000)
emilmont	77:869cf507173a	235	#define I2C_IT_TIMEOUT ((uint32_t)0x01004000)
emilmont	77:869cf507173a	236	#define I2C_IT_PECERR ((uint32_t)0x01001000)
emilmont	77:869cf507173a	237	#define I2C_IT_OVR ((uint32_t)0x01000800)
emilmont	77:869cf507173a	238	#define I2C_IT_AF ((uint32_t)0x01000400)
emilmont	77:869cf507173a	239	#define I2C_IT_ARLO ((uint32_t)0x01000200)
emilmont	77:869cf507173a	240	#define I2C_IT_BERR ((uint32_t)0x01000100)
emilmont	77:869cf507173a	241	#define I2C_IT_TXE ((uint32_t)0x06000080)
emilmont	77:869cf507173a	242	#define I2C_IT_RXNE ((uint32_t)0x06000040)
emilmont	77:869cf507173a	243	#define I2C_IT_STOPF ((uint32_t)0x02000010)
emilmont	77:869cf507173a	244	#define I2C_IT_ADD10 ((uint32_t)0x02000008)
emilmont	77:869cf507173a	245	#define I2C_IT_BTF ((uint32_t)0x02000004)
emilmont	77:869cf507173a	246	#define I2C_IT_ADDR ((uint32_t)0x02000002)
emilmont	77:869cf507173a	247	#define I2C_IT_SB ((uint32_t)0x02000001)
emilmont	77:869cf507173a	248
emilmont	77:869cf507173a	249	#define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint16_t)0x20FF) == 0x00) && ((IT) != (uint16_t)0x00))
emilmont	77:869cf507173a	250
emilmont	77:869cf507173a	251	#define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_SMBALERT) \|\| ((IT) == I2C_IT_TIMEOUT) \|\| \
emilmont	77:869cf507173a	252	((IT) == I2C_IT_PECERR) \|\| ((IT) == I2C_IT_OVR) \|\| \
emilmont	77:869cf507173a	253	((IT) == I2C_IT_AF) \|\| ((IT) == I2C_IT_ARLO) \|\| \
emilmont	77:869cf507173a	254	((IT) == I2C_IT_BERR) \|\| ((IT) == I2C_IT_TXE) \|\| \
emilmont	77:869cf507173a	255	((IT) == I2C_IT_RXNE) \|\| ((IT) == I2C_IT_STOPF) \|\| \
emilmont	77:869cf507173a	256	((IT) == I2C_IT_ADD10) \|\| ((IT) == I2C_IT_BTF) \|\| \
emilmont	77:869cf507173a	257	((IT) == I2C_IT_ADDR) \|\| ((IT) == I2C_IT_SB))
emilmont	77:869cf507173a	258	/**
emilmont	77:869cf507173a	259	* @}
emilmont	77:869cf507173a	260	*/
emilmont	77:869cf507173a	261
emilmont	77:869cf507173a	262	/** @defgroup I2C_flags_definition
emilmont	77:869cf507173a	263	* @{
emilmont	77:869cf507173a	264	*/
emilmont	77:869cf507173a	265
emilmont	77:869cf507173a	266	/**
emilmont	77:869cf507173a	267	* @brief SR2 register flags
emilmont	77:869cf507173a	268	*/
emilmont	77:869cf507173a	269
emilmont	77:869cf507173a	270	#define I2C_FLAG_DUALF ((uint32_t)0x00800000)
emilmont	77:869cf507173a	271	#define I2C_FLAG_SMBHOST ((uint32_t)0x00400000)
emilmont	77:869cf507173a	272	#define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000)
emilmont	77:869cf507173a	273	#define I2C_FLAG_GENCALL ((uint32_t)0x00100000)
emilmont	77:869cf507173a	274	#define I2C_FLAG_TRA ((uint32_t)0x00040000)
emilmont	77:869cf507173a	275	#define I2C_FLAG_BUSY ((uint32_t)0x00020000)
emilmont	77:869cf507173a	276	#define I2C_FLAG_MSL ((uint32_t)0x00010000)
emilmont	77:869cf507173a	277
emilmont	77:869cf507173a	278	/**
emilmont	77:869cf507173a	279	* @brief SR1 register flags
emilmont	77:869cf507173a	280	*/
emilmont	77:869cf507173a	281
emilmont	77:869cf507173a	282	#define I2C_FLAG_SMBALERT ((uint32_t)0x10008000)
emilmont	77:869cf507173a	283	#define I2C_FLAG_TIMEOUT ((uint32_t)0x10004000)
emilmont	77:869cf507173a	284	#define I2C_FLAG_PECERR ((uint32_t)0x10001000)
emilmont	77:869cf507173a	285	#define I2C_FLAG_OVR ((uint32_t)0x10000800)
emilmont	77:869cf507173a	286	#define I2C_FLAG_AF ((uint32_t)0x10000400)
emilmont	77:869cf507173a	287	#define I2C_FLAG_ARLO ((uint32_t)0x10000200)
emilmont	77:869cf507173a	288	#define I2C_FLAG_BERR ((uint32_t)0x10000100)
emilmont	77:869cf507173a	289	#define I2C_FLAG_TXE ((uint32_t)0x10000080)
emilmont	77:869cf507173a	290	#define I2C_FLAG_RXNE ((uint32_t)0x10000040)
emilmont	77:869cf507173a	291	#define I2C_FLAG_STOPF ((uint32_t)0x10000010)
emilmont	77:869cf507173a	292	#define I2C_FLAG_ADD10 ((uint32_t)0x10000008)
emilmont	77:869cf507173a	293	#define I2C_FLAG_BTF ((uint32_t)0x10000004)
emilmont	77:869cf507173a	294	#define I2C_FLAG_ADDR ((uint32_t)0x10000002)
emilmont	77:869cf507173a	295	#define I2C_FLAG_SB ((uint32_t)0x10000001)
emilmont	77:869cf507173a	296
emilmont	77:869cf507173a	297	#define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0x20FF) == 0x00) && ((FLAG) != (uint16_t)0x00))
emilmont	77:869cf507173a	298
emilmont	77:869cf507173a	299	#define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_DUALF) \|\| ((FLAG) == I2C_FLAG_SMBHOST) \|\| \
emilmont	77:869cf507173a	300	((FLAG) == I2C_FLAG_SMBDEFAULT) \|\| ((FLAG) == I2C_FLAG_GENCALL) \|\| \
emilmont	77:869cf507173a	301	((FLAG) == I2C_FLAG_TRA) \|\| ((FLAG) == I2C_FLAG_BUSY) \|\| \
emilmont	77:869cf507173a	302	((FLAG) == I2C_FLAG_MSL) \|\| ((FLAG) == I2C_FLAG_SMBALERT) \|\| \
emilmont	77:869cf507173a	303	((FLAG) == I2C_FLAG_TIMEOUT) \|\| ((FLAG) == I2C_FLAG_PECERR) \|\| \
emilmont	77:869cf507173a	304	((FLAG) == I2C_FLAG_OVR) \|\| ((FLAG) == I2C_FLAG_AF) \|\| \
emilmont	77:869cf507173a	305	((FLAG) == I2C_FLAG_ARLO) \|\| ((FLAG) == I2C_FLAG_BERR) \|\| \
emilmont	77:869cf507173a	306	((FLAG) == I2C_FLAG_TXE) \|\| ((FLAG) == I2C_FLAG_RXNE) \|\| \
emilmont	77:869cf507173a	307	((FLAG) == I2C_FLAG_STOPF) \|\| ((FLAG) == I2C_FLAG_ADD10) \|\| \
emilmont	77:869cf507173a	308	((FLAG) == I2C_FLAG_BTF) \|\| ((FLAG) == I2C_FLAG_ADDR) \|\| \
emilmont	77:869cf507173a	309	((FLAG) == I2C_FLAG_SB))
emilmont	77:869cf507173a	310	/**
emilmont	77:869cf507173a	311	* @}
emilmont	77:869cf507173a	312	*/
emilmont	77:869cf507173a	313
emilmont	77:869cf507173a	314	/** @defgroup I2C_Events
emilmont	77:869cf507173a	315	* @{
emilmont	77:869cf507173a	316	*/
emilmont	77:869cf507173a	317
emilmont	77:869cf507173a	318	/**
emilmont	77:869cf507173a	319	===============================================================================
emilmont	77:869cf507173a	320	I2C Master Events (Events grouped in order of communication)
emilmont	77:869cf507173a	321	===============================================================================
emilmont	77:869cf507173a	322	*/
emilmont	77:869cf507173a	323
emilmont	77:869cf507173a	324	/**
emilmont	77:869cf507173a	325	* @brief Communication start
emilmont	77:869cf507173a	326	*
emilmont	77:869cf507173a	327	* After sending the START condition (I2C_GenerateSTART() function) the master
emilmont	77:869cf507173a	328	* has to wait for this event. It means that the Start condition has been correctly
emilmont	77:869cf507173a	329	* released on the I2C bus (the bus is free, no other devices is communicating).
emilmont	77:869cf507173a	330	*
emilmont	77:869cf507173a	331	*/
emilmont	77:869cf507173a	332	/* --EV5 */
emilmont	77:869cf507173a	333	#define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */
emilmont	77:869cf507173a	334
emilmont	77:869cf507173a	335	/**
emilmont	77:869cf507173a	336	* @brief Address Acknowledge
emilmont	77:869cf507173a	337	*
emilmont	77:869cf507173a	338	* After checking on EV5 (start condition correctly released on the bus), the
emilmont	77:869cf507173a	339	* master sends the address of the slave(s) with which it will communicate
emilmont	77:869cf507173a	340	* (I2C_Send7bitAddress() function, it also determines the direction of the communication:
emilmont	77:869cf507173a	341	* Master transmitter or Receiver). Then the master has to wait that a slave acknowledges
emilmont	77:869cf507173a	342	* his address. If an acknowledge is sent on the bus, one of the following events will
emilmont	77:869cf507173a	343	* be set:
emilmont	77:869cf507173a	344	*
emilmont	77:869cf507173a	345	* 1) In case of Master Receiver (7-bit addressing): the I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED
emilmont	77:869cf507173a	346	* event is set.
emilmont	77:869cf507173a	347	*
emilmont	77:869cf507173a	348	* 2) In case of Master Transmitter (7-bit addressing): the I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED
emilmont	77:869cf507173a	349	* is set
emilmont	77:869cf507173a	350	*
emilmont	77:869cf507173a	351	* 3) In case of 10-Bit addressing mode, the master (just after generating the START
emilmont	77:869cf507173a	352	* and checking on EV5) has to send the header of 10-bit addressing mode (I2C_SendData()
emilmont	77:869cf507173a	353	* function). Then master should wait on EV9. It means that the 10-bit addressing
emilmont	77:869cf507173a	354	* header has been correctly sent on the bus. Then master should send the second part of
emilmont	77:869cf507173a	355	* the 10-bit address (LSB) using the function I2C_Send7bitAddress(). Then master
emilmont	77:869cf507173a	356	* should wait for event EV6.
emilmont	77:869cf507173a	357	*
emilmont	77:869cf507173a	358	*/
emilmont	77:869cf507173a	359
emilmont	77:869cf507173a	360	/* --EV6 */
emilmont	77:869cf507173a	361	#define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */
emilmont	77:869cf507173a	362	#define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */
emilmont	77:869cf507173a	363	/* --EV9 */
emilmont	77:869cf507173a	364	#define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */
emilmont	77:869cf507173a	365
emilmont	77:869cf507173a	366	/**
emilmont	77:869cf507173a	367	* @brief Communication events
emilmont	77:869cf507173a	368	*
emilmont	77:869cf507173a	369	* If a communication is established (START condition generated and slave address
emilmont	77:869cf507173a	370	* acknowledged) then the master has to check on one of the following events for
emilmont	77:869cf507173a	371	* communication procedures:
emilmont	77:869cf507173a	372	*
emilmont	77:869cf507173a	373	* 1) Master Receiver mode: The master has to wait on the event EV7 then to read
emilmont	77:869cf507173a	374	* the data received from the slave (I2C_ReceiveData() function).
emilmont	77:869cf507173a	375	*
emilmont	77:869cf507173a	376	* 2) Master Transmitter mode: The master has to send data (I2C_SendData()
emilmont	77:869cf507173a	377	* function) then to wait on event EV8 or EV8_2.
emilmont	77:869cf507173a	378	* These two events are similar:
emilmont	77:869cf507173a	379	* - EV8 means that the data has been written in the data register and is
emilmont	77:869cf507173a	380	* being shifted out.
emilmont	77:869cf507173a	381	* - EV8_2 means that the data has been physically shifted out and output
emilmont	77:869cf507173a	382	* on the bus.
emilmont	77:869cf507173a	383	* In most cases, using EV8 is sufficient for the application.
emilmont	77:869cf507173a	384	* Using EV8_2 leads to a slower communication but ensure more reliable test.
emilmont	77:869cf507173a	385	* EV8_2 is also more suitable than EV8 for testing on the last data transmission
emilmont	77:869cf507173a	386	* (before Stop condition generation).
emilmont	77:869cf507173a	387	*
emilmont	77:869cf507173a	388	* @note In case the user software does not guarantee that this event EV7 is
emilmont	77:869cf507173a	389	* managed before the current byte end of transfer, then user may check on EV7
emilmont	77:869cf507173a	390	* and BTF flag at the same time (ie. (I2C_EVENT_MASTER_BYTE_RECEIVED \| I2C_FLAG_BTF)).
emilmont	77:869cf507173a	391	* In this case the communication may be slower.
emilmont	77:869cf507173a	392	*
emilmont	77:869cf507173a	393	*/
emilmont	77:869cf507173a	394
emilmont	77:869cf507173a	395	/* Master RECEIVER mode -----------------------------*/
emilmont	77:869cf507173a	396	/* --EV7 */
emilmont	77:869cf507173a	397	#define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */
emilmont	77:869cf507173a	398
emilmont	77:869cf507173a	399	/* Master TRANSMITTER mode --------------------------*/
emilmont	77:869cf507173a	400	/* --EV8 */
emilmont	77:869cf507173a	401	#define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */
emilmont	77:869cf507173a	402	/* --EV8_2 */
emilmont	77:869cf507173a	403	#define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */
emilmont	77:869cf507173a	404
emilmont	77:869cf507173a	405
emilmont	77:869cf507173a	406	/**
emilmont	77:869cf507173a	407	===============================================================================
emilmont	77:869cf507173a	408	I2C Slave Events (Events grouped in order of communication)
emilmont	77:869cf507173a	409	===============================================================================
emilmont	77:869cf507173a	410	*/
emilmont	77:869cf507173a	411
emilmont	77:869cf507173a	412
emilmont	77:869cf507173a	413	/**
emilmont	77:869cf507173a	414	* @brief Communication start events
emilmont	77:869cf507173a	415	*
emilmont	77:869cf507173a	416	* Wait on one of these events at the start of the communication. It means that
emilmont	77:869cf507173a	417	* the I2C peripheral detected a Start condition on the bus (generated by master
emilmont	77:869cf507173a	418	* device) followed by the peripheral address. The peripheral generates an ACK
emilmont	77:869cf507173a	419	* condition on the bus (if the acknowledge feature is enabled through function
emilmont	77:869cf507173a	420	* I2C_AcknowledgeConfig()) and the events listed above are set :
emilmont	77:869cf507173a	421	*
emilmont	77:869cf507173a	422	* 1) In normal case (only one address managed by the slave), when the address
emilmont	77:869cf507173a	423	* sent by the master matches the own address of the peripheral (configured by
emilmont	77:869cf507173a	424	* I2C_OwnAddress1 field) the I2C_EVENT_SLAVE_XXX_ADDRESS_MATCHED event is set
emilmont	77:869cf507173a	425	* (where XXX could be TRANSMITTER or RECEIVER).
emilmont	77:869cf507173a	426	*
emilmont	77:869cf507173a	427	* 2) In case the address sent by the master matches the second address of the
emilmont	77:869cf507173a	428	* peripheral (configured by the function I2C_OwnAddress2Config() and enabled
emilmont	77:869cf507173a	429	* by the function I2C_DualAddressCmd()) the events I2C_EVENT_SLAVE_XXX_SECONDADDRESS_MATCHED
emilmont	77:869cf507173a	430	* (where XXX could be TRANSMITTER or RECEIVER) are set.
emilmont	77:869cf507173a	431	*
emilmont	77:869cf507173a	432	* 3) In case the address sent by the master is General Call (address 0x00) and
emilmont	77:869cf507173a	433	* if the General Call is enabled for the peripheral (using function I2C_GeneralCallCmd())
emilmont	77:869cf507173a	434	* the following event is set I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED.
emilmont	77:869cf507173a	435	*
emilmont	77:869cf507173a	436	*/
emilmont	77:869cf507173a	437
emilmont	77:869cf507173a	438	/* --EV1 (all the events below are variants of EV1) */
emilmont	77:869cf507173a	439	/* 1) Case of One Single Address managed by the slave */
emilmont	77:869cf507173a	440	#define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */
emilmont	77:869cf507173a	441	#define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */
emilmont	77:869cf507173a	442
emilmont	77:869cf507173a	443	/* 2) Case of Dual address managed by the slave */
emilmont	77:869cf507173a	444	#define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */
emilmont	77:869cf507173a	445	#define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */
emilmont	77:869cf507173a	446
emilmont	77:869cf507173a	447	/* 3) Case of General Call enabled for the slave */
emilmont	77:869cf507173a	448	#define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */
emilmont	77:869cf507173a	449
emilmont	77:869cf507173a	450	/**
emilmont	77:869cf507173a	451	* @brief Communication events
emilmont	77:869cf507173a	452	*
emilmont	77:869cf507173a	453	* Wait on one of these events when EV1 has already been checked and:
emilmont	77:869cf507173a	454	*
emilmont	77:869cf507173a	455	* - Slave RECEIVER mode:
emilmont	77:869cf507173a	456	* - EV2: When the application is expecting a data byte to be received.
emilmont	77:869cf507173a	457	* - EV4: When the application is expecting the end of the communication: master
emilmont	77:869cf507173a	458	* sends a stop condition and data transmission is stopped.
emilmont	77:869cf507173a	459	*
emilmont	77:869cf507173a	460	* - Slave Transmitter mode:
emilmont	77:869cf507173a	461	* - EV3: When a byte has been transmitted by the slave and the application is expecting
emilmont	77:869cf507173a	462	* the end of the byte transmission. The two events I2C_EVENT_SLAVE_BYTE_TRANSMITTED and
emilmont	77:869cf507173a	463	* I2C_EVENT_SLAVE_BYTE_TRANSMITTING are similar. The second one can optionally be
emilmont	77:869cf507173a	464	* used when the user software doesn't guarantee the EV3 is managed before the
emilmont	77:869cf507173a	465	* current byte end of transfer.
emilmont	77:869cf507173a	466	* - EV3_2: When the master sends a NACK in order to tell slave that data transmission
emilmont	77:869cf507173a	467	* shall end (before sending the STOP condition). In this case slave has to stop sending
emilmont	77:869cf507173a	468	* data bytes and expect a Stop condition on the bus.
emilmont	77:869cf507173a	469	*
emilmont	77:869cf507173a	470	* @note In case the user software does not guarantee that the event EV2 is
emilmont	77:869cf507173a	471	* managed before the current byte end of transfer, then user may check on EV2
emilmont	77:869cf507173a	472	* and BTF flag at the same time (ie. (I2C_EVENT_SLAVE_BYTE_RECEIVED \| I2C_FLAG_BTF)).
emilmont	77:869cf507173a	473	* In this case the communication may be slower.
emilmont	77:869cf507173a	474	*
emilmont	77:869cf507173a	475	*/
emilmont	77:869cf507173a	476
emilmont	77:869cf507173a	477	/* Slave RECEIVER mode --------------------------*/
emilmont	77:869cf507173a	478	/* --EV2 */
emilmont	77:869cf507173a	479	#define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */
emilmont	77:869cf507173a	480	/* --EV4 */
emilmont	77:869cf507173a	481	#define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */
emilmont	77:869cf507173a	482
emilmont	77:869cf507173a	483	/* Slave TRANSMITTER mode -----------------------*/
emilmont	77:869cf507173a	484	/* --EV3 */
emilmont	77:869cf507173a	485	#define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */
emilmont	77:869cf507173a	486	#define I2C_EVENT_SLAVE_BYTE_TRANSMITTING ((uint32_t)0x00060080) /* TRA, BUSY and TXE flags */
emilmont	77:869cf507173a	487	/* --EV3_2 */
emilmont	77:869cf507173a	488	#define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */
emilmont	77:869cf507173a	489
emilmont	77:869cf507173a	490	/*
emilmont	77:869cf507173a	491	===============================================================================
emilmont	77:869cf507173a	492	End of Events Description
emilmont	77:869cf507173a	493	===============================================================================
emilmont	77:869cf507173a	494	*/
emilmont	77:869cf507173a	495
emilmont	77:869cf507173a	496	#define IS_I2C_EVENT(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) \|\| \
emilmont	77:869cf507173a	497	((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) \|\| \
emilmont	77:869cf507173a	498	((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) \|\| \
emilmont	77:869cf507173a	499	((EVENT) == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) \|\| \
emilmont	77:869cf507173a	500	((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) \|\| \
emilmont	77:869cf507173a	501	((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) \|\| \
emilmont	77:869cf507173a	502	((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED \| I2C_FLAG_DUALF)) \|\| \
emilmont	77:869cf507173a	503	((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED \| I2C_FLAG_GENCALL)) \|\| \
emilmont	77:869cf507173a	504	((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) \|\| \
emilmont	77:869cf507173a	505	((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED \| I2C_FLAG_DUALF)) \|\| \
emilmont	77:869cf507173a	506	((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED \| I2C_FLAG_GENCALL)) \|\| \
emilmont	77:869cf507173a	507	((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) \|\| \
emilmont	77:869cf507173a	508	((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) \|\| \
emilmont	77:869cf507173a	509	((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) \|\| \
emilmont	77:869cf507173a	510	((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) \|\| \
emilmont	77:869cf507173a	511	((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) \|\| \
emilmont	77:869cf507173a	512	((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) \|\| \
emilmont	77:869cf507173a	513	((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) \|\| \
emilmont	77:869cf507173a	514	((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10) \|\| \
emilmont	77:869cf507173a	515	((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE))
emilmont	77:869cf507173a	516	/**
emilmont	77:869cf507173a	517	* @}
emilmont	77:869cf507173a	518	*/
emilmont	77:869cf507173a	519
emilmont	77:869cf507173a	520	/** @defgroup I2C_own_address1
emilmont	77:869cf507173a	521	* @{
emilmont	77:869cf507173a	522	*/
emilmont	77:869cf507173a	523
emilmont	77:869cf507173a	524	#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x3FF)
emilmont	77:869cf507173a	525	/**
emilmont	77:869cf507173a	526	* @}
emilmont	77:869cf507173a	527	*/
emilmont	77:869cf507173a	528
emilmont	77:869cf507173a	529	/** @defgroup I2C_clock_speed
emilmont	77:869cf507173a	530	* @{
emilmont	77:869cf507173a	531	*/
emilmont	77:869cf507173a	532
emilmont	77:869cf507173a	533	#define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) >= 0x1) && ((SPEED) <= 400000))
emilmont	77:869cf507173a	534	/**
emilmont	77:869cf507173a	535	* @}
emilmont	77:869cf507173a	536	*/
emilmont	77:869cf507173a	537
emilmont	77:869cf507173a	538	/**
emilmont	77:869cf507173a	539	* @}
emilmont	77:869cf507173a	540	*/
emilmont	77:869cf507173a	541
emilmont	77:869cf507173a	542	/* Exported macro ------------------------------------------------------------*/
emilmont	77:869cf507173a	543	/* Exported functions ------------------------------------------------------- */
emilmont	77:869cf507173a	544
emilmont	77:869cf507173a	545	/* Function used to set the I2C configuration to the default reset state *****/
emilmont	77:869cf507173a	546	void I2C_DeInit(I2C_TypeDef* I2Cx);
emilmont	77:869cf507173a	547
emilmont	77:869cf507173a	548	/* Initialization and Configuration functions *********************************/
emilmont	77:869cf507173a	549	void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct);
emilmont	77:869cf507173a	550	void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);
emilmont	77:869cf507173a	551	void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont	77:869cf507173a	552	void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont	77:869cf507173a	553	void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont	77:869cf507173a	554	void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont	77:869cf507173a	555	void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address);
emilmont	77:869cf507173a	556	void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont	77:869cf507173a	557	void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont	77:869cf507173a	558	void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont	77:869cf507173a	559	void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert);
emilmont	77:869cf507173a	560	void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont	77:869cf507173a	561	void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont	77:869cf507173a	562	void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle);
emilmont	77:869cf507173a	563	void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction);
emilmont	77:869cf507173a	564
emilmont	77:869cf507173a	565	/* Data transfers functions ***************************************************/
emilmont	77:869cf507173a	566	void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data);
emilmont	77:869cf507173a	567	uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx);
emilmont	77:869cf507173a	568	void I2C_NACKPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_NACKPosition);
emilmont	77:869cf507173a	569
emilmont	77:869cf507173a	570	/* PEC management functions ***************************************************/
emilmont	77:869cf507173a	571	void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont	77:869cf507173a	572	void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition);
emilmont	77:869cf507173a	573	void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont	77:869cf507173a	574	uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx);
emilmont	77:869cf507173a	575
emilmont	77:869cf507173a	576	/* DMA transfers management functions *****************************************/
emilmont	77:869cf507173a	577	void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont	77:869cf507173a	578	void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont	77:869cf507173a	579
emilmont	77:869cf507173a	580
emilmont	77:869cf507173a	581	/* Interrupts, events and flags management functions **************************/
emilmont	77:869cf507173a	582	uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register);
emilmont	77:869cf507173a	583	void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState);
emilmont	77:869cf507173a	584
emilmont	77:869cf507173a	585	/*
emilmont	77:869cf507173a	586
emilmont	77:869cf507173a	587	===============================================================================
emilmont	77:869cf507173a	588	I2C State Monitoring Functions
emilmont	77:869cf507173a	589	===============================================================================
emilmont	77:869cf507173a	590	This I2C driver provides three different ways for I2C state monitoring
emilmont	77:869cf507173a	591	depending on the application requirements and constraints:
emilmont	77:869cf507173a	592
emilmont	77:869cf507173a	593
emilmont	77:869cf507173a	594	1. Basic state monitoring (Using I2C_CheckEvent() function)
emilmont	77:869cf507173a	595	-----------------------------------------------------------
emilmont	77:869cf507173a	596	It compares the status registers (SR1 and SR2) content to a given event
emilmont	77:869cf507173a	597	(can be the combination of one or more flags).
emilmont	77:869cf507173a	598	It returns SUCCESS if the current status includes the given flags
emilmont	77:869cf507173a	599	and returns ERROR if one or more flags are missing in the current status.
emilmont	77:869cf507173a	600
emilmont	77:869cf507173a	601	- When to use
emilmont	77:869cf507173a	602	- This function is suitable for most applications as well as for startup
emilmont	77:869cf507173a	603	activity since the events are fully described in the product reference
emilmont	77:869cf507173a	604	manual (RM0038).
emilmont	77:869cf507173a	605	- It is also suitable for users who need to define their own events.
emilmont	77:869cf507173a	606
emilmont	77:869cf507173a	607	- Limitations
emilmont	77:869cf507173a	608	- If an error occurs (ie. error flags are set besides to the monitored
emilmont	77:869cf507173a	609	flags), the I2C_CheckEvent() function may return SUCCESS despite
emilmont	77:869cf507173a	610	the communication hold or corrupted real state.
emilmont	77:869cf507173a	611	In this case, it is advised to use error interrupts to monitor
emilmont	77:869cf507173a	612	the error events and handle them in the interrupt IRQ handler.
emilmont	77:869cf507173a	613
emilmont	77:869cf507173a	614	Note
emilmont	77:869cf507173a	615	For error management, it is advised to use the following functions:
emilmont	77:869cf507173a	616	- I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR).
emilmont	77:869cf507173a	617	- I2Cx_ER_IRQHandler() which is called when the error interrupt occurs.
emilmont	77:869cf507173a	618	Where x is the peripheral instance (I2C1, I2C2 ...)
emilmont	77:869cf507173a	619	- I2C_GetFlagStatus() or I2C_GetITStatus() to be called into the
emilmont	77:869cf507173a	620	I2Cx_ER_IRQHandler() function in order to determine which error occurred.
emilmont	77:869cf507173a	621	- I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd()
emilmont	77:869cf507173a	622	and/or I2C_GenerateStop() in order to clear the error flag and source
emilmont	77:869cf507173a	623	and return to correct communciation status.
emilmont	77:869cf507173a	624
emilmont	77:869cf507173a	625
emilmont	77:869cf507173a	626	2. Advanced state monitoring (Using the function I2C_GetLastEvent())
emilmont	77:869cf507173a	627	--------------------------------------------------------------------
emilmont	77:869cf507173a	628	Using the function I2C_GetLastEvent() which returns the image of both status
emilmont	77:869cf507173a	629	registers in a single word (uint32_t) (Status Register 2 value is shifted left
emilmont	77:869cf507173a	630	by 16 bits and concatenated to Status Register 1).
emilmont	77:869cf507173a	631
emilmont	77:869cf507173a	632	- When to use
emilmont	77:869cf507173a	633	- This function is suitable for the same applications above but it
emilmont	77:869cf507173a	634	allows to overcome the mentioned limitation of I2C_GetFlagStatus()
emilmont	77:869cf507173a	635	function.
emilmont	77:869cf507173a	636	- The returned value could be compared to events already defined in
emilmont	77:869cf507173a	637	the library (stm32l1xx_i2c.h) or to custom values defined by user.
emilmont	77:869cf507173a	638	This function is suitable when multiple flags are monitored at the
emilmont	77:869cf507173a	639	same time.
emilmont	77:869cf507173a	640	- At the opposite of I2C_CheckEvent() function, this function allows
emilmont	77:869cf507173a	641	user to choose when an event is accepted (when all events flags are
emilmont	77:869cf507173a	642	set and no other flags are set or just when the needed flags are set
emilmont	77:869cf507173a	643	like I2C_CheckEvent() function.
emilmont	77:869cf507173a	644
emilmont	77:869cf507173a	645	- Limitations
emilmont	77:869cf507173a	646	- User may need to define his own events.
emilmont	77:869cf507173a	647	- Same remark concerning the error management is applicable for this
emilmont	77:869cf507173a	648	function if user decides to check only regular communication flags
emilmont	77:869cf507173a	649	(and ignores error flags).
emilmont	77:869cf507173a	650
emilmont	77:869cf507173a	651
emilmont	77:869cf507173a	652	3. Flag-based state monitoring (Using the function I2C_GetFlagStatus())
emilmont	77:869cf507173a	653	-----------------------------------------------------------------------
emilmont	77:869cf507173a	654
emilmont	77:869cf507173a	655	Using the function I2C_GetFlagStatus() which simply returns the status of
emilmont	77:869cf507173a	656	one single flag (ie. I2C_FLAG_RXNE ...).
emilmont	77:869cf507173a	657
emilmont	77:869cf507173a	658	- When to use
emilmont	77:869cf507173a	659	- This function could be used for specific applications or in debug
emilmont	77:869cf507173a	660	phase.
emilmont	77:869cf507173a	661	- It is suitable when only one flag checking is needed (most I2C
emilmont	77:869cf507173a	662	events are monitored through multiple flags).
emilmont	77:869cf507173a	663	- Limitations:
emilmont	77:869cf507173a	664	- When calling this function, the Status register is accessed.
emilmont	77:869cf507173a	665	Some flags are cleared when the status register is accessed.
emilmont	77:869cf507173a	666	So checking the status of one Flag, may clear other ones.
emilmont	77:869cf507173a	667	- Function may need to be called twice or more in order to monitor
emilmont	77:869cf507173a	668	one single event.
emilmont	77:869cf507173a	669
emilmont	77:869cf507173a	670	For detailed description of Events, please refer to section I2C_Events in
emilmont	77:869cf507173a	671	stm32l1xx_i2c.h file.
emilmont	77:869cf507173a	672
emilmont	77:869cf507173a	673	*/
emilmont	77:869cf507173a	674
emilmont	77:869cf507173a	675	/*
emilmont	77:869cf507173a	676	===============================================================================
emilmont	77:869cf507173a	677	1. Basic state monitoring
emilmont	77:869cf507173a	678	===============================================================================
emilmont	77:869cf507173a	679	*/
emilmont	77:869cf507173a	680	ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT);
emilmont	77:869cf507173a	681	/*
emilmont	77:869cf507173a	682	===============================================================================
emilmont	77:869cf507173a	683	2. Advanced state monitoring
emilmont	77:869cf507173a	684	===============================================================================
emilmont	77:869cf507173a	685	*/
emilmont	77:869cf507173a	686	uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx);
emilmont	77:869cf507173a	687	/*
emilmont	77:869cf507173a	688	===============================================================================
emilmont	77:869cf507173a	689	3. Flag-based state monitoring
emilmont	77:869cf507173a	690	===============================================================================
emilmont	77:869cf507173a	691	*/
emilmont	77:869cf507173a	692	FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
emilmont	77:869cf507173a	693
emilmont	77:869cf507173a	694
emilmont	77:869cf507173a	695	void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
emilmont	77:869cf507173a	696	ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
emilmont	77:869cf507173a	697	void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
emilmont	77:869cf507173a	698
emilmont	77:869cf507173a	699	#ifdef __cplusplus
emilmont	77:869cf507173a	700	}
emilmont	77:869cf507173a	701	#endif
emilmont	77:869cf507173a	702
emilmont	77:869cf507173a	703	#endif /__STM32L1xx_I2C_H /
emilmont	77:869cf507173a	704
emilmont	77:869cf507173a	705	/**
emilmont	77:869cf507173a	706	* @}
emilmont	77:869cf507173a	707	*/
emilmont	77:869cf507173a	708
emilmont	77:869cf507173a	709	/**
emilmont	77:869cf507173a	710	* @}
emilmont	77:869cf507173a	711	*/
emilmont	77:869cf507173a	712
emilmont	77:869cf507173a	713	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/