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LPC2300_HAL.h@4:5d1359a283bc, 2008-11-27 (annotated)
- Committer:
- simon.ford@mbed.co.uk
- Date:
- Thu Nov 27 16:23:24 2008 +0000
- Revision:
- 4:5d1359a283bc
- Parent:
- 1:6b7f447ca868
New version of framework: vectors, environment, platform, base and file system
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| simon.ford@mbed.co.uk | 0:82220227f4fa | 1 | /* mbed Microcontroller Library - LPC2300 HAL |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 2 | * Copyright (c) 2007-2008, sford |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 3 | * |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 4 | * This should be anything specific to abstraction the LPC2300 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 5 | * |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 6 | * The HAL has no state associated with it. It is just a nice way to poke registers |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 7 | * It is still specific to the chip, but a neat interface and a bit more general |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 8 | * it is subject ot change and not exposed to the general user |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 9 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 10 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 11 | #ifndef MBED_LPC2300_HAL_H |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 12 | #define MBED_LPC2300_HAL_H |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 13 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 14 | namespace LPC2300 { |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 15 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 16 | /* Section LPC2300 */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 17 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 18 | //=================================================================== |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 19 | // General |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 20 | //=================================================================== |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 21 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 22 | typedef volatile unsigned int reg32; |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 23 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 24 | #define NOT_CONNECTED (-1) |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 25 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 26 | //=================================================================== |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 27 | // Pin Connect Block |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 28 | //=================================================================== |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 29 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 30 | /* Function pin_function |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 31 | * Set the port function (0-3) |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 32 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 33 | void pin_function(int port, int function); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 34 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 35 | /* Function pin_pullup |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 36 | * Set the port resistor to pullup |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 37 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 38 | void pin_pullup(int port); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 39 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 40 | /* Function pin_pulldown |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 41 | * Set the port resistor to pulldown |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 42 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 43 | void pin_pulldown(int port); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 44 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 45 | /* Function pin_pullnone |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 46 | * Set the port resistor to none |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 47 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 48 | void pin_pullnone(int port); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 49 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 50 | //=================================================================== |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 51 | // GPIO |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 52 | //=================================================================== |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 53 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 54 | struct GPIORF { |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 55 | volatile unsigned int dir; // 0x00 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 56 | volatile unsigned int _nc; // 0x04 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 57 | volatile unsigned int _nc2; // 0x08 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 58 | volatile unsigned int _nc3; // 0x0C |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 59 | volatile unsigned int mask; // 0x10 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 60 | volatile unsigned int pin; // 0x14 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 61 | volatile unsigned int set; // 0x18 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 62 | volatile unsigned int clr; // 0x1C |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 63 | }; |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 64 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 65 | /* Function gpio_input |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 66 | * Set the port GPIO as an input |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 67 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 68 | void gpio_input(int port); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 69 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 70 | /* Function gpio_output |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 71 | * Set the port GPIO as an output |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 72 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 73 | void gpio_output(int port); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 74 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 75 | /* Function gpio_write |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 76 | * Write a value to the GPIO port (v & 1) |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 77 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 78 | void gpio_write(int port, int v); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 79 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 80 | /* Function gpio_read |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 81 | * Read a value from the GPIO port (0 or 1) |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 82 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 83 | int gpio_read(int port); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 84 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 85 | //=================================================================== |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 86 | // GPIO IRQs |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 87 | //=================================================================== |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 88 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 89 | struct GPIOInterruptsRF { |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 90 | reg32 StatR; // 0x00 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 91 | reg32 StatF; // 0x04 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 92 | reg32 Clr; // 0x08 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 93 | reg32 EnR; // 0x0C |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 94 | reg32 EnF; // 0x10 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 95 | }; |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 96 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 97 | /* Function gpio_irq_enable_rising |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 98 | * Enable the rising edge interrupt |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 99 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 100 | void gpio_irq_enable_rising(int port); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 101 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 102 | /* Function gpio_irq_enable_falling |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 103 | * Enable the falling edge interrupt |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 104 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 105 | void gpio_irq_enable_falling(int port); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 106 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 107 | /* Function gpio_irq_disable_rising |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 108 | * Disable the rising edge interrupt |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 109 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 110 | void gpio_irq_disable_rising(int port); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 111 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 112 | /* Function gpio_irq_disable_falling |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 113 | * Disable the falling edge interrupt |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 114 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 115 | void gpio_irq_disable_falling(int port); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 116 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 117 | /* Function gpio_irq_clear |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 118 | * Clear rising and falling interrupt for the port |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 119 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 120 | void gpio_irq_clear(int port); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 121 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 122 | int gpio_irq_pending(); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 123 | int gpio_irq_pending_rising(int port); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 124 | int gpio_irq_pending_falling(int port); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 125 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 126 | //=================================================================== |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 127 | // Analog-to-Digital Converter |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 128 | //=================================================================== |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 129 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 130 | /* Function adc_poweron |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 131 | * Turn on the ADC |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 132 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 133 | void adc_poweron(); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 134 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 135 | /* Function adc_poweroff |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 136 | * Turn off the ADC |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 137 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 138 | void adc_poweroff(); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 139 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 140 | /* Function adc_init |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 141 | * Setup the ADC ready for reading |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 142 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 143 | void adc_init(); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 144 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 145 | /* Function adc_read |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 146 | * Read the value of the ADC (10-bit, id 0-5) |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 147 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 148 | int adc_read(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 149 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 150 | //=================================================================== |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 151 | // Digital-to-Analog Converter |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 152 | //=================================================================== |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 153 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 154 | /* Function dac_poweron |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 155 | * Turn on the DAC |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 156 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 157 | void dac_poweron(); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 158 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 159 | /* Function dac_poweroff |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 160 | * Turn off the DAC |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 161 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 162 | void dac_poweroff(); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 163 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 164 | /* Function dac_init |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 165 | * Setup the DAC ready for writinbg |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 166 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 167 | void dac_init(); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 168 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 169 | /* Function dac_write |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 170 | * Write a value to the DAC (10-bit) |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 171 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 172 | void dac_write(int value); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 173 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 174 | /* Function dac_read |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 175 | * Read the value currently set as the DAC output (10-bit) |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 176 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 177 | int dac_read(); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 178 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 179 | //=================================================================== |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 180 | // PWM |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 181 | //=================================================================== |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 182 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 183 | struct LPC2368_PWM_RF { |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 184 | reg32 IR; // 0x00 - Interrupt Register |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 185 | reg32 TCR; // 0x04 - Timer Control Register |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 186 | reg32 TC; // 0x08 - Timer Counter |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 187 | reg32 PR; // 0x0C - Prescale Register |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 188 | reg32 PC; // 0x10 - Prescale Counter |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 189 | reg32 MCR; // 0x14 - Match Control Register |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 190 | reg32 MR0; // 0x18 - Match Register 0 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 191 | reg32 MR1; // 0x1C - Match Register 1 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 192 | reg32 MR2; // 0x20 - Match Register 2 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 193 | reg32 MR3; // 0x24 - Match Register 3 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 194 | reg32 CCR; // 0x28 - Capture Control Register |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 195 | reg32 CR0; // 0x2C - Capture Register 1 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 196 | reg32 CR1; // 0x30 - Capture Register 2 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 197 | reg32 CR2; // 0x34 - Capture Register 3 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 198 | reg32 CR3; // 0x38 - Capture Register 4 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 199 | reg32 EMR; // 0x3C - External Match Register |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 200 | reg32 MR4; // 0x40 - Match Register 4 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 201 | reg32 MR5; // 0x44 - Match Register 5 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 202 | reg32 MR6; // 0x48 - Match Register 6 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 203 | reg32 PCR; // 0x4C - PWM Control Register |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 204 | reg32 LER; // 0x50 - Load Enable Register |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 205 | reg32 _nc[7]; // 0x54-0x6C |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 206 | reg32 CTCR; // 0x70 - Count Control Register |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 207 | }; |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 208 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 209 | #define LPC2368_PWM ((LPC2368_PWM_RF*)PWM1_BASE_ADDR) |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 210 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 211 | #define TCR_CNT_EN (1 << 0) |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 212 | #define TCR_RESET (1 << 1) |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 213 | #define TCR_PWM_EN (1 << 3) |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 214 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 215 | //=================================================================== |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 216 | // SPI Master (SSP) |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 217 | //=================================================================== |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 218 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 219 | struct SPIRF { |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 220 | reg32 CR0; // 0x00 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 221 | reg32 CR1; // 0x04 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 222 | reg32 DR; // 0x08 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 223 | reg32 SR; // 0x0C |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 224 | reg32 CPSR; // 0x10 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 225 | reg32 IMSC; // 0x14 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 226 | reg32 RIS; // 0x18 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 227 | reg32 MIS; // 0x1C |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 228 | reg32 ICR; // 0x20 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 229 | reg32 DMACR; // 0x24 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 230 | }; |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 231 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 232 | void ssp_format(int id, int bits, int phase, int polarity); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 233 | void ssp_frequency(int id, int hz); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 234 | void ssp_enable(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 235 | void ssp_disable(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 236 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 237 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 238 | int ssp_read(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 239 | void ssp_write(int id, int value); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 240 | int ssp_readable(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 241 | int ssp_writeable(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 242 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 243 | void ssp_poweron(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 244 | void ssp_poweroff(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 245 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 246 | /* |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 247 | int ssp_busy(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 248 | void ssp_clear(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 249 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 250 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 251 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 252 | //=================================================================== |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 253 | // Uart |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 254 | //=================================================================== |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 255 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 256 | struct UartRF { |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 257 | union { |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 258 | reg32 RBR; // 0x00 - Receive Buffer Register [DLAB=0] |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 259 | reg32 THR; // 0x00 - Transmit Holding Register [DLAB=0] |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 260 | reg32 DLL; // 0x00 - Divisor Latch (LSB) [DLAB=1] |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 261 | }; |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 262 | union { |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 263 | reg32 DLM; // 0x04 - Divisor Latch (MSB) [DLAB=1] |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 264 | reg32 IER; // 0x04 - Interrupt Enable Register [DLAB=0] |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 265 | }; |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 266 | union { |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 267 | reg32 IIR; // 0x08 - Interrupt ID Register |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 268 | reg32 FCR; // 0x08 - Fifo Control Register |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 269 | }; |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 270 | reg32 LCR; // 0x0C - Line Control Register |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 271 | reg32 MCR; // 0x10 - Modem Control Register (UART1 only) |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 272 | reg32 LSR; // 0x14 - Line Status Register |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 273 | reg32 MSR; // 0x18 - Modem Status Register (UART1 only) |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 274 | reg32 SCR; // 0x1C - Scratch Pad Register |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 275 | reg32 ACR; // 0x20 - Auto-baud Control Register |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 276 | reg32 ICR; // 0x24 - IrDA Control Register (UART3 only) |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 277 | reg32 FDR; // 0x28 - Fractional Divider Register |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 278 | reg32 _nc; // 0x2C - unused |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 279 | reg32 TER; // 0x30 - Transmit Enable Register |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 280 | }; |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 281 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 282 | enum Parity { |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 283 | None = 0, |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 284 | Odd, |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 285 | Even, |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 286 | Forced1, |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 287 | Forced0 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 288 | }; |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 289 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 290 | /* Function uart_poweron |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 291 | * Turn on the Uart power |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 292 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 293 | void uart_poweron(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 294 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 295 | /* Function uart_poweroff |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 296 | * Turn off the Uart power |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 297 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 298 | void uart_poweroff(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 299 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 300 | void uart_baud(int id, int baudrate); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 301 | void uart_format(int id, int data_bits, Parity parity, int stop_bits); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 302 | void uart_enable(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 303 | void uart_disable(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 304 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 305 | int uart_getc(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 306 | void uart_putc(int id, int c); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 307 | int uart_readable(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 308 | int uart_writable(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 309 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 310 | // I2C |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 311 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 312 | struct I2CRF { |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 313 | reg32 I2CONSET; // 0x00 - I2C Control Set Register |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 314 | reg32 I2STAT; // 0x04 - I2C Status Register |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 315 | reg32 I2DAT; // 0x08 - I2C Data Register |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 316 | reg32 I2ADR; // 0x0C - I2C Slave Address Register |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 317 | reg32 I2SCLH; // 0x10 - SCH Duty Cycle Register High |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 318 | reg32 I2SCLL; // 0x14 - SCL Duty Cycle Register Low |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 319 | reg32 I2CONCLR; // 0x18 - I2C Control Clear Register |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 320 | }; |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 321 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 322 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 323 | void i2c_poweron(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 324 | void i2c_poweroff(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 325 | void i2c_frequency(int id, int hz); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 326 | void i2c_enable(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 327 | void i2c_conset(int id, int start, int stop, int interrupt, int acknowledge); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 328 | void i2c_conclr(int id, int start, int stop, int interrupt, int acknowledge); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 329 | void i2c_wait_SI(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 330 | void i2c_clear_SI(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 331 | int i2c_status(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 332 | int i2c_start(int id, int address); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 333 | int i2c_write(int id, int value); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 334 | void i2c_stop(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 335 | int i2c_read(int id, int last); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 336 | int i2c_read(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 337 | int i2c_readlast(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 338 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 339 | // Timer |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 340 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 341 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 342 | struct TimerRF { |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 343 | reg32 ir; // 0x00 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 344 | reg32 tcr; // 0x04 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 345 | reg32 tc; // 0x08 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 346 | reg32 pr; // 0x0C |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 347 | reg32 pc; // 0x10 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 348 | reg32 mcr; // 0x14 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 349 | reg32 mr0; // 0x18 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 350 | reg32 mr1; // 0x1C |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 351 | reg32 mr2; // 0x20 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 352 | reg32 mr3; // 0x24 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 353 | reg32 ccr; // 0x28 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 354 | reg32 cr0; // 0x2C |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 355 | reg32 cr1; // 0x30 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 356 | reg32 cr2; // 0x34 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 357 | reg32 cr3; // 0x38 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 358 | reg32 emr; // 0x3C |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 359 | reg32 _nc[12]; // 0x40-0x6C |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 360 | reg32 ctcr; // 0x70 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 361 | }; |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 362 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 363 | /* Function timer_poweron |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 364 | * Turn on the Timer power |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 365 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 366 | void timer_poweron(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 367 | |
| simon.ford@mbed.co.uk | 4:5d1359a283bc | 368 | /* Function timer_poweroff |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 369 | * Turn off the Timer power |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 370 | */ |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 371 | void timer_poweroff(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 372 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 373 | void timer_start(int id, int hz); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 374 | int timer_read(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 375 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 376 | //=================================================================== |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 377 | // VIC |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 378 | //=================================================================== |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 379 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 380 | struct VicRF { |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 381 | reg32 IRQStatus; // 0x000 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 382 | reg32 FIQStatus; // 0x004 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 383 | reg32 RawIntr; // 0x008 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 384 | reg32 IntSelect; // 0x00C |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 385 | reg32 IntEnable; // 0x010 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 386 | reg32 IntEnClr; // 0x014 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 387 | reg32 SoftInt; // 0x018 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 388 | reg32 SoftIntClear; // 0x01C |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 389 | reg32 Protection; // 0x020 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 390 | reg32 SWPriorityMask; // 0x024 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 391 | reg32 _nc[54]; // 0x028-0x0FC |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 392 | reg32 VectAddr[32]; // 0x100-0x17C |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 393 | reg32 _nc2[32]; // 0x180-0x1FC |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 394 | reg32 VectPriority[32]; // 0x200-0x27C |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 395 | reg32 _nc3[800]; // 0x280-0xEFC |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 396 | reg32 Address; // 0xF00 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 397 | }; |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 398 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 399 | void vic_init(); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 400 | void vic_vector(int id, void (*fptr)(void) /*__irq*/ , int priority); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 401 | void vic_enable(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 402 | void vic_disable(int id); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 403 | void vic_priority(int id, int priority); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 404 | void vic_acknowledge(); |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 405 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 406 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 407 | |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 408 | } // namespace LPC2300 |
| simon.ford@mbed.co.uk | 0:82220227f4fa | 409 | |
| simon.ford@mbed.co.uk | 1:6b7f447ca868 | 410 | #endif |
| simon.ford@mbed.co.uk | 1:6b7f447ca868 | 411 |
