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TARGET_NUCLEO_F103RB/stm32f10x_spi.h@73:1efda918f0ba, 2013-12-09 (annotated)

Committer:: bogdanm
Date:: Mon Dec 09 18:43:03 2013 +0200
Revision:: 73:1efda918f0ba
Child:: 76:824293ae5e43

Release 73 of the mbed library



Main changes:



- added support for KL46Z and NUCLEO_F103RB

- STM32 USB device support

- various bug fixes

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	73:1efda918f0ba	1	/**
bogdanm	73:1efda918f0ba	2	******************************************************************************
bogdanm	73:1efda918f0ba	3	* @file stm32f10x_spi.h
bogdanm	73:1efda918f0ba	4	* @author MCD Application Team
bogdanm	73:1efda918f0ba	5	* @version V3.5.0
bogdanm	73:1efda918f0ba	6	* @date 11-March-2011
bogdanm	73:1efda918f0ba	7	* @brief This file contains all the functions prototypes for the SPI firmware
bogdanm	73:1efda918f0ba	8	* library.
bogdanm	73:1efda918f0ba	9	******************************************************************************
bogdanm	73:1efda918f0ba	10	* @attention
bogdanm	73:1efda918f0ba	11	*
bogdanm	73:1efda918f0ba	12	* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
bogdanm	73:1efda918f0ba	13	* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
bogdanm	73:1efda918f0ba	14	* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
bogdanm	73:1efda918f0ba	15	* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
bogdanm	73:1efda918f0ba	16	* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
bogdanm	73:1efda918f0ba	17	* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
bogdanm	73:1efda918f0ba	18	*
bogdanm	73:1efda918f0ba	19	* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
bogdanm	73:1efda918f0ba	20	******************************************************************************
bogdanm	73:1efda918f0ba	21	*/
bogdanm	73:1efda918f0ba	22
bogdanm	73:1efda918f0ba	23	/* Define to prevent recursive inclusion -------------------------------------*/
bogdanm	73:1efda918f0ba	24	#ifndef __STM32F10x_SPI_H
bogdanm	73:1efda918f0ba	25	#define __STM32F10x_SPI_H
bogdanm	73:1efda918f0ba	26
bogdanm	73:1efda918f0ba	27	#ifdef __cplusplus
bogdanm	73:1efda918f0ba	28	extern "C" {
bogdanm	73:1efda918f0ba	29	#endif
bogdanm	73:1efda918f0ba	30
bogdanm	73:1efda918f0ba	31	/* Includes ------------------------------------------------------------------*/
bogdanm	73:1efda918f0ba	32	#include "stm32f10x.h"
bogdanm	73:1efda918f0ba	33
bogdanm	73:1efda918f0ba	34	/** @addtogroup STM32F10x_StdPeriph_Driver
bogdanm	73:1efda918f0ba	35	* @{
bogdanm	73:1efda918f0ba	36	*/
bogdanm	73:1efda918f0ba	37
bogdanm	73:1efda918f0ba	38	/** @addtogroup SPI
bogdanm	73:1efda918f0ba	39	* @{
bogdanm	73:1efda918f0ba	40	*/
bogdanm	73:1efda918f0ba	41
bogdanm	73:1efda918f0ba	42	/** @defgroup SPI_Exported_Types
bogdanm	73:1efda918f0ba	43	* @{
bogdanm	73:1efda918f0ba	44	*/
bogdanm	73:1efda918f0ba	45
bogdanm	73:1efda918f0ba	46	/**
bogdanm	73:1efda918f0ba	47	* @brief SPI Init structure definition
bogdanm	73:1efda918f0ba	48	*/
bogdanm	73:1efda918f0ba	49
bogdanm	73:1efda918f0ba	50	typedef struct
bogdanm	73:1efda918f0ba	51	{
bogdanm	73:1efda918f0ba	52	uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
bogdanm	73:1efda918f0ba	53	This parameter can be a value of @ref SPI_data_direction */
bogdanm	73:1efda918f0ba	54
bogdanm	73:1efda918f0ba	55	uint16_t SPI_Mode; /*!< Specifies the SPI operating mode.
bogdanm	73:1efda918f0ba	56	This parameter can be a value of @ref SPI_mode */
bogdanm	73:1efda918f0ba	57
bogdanm	73:1efda918f0ba	58	uint16_t SPI_DataSize; /*!< Specifies the SPI data size.
bogdanm	73:1efda918f0ba	59	This parameter can be a value of @ref SPI_data_size */
bogdanm	73:1efda918f0ba	60
bogdanm	73:1efda918f0ba	61	uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.
bogdanm	73:1efda918f0ba	62	This parameter can be a value of @ref SPI_Clock_Polarity */
bogdanm	73:1efda918f0ba	63
bogdanm	73:1efda918f0ba	64	uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
bogdanm	73:1efda918f0ba	65	This parameter can be a value of @ref SPI_Clock_Phase */
bogdanm	73:1efda918f0ba	66
bogdanm	73:1efda918f0ba	67	uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
bogdanm	73:1efda918f0ba	68	hardware (NSS pin) or by software using the SSI bit.
bogdanm	73:1efda918f0ba	69	This parameter can be a value of @ref SPI_Slave_Select_management */
bogdanm	73:1efda918f0ba	70
bogdanm	73:1efda918f0ba	71	uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
bogdanm	73:1efda918f0ba	72	used to configure the transmit and receive SCK clock.
bogdanm	73:1efda918f0ba	73	This parameter can be a value of @ref SPI_BaudRate_Prescaler.
bogdanm	73:1efda918f0ba	74	@note The communication clock is derived from the master
bogdanm	73:1efda918f0ba	75	clock. The slave clock does not need to be set. */
bogdanm	73:1efda918f0ba	76
bogdanm	73:1efda918f0ba	77	uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
bogdanm	73:1efda918f0ba	78	This parameter can be a value of @ref SPI_MSB_LSB_transmission */
bogdanm	73:1efda918f0ba	79
bogdanm	73:1efda918f0ba	80	uint16_t SPI_CRCPolynomial; /!< Specifies the polynomial used for the CRC calculation. /
bogdanm	73:1efda918f0ba	81	}SPI_InitTypeDef;
bogdanm	73:1efda918f0ba	82
bogdanm	73:1efda918f0ba	83	/**
bogdanm	73:1efda918f0ba	84	* @brief I2S Init structure definition
bogdanm	73:1efda918f0ba	85	*/
bogdanm	73:1efda918f0ba	86
bogdanm	73:1efda918f0ba	87	typedef struct
bogdanm	73:1efda918f0ba	88	{
bogdanm	73:1efda918f0ba	89
bogdanm	73:1efda918f0ba	90	uint16_t I2S_Mode; /*!< Specifies the I2S operating mode.
bogdanm	73:1efda918f0ba	91	This parameter can be a value of @ref I2S_Mode */
bogdanm	73:1efda918f0ba	92
bogdanm	73:1efda918f0ba	93	uint16_t I2S_Standard; /*!< Specifies the standard used for the I2S communication.
bogdanm	73:1efda918f0ba	94	This parameter can be a value of @ref I2S_Standard */
bogdanm	73:1efda918f0ba	95
bogdanm	73:1efda918f0ba	96	uint16_t I2S_DataFormat; /*!< Specifies the data format for the I2S communication.
bogdanm	73:1efda918f0ba	97	This parameter can be a value of @ref I2S_Data_Format */
bogdanm	73:1efda918f0ba	98
bogdanm	73:1efda918f0ba	99	uint16_t I2S_MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
bogdanm	73:1efda918f0ba	100	This parameter can be a value of @ref I2S_MCLK_Output */
bogdanm	73:1efda918f0ba	101
bogdanm	73:1efda918f0ba	102	uint32_t I2S_AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
bogdanm	73:1efda918f0ba	103	This parameter can be a value of @ref I2S_Audio_Frequency */
bogdanm	73:1efda918f0ba	104
bogdanm	73:1efda918f0ba	105	uint16_t I2S_CPOL; /*!< Specifies the idle state of the I2S clock.
bogdanm	73:1efda918f0ba	106	This parameter can be a value of @ref I2S_Clock_Polarity */
bogdanm	73:1efda918f0ba	107	}I2S_InitTypeDef;
bogdanm	73:1efda918f0ba	108
bogdanm	73:1efda918f0ba	109	/**
bogdanm	73:1efda918f0ba	110	* @}
bogdanm	73:1efda918f0ba	111	*/
bogdanm	73:1efda918f0ba	112
bogdanm	73:1efda918f0ba	113	/** @defgroup SPI_Exported_Constants
bogdanm	73:1efda918f0ba	114	* @{
bogdanm	73:1efda918f0ba	115	*/
bogdanm	73:1efda918f0ba	116
bogdanm	73:1efda918f0ba	117	#define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) \|\| \
bogdanm	73:1efda918f0ba	118	((PERIPH) == SPI2) \|\| \
bogdanm	73:1efda918f0ba	119	((PERIPH) == SPI3))
bogdanm	73:1efda918f0ba	120
bogdanm	73:1efda918f0ba	121	#define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) \|\| \
bogdanm	73:1efda918f0ba	122	((PERIPH) == SPI3))
bogdanm	73:1efda918f0ba	123
bogdanm	73:1efda918f0ba	124	/** @defgroup SPI_data_direction
bogdanm	73:1efda918f0ba	125	* @{
bogdanm	73:1efda918f0ba	126	*/
bogdanm	73:1efda918f0ba	127
bogdanm	73:1efda918f0ba	128	#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
bogdanm	73:1efda918f0ba	129	#define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
bogdanm	73:1efda918f0ba	130	#define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
bogdanm	73:1efda918f0ba	131	#define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
bogdanm	73:1efda918f0ba	132	#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) \|\| \
bogdanm	73:1efda918f0ba	133	((MODE) == SPI_Direction_2Lines_RxOnly) \|\| \
bogdanm	73:1efda918f0ba	134	((MODE) == SPI_Direction_1Line_Rx) \|\| \
bogdanm	73:1efda918f0ba	135	((MODE) == SPI_Direction_1Line_Tx))
bogdanm	73:1efda918f0ba	136	/**
bogdanm	73:1efda918f0ba	137	* @}
bogdanm	73:1efda918f0ba	138	*/
bogdanm	73:1efda918f0ba	139
bogdanm	73:1efda918f0ba	140	/** @defgroup SPI_mode
bogdanm	73:1efda918f0ba	141	* @{
bogdanm	73:1efda918f0ba	142	*/
bogdanm	73:1efda918f0ba	143
bogdanm	73:1efda918f0ba	144	#define SPI_Mode_Master ((uint16_t)0x0104)
bogdanm	73:1efda918f0ba	145	#define SPI_Mode_Slave ((uint16_t)0x0000)
bogdanm	73:1efda918f0ba	146	#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) \|\| \
bogdanm	73:1efda918f0ba	147	((MODE) == SPI_Mode_Slave))
bogdanm	73:1efda918f0ba	148	/**
bogdanm	73:1efda918f0ba	149	* @}
bogdanm	73:1efda918f0ba	150	*/
bogdanm	73:1efda918f0ba	151
bogdanm	73:1efda918f0ba	152	/** @defgroup SPI_data_size
bogdanm	73:1efda918f0ba	153	* @{
bogdanm	73:1efda918f0ba	154	*/
bogdanm	73:1efda918f0ba	155
bogdanm	73:1efda918f0ba	156	#define SPI_DataSize_16b ((uint16_t)0x0800)
bogdanm	73:1efda918f0ba	157	#define SPI_DataSize_8b ((uint16_t)0x0000)
bogdanm	73:1efda918f0ba	158	#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) \|\| \
bogdanm	73:1efda918f0ba	159	((DATASIZE) == SPI_DataSize_8b))
bogdanm	73:1efda918f0ba	160	/**
bogdanm	73:1efda918f0ba	161	* @}
bogdanm	73:1efda918f0ba	162	*/
bogdanm	73:1efda918f0ba	163
bogdanm	73:1efda918f0ba	164	/** @defgroup SPI_Clock_Polarity
bogdanm	73:1efda918f0ba	165	* @{
bogdanm	73:1efda918f0ba	166	*/
bogdanm	73:1efda918f0ba	167
bogdanm	73:1efda918f0ba	168	#define SPI_CPOL_Low ((uint16_t)0x0000)
bogdanm	73:1efda918f0ba	169	#define SPI_CPOL_High ((uint16_t)0x0002)
bogdanm	73:1efda918f0ba	170	#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) \|\| \
bogdanm	73:1efda918f0ba	171	((CPOL) == SPI_CPOL_High))
bogdanm	73:1efda918f0ba	172	/**
bogdanm	73:1efda918f0ba	173	* @}
bogdanm	73:1efda918f0ba	174	*/
bogdanm	73:1efda918f0ba	175
bogdanm	73:1efda918f0ba	176	/** @defgroup SPI_Clock_Phase
bogdanm	73:1efda918f0ba	177	* @{
bogdanm	73:1efda918f0ba	178	*/
bogdanm	73:1efda918f0ba	179
bogdanm	73:1efda918f0ba	180	#define SPI_CPHA_1Edge ((uint16_t)0x0000)
bogdanm	73:1efda918f0ba	181	#define SPI_CPHA_2Edge ((uint16_t)0x0001)
bogdanm	73:1efda918f0ba	182	#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) \|\| \
bogdanm	73:1efda918f0ba	183	((CPHA) == SPI_CPHA_2Edge))
bogdanm	73:1efda918f0ba	184	/**
bogdanm	73:1efda918f0ba	185	* @}
bogdanm	73:1efda918f0ba	186	*/
bogdanm	73:1efda918f0ba	187
bogdanm	73:1efda918f0ba	188	/** @defgroup SPI_Slave_Select_management
bogdanm	73:1efda918f0ba	189	* @{
bogdanm	73:1efda918f0ba	190	*/
bogdanm	73:1efda918f0ba	191
bogdanm	73:1efda918f0ba	192	#define SPI_NSS_Soft ((uint16_t)0x0200)
bogdanm	73:1efda918f0ba	193	#define SPI_NSS_Hard ((uint16_t)0x0000)
bogdanm	73:1efda918f0ba	194	#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) \|\| \
bogdanm	73:1efda918f0ba	195	((NSS) == SPI_NSS_Hard))
bogdanm	73:1efda918f0ba	196	/**
bogdanm	73:1efda918f0ba	197	* @}
bogdanm	73:1efda918f0ba	198	*/
bogdanm	73:1efda918f0ba	199
bogdanm	73:1efda918f0ba	200	/** @defgroup SPI_BaudRate_Prescaler
bogdanm	73:1efda918f0ba	201	* @{
bogdanm	73:1efda918f0ba	202	*/
bogdanm	73:1efda918f0ba	203
bogdanm	73:1efda918f0ba	204	#define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
bogdanm	73:1efda918f0ba	205	#define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
bogdanm	73:1efda918f0ba	206	#define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
bogdanm	73:1efda918f0ba	207	#define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
bogdanm	73:1efda918f0ba	208	#define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
bogdanm	73:1efda918f0ba	209	#define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
bogdanm	73:1efda918f0ba	210	#define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
bogdanm	73:1efda918f0ba	211	#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
bogdanm	73:1efda918f0ba	212	#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) \|\| \
bogdanm	73:1efda918f0ba	213	((PRESCALER) == SPI_BaudRatePrescaler_4) \|\| \
bogdanm	73:1efda918f0ba	214	((PRESCALER) == SPI_BaudRatePrescaler_8) \|\| \
bogdanm	73:1efda918f0ba	215	((PRESCALER) == SPI_BaudRatePrescaler_16) \|\| \
bogdanm	73:1efda918f0ba	216	((PRESCALER) == SPI_BaudRatePrescaler_32) \|\| \
bogdanm	73:1efda918f0ba	217	((PRESCALER) == SPI_BaudRatePrescaler_64) \|\| \
bogdanm	73:1efda918f0ba	218	((PRESCALER) == SPI_BaudRatePrescaler_128) \|\| \
bogdanm	73:1efda918f0ba	219	((PRESCALER) == SPI_BaudRatePrescaler_256))
bogdanm	73:1efda918f0ba	220	/**
bogdanm	73:1efda918f0ba	221	* @}
bogdanm	73:1efda918f0ba	222	*/
bogdanm	73:1efda918f0ba	223
bogdanm	73:1efda918f0ba	224	/** @defgroup SPI_MSB_LSB_transmission
bogdanm	73:1efda918f0ba	225	* @{
bogdanm	73:1efda918f0ba	226	*/
bogdanm	73:1efda918f0ba	227
bogdanm	73:1efda918f0ba	228	#define SPI_FirstBit_MSB ((uint16_t)0x0000)
bogdanm	73:1efda918f0ba	229	#define SPI_FirstBit_LSB ((uint16_t)0x0080)
bogdanm	73:1efda918f0ba	230	#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) \|\| \
bogdanm	73:1efda918f0ba	231	((BIT) == SPI_FirstBit_LSB))
bogdanm	73:1efda918f0ba	232	/**
bogdanm	73:1efda918f0ba	233	* @}
bogdanm	73:1efda918f0ba	234	*/
bogdanm	73:1efda918f0ba	235
bogdanm	73:1efda918f0ba	236	/** @defgroup I2S_Mode
bogdanm	73:1efda918f0ba	237	* @{
bogdanm	73:1efda918f0ba	238	*/
bogdanm	73:1efda918f0ba	239
bogdanm	73:1efda918f0ba	240	#define I2S_Mode_SlaveTx ((uint16_t)0x0000)
bogdanm	73:1efda918f0ba	241	#define I2S_Mode_SlaveRx ((uint16_t)0x0100)
bogdanm	73:1efda918f0ba	242	#define I2S_Mode_MasterTx ((uint16_t)0x0200)
bogdanm	73:1efda918f0ba	243	#define I2S_Mode_MasterRx ((uint16_t)0x0300)
bogdanm	73:1efda918f0ba	244	#define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) \|\| \
bogdanm	73:1efda918f0ba	245	((MODE) == I2S_Mode_SlaveRx) \|\| \
bogdanm	73:1efda918f0ba	246	((MODE) == I2S_Mode_MasterTx) \|\| \
bogdanm	73:1efda918f0ba	247	((MODE) == I2S_Mode_MasterRx) )
bogdanm	73:1efda918f0ba	248	/**
bogdanm	73:1efda918f0ba	249	* @}
bogdanm	73:1efda918f0ba	250	*/
bogdanm	73:1efda918f0ba	251
bogdanm	73:1efda918f0ba	252	/** @defgroup I2S_Standard
bogdanm	73:1efda918f0ba	253	* @{
bogdanm	73:1efda918f0ba	254	*/
bogdanm	73:1efda918f0ba	255
bogdanm	73:1efda918f0ba	256	#define I2S_Standard_Phillips ((uint16_t)0x0000)
bogdanm	73:1efda918f0ba	257	#define I2S_Standard_MSB ((uint16_t)0x0010)
bogdanm	73:1efda918f0ba	258	#define I2S_Standard_LSB ((uint16_t)0x0020)
bogdanm	73:1efda918f0ba	259	#define I2S_Standard_PCMShort ((uint16_t)0x0030)
bogdanm	73:1efda918f0ba	260	#define I2S_Standard_PCMLong ((uint16_t)0x00B0)
bogdanm	73:1efda918f0ba	261	#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) \|\| \
bogdanm	73:1efda918f0ba	262	((STANDARD) == I2S_Standard_MSB) \|\| \
bogdanm	73:1efda918f0ba	263	((STANDARD) == I2S_Standard_LSB) \|\| \
bogdanm	73:1efda918f0ba	264	((STANDARD) == I2S_Standard_PCMShort) \|\| \
bogdanm	73:1efda918f0ba	265	((STANDARD) == I2S_Standard_PCMLong))
bogdanm	73:1efda918f0ba	266	/**
bogdanm	73:1efda918f0ba	267	* @}
bogdanm	73:1efda918f0ba	268	*/
bogdanm	73:1efda918f0ba	269
bogdanm	73:1efda918f0ba	270	/** @defgroup I2S_Data_Format
bogdanm	73:1efda918f0ba	271	* @{
bogdanm	73:1efda918f0ba	272	*/
bogdanm	73:1efda918f0ba	273
bogdanm	73:1efda918f0ba	274	#define I2S_DataFormat_16b ((uint16_t)0x0000)
bogdanm	73:1efda918f0ba	275	#define I2S_DataFormat_16bextended ((uint16_t)0x0001)
bogdanm	73:1efda918f0ba	276	#define I2S_DataFormat_24b ((uint16_t)0x0003)
bogdanm	73:1efda918f0ba	277	#define I2S_DataFormat_32b ((uint16_t)0x0005)
bogdanm	73:1efda918f0ba	278	#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) \|\| \
bogdanm	73:1efda918f0ba	279	((FORMAT) == I2S_DataFormat_16bextended) \|\| \
bogdanm	73:1efda918f0ba	280	((FORMAT) == I2S_DataFormat_24b) \|\| \
bogdanm	73:1efda918f0ba	281	((FORMAT) == I2S_DataFormat_32b))
bogdanm	73:1efda918f0ba	282	/**
bogdanm	73:1efda918f0ba	283	* @}
bogdanm	73:1efda918f0ba	284	*/
bogdanm	73:1efda918f0ba	285
bogdanm	73:1efda918f0ba	286	/** @defgroup I2S_MCLK_Output
bogdanm	73:1efda918f0ba	287	* @{
bogdanm	73:1efda918f0ba	288	*/
bogdanm	73:1efda918f0ba	289
bogdanm	73:1efda918f0ba	290	#define I2S_MCLKOutput_Enable ((uint16_t)0x0200)
bogdanm	73:1efda918f0ba	291	#define I2S_MCLKOutput_Disable ((uint16_t)0x0000)
bogdanm	73:1efda918f0ba	292	#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) \|\| \
bogdanm	73:1efda918f0ba	293	((OUTPUT) == I2S_MCLKOutput_Disable))
bogdanm	73:1efda918f0ba	294	/**
bogdanm	73:1efda918f0ba	295	* @}
bogdanm	73:1efda918f0ba	296	*/
bogdanm	73:1efda918f0ba	297
bogdanm	73:1efda918f0ba	298	/** @defgroup I2S_Audio_Frequency
bogdanm	73:1efda918f0ba	299	* @{
bogdanm	73:1efda918f0ba	300	*/
bogdanm	73:1efda918f0ba	301
bogdanm	73:1efda918f0ba	302	#define I2S_AudioFreq_192k ((uint32_t)192000)
bogdanm	73:1efda918f0ba	303	#define I2S_AudioFreq_96k ((uint32_t)96000)
bogdanm	73:1efda918f0ba	304	#define I2S_AudioFreq_48k ((uint32_t)48000)
bogdanm	73:1efda918f0ba	305	#define I2S_AudioFreq_44k ((uint32_t)44100)
bogdanm	73:1efda918f0ba	306	#define I2S_AudioFreq_32k ((uint32_t)32000)
bogdanm	73:1efda918f0ba	307	#define I2S_AudioFreq_22k ((uint32_t)22050)
bogdanm	73:1efda918f0ba	308	#define I2S_AudioFreq_16k ((uint32_t)16000)
bogdanm	73:1efda918f0ba	309	#define I2S_AudioFreq_11k ((uint32_t)11025)
bogdanm	73:1efda918f0ba	310	#define I2S_AudioFreq_8k ((uint32_t)8000)
bogdanm	73:1efda918f0ba	311	#define I2S_AudioFreq_Default ((uint32_t)2)
bogdanm	73:1efda918f0ba	312
bogdanm	73:1efda918f0ba	313	#define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \
bogdanm	73:1efda918f0ba	314	((FREQ) <= I2S_AudioFreq_192k)) \|\| \
bogdanm	73:1efda918f0ba	315	((FREQ) == I2S_AudioFreq_Default))
bogdanm	73:1efda918f0ba	316	/**
bogdanm	73:1efda918f0ba	317	* @}
bogdanm	73:1efda918f0ba	318	*/
bogdanm	73:1efda918f0ba	319
bogdanm	73:1efda918f0ba	320	/** @defgroup I2S_Clock_Polarity
bogdanm	73:1efda918f0ba	321	* @{
bogdanm	73:1efda918f0ba	322	*/
bogdanm	73:1efda918f0ba	323
bogdanm	73:1efda918f0ba	324	#define I2S_CPOL_Low ((uint16_t)0x0000)
bogdanm	73:1efda918f0ba	325	#define I2S_CPOL_High ((uint16_t)0x0008)
bogdanm	73:1efda918f0ba	326	#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) \|\| \
bogdanm	73:1efda918f0ba	327	((CPOL) == I2S_CPOL_High))
bogdanm	73:1efda918f0ba	328	/**
bogdanm	73:1efda918f0ba	329	* @}
bogdanm	73:1efda918f0ba	330	*/
bogdanm	73:1efda918f0ba	331
bogdanm	73:1efda918f0ba	332	/** @defgroup SPI_I2S_DMA_transfer_requests
bogdanm	73:1efda918f0ba	333	* @{
bogdanm	73:1efda918f0ba	334	*/
bogdanm	73:1efda918f0ba	335
bogdanm	73:1efda918f0ba	336	#define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)
bogdanm	73:1efda918f0ba	337	#define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)
bogdanm	73:1efda918f0ba	338	#define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
bogdanm	73:1efda918f0ba	339	/**
bogdanm	73:1efda918f0ba	340	* @}
bogdanm	73:1efda918f0ba	341	*/
bogdanm	73:1efda918f0ba	342
bogdanm	73:1efda918f0ba	343	/** @defgroup SPI_NSS_internal_software_management
bogdanm	73:1efda918f0ba	344	* @{
bogdanm	73:1efda918f0ba	345	*/
bogdanm	73:1efda918f0ba	346
bogdanm	73:1efda918f0ba	347	#define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
bogdanm	73:1efda918f0ba	348	#define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
bogdanm	73:1efda918f0ba	349	#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) \|\| \
bogdanm	73:1efda918f0ba	350	((INTERNAL) == SPI_NSSInternalSoft_Reset))
bogdanm	73:1efda918f0ba	351	/**
bogdanm	73:1efda918f0ba	352	* @}
bogdanm	73:1efda918f0ba	353	*/
bogdanm	73:1efda918f0ba	354
bogdanm	73:1efda918f0ba	355	/** @defgroup SPI_CRC_Transmit_Receive
bogdanm	73:1efda918f0ba	356	* @{
bogdanm	73:1efda918f0ba	357	*/
bogdanm	73:1efda918f0ba	358
bogdanm	73:1efda918f0ba	359	#define SPI_CRC_Tx ((uint8_t)0x00)
bogdanm	73:1efda918f0ba	360	#define SPI_CRC_Rx ((uint8_t)0x01)
bogdanm	73:1efda918f0ba	361	#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) \|\| ((CRC) == SPI_CRC_Rx))
bogdanm	73:1efda918f0ba	362	/**
bogdanm	73:1efda918f0ba	363	* @}
bogdanm	73:1efda918f0ba	364	*/
bogdanm	73:1efda918f0ba	365
bogdanm	73:1efda918f0ba	366	/** @defgroup SPI_direction_transmit_receive
bogdanm	73:1efda918f0ba	367	* @{
bogdanm	73:1efda918f0ba	368	*/
bogdanm	73:1efda918f0ba	369
bogdanm	73:1efda918f0ba	370	#define SPI_Direction_Rx ((uint16_t)0xBFFF)
bogdanm	73:1efda918f0ba	371	#define SPI_Direction_Tx ((uint16_t)0x4000)
bogdanm	73:1efda918f0ba	372	#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) \|\| \
bogdanm	73:1efda918f0ba	373	((DIRECTION) == SPI_Direction_Tx))
bogdanm	73:1efda918f0ba	374	/**
bogdanm	73:1efda918f0ba	375	* @}
bogdanm	73:1efda918f0ba	376	*/
bogdanm	73:1efda918f0ba	377
bogdanm	73:1efda918f0ba	378	/** @defgroup SPI_I2S_interrupts_definition
bogdanm	73:1efda918f0ba	379	* @{
bogdanm	73:1efda918f0ba	380	*/
bogdanm	73:1efda918f0ba	381
bogdanm	73:1efda918f0ba	382	#define SPI_I2S_IT_TXE ((uint8_t)0x71)
bogdanm	73:1efda918f0ba	383	#define SPI_I2S_IT_RXNE ((uint8_t)0x60)
bogdanm	73:1efda918f0ba	384	#define SPI_I2S_IT_ERR ((uint8_t)0x50)
bogdanm	73:1efda918f0ba	385	#define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) \|\| \
bogdanm	73:1efda918f0ba	386	((IT) == SPI_I2S_IT_RXNE) \|\| \
bogdanm	73:1efda918f0ba	387	((IT) == SPI_I2S_IT_ERR))
bogdanm	73:1efda918f0ba	388	#define SPI_I2S_IT_OVR ((uint8_t)0x56)
bogdanm	73:1efda918f0ba	389	#define SPI_IT_MODF ((uint8_t)0x55)
bogdanm	73:1efda918f0ba	390	#define SPI_IT_CRCERR ((uint8_t)0x54)
bogdanm	73:1efda918f0ba	391	#define I2S_IT_UDR ((uint8_t)0x53)
bogdanm	73:1efda918f0ba	392	#define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
bogdanm	73:1efda918f0ba	393	#define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) \|\| ((IT) == SPI_I2S_IT_TXE) \|\| \
bogdanm	73:1efda918f0ba	394	((IT) == I2S_IT_UDR) \|\| ((IT) == SPI_IT_CRCERR) \|\| \
bogdanm	73:1efda918f0ba	395	((IT) == SPI_IT_MODF) \|\| ((IT) == SPI_I2S_IT_OVR))
bogdanm	73:1efda918f0ba	396	/**
bogdanm	73:1efda918f0ba	397	* @}
bogdanm	73:1efda918f0ba	398	*/
bogdanm	73:1efda918f0ba	399
bogdanm	73:1efda918f0ba	400	/** @defgroup SPI_I2S_flags_definition
bogdanm	73:1efda918f0ba	401	* @{
bogdanm	73:1efda918f0ba	402	*/
bogdanm	73:1efda918f0ba	403
bogdanm	73:1efda918f0ba	404	#define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
bogdanm	73:1efda918f0ba	405	#define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
bogdanm	73:1efda918f0ba	406	#define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
bogdanm	73:1efda918f0ba	407	#define I2S_FLAG_UDR ((uint16_t)0x0008)
bogdanm	73:1efda918f0ba	408	#define SPI_FLAG_CRCERR ((uint16_t)0x0010)
bogdanm	73:1efda918f0ba	409	#define SPI_FLAG_MODF ((uint16_t)0x0020)
bogdanm	73:1efda918f0ba	410	#define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
bogdanm	73:1efda918f0ba	411	#define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
bogdanm	73:1efda918f0ba	412	#define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
bogdanm	73:1efda918f0ba	413	#define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) \|\| ((FLAG) == SPI_I2S_FLAG_OVR) \|\| \
bogdanm	73:1efda918f0ba	414	((FLAG) == SPI_FLAG_MODF) \|\| ((FLAG) == SPI_FLAG_CRCERR) \|\| \
bogdanm	73:1efda918f0ba	415	((FLAG) == I2S_FLAG_UDR) \|\| ((FLAG) == I2S_FLAG_CHSIDE) \|\| \
bogdanm	73:1efda918f0ba	416	((FLAG) == SPI_I2S_FLAG_TXE) \|\| ((FLAG) == SPI_I2S_FLAG_RXNE))
bogdanm	73:1efda918f0ba	417	/**
bogdanm	73:1efda918f0ba	418	* @}
bogdanm	73:1efda918f0ba	419	*/
bogdanm	73:1efda918f0ba	420
bogdanm	73:1efda918f0ba	421	/** @defgroup SPI_CRC_polynomial
bogdanm	73:1efda918f0ba	422	* @{
bogdanm	73:1efda918f0ba	423	*/
bogdanm	73:1efda918f0ba	424
bogdanm	73:1efda918f0ba	425	#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
bogdanm	73:1efda918f0ba	426	/**
bogdanm	73:1efda918f0ba	427	* @}
bogdanm	73:1efda918f0ba	428	*/
bogdanm	73:1efda918f0ba	429
bogdanm	73:1efda918f0ba	430	/**
bogdanm	73:1efda918f0ba	431	* @}
bogdanm	73:1efda918f0ba	432	*/
bogdanm	73:1efda918f0ba	433
bogdanm	73:1efda918f0ba	434	/** @defgroup SPI_Exported_Macros
bogdanm	73:1efda918f0ba	435	* @{
bogdanm	73:1efda918f0ba	436	*/
bogdanm	73:1efda918f0ba	437
bogdanm	73:1efda918f0ba	438	/**
bogdanm	73:1efda918f0ba	439	* @}
bogdanm	73:1efda918f0ba	440	*/
bogdanm	73:1efda918f0ba	441
bogdanm	73:1efda918f0ba	442	/** @defgroup SPI_Exported_Functions
bogdanm	73:1efda918f0ba	443	* @{
bogdanm	73:1efda918f0ba	444	*/
bogdanm	73:1efda918f0ba	445
bogdanm	73:1efda918f0ba	446	void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
bogdanm	73:1efda918f0ba	447	void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
bogdanm	73:1efda918f0ba	448	void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
bogdanm	73:1efda918f0ba	449	void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
bogdanm	73:1efda918f0ba	450	void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
bogdanm	73:1efda918f0ba	451	void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
bogdanm	73:1efda918f0ba	452	void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
bogdanm	73:1efda918f0ba	453	void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
bogdanm	73:1efda918f0ba	454	void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
bogdanm	73:1efda918f0ba	455	void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
bogdanm	73:1efda918f0ba	456	uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
bogdanm	73:1efda918f0ba	457	void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
bogdanm	73:1efda918f0ba	458	void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
bogdanm	73:1efda918f0ba	459	void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
bogdanm	73:1efda918f0ba	460	void SPI_TransmitCRC(SPI_TypeDef* SPIx);
bogdanm	73:1efda918f0ba	461	void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
bogdanm	73:1efda918f0ba	462	uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
bogdanm	73:1efda918f0ba	463	uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
bogdanm	73:1efda918f0ba	464	void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
bogdanm	73:1efda918f0ba	465	FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
bogdanm	73:1efda918f0ba	466	void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
bogdanm	73:1efda918f0ba	467	ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
bogdanm	73:1efda918f0ba	468	void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
bogdanm	73:1efda918f0ba	469
bogdanm	73:1efda918f0ba	470	#ifdef __cplusplus
bogdanm	73:1efda918f0ba	471	}
bogdanm	73:1efda918f0ba	472	#endif
bogdanm	73:1efda918f0ba	473
bogdanm	73:1efda918f0ba	474	#endif /__STM32F10x_SPI_H /
bogdanm	73:1efda918f0ba	475	/**
bogdanm	73:1efda918f0ba	476	* @}
bogdanm	73:1efda918f0ba	477	*/
bogdanm	73:1efda918f0ba	478
bogdanm	73:1efda918f0ba	479	/**
bogdanm	73:1efda918f0ba	480	* @}
bogdanm	73:1efda918f0ba	481	*/
bogdanm	73:1efda918f0ba	482
bogdanm	73:1efda918f0ba	483	/**
bogdanm	73:1efda918f0ba	484	* @}
bogdanm	73:1efda918f0ba	485	*/
bogdanm	73:1efda918f0ba	486
bogdanm	73:1efda918f0ba	487	/***************** (C) COPYRIGHT 2011 STMicroelectronics *END OF FILE**/