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TARGET_LPC1549/cmsis_nvic.h@79:0c05e21ae27e, 2014-02-21 (annotated)
- Committer:
- emilmont
- Date:
- Fri Feb 21 10:26:12 2014 +0000
- Revision:
- 79:0c05e21ae27e
- Child:
- 90:cb3d968589d8
Add LPC1549 Target
Change "us_ticker" implementation to 32-bit timer for NUCLEO_L152RE and NUCLEO_F401RE
Update KL05Z CMSIS-CORE
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| emilmont | 79:0c05e21ae27e | 1 | /* mbed Microcontroller Library - cmsis_nvic |
| emilmont | 79:0c05e21ae27e | 2 | * Copyright (c) 2009-2011 ARM Limited. All rights reserved. |
| emilmont | 79:0c05e21ae27e | 3 | * |
| emilmont | 79:0c05e21ae27e | 4 | * CMSIS-style functionality to support dynamic vectors |
| emilmont | 79:0c05e21ae27e | 5 | */ |
| emilmont | 79:0c05e21ae27e | 6 | |
| emilmont | 79:0c05e21ae27e | 7 | #ifndef MBED_CMSIS_NVIC_H |
| emilmont | 79:0c05e21ae27e | 8 | #define MBED_CMSIS_NVIC_H |
| emilmont | 79:0c05e21ae27e | 9 | |
| emilmont | 79:0c05e21ae27e | 10 | #define NVIC_NUM_VECTORS (16 + 47) // CORE + MCU Peripherals |
| emilmont | 79:0c05e21ae27e | 11 | #define NVIC_USER_IRQ_OFFSET 16 |
| emilmont | 79:0c05e21ae27e | 12 | |
| emilmont | 79:0c05e21ae27e | 13 | #include "cmsis.h" |
| emilmont | 79:0c05e21ae27e | 14 | |
| emilmont | 79:0c05e21ae27e | 15 | #ifdef __cplusplus |
| emilmont | 79:0c05e21ae27e | 16 | extern "C" { |
| emilmont | 79:0c05e21ae27e | 17 | #endif |
| emilmont | 79:0c05e21ae27e | 18 | |
| emilmont | 79:0c05e21ae27e | 19 | void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector); |
| emilmont | 79:0c05e21ae27e | 20 | uint32_t NVIC_GetVector(IRQn_Type IRQn); |
| emilmont | 79:0c05e21ae27e | 21 | |
| emilmont | 79:0c05e21ae27e | 22 | #ifdef __cplusplus |
| emilmont | 79:0c05e21ae27e | 23 | } |
| emilmont | 79:0c05e21ae27e | 24 | #endif |
| emilmont | 79:0c05e21ae27e | 25 | |
| emilmont | 79:0c05e21ae27e | 26 | #endif |
