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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc.c@613:bc40b8d2aec4, 2015-08-20 (annotated)

Committer:
mbed_official
Date:
Thu Aug 20 10:45:13 2015 +0100
Revision:
613:bc40b8d2aec4
Parent:
532:fe11edbda85c 
Synchronized with git revision 92ca8c7b60a283b6bb60eb65b183dac1599f0ade



Full URL: https://github.com/mbedmicro/mbed/commit/92ca8c7b60a283b6bb60eb65b183dac1599f0ade/



Nordic: update application start address in GCC linker script

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 235:685d5f11838f 1 /**
mbed_official 235:685d5f11838f 2 ******************************************************************************
mbed_official 235:685d5f11838f 3 * @file stm32f4xx_hal_rcc.c
mbed_official 235:685d5f11838f 4 * @author MCD Application Team
mbed_official 613:bc40b8d2aec4 5 * @version V1.3.2
mbed_official 613:bc40b8d2aec4 6 * @date 26-June-2015
mbed_official 235:685d5f11838f 7 * @brief RCC HAL module driver.
mbed_official 235:685d5f11838f 8 * This file provides firmware functions to manage the following
mbed_official 235:685d5f11838f 9 * functionalities of the Reset and Clock Control (RCC) peripheral:
mbed_official 235:685d5f11838f 10 * + Initialization and de-initialization functions
mbed_official 235:685d5f11838f 11 * + Peripheral Control functions
mbed_official 235:685d5f11838f 12 *
mbed_official 235:685d5f11838f 13 @verbatim
mbed_official 235:685d5f11838f 14 ==============================================================================
mbed_official 235:685d5f11838f 15 ##### RCC specific features #####
mbed_official 235:685d5f11838f 16 ==============================================================================
mbed_official 235:685d5f11838f 17 [..]
mbed_official 235:685d5f11838f 18 After reset the device is running from Internal High Speed oscillator
mbed_official 235:685d5f11838f 19 (HSI 16MHz) with Flash 0 wait state, Flash prefetch buffer, D-Cache
mbed_official 235:685d5f11838f 20 and I-Cache are disabled, and all peripherals are off except internal
mbed_official 235:685d5f11838f 21 SRAM, Flash and JTAG.
mbed_official 235:685d5f11838f 22 (+) There is no prescaler on High speed (AHB) and Low speed (APB) busses;
mbed_official 235:685d5f11838f 23 all peripherals mapped on these busses are running at HSI speed.
mbed_official 235:685d5f11838f 24 (+) The clock for all peripherals is switched off, except the SRAM and FLASH.
mbed_official 235:685d5f11838f 25 (+) All GPIOs are in input floating state, except the JTAG pins which
mbed_official 235:685d5f11838f 26 are assigned to be used for debug purpose.
mbed_official 235:685d5f11838f 27
mbed_official 235:685d5f11838f 28 [..]
mbed_official 235:685d5f11838f 29 Once the device started from reset, the user application has to:
mbed_official 235:685d5f11838f 30 (+) Configure the clock source to be used to drive the System clock
mbed_official 235:685d5f11838f 31 (if the application needs higher frequency/performance)
mbed_official 235:685d5f11838f 32 (+) Configure the System clock frequency and Flash settings
mbed_official 235:685d5f11838f 33 (+) Configure the AHB and APB busses prescalers
mbed_official 235:685d5f11838f 34 (+) Enable the clock for the peripheral(s) to be used
mbed_official 235:685d5f11838f 35 (+) Configure the clock source(s) for peripherals which clocks are not
mbed_official 235:685d5f11838f 36 derived from the System clock (I2S, RTC, ADC, USB OTG FS/SDIO/RNG)
mbed_official 235:685d5f11838f 37
mbed_official 532:fe11edbda85c 38 ##### RCC Limitations #####
mbed_official 532:fe11edbda85c 39 ==============================================================================
mbed_official 532:fe11edbda85c 40 [..]
mbed_official 532:fe11edbda85c 41 A delay between an RCC peripheral clock enable and the effective peripheral
mbed_official 532:fe11edbda85c 42 enabling should be taken into account in order to manage the peripheral read/write
mbed_official 532:fe11edbda85c 43 from/to registers.
mbed_official 532:fe11edbda85c 44 (+) This delay depends on the peripheral mapping.
mbed_official 532:fe11edbda85c 45 (+) If peripheral is mapped on AHB: the delay is 2 AHB clock cycle
mbed_official 532:fe11edbda85c 46 after the clock enable bit is set on the hardware register
mbed_official 532:fe11edbda85c 47 (+) If peripheral is mapped on APB: the delay is 2 APB clock cycle
mbed_official 532:fe11edbda85c 48 after the clock enable bit is set on the hardware register
mbed_official 532:fe11edbda85c 49
mbed_official 532:fe11edbda85c 50 [..]
mbed_official 532:fe11edbda85c 51 Possible Workarounds:
mbed_official 532:fe11edbda85c 52 (#) Enable the peripheral clock sometimes before the peripheral read/write
mbed_official 532:fe11edbda85c 53 register is required.
mbed_official 532:fe11edbda85c 54 (#) For AHB peripheral, insert two dummy read to the peripheral register.
mbed_official 532:fe11edbda85c 55 (#) For APB peripheral, insert a dummy read to the peripheral register.
mbed_official 532:fe11edbda85c 56
mbed_official 235:685d5f11838f 57 @endverbatim
mbed_official 235:685d5f11838f 58 ******************************************************************************
mbed_official 235:685d5f11838f 59 * @attention
mbed_official 235:685d5f11838f 60 *
mbed_official 532:fe11edbda85c 61 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 235:685d5f11838f 62 *
mbed_official 235:685d5f11838f 63 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 235:685d5f11838f 64 * are permitted provided that the following conditions are met:
mbed_official 235:685d5f11838f 65 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 235:685d5f11838f 66 * this list of conditions and the following disclaimer.
mbed_official 235:685d5f11838f 67 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 235:685d5f11838f 68 * this list of conditions and the following disclaimer in the documentation
mbed_official 235:685d5f11838f 69 * and/or other materials provided with the distribution.
mbed_official 235:685d5f11838f 70 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 235:685d5f11838f 71 * may be used to endorse or promote products derived from this software
mbed_official 235:685d5f11838f 72 * without specific prior written permission.
mbed_official 235:685d5f11838f 73 *
mbed_official 235:685d5f11838f 74 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 235:685d5f11838f 75 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 235:685d5f11838f 76 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 235:685d5f11838f 77 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 235:685d5f11838f 78 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 235:685d5f11838f 79 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 235:685d5f11838f 80 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 235:685d5f11838f 81 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 235:685d5f11838f 82 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 235:685d5f11838f 83 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 235:685d5f11838f 84 *
mbed_official 235:685d5f11838f 85 ******************************************************************************
mbed_official 235:685d5f11838f 86 */
mbed_official 235:685d5f11838f 87
mbed_official 235:685d5f11838f 88 /* Includes ------------------------------------------------------------------*/
mbed_official 235:685d5f11838f 89 #include "stm32f4xx_hal.h"
mbed_official 235:685d5f11838f 90
mbed_official 235:685d5f11838f 91 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 235:685d5f11838f 92 * @{
mbed_official 235:685d5f11838f 93 */
mbed_official 235:685d5f11838f 94
mbed_official 532:fe11edbda85c 95 /** @defgroup RCC RCC
mbed_official 235:685d5f11838f 96 * @brief RCC HAL module driver
mbed_official 235:685d5f11838f 97 * @{
mbed_official 235:685d5f11838f 98 */
mbed_official 235:685d5f11838f 99
mbed_official 235:685d5f11838f 100 #ifdef HAL_RCC_MODULE_ENABLED
mbed_official 235:685d5f11838f 101
mbed_official 235:685d5f11838f 102 /* Private typedef -----------------------------------------------------------*/
mbed_official 235:685d5f11838f 103 /* Private define ------------------------------------------------------------*/
mbed_official 532:fe11edbda85c 104 /** @addtogroup RCC_Private_Constants
mbed_official 532:fe11edbda85c 105 * @{
mbed_official 532:fe11edbda85c 106 */
mbed_official 235:685d5f11838f 107 #define CLOCKSWITCH_TIMEOUT_VALUE ((uint32_t)5000) /* 5 s */
mbed_official 235:685d5f11838f 108
mbed_official 235:685d5f11838f 109 /* Private macro -------------------------------------------------------------*/
mbed_official 532:fe11edbda85c 110 #define __MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
mbed_official 235:685d5f11838f 111 #define MCO1_GPIO_PORT GPIOA
mbed_official 235:685d5f11838f 112 #define MCO1_PIN GPIO_PIN_8
mbed_official 235:685d5f11838f 113
mbed_official 532:fe11edbda85c 114 #define __MCO2_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
mbed_official 235:685d5f11838f 115 #define MCO2_GPIO_PORT GPIOC
mbed_official 235:685d5f11838f 116 #define MCO2_PIN GPIO_PIN_9
mbed_official 532:fe11edbda85c 117 /**
mbed_official 532:fe11edbda85c 118 * @}
mbed_official 532:fe11edbda85c 119 */
mbed_official 235:685d5f11838f 120
mbed_official 235:685d5f11838f 121 /* Private variables ---------------------------------------------------------*/
mbed_official 532:fe11edbda85c 122 /** @defgroup RCC_Private_Variables RCC Private Variables
mbed_official 532:fe11edbda85c 123 * @{
mbed_official 532:fe11edbda85c 124 */
mbed_official 235:685d5f11838f 125 const uint8_t APBAHBPrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9};
mbed_official 532:fe11edbda85c 126 /**
mbed_official 532:fe11edbda85c 127 * @}
mbed_official 532:fe11edbda85c 128 */
mbed_official 235:685d5f11838f 129
mbed_official 235:685d5f11838f 130 /* Private function prototypes -----------------------------------------------*/
mbed_official 235:685d5f11838f 131 /* Private functions ---------------------------------------------------------*/
mbed_official 235:685d5f11838f 132
mbed_official 532:fe11edbda85c 133 /** @defgroup RCC_Exported_Functions RCC Exported Functions
mbed_official 532:fe11edbda85c 134 * @{
mbed_official 235:685d5f11838f 135 */
mbed_official 235:685d5f11838f 136
mbed_official 532:fe11edbda85c 137 /** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions
mbed_official 235:685d5f11838f 138 * @brief Initialization and Configuration functions
mbed_official 235:685d5f11838f 139 *
mbed_official 235:685d5f11838f 140 @verbatim
mbed_official 235:685d5f11838f 141 ===============================================================================
mbed_official 235:685d5f11838f 142 ##### Initialization and de-initialization functions #####
mbed_official 235:685d5f11838f 143 ===============================================================================
mbed_official 235:685d5f11838f 144 [..]
mbed_official 235:685d5f11838f 145 This section provides functions allowing to configure the internal/external oscillators
mbed_official 235:685d5f11838f 146 (HSE, HSI, LSE, LSI, PLL, CSS and MCO) and the System busses clocks (SYSCLK, AHB, APB1
mbed_official 235:685d5f11838f 147 and APB2).
mbed_official 235:685d5f11838f 148
mbed_official 235:685d5f11838f 149 [..] Internal/external clock and PLL configuration
mbed_official 235:685d5f11838f 150 (#) HSI (high-speed internal), 16 MHz factory-trimmed RC used directly or through
mbed_official 235:685d5f11838f 151 the PLL as System clock source.
mbed_official 235:685d5f11838f 152
mbed_official 235:685d5f11838f 153 (#) LSI (low-speed internal), 32 KHz low consumption RC used as IWDG and/or RTC
mbed_official 235:685d5f11838f 154 clock source.
mbed_official 235:685d5f11838f 155
mbed_official 235:685d5f11838f 156 (#) HSE (high-speed external), 4 to 26 MHz crystal oscillator used directly or
mbed_official 235:685d5f11838f 157 through the PLL as System clock source. Can be used also as RTC clock source.
mbed_official 235:685d5f11838f 158
mbed_official 235:685d5f11838f 159 (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source.
mbed_official 235:685d5f11838f 160
mbed_official 235:685d5f11838f 161 (#) PLL (clocked by HSI or HSE), featuring two different output clocks:
mbed_official 235:685d5f11838f 162 (++) The first output is used to generate the high speed system clock (up to 168 MHz)
mbed_official 235:685d5f11838f 163 (++) The second output is used to generate the clock for the USB OTG FS (48 MHz),
mbed_official 235:685d5f11838f 164 the random analog generator (<=48 MHz) and the SDIO (<= 48 MHz).
mbed_official 235:685d5f11838f 165
mbed_official 235:685d5f11838f 166 (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE()
mbed_official 235:685d5f11838f 167 and if a HSE clock failure occurs(HSE used directly or through PLL as System
mbed_official 532:fe11edbda85c 168 clock source), the System clocks automatically switched to HSI and an interrupt
mbed_official 235:685d5f11838f 169 is generated if enabled. The interrupt is linked to the Cortex-M4 NMI
mbed_official 235:685d5f11838f 170 (Non-Maskable Interrupt) exception vector.
mbed_official 235:685d5f11838f 171
mbed_official 235:685d5f11838f 172 (#) MCO1 (microcontroller clock output), used to output HSI, LSE, HSE or PLL
mbed_official 235:685d5f11838f 173 clock (through a configurable prescaler) on PA8 pin.
mbed_official 235:685d5f11838f 174
mbed_official 235:685d5f11838f 175 (#) MCO2 (microcontroller clock output), used to output HSE, PLL, SYSCLK or PLLI2S
mbed_official 235:685d5f11838f 176 clock (through a configurable prescaler) on PC9 pin.
mbed_official 235:685d5f11838f 177
mbed_official 235:685d5f11838f 178 [..] System, AHB and APB busses clocks configuration
mbed_official 235:685d5f11838f 179 (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI,
mbed_official 235:685d5f11838f 180 HSE and PLL.
mbed_official 235:685d5f11838f 181 The AHB clock (HCLK) is derived from System clock through configurable
mbed_official 235:685d5f11838f 182 prescaler and used to clock the CPU, memory and peripherals mapped
mbed_official 235:685d5f11838f 183 on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived
mbed_official 235:685d5f11838f 184 from AHB clock through configurable prescalers and used to clock
mbed_official 235:685d5f11838f 185 the peripherals mapped on these busses. You can use
mbed_official 235:685d5f11838f 186 "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks.
mbed_official 235:685d5f11838f 187
mbed_official 235:685d5f11838f 188 -@- All the peripheral clocks are derived from the System clock (SYSCLK) except:
mbed_official 235:685d5f11838f 189 (+@) I2S: the I2S clock can be derived either from a specific PLL (PLLI2S) or
mbed_official 235:685d5f11838f 190 from an external clock mapped on the I2S_CKIN pin.
mbed_official 235:685d5f11838f 191 You have to use __HAL_RCC_PLLI2S_CONFIG() macro to configure this clock.
mbed_official 235:685d5f11838f 192 (+@) SAI: the SAI clock can be derived either from a specific PLL (PLLI2S) or (PLLSAI) or
mbed_official 235:685d5f11838f 193 from an external clock mapped on the I2S_CKIN pin.
mbed_official 235:685d5f11838f 194 You have to use __HAL_RCC_PLLI2S_CONFIG() macro to configure this clock.
mbed_official 235:685d5f11838f 195 (+@) RTC: the RTC clock can be derived either from the LSI, LSE or HSE clock
mbed_official 235:685d5f11838f 196 divided by 2 to 31. You have to use __HAL_RCC_RTC_CONFIG() and __HAL_RCC_RTC_ENABLE()
mbed_official 235:685d5f11838f 197 macros to configure this clock.
mbed_official 235:685d5f11838f 198 (+@) USB OTG FS, SDIO and RTC: USB OTG FS require a frequency equal to 48 MHz
mbed_official 235:685d5f11838f 199 to work correctly, while the SDIO require a frequency equal or lower than
mbed_official 235:685d5f11838f 200 to 48. This clock is derived of the main PLL through PLLQ divider.
mbed_official 235:685d5f11838f 201 (+@) IWDG clock which is always the LSI clock.
mbed_official 235:685d5f11838f 202
mbed_official 235:685d5f11838f 203 (#) For the STM32F405xx/07xx and STM32F415xx/17xx devices, the maximum
mbed_official 235:685d5f11838f 204 frequency of the SYSCLK and HCLK is 168 MHz, PCLK2 84 MHz and PCLK1 42 MHz.
mbed_official 235:685d5f11838f 205 Depending on the device voltage range, the maximum frequency should
mbed_official 235:685d5f11838f 206 be adapted accordingly (refer to the product datasheets for more details).
mbed_official 235:685d5f11838f 207
mbed_official 235:685d5f11838f 208 (#) For the STM32F42xxx and STM32F43xxx devices, the maximum frequency
mbed_official 235:685d5f11838f 209 of the SYSCLK and HCLK is 180 MHz, PCLK2 90 MHz and PCLK1 45 MHz.
mbed_official 235:685d5f11838f 210 Depending on the device voltage range, the maximum frequency should
mbed_official 235:685d5f11838f 211 be adapted accordingly (refer to the product datasheets for more details).
mbed_official 235:685d5f11838f 212
mbed_official 235:685d5f11838f 213 (#) For the STM32F401xx, the maximum frequency of the SYSCLK and HCLK is 84 MHz,
mbed_official 235:685d5f11838f 214 PCLK2 84 MHz and PCLK1 42 MHz.
mbed_official 235:685d5f11838f 215 Depending on the device voltage range, the maximum frequency should
mbed_official 235:685d5f11838f 216 be adapted accordingly (refer to the product datasheets for more details).
mbed_official 235:685d5f11838f 217 @endverbatim
mbed_official 235:685d5f11838f 218 * @{
mbed_official 235:685d5f11838f 219 */
mbed_official 235:685d5f11838f 220
mbed_official 235:685d5f11838f 221 /**
mbed_official 235:685d5f11838f 222 * @brief Resets the RCC clock configuration to the default reset state.
mbed_official 235:685d5f11838f 223 * @note The default reset state of the clock configuration is given below:
mbed_official 235:685d5f11838f 224 * - HSI ON and used as system clock source
mbed_official 235:685d5f11838f 225 * - HSE, PLL and PLLI2S OFF
mbed_official 235:685d5f11838f 226 * - AHB, APB1 and APB2 prescaler set to 1.
mbed_official 235:685d5f11838f 227 * - CSS, MCO1 and MCO2 OFF
mbed_official 235:685d5f11838f 228 * - All interrupts disabled
mbed_official 235:685d5f11838f 229 * @note This function doesn't modify the configuration of the
mbed_official 235:685d5f11838f 230 * - Peripheral clocks
mbed_official 235:685d5f11838f 231 * - LSI, LSE and RTC clocks
mbed_official 235:685d5f11838f 232 * @retval None
mbed_official 235:685d5f11838f 233 */
mbed_official 235:685d5f11838f 234 void HAL_RCC_DeInit(void)
mbed_official 235:685d5f11838f 235 {
mbed_official 235:685d5f11838f 236 /* Set HSION bit */
mbed_official 235:685d5f11838f 237 SET_BIT(RCC->CR, RCC_CR_HSION | RCC_CR_HSITRIM_4);
mbed_official 235:685d5f11838f 238
mbed_official 235:685d5f11838f 239 /* Reset CFGR register */
mbed_official 235:685d5f11838f 240 CLEAR_REG(RCC->CFGR);
mbed_official 235:685d5f11838f 241
mbed_official 235:685d5f11838f 242 /* Reset HSEON, CSSON, PLLON, PLLI2S */
mbed_official 235:685d5f11838f 243 CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_CSSON | RCC_CR_PLLON| RCC_CR_PLLI2SON);
mbed_official 235:685d5f11838f 244
mbed_official 235:685d5f11838f 245 /* Reset PLLCFGR register */
mbed_official 235:685d5f11838f 246 CLEAR_REG(RCC->PLLCFGR);
mbed_official 235:685d5f11838f 247 SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLN_6 | RCC_PLLCFGR_PLLN_7 | RCC_PLLCFGR_PLLQ_2);
mbed_official 235:685d5f11838f 248
mbed_official 235:685d5f11838f 249 /* Reset PLLI2SCFGR register */
mbed_official 235:685d5f11838f 250 CLEAR_REG(RCC->PLLI2SCFGR);
mbed_official 235:685d5f11838f 251 SET_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN_6 | RCC_PLLI2SCFGR_PLLI2SN_7 | RCC_PLLI2SCFGR_PLLI2SR_1);
mbed_official 235:685d5f11838f 252
mbed_official 235:685d5f11838f 253 /* Reset HSEBYP bit */
mbed_official 235:685d5f11838f 254 CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);
mbed_official 235:685d5f11838f 255
mbed_official 235:685d5f11838f 256 /* Disable all interrupts */
mbed_official 235:685d5f11838f 257 CLEAR_REG(RCC->CIR);
mbed_official 235:685d5f11838f 258 }
mbed_official 235:685d5f11838f 259
mbed_official 235:685d5f11838f 260 /**
mbed_official 235:685d5f11838f 261 * @brief Initializes the RCC Oscillators according to the specified parameters in the
mbed_official 235:685d5f11838f 262 * RCC_OscInitTypeDef.
mbed_official 235:685d5f11838f 263 * @param RCC_OscInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official 235:685d5f11838f 264 * contains the configuration information for the RCC Oscillators.
mbed_official 235:685d5f11838f 265 * @note The PLL is not disabled when used as system clock.
mbed_official 235:685d5f11838f 266 * @retval HAL status
mbed_official 235:685d5f11838f 267 */
mbed_official 532:fe11edbda85c 268 __weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
mbed_official 235:685d5f11838f 269 {
mbed_official 532:fe11edbda85c 270 uint32_t tickstart = 0;
mbed_official 235:685d5f11838f 271
mbed_official 235:685d5f11838f 272 /* Check the parameters */
mbed_official 235:685d5f11838f 273 assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
mbed_official 235:685d5f11838f 274 /*------------------------------- HSE Configuration ------------------------*/
mbed_official 235:685d5f11838f 275 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
mbed_official 235:685d5f11838f 276 {
mbed_official 235:685d5f11838f 277 /* Check the parameters */
mbed_official 235:685d5f11838f 278 assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
mbed_official 235:685d5f11838f 279 /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
mbed_official 532:fe11edbda85c 280 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\
mbed_official 532:fe11edbda85c 281 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
mbed_official 235:685d5f11838f 282 {
mbed_official 532:fe11edbda85c 283 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
mbed_official 235:685d5f11838f 284 {
mbed_official 235:685d5f11838f 285 return HAL_ERROR;
mbed_official 235:685d5f11838f 286 }
mbed_official 235:685d5f11838f 287 }
mbed_official 235:685d5f11838f 288 else
mbed_official 235:685d5f11838f 289 {
mbed_official 235:685d5f11838f 290 /* Reset HSEON and HSEBYP bits before configuring the HSE --------------*/
mbed_official 235:685d5f11838f 291 __HAL_RCC_HSE_CONFIG(RCC_HSE_OFF);
mbed_official 235:685d5f11838f 292
mbed_official 235:685d5f11838f 293 /* Get Start Tick*/
mbed_official 235:685d5f11838f 294 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 295
mbed_official 235:685d5f11838f 296 /* Wait till HSE is disabled */
mbed_official 235:685d5f11838f 297 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
mbed_official 235:685d5f11838f 298 {
mbed_official 235:685d5f11838f 299 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 300 {
mbed_official 235:685d5f11838f 301 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 302 }
mbed_official 235:685d5f11838f 303 }
mbed_official 235:685d5f11838f 304
mbed_official 235:685d5f11838f 305 /* Set the new HSE configuration ---------------------------------------*/
mbed_official 235:685d5f11838f 306 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
mbed_official 235:685d5f11838f 307
mbed_official 235:685d5f11838f 308 /* Check the HSE State */
mbed_official 532:fe11edbda85c 309 if((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF)
mbed_official 235:685d5f11838f 310 {
mbed_official 235:685d5f11838f 311 /* Get Start Tick*/
mbed_official 235:685d5f11838f 312 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 313
mbed_official 235:685d5f11838f 314 /* Wait till HSE is ready */
mbed_official 235:685d5f11838f 315 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official 235:685d5f11838f 316 {
mbed_official 235:685d5f11838f 317 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 318 {
mbed_official 235:685d5f11838f 319 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 320 }
mbed_official 235:685d5f11838f 321 }
mbed_official 235:685d5f11838f 322 }
mbed_official 235:685d5f11838f 323 else
mbed_official 235:685d5f11838f 324 {
mbed_official 235:685d5f11838f 325 /* Get Start Tick*/
mbed_official 235:685d5f11838f 326 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 327
mbed_official 235:685d5f11838f 328 /* Wait till HSE is bypassed or disabled */
mbed_official 235:685d5f11838f 329 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
mbed_official 235:685d5f11838f 330 {
mbed_official 235:685d5f11838f 331 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 332 {
mbed_official 235:685d5f11838f 333 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 334 }
mbed_official 235:685d5f11838f 335 }
mbed_official 235:685d5f11838f 336 }
mbed_official 235:685d5f11838f 337 }
mbed_official 235:685d5f11838f 338 }
mbed_official 235:685d5f11838f 339 /*----------------------------- HSI Configuration --------------------------*/
mbed_official 235:685d5f11838f 340 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
mbed_official 235:685d5f11838f 341 {
mbed_official 235:685d5f11838f 342 /* Check the parameters */
mbed_official 235:685d5f11838f 343 assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
mbed_official 235:685d5f11838f 344 assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
mbed_official 235:685d5f11838f 345
mbed_official 532:fe11edbda85c 346 /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
mbed_official 532:fe11edbda85c 347 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\
mbed_official 532:fe11edbda85c 348 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
mbed_official 235:685d5f11838f 349 {
mbed_official 235:685d5f11838f 350 /* When HSI is used as system clock it will not disabled */
mbed_official 235:685d5f11838f 351 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
mbed_official 235:685d5f11838f 352 {
mbed_official 235:685d5f11838f 353 return HAL_ERROR;
mbed_official 235:685d5f11838f 354 }
mbed_official 235:685d5f11838f 355 /* Otherwise, just the calibration is allowed */
mbed_official 235:685d5f11838f 356 else
mbed_official 235:685d5f11838f 357 {
mbed_official 235:685d5f11838f 358 /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
mbed_official 235:685d5f11838f 359 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
mbed_official 235:685d5f11838f 360 }
mbed_official 235:685d5f11838f 361 }
mbed_official 235:685d5f11838f 362 else
mbed_official 235:685d5f11838f 363 {
mbed_official 235:685d5f11838f 364 /* Check the HSI State */
mbed_official 235:685d5f11838f 365 if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
mbed_official 235:685d5f11838f 366 {
mbed_official 235:685d5f11838f 367 /* Enable the Internal High Speed oscillator (HSI). */
mbed_official 235:685d5f11838f 368 __HAL_RCC_HSI_ENABLE();
mbed_official 235:685d5f11838f 369
mbed_official 235:685d5f11838f 370 /* Get Start Tick*/
mbed_official 235:685d5f11838f 371 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 372
mbed_official 235:685d5f11838f 373 /* Wait till HSI is ready */
mbed_official 235:685d5f11838f 374 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official 235:685d5f11838f 375 {
mbed_official 235:685d5f11838f 376 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 377 {
mbed_official 235:685d5f11838f 378 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 379 }
mbed_official 235:685d5f11838f 380 }
mbed_official 235:685d5f11838f 381
mbed_official 235:685d5f11838f 382 /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
mbed_official 235:685d5f11838f 383 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
mbed_official 235:685d5f11838f 384 }
mbed_official 235:685d5f11838f 385 else
mbed_official 235:685d5f11838f 386 {
mbed_official 235:685d5f11838f 387 /* Disable the Internal High Speed oscillator (HSI). */
mbed_official 235:685d5f11838f 388 __HAL_RCC_HSI_DISABLE();
mbed_official 235:685d5f11838f 389
mbed_official 235:685d5f11838f 390 /* Get Start Tick*/
mbed_official 235:685d5f11838f 391 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 392
mbed_official 235:685d5f11838f 393 /* Wait till HSI is ready */
mbed_official 235:685d5f11838f 394 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
mbed_official 235:685d5f11838f 395 {
mbed_official 235:685d5f11838f 396 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 397 {
mbed_official 235:685d5f11838f 398 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 399 }
mbed_official 235:685d5f11838f 400 }
mbed_official 235:685d5f11838f 401 }
mbed_official 235:685d5f11838f 402 }
mbed_official 235:685d5f11838f 403 }
mbed_official 235:685d5f11838f 404 /*------------------------------ LSI Configuration -------------------------*/
mbed_official 235:685d5f11838f 405 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
mbed_official 235:685d5f11838f 406 {
mbed_official 235:685d5f11838f 407 /* Check the parameters */
mbed_official 235:685d5f11838f 408 assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
mbed_official 235:685d5f11838f 409
mbed_official 235:685d5f11838f 410 /* Check the LSI State */
mbed_official 235:685d5f11838f 411 if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
mbed_official 235:685d5f11838f 412 {
mbed_official 235:685d5f11838f 413 /* Enable the Internal Low Speed oscillator (LSI). */
mbed_official 235:685d5f11838f 414 __HAL_RCC_LSI_ENABLE();
mbed_official 235:685d5f11838f 415
mbed_official 235:685d5f11838f 416 /* Get Start Tick*/
mbed_official 235:685d5f11838f 417 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 418
mbed_official 235:685d5f11838f 419 /* Wait till LSI is ready */
mbed_official 235:685d5f11838f 420 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
mbed_official 235:685d5f11838f 421 {
mbed_official 235:685d5f11838f 422 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 423 {
mbed_official 235:685d5f11838f 424 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 425 }
mbed_official 235:685d5f11838f 426 }
mbed_official 235:685d5f11838f 427 }
mbed_official 235:685d5f11838f 428 else
mbed_official 235:685d5f11838f 429 {
mbed_official 235:685d5f11838f 430 /* Disable the Internal Low Speed oscillator (LSI). */
mbed_official 235:685d5f11838f 431 __HAL_RCC_LSI_DISABLE();
mbed_official 235:685d5f11838f 432
mbed_official 235:685d5f11838f 433 /* Get Start Tick*/
mbed_official 235:685d5f11838f 434 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 435
mbed_official 235:685d5f11838f 436 /* Wait till LSI is ready */
mbed_official 235:685d5f11838f 437 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
mbed_official 235:685d5f11838f 438 {
mbed_official 235:685d5f11838f 439 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 440 {
mbed_official 235:685d5f11838f 441 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 442 }
mbed_official 235:685d5f11838f 443 }
mbed_official 235:685d5f11838f 444 }
mbed_official 235:685d5f11838f 445 }
mbed_official 235:685d5f11838f 446 /*------------------------------ LSE Configuration -------------------------*/
mbed_official 235:685d5f11838f 447 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
mbed_official 235:685d5f11838f 448 {
mbed_official 235:685d5f11838f 449 /* Check the parameters */
mbed_official 235:685d5f11838f 450 assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
mbed_official 235:685d5f11838f 451
mbed_official 235:685d5f11838f 452 /* Enable Power Clock*/
mbed_official 532:fe11edbda85c 453 __HAL_RCC_PWR_CLK_ENABLE();
mbed_official 235:685d5f11838f 454
mbed_official 235:685d5f11838f 455 /* Enable write access to Backup domain */
mbed_official 235:685d5f11838f 456 PWR->CR |= PWR_CR_DBP;
mbed_official 235:685d5f11838f 457
mbed_official 235:685d5f11838f 458 /* Wait for Backup domain Write protection disable */
mbed_official 235:685d5f11838f 459 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 460
mbed_official 235:685d5f11838f 461 while((PWR->CR & PWR_CR_DBP) == RESET)
mbed_official 235:685d5f11838f 462 {
mbed_official 532:fe11edbda85c 463 if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 464 {
mbed_official 235:685d5f11838f 465 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 466 }
mbed_official 235:685d5f11838f 467 }
mbed_official 235:685d5f11838f 468
mbed_official 235:685d5f11838f 469 /* Reset LSEON and LSEBYP bits before configuring the LSE ----------------*/
mbed_official 235:685d5f11838f 470 __HAL_RCC_LSE_CONFIG(RCC_LSE_OFF);
mbed_official 235:685d5f11838f 471
mbed_official 235:685d5f11838f 472 /* Get Start Tick*/
mbed_official 235:685d5f11838f 473 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 474
mbed_official 235:685d5f11838f 475 /* Wait till LSE is ready */
mbed_official 235:685d5f11838f 476 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
mbed_official 235:685d5f11838f 477 {
mbed_official 532:fe11edbda85c 478 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 479 {
mbed_official 235:685d5f11838f 480 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 481 }
mbed_official 235:685d5f11838f 482 }
mbed_official 235:685d5f11838f 483
mbed_official 235:685d5f11838f 484 /* Set the new LSE configuration -----------------------------------------*/
mbed_official 235:685d5f11838f 485 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
mbed_official 235:685d5f11838f 486 /* Check the LSE State */
mbed_official 532:fe11edbda85c 487 if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
mbed_official 235:685d5f11838f 488 {
mbed_official 235:685d5f11838f 489 /* Get Start Tick*/
mbed_official 235:685d5f11838f 490 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 491
mbed_official 235:685d5f11838f 492 /* Wait till LSE is ready */
mbed_official 235:685d5f11838f 493 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
mbed_official 235:685d5f11838f 494 {
mbed_official 532:fe11edbda85c 495 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 496 {
mbed_official 235:685d5f11838f 497 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 498 }
mbed_official 235:685d5f11838f 499 }
mbed_official 235:685d5f11838f 500 }
mbed_official 235:685d5f11838f 501 else
mbed_official 235:685d5f11838f 502 {
mbed_official 235:685d5f11838f 503 /* Get Start Tick*/
mbed_official 235:685d5f11838f 504 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 505
mbed_official 235:685d5f11838f 506 /* Wait till LSE is ready */
mbed_official 235:685d5f11838f 507 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
mbed_official 235:685d5f11838f 508 {
mbed_official 532:fe11edbda85c 509 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 510 {
mbed_official 235:685d5f11838f 511 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 512 }
mbed_official 235:685d5f11838f 513 }
mbed_official 235:685d5f11838f 514 }
mbed_official 235:685d5f11838f 515 }
mbed_official 235:685d5f11838f 516 /*-------------------------------- PLL Configuration -----------------------*/
mbed_official 235:685d5f11838f 517 /* Check the parameters */
mbed_official 235:685d5f11838f 518 assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
mbed_official 235:685d5f11838f 519 if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
mbed_official 235:685d5f11838f 520 {
mbed_official 235:685d5f11838f 521 /* Check if the PLL is used as system clock or not */
mbed_official 235:685d5f11838f 522 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
mbed_official 235:685d5f11838f 523 {
mbed_official 235:685d5f11838f 524 if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
mbed_official 235:685d5f11838f 525 {
mbed_official 235:685d5f11838f 526 /* Check the parameters */
mbed_official 235:685d5f11838f 527 assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
mbed_official 235:685d5f11838f 528 assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM));
mbed_official 235:685d5f11838f 529 assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
mbed_official 235:685d5f11838f 530 assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
mbed_official 235:685d5f11838f 531 assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
mbed_official 532:fe11edbda85c 532
mbed_official 235:685d5f11838f 533 /* Disable the main PLL. */
mbed_official 235:685d5f11838f 534 __HAL_RCC_PLL_DISABLE();
mbed_official 235:685d5f11838f 535
mbed_official 235:685d5f11838f 536 /* Get Start Tick*/
mbed_official 235:685d5f11838f 537 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 538
mbed_official 235:685d5f11838f 539 /* Wait till PLL is ready */
mbed_official 235:685d5f11838f 540 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
mbed_official 235:685d5f11838f 541 {
mbed_official 235:685d5f11838f 542 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 543 {
mbed_official 235:685d5f11838f 544 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 545 }
mbed_official 235:685d5f11838f 546 }
mbed_official 235:685d5f11838f 547
mbed_official 235:685d5f11838f 548 /* Configure the main PLL clock source, multiplication and division factors. */
mbed_official 532:fe11edbda85c 549 WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource | \
mbed_official 532:fe11edbda85c 550 RCC_OscInitStruct->PLL.PLLM | \
mbed_official 532:fe11edbda85c 551 (RCC_OscInitStruct->PLL.PLLN << POSITION_VAL(RCC_PLLCFGR_PLLN)) | \
mbed_official 532:fe11edbda85c 552 (((RCC_OscInitStruct->PLL.PLLP >> 1) -1) << POSITION_VAL(RCC_PLLCFGR_PLLP)) | \
mbed_official 532:fe11edbda85c 553 (RCC_OscInitStruct->PLL.PLLQ << POSITION_VAL(RCC_PLLCFGR_PLLQ))));
mbed_official 235:685d5f11838f 554 /* Enable the main PLL. */
mbed_official 235:685d5f11838f 555 __HAL_RCC_PLL_ENABLE();
mbed_official 235:685d5f11838f 556
mbed_official 235:685d5f11838f 557 /* Get Start Tick*/
mbed_official 235:685d5f11838f 558 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 559
mbed_official 235:685d5f11838f 560 /* Wait till PLL is ready */
mbed_official 235:685d5f11838f 561 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official 235:685d5f11838f 562 {
mbed_official 235:685d5f11838f 563 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 564 {
mbed_official 235:685d5f11838f 565 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 566 }
mbed_official 235:685d5f11838f 567 }
mbed_official 235:685d5f11838f 568 }
mbed_official 235:685d5f11838f 569 else
mbed_official 235:685d5f11838f 570 {
mbed_official 235:685d5f11838f 571 /* Disable the main PLL. */
mbed_official 235:685d5f11838f 572 __HAL_RCC_PLL_DISABLE();
mbed_official 235:685d5f11838f 573
mbed_official 235:685d5f11838f 574 /* Get Start Tick*/
mbed_official 235:685d5f11838f 575 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 576
mbed_official 235:685d5f11838f 577 /* Wait till PLL is ready */
mbed_official 235:685d5f11838f 578 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
mbed_official 235:685d5f11838f 579 {
mbed_official 235:685d5f11838f 580 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 581 {
mbed_official 235:685d5f11838f 582 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 583 }
mbed_official 235:685d5f11838f 584 }
mbed_official 235:685d5f11838f 585 }
mbed_official 235:685d5f11838f 586 }
mbed_official 235:685d5f11838f 587 else
mbed_official 235:685d5f11838f 588 {
mbed_official 235:685d5f11838f 589 return HAL_ERROR;
mbed_official 235:685d5f11838f 590 }
mbed_official 235:685d5f11838f 591 }
mbed_official 235:685d5f11838f 592 return HAL_OK;
mbed_official 235:685d5f11838f 593 }
mbed_official 235:685d5f11838f 594
mbed_official 235:685d5f11838f 595 /**
mbed_official 235:685d5f11838f 596 * @brief Initializes the CPU, AHB and APB busses clocks according to the specified
mbed_official 235:685d5f11838f 597 * parameters in the RCC_ClkInitStruct.
mbed_official 235:685d5f11838f 598 * @param RCC_ClkInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official 235:685d5f11838f 599 * contains the configuration information for the RCC peripheral.
mbed_official 235:685d5f11838f 600 * @param FLatency: FLASH Latency, this parameter depend on device selected
mbed_official 235:685d5f11838f 601 *
mbed_official 235:685d5f11838f 602 * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
mbed_official 235:685d5f11838f 603 * and updated by HAL_RCC_GetHCLKFreq() function called within this function
mbed_official 235:685d5f11838f 604 *
mbed_official 235:685d5f11838f 605 * @note The HSI is used (enabled by hardware) as system clock source after
mbed_official 235:685d5f11838f 606 * startup from Reset, wake-up from STOP and STANDBY mode, or in case
mbed_official 235:685d5f11838f 607 * of failure of the HSE used directly or indirectly as system clock
mbed_official 235:685d5f11838f 608 * (if the Clock Security System CSS is enabled).
mbed_official 235:685d5f11838f 609 *
mbed_official 235:685d5f11838f 610 * @note A switch from one clock source to another occurs only if the target
mbed_official 235:685d5f11838f 611 * clock source is ready (clock stable after startup delay or PLL locked).
mbed_official 235:685d5f11838f 612 * If a clock source which is not yet ready is selected, the switch will
mbed_official 235:685d5f11838f 613 * occur when the clock source will be ready.
mbed_official 235:685d5f11838f 614 *
mbed_official 235:685d5f11838f 615 * @note Depending on the device voltage range, the software has to set correctly
mbed_official 235:685d5f11838f 616 * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
mbed_official 235:685d5f11838f 617 * (for more details refer to section above "Initialization/de-initialization functions")
mbed_official 235:685d5f11838f 618 * @retval None
mbed_official 235:685d5f11838f 619 */
mbed_official 235:685d5f11838f 620 HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
mbed_official 235:685d5f11838f 621 {
mbed_official 235:685d5f11838f 622 uint32_t tickstart = 0;
mbed_official 235:685d5f11838f 623
mbed_official 235:685d5f11838f 624 /* Check the parameters */
mbed_official 235:685d5f11838f 625 assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
mbed_official 235:685d5f11838f 626 assert_param(IS_FLASH_LATENCY(FLatency));
mbed_official 235:685d5f11838f 627
mbed_official 235:685d5f11838f 628 /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
mbed_official 235:685d5f11838f 629 must be correctly programmed according to the frequency of the CPU clock
mbed_official 235:685d5f11838f 630 (HCLK) and the supply voltage of the device. */
mbed_official 235:685d5f11838f 631
mbed_official 235:685d5f11838f 632 /* Increasing the CPU frequency */
mbed_official 235:685d5f11838f 633 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
mbed_official 235:685d5f11838f 634 {
mbed_official 235:685d5f11838f 635 /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
mbed_official 235:685d5f11838f 636 __HAL_FLASH_SET_LATENCY(FLatency);
mbed_official 235:685d5f11838f 637
mbed_official 235:685d5f11838f 638 /* Check that the new number of wait states is taken into account to access the Flash
mbed_official 235:685d5f11838f 639 memory by reading the FLASH_ACR register */
mbed_official 235:685d5f11838f 640 if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
mbed_official 235:685d5f11838f 641 {
mbed_official 235:685d5f11838f 642 return HAL_ERROR;
mbed_official 235:685d5f11838f 643 }
mbed_official 235:685d5f11838f 644
mbed_official 235:685d5f11838f 645 /*-------------------------- HCLK Configuration --------------------------*/
mbed_official 235:685d5f11838f 646 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
mbed_official 235:685d5f11838f 647 {
mbed_official 235:685d5f11838f 648 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
mbed_official 235:685d5f11838f 649 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
mbed_official 235:685d5f11838f 650 }
mbed_official 235:685d5f11838f 651
mbed_official 235:685d5f11838f 652 /*------------------------- SYSCLK Configuration ---------------------------*/
mbed_official 235:685d5f11838f 653 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
mbed_official 235:685d5f11838f 654 {
mbed_official 235:685d5f11838f 655 assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
mbed_official 235:685d5f11838f 656
mbed_official 235:685d5f11838f 657 /* HSE is selected as System Clock Source */
mbed_official 235:685d5f11838f 658 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 235:685d5f11838f 659 {
mbed_official 235:685d5f11838f 660 /* Check the HSE ready flag */
mbed_official 235:685d5f11838f 661 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official 235:685d5f11838f 662 {
mbed_official 235:685d5f11838f 663 return HAL_ERROR;
mbed_official 235:685d5f11838f 664 }
mbed_official 235:685d5f11838f 665 }
mbed_official 235:685d5f11838f 666 /* PLL is selected as System Clock Source */
mbed_official 532:fe11edbda85c 667 else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) ||
mbed_official 532:fe11edbda85c 668 (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
mbed_official 235:685d5f11838f 669 {
mbed_official 235:685d5f11838f 670 /* Check the PLL ready flag */
mbed_official 235:685d5f11838f 671 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official 235:685d5f11838f 672 {
mbed_official 235:685d5f11838f 673 return HAL_ERROR;
mbed_official 235:685d5f11838f 674 }
mbed_official 235:685d5f11838f 675 }
mbed_official 235:685d5f11838f 676 /* HSI is selected as System Clock Source */
mbed_official 235:685d5f11838f 677 else
mbed_official 235:685d5f11838f 678 {
mbed_official 235:685d5f11838f 679 /* Check the HSI ready flag */
mbed_official 235:685d5f11838f 680 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official 235:685d5f11838f 681 {
mbed_official 235:685d5f11838f 682 return HAL_ERROR;
mbed_official 235:685d5f11838f 683 }
mbed_official 235:685d5f11838f 684 }
mbed_official 532:fe11edbda85c 685
mbed_official 532:fe11edbda85c 686 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
mbed_official 235:685d5f11838f 687 /* Get Start Tick*/
mbed_official 235:685d5f11838f 688 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 689
mbed_official 235:685d5f11838f 690 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 235:685d5f11838f 691 {
mbed_official 532:fe11edbda85c 692 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
mbed_official 235:685d5f11838f 693 {
mbed_official 235:685d5f11838f 694 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 695 {
mbed_official 235:685d5f11838f 696 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 697 }
mbed_official 235:685d5f11838f 698 }
mbed_official 235:685d5f11838f 699 }
mbed_official 235:685d5f11838f 700 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official 235:685d5f11838f 701 {
mbed_official 532:fe11edbda85c 702 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
mbed_official 532:fe11edbda85c 703 {
mbed_official 532:fe11edbda85c 704 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 532:fe11edbda85c 705 {
mbed_official 532:fe11edbda85c 706 return HAL_TIMEOUT;
mbed_official 532:fe11edbda85c 707 }
mbed_official 532:fe11edbda85c 708 }
mbed_official 532:fe11edbda85c 709 }
mbed_official 532:fe11edbda85c 710 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK)
mbed_official 532:fe11edbda85c 711 {
mbed_official 532:fe11edbda85c 712 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLRCLK)
mbed_official 235:685d5f11838f 713 {
mbed_official 235:685d5f11838f 714 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 715 {
mbed_official 235:685d5f11838f 716 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 717 }
mbed_official 235:685d5f11838f 718 }
mbed_official 235:685d5f11838f 719 }
mbed_official 235:685d5f11838f 720 else
mbed_official 235:685d5f11838f 721 {
mbed_official 532:fe11edbda85c 722 while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
mbed_official 235:685d5f11838f 723 {
mbed_official 235:685d5f11838f 724 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 725 {
mbed_official 235:685d5f11838f 726 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 727 }
mbed_official 235:685d5f11838f 728 }
mbed_official 235:685d5f11838f 729 }
mbed_official 235:685d5f11838f 730 }
mbed_official 235:685d5f11838f 731 }
mbed_official 235:685d5f11838f 732 /* Decreasing the CPU frequency */
mbed_official 235:685d5f11838f 733 else
mbed_official 235:685d5f11838f 734 {
mbed_official 235:685d5f11838f 735 /*-------------------------- HCLK Configuration --------------------------*/
mbed_official 235:685d5f11838f 736 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
mbed_official 235:685d5f11838f 737 {
mbed_official 235:685d5f11838f 738 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
mbed_official 235:685d5f11838f 739 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
mbed_official 235:685d5f11838f 740 }
mbed_official 235:685d5f11838f 741
mbed_official 235:685d5f11838f 742 /*------------------------- SYSCLK Configuration -------------------------*/
mbed_official 235:685d5f11838f 743 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
mbed_official 235:685d5f11838f 744 {
mbed_official 235:685d5f11838f 745 assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
mbed_official 235:685d5f11838f 746
mbed_official 235:685d5f11838f 747 /* HSE is selected as System Clock Source */
mbed_official 235:685d5f11838f 748 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 235:685d5f11838f 749 {
mbed_official 235:685d5f11838f 750 /* Check the HSE ready flag */
mbed_official 235:685d5f11838f 751 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official 235:685d5f11838f 752 {
mbed_official 235:685d5f11838f 753 return HAL_ERROR;
mbed_official 235:685d5f11838f 754 }
mbed_official 235:685d5f11838f 755 }
mbed_official 235:685d5f11838f 756 /* PLL is selected as System Clock Source */
mbed_official 532:fe11edbda85c 757 else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) ||
mbed_official 532:fe11edbda85c 758 (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
mbed_official 235:685d5f11838f 759 {
mbed_official 235:685d5f11838f 760 /* Check the PLL ready flag */
mbed_official 235:685d5f11838f 761 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official 235:685d5f11838f 762 {
mbed_official 235:685d5f11838f 763 return HAL_ERROR;
mbed_official 235:685d5f11838f 764 }
mbed_official 235:685d5f11838f 765 }
mbed_official 235:685d5f11838f 766 /* HSI is selected as System Clock Source */
mbed_official 235:685d5f11838f 767 else
mbed_official 235:685d5f11838f 768 {
mbed_official 235:685d5f11838f 769 /* Check the HSI ready flag */
mbed_official 235:685d5f11838f 770 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official 235:685d5f11838f 771 {
mbed_official 235:685d5f11838f 772 return HAL_ERROR;
mbed_official 235:685d5f11838f 773 }
mbed_official 235:685d5f11838f 774 }
mbed_official 532:fe11edbda85c 775 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
mbed_official 235:685d5f11838f 776 /* Get Start Tick*/
mbed_official 235:685d5f11838f 777 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 778
mbed_official 235:685d5f11838f 779 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 235:685d5f11838f 780 {
mbed_official 532:fe11edbda85c 781 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
mbed_official 235:685d5f11838f 782 {
mbed_official 235:685d5f11838f 783 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 784 {
mbed_official 235:685d5f11838f 785 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 786 }
mbed_official 235:685d5f11838f 787 }
mbed_official 235:685d5f11838f 788 }
mbed_official 235:685d5f11838f 789 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official 235:685d5f11838f 790 {
mbed_official 532:fe11edbda85c 791 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
mbed_official 532:fe11edbda85c 792 {
mbed_official 532:fe11edbda85c 793 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 532:fe11edbda85c 794 {
mbed_official 532:fe11edbda85c 795 return HAL_TIMEOUT;
mbed_official 532:fe11edbda85c 796 }
mbed_official 532:fe11edbda85c 797 }
mbed_official 532:fe11edbda85c 798 }
mbed_official 532:fe11edbda85c 799 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK)
mbed_official 532:fe11edbda85c 800 {
mbed_official 532:fe11edbda85c 801 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLRCLK)
mbed_official 235:685d5f11838f 802 {
mbed_official 235:685d5f11838f 803 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 804 {
mbed_official 235:685d5f11838f 805 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 806 }
mbed_official 235:685d5f11838f 807 }
mbed_official 235:685d5f11838f 808 }
mbed_official 235:685d5f11838f 809 else
mbed_official 235:685d5f11838f 810 {
mbed_official 532:fe11edbda85c 811 while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
mbed_official 235:685d5f11838f 812 {
mbed_official 235:685d5f11838f 813 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 814 {
mbed_official 235:685d5f11838f 815 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 816 }
mbed_official 235:685d5f11838f 817 }
mbed_official 235:685d5f11838f 818 }
mbed_official 235:685d5f11838f 819 }
mbed_official 235:685d5f11838f 820
mbed_official 235:685d5f11838f 821 /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
mbed_official 235:685d5f11838f 822 __HAL_FLASH_SET_LATENCY(FLatency);
mbed_official 235:685d5f11838f 823
mbed_official 235:685d5f11838f 824 /* Check that the new number of wait states is taken into account to access the Flash
mbed_official 235:685d5f11838f 825 memory by reading the FLASH_ACR register */
mbed_official 235:685d5f11838f 826 if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
mbed_official 235:685d5f11838f 827 {
mbed_official 235:685d5f11838f 828 return HAL_ERROR;
mbed_official 235:685d5f11838f 829 }
mbed_official 235:685d5f11838f 830 }
mbed_official 235:685d5f11838f 831
mbed_official 235:685d5f11838f 832 /*-------------------------- PCLK1 Configuration ---------------------------*/
mbed_official 235:685d5f11838f 833 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
mbed_official 235:685d5f11838f 834 {
mbed_official 235:685d5f11838f 835 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
mbed_official 235:685d5f11838f 836 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
mbed_official 235:685d5f11838f 837 }
mbed_official 235:685d5f11838f 838
mbed_official 235:685d5f11838f 839 /*-------------------------- PCLK2 Configuration ---------------------------*/
mbed_official 235:685d5f11838f 840 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
mbed_official 235:685d5f11838f 841 {
mbed_official 235:685d5f11838f 842 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
mbed_official 235:685d5f11838f 843 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
mbed_official 235:685d5f11838f 844 }
mbed_official 235:685d5f11838f 845
mbed_official 235:685d5f11838f 846 /* Configure the source of time base considering new system clocks settings*/
mbed_official 235:685d5f11838f 847 HAL_InitTick (TICK_INT_PRIORITY);
mbed_official 235:685d5f11838f 848
mbed_official 235:685d5f11838f 849 return HAL_OK;
mbed_official 235:685d5f11838f 850 }
mbed_official 235:685d5f11838f 851
mbed_official 235:685d5f11838f 852 /**
mbed_official 235:685d5f11838f 853 * @}
mbed_official 235:685d5f11838f 854 */
mbed_official 235:685d5f11838f 855
mbed_official 532:fe11edbda85c 856 /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions
mbed_official 235:685d5f11838f 857 * @brief RCC clocks control functions
mbed_official 235:685d5f11838f 858 *
mbed_official 235:685d5f11838f 859 @verbatim
mbed_official 235:685d5f11838f 860 ===============================================================================
mbed_official 235:685d5f11838f 861 ##### Peripheral Control functions #####
mbed_official 235:685d5f11838f 862 ===============================================================================
mbed_official 235:685d5f11838f 863 [..]
mbed_official 235:685d5f11838f 864 This subsection provides a set of functions allowing to control the RCC Clocks
mbed_official 235:685d5f11838f 865 frequencies.
mbed_official 235:685d5f11838f 866
mbed_official 235:685d5f11838f 867 @endverbatim
mbed_official 235:685d5f11838f 868 * @{
mbed_official 235:685d5f11838f 869 */
mbed_official 235:685d5f11838f 870
mbed_official 235:685d5f11838f 871 /**
mbed_official 235:685d5f11838f 872 * @brief Selects the clock source to output on MCO1 pin(PA8) or on MCO2 pin(PC9).
mbed_official 235:685d5f11838f 873 * @note PA8/PC9 should be configured in alternate function mode.
mbed_official 235:685d5f11838f 874 * @param RCC_MCOx: specifies the output direction for the clock source.
mbed_official 235:685d5f11838f 875 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 876 * @arg RCC_MCO1: Clock source to output on MCO1 pin(PA8).
mbed_official 235:685d5f11838f 877 * @arg RCC_MCO2: Clock source to output on MCO2 pin(PC9).
mbed_official 235:685d5f11838f 878 * @param RCC_MCOSource: specifies the clock source to output.
mbed_official 235:685d5f11838f 879 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 880 * @arg RCC_MCO1SOURCE_HSI: HSI clock selected as MCO1 source
mbed_official 235:685d5f11838f 881 * @arg RCC_MCO1SOURCE_LSE: LSE clock selected as MCO1 source
mbed_official 235:685d5f11838f 882 * @arg RCC_MCO1SOURCE_HSE: HSE clock selected as MCO1 source
mbed_official 235:685d5f11838f 883 * @arg RCC_MCO1SOURCE_PLLCLK: main PLL clock selected as MCO1 source
mbed_official 235:685d5f11838f 884 * @arg RCC_MCO2SOURCE_SYSCLK: System clock (SYSCLK) selected as MCO2 source
mbed_official 235:685d5f11838f 885 * @arg RCC_MCO2SOURCE_PLLI2SCLK: PLLI2S clock selected as MCO2 source
mbed_official 235:685d5f11838f 886 * @arg RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source
mbed_official 235:685d5f11838f 887 * @arg RCC_MCO2SOURCE_PLLCLK: main PLL clock selected as MCO2 source
mbed_official 235:685d5f11838f 888 * @param RCC_MCODiv: specifies the MCOx prescaler.
mbed_official 235:685d5f11838f 889 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 890 * @arg RCC_MCODIV_1: no division applied to MCOx clock
mbed_official 235:685d5f11838f 891 * @arg RCC_MCODIV_2: division by 2 applied to MCOx clock
mbed_official 235:685d5f11838f 892 * @arg RCC_MCODIV_3: division by 3 applied to MCOx clock
mbed_official 235:685d5f11838f 893 * @arg RCC_MCODIV_4: division by 4 applied to MCOx clock
mbed_official 235:685d5f11838f 894 * @arg RCC_MCODIV_5: division by 5 applied to MCOx clock
mbed_official 235:685d5f11838f 895 * @retval None
mbed_official 235:685d5f11838f 896 */
mbed_official 235:685d5f11838f 897 void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv)
mbed_official 235:685d5f11838f 898 {
mbed_official 235:685d5f11838f 899 GPIO_InitTypeDef GPIO_InitStruct;
mbed_official 235:685d5f11838f 900 /* Check the parameters */
mbed_official 235:685d5f11838f 901 assert_param(IS_RCC_MCO(RCC_MCOx));
mbed_official 235:685d5f11838f 902 assert_param(IS_RCC_MCODIV(RCC_MCODiv));
mbed_official 235:685d5f11838f 903 /* RCC_MCO1 */
mbed_official 235:685d5f11838f 904 if(RCC_MCOx == RCC_MCO1)
mbed_official 235:685d5f11838f 905 {
mbed_official 235:685d5f11838f 906 assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
mbed_official 235:685d5f11838f 907
mbed_official 235:685d5f11838f 908 /* MCO1 Clock Enable */
mbed_official 235:685d5f11838f 909 __MCO1_CLK_ENABLE();
mbed_official 235:685d5f11838f 910
mbed_official 532:fe11edbda85c 911 /* Configure the MCO1 pin in alternate function mode */
mbed_official 235:685d5f11838f 912 GPIO_InitStruct.Pin = MCO1_PIN;
mbed_official 235:685d5f11838f 913 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
mbed_official 235:685d5f11838f 914 GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
mbed_official 235:685d5f11838f 915 GPIO_InitStruct.Pull = GPIO_NOPULL;
mbed_official 235:685d5f11838f 916 GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
mbed_official 235:685d5f11838f 917 HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct);
mbed_official 235:685d5f11838f 918
mbed_official 235:685d5f11838f 919 /* Mask MCO1 and MCO1PRE[2:0] bits then Select MCO1 clock source and prescaler */
mbed_official 235:685d5f11838f 920 MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO1 | RCC_CFGR_MCO1PRE), (RCC_MCOSource | RCC_MCODiv));
mbed_official 235:685d5f11838f 921 }
mbed_official 235:685d5f11838f 922 else
mbed_official 235:685d5f11838f 923 {
mbed_official 235:685d5f11838f 924 assert_param(IS_RCC_MCO2SOURCE(RCC_MCOSource));
mbed_official 235:685d5f11838f 925
mbed_official 235:685d5f11838f 926 /* MCO2 Clock Enable */
mbed_official 235:685d5f11838f 927 __MCO2_CLK_ENABLE();
mbed_official 235:685d5f11838f 928
mbed_official 532:fe11edbda85c 929 /* Configure the MCO2 pin in alternate function mode */
mbed_official 235:685d5f11838f 930 GPIO_InitStruct.Pin = MCO2_PIN;
mbed_official 235:685d5f11838f 931 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
mbed_official 235:685d5f11838f 932 GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
mbed_official 235:685d5f11838f 933 GPIO_InitStruct.Pull = GPIO_NOPULL;
mbed_official 235:685d5f11838f 934 GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
mbed_official 235:685d5f11838f 935 HAL_GPIO_Init(MCO2_GPIO_PORT, &GPIO_InitStruct);
mbed_official 235:685d5f11838f 936
mbed_official 235:685d5f11838f 937 /* Mask MCO2 and MCO2PRE[2:0] bits then Select MCO2 clock source and prescaler */
mbed_official 235:685d5f11838f 938 MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO2 | RCC_CFGR_MCO2PRE), (RCC_MCOSource | (RCC_MCODiv << 3)));
mbed_official 235:685d5f11838f 939 }
mbed_official 235:685d5f11838f 940 }
mbed_official 235:685d5f11838f 941
mbed_official 235:685d5f11838f 942 /**
mbed_official 235:685d5f11838f 943 * @brief Enables the Clock Security System.
mbed_official 235:685d5f11838f 944 * @note If a failure is detected on the HSE oscillator clock, this oscillator
mbed_official 235:685d5f11838f 945 * is automatically disabled and an interrupt is generated to inform the
mbed_official 235:685d5f11838f 946 * software about the failure (Clock Security System Interrupt, CSSI),
mbed_official 235:685d5f11838f 947 * allowing the MCU to perform rescue operations. The CSSI is linked to
mbed_official 235:685d5f11838f 948 * the Cortex-M4 NMI (Non-Maskable Interrupt) exception vector.
mbed_official 235:685d5f11838f 949 * @retval None
mbed_official 235:685d5f11838f 950 */
mbed_official 235:685d5f11838f 951 void HAL_RCC_EnableCSS(void)
mbed_official 235:685d5f11838f 952 {
mbed_official 532:fe11edbda85c 953 *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)ENABLE;
mbed_official 235:685d5f11838f 954 }
mbed_official 235:685d5f11838f 955
mbed_official 235:685d5f11838f 956 /**
mbed_official 235:685d5f11838f 957 * @brief Disables the Clock Security System.
mbed_official 235:685d5f11838f 958 * @retval None
mbed_official 235:685d5f11838f 959 */
mbed_official 235:685d5f11838f 960 void HAL_RCC_DisableCSS(void)
mbed_official 235:685d5f11838f 961 {
mbed_official 532:fe11edbda85c 962 *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)DISABLE;
mbed_official 235:685d5f11838f 963 }
mbed_official 235:685d5f11838f 964
mbed_official 235:685d5f11838f 965 /**
mbed_official 235:685d5f11838f 966 * @brief Returns the SYSCLK frequency
mbed_official 235:685d5f11838f 967 *
mbed_official 235:685d5f11838f 968 * @note The system frequency computed by this function is not the real
mbed_official 235:685d5f11838f 969 * frequency in the chip. It is calculated based on the predefined
mbed_official 235:685d5f11838f 970 * constant and the selected clock source:
mbed_official 235:685d5f11838f 971 * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*)
mbed_official 235:685d5f11838f 972 * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(**)
mbed_official 235:685d5f11838f 973 * @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(**)
mbed_official 235:685d5f11838f 974 * or HSI_VALUE(*) multiplied/divided by the PLL factors.
mbed_official 235:685d5f11838f 975 * @note (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
mbed_official 235:685d5f11838f 976 * 16 MHz) but the real value may vary depending on the variations
mbed_official 235:685d5f11838f 977 * in voltage and temperature.
mbed_official 235:685d5f11838f 978 * @note (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
mbed_official 235:685d5f11838f 979 * 25 MHz), user has to ensure that HSE_VALUE is same as the real
mbed_official 235:685d5f11838f 980 * frequency of the crystal used. Otherwise, this function may
mbed_official 235:685d5f11838f 981 * have wrong result.
mbed_official 235:685d5f11838f 982 *
mbed_official 235:685d5f11838f 983 * @note The result of this function could be not correct when using fractional
mbed_official 235:685d5f11838f 984 * value for HSE crystal.
mbed_official 235:685d5f11838f 985 *
mbed_official 235:685d5f11838f 986 * @note This function can be used by the user application to compute the
mbed_official 235:685d5f11838f 987 * baudrate for the communication peripherals or configure other parameters.
mbed_official 235:685d5f11838f 988 *
mbed_official 235:685d5f11838f 989 * @note Each time SYSCLK changes, this function must be called to update the
mbed_official 235:685d5f11838f 990 * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 235:685d5f11838f 991 *
mbed_official 235:685d5f11838f 992 *
mbed_official 235:685d5f11838f 993 * @retval SYSCLK frequency
mbed_official 235:685d5f11838f 994 */
mbed_official 532:fe11edbda85c 995 __weak uint32_t HAL_RCC_GetSysClockFreq(void)
mbed_official 235:685d5f11838f 996 {
mbed_official 235:685d5f11838f 997 uint32_t pllm = 0, pllvco = 0, pllp = 0;
mbed_official 235:685d5f11838f 998 uint32_t sysclockfreq = 0;
mbed_official 235:685d5f11838f 999
mbed_official 235:685d5f11838f 1000 /* Get SYSCLK source -------------------------------------------------------*/
mbed_official 235:685d5f11838f 1001 switch (RCC->CFGR & RCC_CFGR_SWS)
mbed_official 235:685d5f11838f 1002 {
mbed_official 235:685d5f11838f 1003 case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */
mbed_official 235:685d5f11838f 1004 {
mbed_official 235:685d5f11838f 1005 sysclockfreq = HSI_VALUE;
mbed_official 235:685d5f11838f 1006 break;
mbed_official 235:685d5f11838f 1007 }
mbed_official 235:685d5f11838f 1008 case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */
mbed_official 235:685d5f11838f 1009 {
mbed_official 235:685d5f11838f 1010 sysclockfreq = HSE_VALUE;
mbed_official 235:685d5f11838f 1011 break;
mbed_official 235:685d5f11838f 1012 }
mbed_official 235:685d5f11838f 1013 case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */
mbed_official 235:685d5f11838f 1014 {
mbed_official 235:685d5f11838f 1015 /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
mbed_official 235:685d5f11838f 1016 SYSCLK = PLL_VCO / PLLP */
mbed_official 235:685d5f11838f 1017 pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
mbed_official 532:fe11edbda85c 1018 if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
mbed_official 235:685d5f11838f 1019 {
mbed_official 235:685d5f11838f 1020 /* HSE used as PLL clock source */
mbed_official 235:685d5f11838f 1021 pllvco = ((HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN)));
mbed_official 235:685d5f11838f 1022 }
mbed_official 235:685d5f11838f 1023 else
mbed_official 235:685d5f11838f 1024 {
mbed_official 235:685d5f11838f 1025 /* HSI used as PLL clock source */
mbed_official 235:685d5f11838f 1026 pllvco = ((HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN)));
mbed_official 235:685d5f11838f 1027 }
mbed_official 235:685d5f11838f 1028 pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> POSITION_VAL(RCC_PLLCFGR_PLLP)) + 1 ) *2);
mbed_official 235:685d5f11838f 1029
mbed_official 235:685d5f11838f 1030 sysclockfreq = pllvco/pllp;
mbed_official 235:685d5f11838f 1031 break;
mbed_official 235:685d5f11838f 1032 }
mbed_official 235:685d5f11838f 1033 default:
mbed_official 235:685d5f11838f 1034 {
mbed_official 235:685d5f11838f 1035 sysclockfreq = HSI_VALUE;
mbed_official 235:685d5f11838f 1036 break;
mbed_official 235:685d5f11838f 1037 }
mbed_official 235:685d5f11838f 1038 }
mbed_official 235:685d5f11838f 1039 return sysclockfreq;
mbed_official 235:685d5f11838f 1040 }
mbed_official 235:685d5f11838f 1041
mbed_official 235:685d5f11838f 1042 /**
mbed_official 235:685d5f11838f 1043 * @brief Returns the HCLK frequency
mbed_official 235:685d5f11838f 1044 * @note Each time HCLK changes, this function must be called to update the
mbed_official 235:685d5f11838f 1045 * right HCLK value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 235:685d5f11838f 1046 *
mbed_official 235:685d5f11838f 1047 * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
mbed_official 235:685d5f11838f 1048 * and updated within this function
mbed_official 235:685d5f11838f 1049 * @retval HCLK frequency
mbed_official 235:685d5f11838f 1050 */
mbed_official 235:685d5f11838f 1051 uint32_t HAL_RCC_GetHCLKFreq(void)
mbed_official 235:685d5f11838f 1052 {
mbed_official 235:685d5f11838f 1053 SystemCoreClock = HAL_RCC_GetSysClockFreq() >> APBAHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> POSITION_VAL(RCC_CFGR_HPRE)];
mbed_official 235:685d5f11838f 1054 return SystemCoreClock;
mbed_official 235:685d5f11838f 1055 }
mbed_official 235:685d5f11838f 1056
mbed_official 235:685d5f11838f 1057 /**
mbed_official 235:685d5f11838f 1058 * @brief Returns the PCLK1 frequency
mbed_official 235:685d5f11838f 1059 * @note Each time PCLK1 changes, this function must be called to update the
mbed_official 235:685d5f11838f 1060 * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 235:685d5f11838f 1061 * @retval PCLK1 frequency
mbed_official 235:685d5f11838f 1062 */
mbed_official 235:685d5f11838f 1063 uint32_t HAL_RCC_GetPCLK1Freq(void)
mbed_official 235:685d5f11838f 1064 {
mbed_official 235:685d5f11838f 1065 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
mbed_official 235:685d5f11838f 1066 return (HAL_RCC_GetHCLKFreq() >> APBAHBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> POSITION_VAL(RCC_CFGR_PPRE1)]);
mbed_official 235:685d5f11838f 1067 }
mbed_official 235:685d5f11838f 1068
mbed_official 235:685d5f11838f 1069 /**
mbed_official 235:685d5f11838f 1070 * @brief Returns the PCLK2 frequency
mbed_official 235:685d5f11838f 1071 * @note Each time PCLK2 changes, this function must be called to update the
mbed_official 235:685d5f11838f 1072 * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 235:685d5f11838f 1073 * @retval PCLK2 frequency
mbed_official 235:685d5f11838f 1074 */
mbed_official 235:685d5f11838f 1075 uint32_t HAL_RCC_GetPCLK2Freq(void)
mbed_official 235:685d5f11838f 1076 {
mbed_official 235:685d5f11838f 1077 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
mbed_official 235:685d5f11838f 1078 return (HAL_RCC_GetHCLKFreq()>> APBAHBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> POSITION_VAL(RCC_CFGR_PPRE2)]);
mbed_official 235:685d5f11838f 1079 }
mbed_official 235:685d5f11838f 1080
mbed_official 235:685d5f11838f 1081 /**
mbed_official 235:685d5f11838f 1082 * @brief Configures the RCC_OscInitStruct according to the internal
mbed_official 235:685d5f11838f 1083 * RCC configuration registers.
mbed_official 235:685d5f11838f 1084 * @param RCC_OscInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official 235:685d5f11838f 1085 * will be configured.
mbed_official 235:685d5f11838f 1086 * @retval None
mbed_official 235:685d5f11838f 1087 */
mbed_official 532:fe11edbda85c 1088 __weak void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
mbed_official 235:685d5f11838f 1089 {
mbed_official 235:685d5f11838f 1090 /* Set all possible values for the Oscillator type parameter ---------------*/
mbed_official 235:685d5f11838f 1091 RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI;
mbed_official 235:685d5f11838f 1092
mbed_official 235:685d5f11838f 1093 /* Get the HSE configuration -----------------------------------------------*/
mbed_official 235:685d5f11838f 1094 if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP)
mbed_official 235:685d5f11838f 1095 {
mbed_official 235:685d5f11838f 1096 RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS;
mbed_official 235:685d5f11838f 1097 }
mbed_official 235:685d5f11838f 1098 else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON)
mbed_official 235:685d5f11838f 1099 {
mbed_official 235:685d5f11838f 1100 RCC_OscInitStruct->HSEState = RCC_HSE_ON;
mbed_official 235:685d5f11838f 1101 }
mbed_official 235:685d5f11838f 1102 else
mbed_official 235:685d5f11838f 1103 {
mbed_official 235:685d5f11838f 1104 RCC_OscInitStruct->HSEState = RCC_HSE_OFF;
mbed_official 235:685d5f11838f 1105 }
mbed_official 235:685d5f11838f 1106
mbed_official 235:685d5f11838f 1107 /* Get the HSI configuration -----------------------------------------------*/
mbed_official 235:685d5f11838f 1108 if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION)
mbed_official 235:685d5f11838f 1109 {
mbed_official 235:685d5f11838f 1110 RCC_OscInitStruct->HSIState = RCC_HSI_ON;
mbed_official 235:685d5f11838f 1111 }
mbed_official 235:685d5f11838f 1112 else
mbed_official 235:685d5f11838f 1113 {
mbed_official 235:685d5f11838f 1114 RCC_OscInitStruct->HSIState = RCC_HSI_OFF;
mbed_official 235:685d5f11838f 1115 }
mbed_official 235:685d5f11838f 1116
mbed_official 235:685d5f11838f 1117 RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR &RCC_CR_HSITRIM) >> POSITION_VAL(RCC_CR_HSITRIM));
mbed_official 235:685d5f11838f 1118
mbed_official 235:685d5f11838f 1119 /* Get the LSE configuration -----------------------------------------------*/
mbed_official 235:685d5f11838f 1120 if((RCC->BDCR &RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP)
mbed_official 235:685d5f11838f 1121 {
mbed_official 235:685d5f11838f 1122 RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS;
mbed_official 235:685d5f11838f 1123 }
mbed_official 235:685d5f11838f 1124 else if((RCC->BDCR &RCC_BDCR_LSEON) == RCC_BDCR_LSEON)
mbed_official 235:685d5f11838f 1125 {
mbed_official 235:685d5f11838f 1126 RCC_OscInitStruct->LSEState = RCC_LSE_ON;
mbed_official 235:685d5f11838f 1127 }
mbed_official 235:685d5f11838f 1128 else
mbed_official 235:685d5f11838f 1129 {
mbed_official 235:685d5f11838f 1130 RCC_OscInitStruct->LSEState = RCC_LSE_OFF;
mbed_official 235:685d5f11838f 1131 }
mbed_official 235:685d5f11838f 1132
mbed_official 235:685d5f11838f 1133 /* Get the LSI configuration -----------------------------------------------*/
mbed_official 235:685d5f11838f 1134 if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION)
mbed_official 235:685d5f11838f 1135 {
mbed_official 235:685d5f11838f 1136 RCC_OscInitStruct->LSIState = RCC_LSI_ON;
mbed_official 235:685d5f11838f 1137 }
mbed_official 235:685d5f11838f 1138 else
mbed_official 235:685d5f11838f 1139 {
mbed_official 235:685d5f11838f 1140 RCC_OscInitStruct->LSIState = RCC_LSI_OFF;
mbed_official 235:685d5f11838f 1141 }
mbed_official 235:685d5f11838f 1142
mbed_official 235:685d5f11838f 1143 /* Get the PLL configuration -----------------------------------------------*/
mbed_official 235:685d5f11838f 1144 if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON)
mbed_official 235:685d5f11838f 1145 {
mbed_official 235:685d5f11838f 1146 RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON;
mbed_official 235:685d5f11838f 1147 }
mbed_official 235:685d5f11838f 1148 else
mbed_official 235:685d5f11838f 1149 {
mbed_official 235:685d5f11838f 1150 RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF;
mbed_official 235:685d5f11838f 1151 }
mbed_official 235:685d5f11838f 1152 RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
mbed_official 235:685d5f11838f 1153 RCC_OscInitStruct->PLL.PLLM = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM);
mbed_official 235:685d5f11838f 1154 RCC_OscInitStruct->PLL.PLLN = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN));
mbed_official 235:685d5f11838f 1155 RCC_OscInitStruct->PLL.PLLP = (uint32_t)((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) + RCC_PLLCFGR_PLLP_0) << 1) >> POSITION_VAL(RCC_PLLCFGR_PLLP));
mbed_official 235:685d5f11838f 1156 RCC_OscInitStruct->PLL.PLLQ = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLQ) >> POSITION_VAL(RCC_PLLCFGR_PLLQ));
mbed_official 235:685d5f11838f 1157 }
mbed_official 235:685d5f11838f 1158
mbed_official 235:685d5f11838f 1159 /**
mbed_official 235:685d5f11838f 1160 * @brief Configures the RCC_ClkInitStruct according to the internal
mbed_official 235:685d5f11838f 1161 * RCC configuration registers.
mbed_official 532:fe11edbda85c 1162 * @param RCC_ClkInitStruct: pointer to an RCC_ClkInitTypeDef structure that
mbed_official 235:685d5f11838f 1163 * will be configured.
mbed_official 235:685d5f11838f 1164 * @param pFLatency: Pointer on the Flash Latency.
mbed_official 235:685d5f11838f 1165 * @retval None
mbed_official 235:685d5f11838f 1166 */
mbed_official 235:685d5f11838f 1167 void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency)
mbed_official 235:685d5f11838f 1168 {
mbed_official 235:685d5f11838f 1169 /* Set all possible values for the Clock type parameter --------------------*/
mbed_official 235:685d5f11838f 1170 RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
mbed_official 235:685d5f11838f 1171
mbed_official 235:685d5f11838f 1172 /* Get the SYSCLK configuration --------------------------------------------*/
mbed_official 235:685d5f11838f 1173 RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
mbed_official 235:685d5f11838f 1174
mbed_official 235:685d5f11838f 1175 /* Get the HCLK configuration ----------------------------------------------*/
mbed_official 235:685d5f11838f 1176 RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE);
mbed_official 235:685d5f11838f 1177
mbed_official 235:685d5f11838f 1178 /* Get the APB1 configuration ----------------------------------------------*/
mbed_official 235:685d5f11838f 1179 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1);
mbed_official 235:685d5f11838f 1180
mbed_official 235:685d5f11838f 1181 /* Get the APB2 configuration ----------------------------------------------*/
mbed_official 235:685d5f11838f 1182 RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3);
mbed_official 235:685d5f11838f 1183
mbed_official 235:685d5f11838f 1184 /* Get the Flash Wait State (Latency) configuration ------------------------*/
mbed_official 235:685d5f11838f 1185 *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
mbed_official 235:685d5f11838f 1186 }
mbed_official 235:685d5f11838f 1187
mbed_official 235:685d5f11838f 1188 /**
mbed_official 235:685d5f11838f 1189 * @brief This function handles the RCC CSS interrupt request.
mbed_official 235:685d5f11838f 1190 * @note This API should be called under the NMI_Handler().
mbed_official 235:685d5f11838f 1191 * @retval None
mbed_official 235:685d5f11838f 1192 */
mbed_official 235:685d5f11838f 1193 void HAL_RCC_NMI_IRQHandler(void)
mbed_official 235:685d5f11838f 1194 {
mbed_official 235:685d5f11838f 1195 /* Check RCC CSSF flag */
mbed_official 235:685d5f11838f 1196 if(__HAL_RCC_GET_IT(RCC_IT_CSS))
mbed_official 235:685d5f11838f 1197 {
mbed_official 235:685d5f11838f 1198 /* RCC Clock Security System interrupt user callback */
mbed_official 532:fe11edbda85c 1199 HAL_RCC_CSSCallback();
mbed_official 235:685d5f11838f 1200
mbed_official 235:685d5f11838f 1201 /* Clear RCC CSS pending bit */
mbed_official 235:685d5f11838f 1202 __HAL_RCC_CLEAR_IT(RCC_IT_CSS);
mbed_official 235:685d5f11838f 1203 }
mbed_official 235:685d5f11838f 1204 }
mbed_official 235:685d5f11838f 1205
mbed_official 235:685d5f11838f 1206 /**
mbed_official 235:685d5f11838f 1207 * @brief RCC Clock Security System interrupt callback
mbed_official 532:fe11edbda85c 1208 * @retval None
mbed_official 235:685d5f11838f 1209 */
mbed_official 532:fe11edbda85c 1210 __weak void HAL_RCC_CSSCallback(void)
mbed_official 235:685d5f11838f 1211 {
mbed_official 235:685d5f11838f 1212 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 532:fe11edbda85c 1213 the HAL_RCC_CSSCallback could be implemented in the user file
mbed_official 235:685d5f11838f 1214 */
mbed_official 235:685d5f11838f 1215 }
mbed_official 235:685d5f11838f 1216
mbed_official 235:685d5f11838f 1217 /**
mbed_official 235:685d5f11838f 1218 * @}
mbed_official 235:685d5f11838f 1219 */
mbed_official 235:685d5f11838f 1220
mbed_official 235:685d5f11838f 1221 /**
mbed_official 235:685d5f11838f 1222 * @}
mbed_official 235:685d5f11838f 1223 */
mbed_official 235:685d5f11838f 1224
mbed_official 235:685d5f11838f 1225 #endif /* HAL_RCC_MODULE_ENABLED */
mbed_official 235:685d5f11838f 1226 /**
mbed_official 235:685d5f11838f 1227 * @}
mbed_official 235:685d5f11838f 1228 */
mbed_official 235:685d5f11838f 1229
mbed_official 235:685d5f11838f 1230 /**
mbed_official 235:685d5f11838f 1231 * @}
mbed_official 235:685d5f11838f 1232 */
mbed_official 235:685d5f11838f 1233
mbed_official 235:685d5f11838f 1234 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/