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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_qspi.c@613:bc40b8d2aec4, 2015-08-20 (annotated)

Committer:
mbed_official
Date:
Thu Aug 20 10:45:13 2015 +0100
Revision:
613:bc40b8d2aec4
Parent:
532:fe11edbda85c 
Synchronized with git revision 92ca8c7b60a283b6bb60eb65b183dac1599f0ade



Full URL: https://github.com/mbedmicro/mbed/commit/92ca8c7b60a283b6bb60eb65b183dac1599f0ade/



Nordic: update application start address in GCC linker script

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UserRevisionLine numberNew contents of line
mbed_official 532:fe11edbda85c 1 /**
mbed_official 532:fe11edbda85c 2 ******************************************************************************
mbed_official 532:fe11edbda85c 3 * @file stm32f4xx_hal_qspi.c
mbed_official 532:fe11edbda85c 4 * @author MCD Application Team
mbed_official 613:bc40b8d2aec4 5 * @version V1.3.2
mbed_official 613:bc40b8d2aec4 6 * @date 26-June-2015
mbed_official 532:fe11edbda85c 7 * @brief QSPI HAL module driver.
mbed_official 532:fe11edbda85c 8 *
mbed_official 532:fe11edbda85c 9 * This file provides firmware functions to manage the following
mbed_official 532:fe11edbda85c 10 * functionalities of the QuadSPI interface (QSPI).
mbed_official 532:fe11edbda85c 11 * + Initialization and de-initialization functions
mbed_official 532:fe11edbda85c 12 * + Indirect functional mode management
mbed_official 532:fe11edbda85c 13 * + Memory-mapped functional mode management
mbed_official 532:fe11edbda85c 14 * + Auto-polling functional mode management
mbed_official 532:fe11edbda85c 15 * + Interrupts and flags management
mbed_official 532:fe11edbda85c 16 * + DMA channel configuration for indirect functional mode
mbed_official 532:fe11edbda85c 17 * + Errors management and abort functionality
mbed_official 532:fe11edbda85c 18 *
mbed_official 532:fe11edbda85c 19 @verbatim
mbed_official 532:fe11edbda85c 20 ===============================================================================
mbed_official 532:fe11edbda85c 21 ##### How to use this driver #####
mbed_official 532:fe11edbda85c 22 ===============================================================================
mbed_official 532:fe11edbda85c 23 [..]
mbed_official 532:fe11edbda85c 24 *** Initialization ***
mbed_official 532:fe11edbda85c 25 ======================
mbed_official 532:fe11edbda85c 26 [..]
mbed_official 532:fe11edbda85c 27 (#) As prerequisite, fill in the HAL_QSPI_MspInit() :
mbed_official 532:fe11edbda85c 28 (+) Enable QuadSPI clock interface with __HAL_RCC_QSPI_CLK_ENABLE().
mbed_official 532:fe11edbda85c 29 (+) Reset QuadSPI IP with __HAL_RCC_QSPI_FORCE_RESET() and __HAL_RCC_QSPI_RELEASE_RESET().
mbed_official 532:fe11edbda85c 30 (+) Enable the clocks for the QuadSPI GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().
mbed_official 532:fe11edbda85c 31 (+) Configure these QuadSPI pins in alternate mode using HAL_GPIO_Init().
mbed_official 532:fe11edbda85c 32 (+) If interrupt mode is used, enable and configure QuadSPI global
mbed_official 532:fe11edbda85c 33 interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
mbed_official 532:fe11edbda85c 34 (+) If DMA mode is used, enable the clocks for the QuadSPI DMA channel
mbed_official 532:fe11edbda85c 35 with __HAL_RCC_DMAx_CLK_ENABLE(), configure DMA with HAL_DMA_Init(),
mbed_official 532:fe11edbda85c 36 link it with QuadSPI handle using __HAL_LINKDMA(), enable and configure
mbed_official 532:fe11edbda85c 37 DMA channel global interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
mbed_official 532:fe11edbda85c 38 (#) Configure the flash size, the clock prescaler, the fifo threshold, the
mbed_official 532:fe11edbda85c 39 clock mode, the sample shifting and the CS high time using the HAL_QSPI_Init() function.
mbed_official 532:fe11edbda85c 40
mbed_official 532:fe11edbda85c 41 *** Indirect functional mode ***
mbed_official 532:fe11edbda85c 42 ================================
mbed_official 532:fe11edbda85c 43 [..]
mbed_official 532:fe11edbda85c 44 (#) Configure the command sequence using the HAL_QSPI_Command() or HAL_QSPI_Command_IT()
mbed_official 532:fe11edbda85c 45 functions :
mbed_official 532:fe11edbda85c 46 (+) Instruction phase : the mode used and if present the instruction opcode.
mbed_official 532:fe11edbda85c 47 (+) Address phase : the mode used and if present the size and the address value.
mbed_official 532:fe11edbda85c 48 (+) Alternate-bytes phase : the mode used and if present the size and the alternate
mbed_official 532:fe11edbda85c 49 bytes values.
mbed_official 532:fe11edbda85c 50 (+) Dummy-cycles phase : the number of dummy cycles (mode used is same as data phase).
mbed_official 532:fe11edbda85c 51 (+) Data phase : the mode used and if present the number of bytes.
mbed_official 532:fe11edbda85c 52 (+) Double Data Rate (DDR) mode : the activation (or not) of this mode and the delay
mbed_official 532:fe11edbda85c 53 if activated.
mbed_official 532:fe11edbda85c 54 (+) Sending Instruction Only Once (SIOO) mode : the activation (or not) of this mode.
mbed_official 532:fe11edbda85c 55 (#) If no data is required for the command, it is sent directly to the memory :
mbed_official 532:fe11edbda85c 56 (+) In polling mode, the output of the function is done when the transfer is complete.
mbed_official 532:fe11edbda85c 57 (+) In interrupt mode, HAL_QSPI_CmdCpltCallback() will be called when the transfer is complete.
mbed_official 532:fe11edbda85c 58 (#) For the indirect write mode, use HAL_QSPI_Transmit(), HAL_QSPI_Transmit_DMA() or
mbed_official 532:fe11edbda85c 59 HAL_QSPI_Transmit_IT() after the command configuration :
mbed_official 532:fe11edbda85c 60 (+) In polling mode, the output of the function is done when the transfer is complete.
mbed_official 532:fe11edbda85c 61 (+) In interrupt mode, HAL_QSPI_FifoThresholdCallback() will be called when the fifo threshold
mbed_official 532:fe11edbda85c 62 is reached and HAL_QSPI_TxCpltCallback() will be called when the transfer is complete.
mbed_official 532:fe11edbda85c 63 (+) In DMA mode, HAL_QSPI_TxHalfCpltCallback() will be called at the half transfer and
mbed_official 532:fe11edbda85c 64 HAL_QSPI_TxCpltCallback() will be called when the transfer is complete.
mbed_official 532:fe11edbda85c 65 (#) For the indirect read mode, use HAL_QSPI_Receive(), HAL_QSPI_Receive_DMA() or
mbed_official 532:fe11edbda85c 66 HAL_QSPI_Receive_IT() after the command configuration :
mbed_official 532:fe11edbda85c 67 (+) In polling mode, the output of the function is done when the transfer is complete.
mbed_official 532:fe11edbda85c 68 (+) In interrupt mode, HAL_QSPI_FifoThresholdCallback() will be called when the fifo threshold
mbed_official 532:fe11edbda85c 69 is reached and HAL_QSPI_RxCpltCallback() will be called when the transfer is complete.
mbed_official 532:fe11edbda85c 70 (+) In DMA mode, HAL_QSPI_RxHalfCpltCallback() will be called at the half transfer and
mbed_official 532:fe11edbda85c 71 HAL_QSPI_RxCpltCallback() will be called when the transfer is complete.
mbed_official 532:fe11edbda85c 72
mbed_official 532:fe11edbda85c 73 *** Auto-polling functional mode ***
mbed_official 532:fe11edbda85c 74 ====================================
mbed_official 532:fe11edbda85c 75 [..]
mbed_official 532:fe11edbda85c 76 (#) Configure the command sequence and the auto-polling functional mode using the
mbed_official 532:fe11edbda85c 77 HAL_QSPI_AutoPolling() or HAL_QSPI_AutoPolling_IT() functions :
mbed_official 532:fe11edbda85c 78 (+) Instruction phase : the mode used and if present the instruction opcode.
mbed_official 532:fe11edbda85c 79 (+) Address phase : the mode used and if present the size and the address value.
mbed_official 532:fe11edbda85c 80 (+) Alternate-bytes phase : the mode used and if present the size and the alternate
mbed_official 532:fe11edbda85c 81 bytes values.
mbed_official 532:fe11edbda85c 82 (+) Dummy-cycles phase : the number of dummy cycles (mode used is same as data phase).
mbed_official 532:fe11edbda85c 83 (+) Data phase : the mode used.
mbed_official 532:fe11edbda85c 84 (+) Double Data Rate (DDR) mode : the activation (or not) of this mode and the delay
mbed_official 532:fe11edbda85c 85 if activated.
mbed_official 532:fe11edbda85c 86 (+) Sending Instruction Only Once (SIOO) mode : the activation (or not) of this mode.
mbed_official 532:fe11edbda85c 87 (+) The size of the status bytes, the match value, the mask used, the match mode (OR/AND),
mbed_official 532:fe11edbda85c 88 the polling interval and the automatic stop activation.
mbed_official 532:fe11edbda85c 89 (#) After the configuration :
mbed_official 532:fe11edbda85c 90 (+) In polling mode, the output of the function is done when the status match is reached. The
mbed_official 532:fe11edbda85c 91 automatic stop is activated to avoid an infinite loop.
mbed_official 532:fe11edbda85c 92 (+) In interrupt mode, HAL_QSPI_StatusMatchCallback() will be called each time the status match is reached.
mbed_official 532:fe11edbda85c 93
mbed_official 532:fe11edbda85c 94 *** Memory-mapped functional mode ***
mbed_official 532:fe11edbda85c 95 =====================================
mbed_official 532:fe11edbda85c 96 [..]
mbed_official 532:fe11edbda85c 97 (#) Configure the command sequence and the memory-mapped functional mode using the
mbed_official 532:fe11edbda85c 98 HAL_QSPI_MemoryMapped() functions :
mbed_official 532:fe11edbda85c 99 (+) Instruction phase : the mode used and if present the instruction opcode.
mbed_official 532:fe11edbda85c 100 (+) Address phase : the mode used and the size.
mbed_official 532:fe11edbda85c 101 (+) Alternate-bytes phase : the mode used and if present the size and the alternate
mbed_official 532:fe11edbda85c 102 bytes values.
mbed_official 532:fe11edbda85c 103 (+) Dummy-cycles phase : the number of dummy cycles (mode used is same as data phase).
mbed_official 532:fe11edbda85c 104 (+) Data phase : the mode used.
mbed_official 532:fe11edbda85c 105 (+) Double Data Rate (DDR) mode : the activation (or not) of this mode and the delay
mbed_official 532:fe11edbda85c 106 if activated.
mbed_official 532:fe11edbda85c 107 (+) Sending Instruction Only Once (SIOO) mode : the activation (or not) of this mode.
mbed_official 532:fe11edbda85c 108 (+) The timeout activation and the timeout period.
mbed_official 532:fe11edbda85c 109 (#) After the configuration, the QuadSPI will be used as soon as an access on the AHB is done on
mbed_official 532:fe11edbda85c 110 the address range. HAL_QSPI_TimeOutCallback() will be called when the timeout expires.
mbed_official 532:fe11edbda85c 111
mbed_official 532:fe11edbda85c 112 *** Errors management and abort functionality ***
mbed_official 532:fe11edbda85c 113 ==================================================
mbed_official 532:fe11edbda85c 114 [..]
mbed_official 532:fe11edbda85c 115 (#) HAL_QSPI_GetError() function gives the error rised during the last operation.
mbed_official 532:fe11edbda85c 116 (#) HAL_QSPI_Abort() function aborts any on-going operation and flushes the fifo.
mbed_official 532:fe11edbda85c 117 (#) HAL_QSPI_GetState() function gives the current state of the HAL QuadSPI driver.
mbed_official 532:fe11edbda85c 118
mbed_official 532:fe11edbda85c 119 *** Workarounds linked to Silicon Limitation ***
mbed_official 532:fe11edbda85c 120 ====================================================
mbed_official 532:fe11edbda85c 121 [..]
mbed_official 532:fe11edbda85c 122 (#) Workarounds Implemented inside HAL Driver
mbed_official 532:fe11edbda85c 123 (+) Extra data written in the FIFO at the end of a read transfer
mbed_official 532:fe11edbda85c 124
mbed_official 532:fe11edbda85c 125 @endverbatim
mbed_official 532:fe11edbda85c 126 ******************************************************************************
mbed_official 532:fe11edbda85c 127 * @attention
mbed_official 532:fe11edbda85c 128 *
mbed_official 532:fe11edbda85c 129 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 532:fe11edbda85c 130 *
mbed_official 532:fe11edbda85c 131 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 532:fe11edbda85c 132 * are permitted provided that the following conditions are met:
mbed_official 532:fe11edbda85c 133 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 532:fe11edbda85c 134 * this list of conditions and the following disclaimer.
mbed_official 532:fe11edbda85c 135 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 532:fe11edbda85c 136 * this list of conditions and the following disclaimer in the documentation
mbed_official 532:fe11edbda85c 137 * and/or other materials provided with the distribution.
mbed_official 532:fe11edbda85c 138 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 532:fe11edbda85c 139 * may be used to endorse or promote products derived from this software
mbed_official 532:fe11edbda85c 140 * without specific prior written permission.
mbed_official 532:fe11edbda85c 141 *
mbed_official 532:fe11edbda85c 142 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 532:fe11edbda85c 143 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 532:fe11edbda85c 144 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 532:fe11edbda85c 145 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 532:fe11edbda85c 146 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 532:fe11edbda85c 147 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 532:fe11edbda85c 148 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 532:fe11edbda85c 149 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 532:fe11edbda85c 150 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 532:fe11edbda85c 151 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 532:fe11edbda85c 152 *
mbed_official 532:fe11edbda85c 153 ******************************************************************************
mbed_official 532:fe11edbda85c 154 */
mbed_official 532:fe11edbda85c 155
mbed_official 532:fe11edbda85c 156 /* Includes ------------------------------------------------------------------*/
mbed_official 532:fe11edbda85c 157 #include "stm32f4xx_hal.h"
mbed_official 532:fe11edbda85c 158
mbed_official 532:fe11edbda85c 159 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 532:fe11edbda85c 160 * @{
mbed_official 532:fe11edbda85c 161 */
mbed_official 532:fe11edbda85c 162
mbed_official 532:fe11edbda85c 163 /** @defgroup QSPI QSPI
mbed_official 532:fe11edbda85c 164 * @brief HAL QSPI module driver
mbed_official 532:fe11edbda85c 165 * @{
mbed_official 532:fe11edbda85c 166 */
mbed_official 532:fe11edbda85c 167 #ifdef HAL_QSPI_MODULE_ENABLED
mbed_official 532:fe11edbda85c 168
mbed_official 532:fe11edbda85c 169 #if defined(STM32F446xx)
mbed_official 532:fe11edbda85c 170
mbed_official 532:fe11edbda85c 171 /* Private typedef -----------------------------------------------------------*/
mbed_official 532:fe11edbda85c 172 /* Private define ------------------------------------------------------------*/
mbed_official 532:fe11edbda85c 173 /** @addtogroup QSPI_Private_Constants
mbed_official 532:fe11edbda85c 174 * @{
mbed_official 532:fe11edbda85c 175 */
mbed_official 532:fe11edbda85c 176 #define QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE ((uint32_t)0x00000000) /*!<Indirect write mode*/
mbed_official 532:fe11edbda85c 177 #define QSPI_FUNCTIONAL_MODE_INDIRECT_READ ((uint32_t)QUADSPI_CCR_FMODE_0) /*!<Indirect read mode*/
mbed_official 532:fe11edbda85c 178 #define QSPI_FUNCTIONAL_MODE_AUTO_POLLING ((uint32_t)QUADSPI_CCR_FMODE_1) /*!<Automatic polling mode*/
mbed_official 532:fe11edbda85c 179 #define QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED ((uint32_t)QUADSPI_CCR_FMODE) /*!<Memory-mapped mode*/
mbed_official 532:fe11edbda85c 180 /**
mbed_official 532:fe11edbda85c 181 * @}
mbed_official 532:fe11edbda85c 182 */
mbed_official 532:fe11edbda85c 183
mbed_official 532:fe11edbda85c 184 /* Private macro -------------------------------------------------------------*/
mbed_official 532:fe11edbda85c 185 /** @addtogroup QSPI_Private_Macros QSPI Private Macros
mbed_official 532:fe11edbda85c 186 * @{
mbed_official 532:fe11edbda85c 187 */
mbed_official 532:fe11edbda85c 188 #define IS_QSPI_FUNCTIONAL_MODE(MODE) (((MODE) == QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE) || \
mbed_official 532:fe11edbda85c 189 ((MODE) == QSPI_FUNCTIONAL_MODE_INDIRECT_READ) || \
mbed_official 532:fe11edbda85c 190 ((MODE) == QSPI_FUNCTIONAL_MODE_AUTO_POLLING) || \
mbed_official 532:fe11edbda85c 191 ((MODE) == QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED))
mbed_official 532:fe11edbda85c 192 /**
mbed_official 532:fe11edbda85c 193 * @}
mbed_official 532:fe11edbda85c 194 */
mbed_official 532:fe11edbda85c 195
mbed_official 532:fe11edbda85c 196 /* Private variables ---------------------------------------------------------*/
mbed_official 532:fe11edbda85c 197 /* Private function prototypes -----------------------------------------------*/
mbed_official 532:fe11edbda85c 198 /** @addtogroup QSPI_Private_Functions QSPI Private Functions
mbed_official 532:fe11edbda85c 199 * @{
mbed_official 532:fe11edbda85c 200 */
mbed_official 532:fe11edbda85c 201 static void QSPI_DMARxCplt(DMA_HandleTypeDef *hdma);
mbed_official 532:fe11edbda85c 202 static void QSPI_DMATxCplt(DMA_HandleTypeDef *hdma);
mbed_official 532:fe11edbda85c 203 static void QSPI_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
mbed_official 532:fe11edbda85c 204 static void QSPI_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
mbed_official 532:fe11edbda85c 205 static void QSPI_DMAError(DMA_HandleTypeDef *hdma);
mbed_official 532:fe11edbda85c 206 static HAL_StatusTypeDef QSPI_WaitFlagStateUntilTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Flag, FlagStatus State, uint32_t Timeout);
mbed_official 532:fe11edbda85c 207 static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t FunctionalMode);
mbed_official 532:fe11edbda85c 208 /**
mbed_official 532:fe11edbda85c 209 * @}
mbed_official 532:fe11edbda85c 210 */
mbed_official 532:fe11edbda85c 211
mbed_official 532:fe11edbda85c 212 /* Exported functions ---------------------------------------------------------*/
mbed_official 532:fe11edbda85c 213
mbed_official 532:fe11edbda85c 214 /** @defgroup QSPI_Exported_Functions QSPI Exported Functions
mbed_official 532:fe11edbda85c 215 * @{
mbed_official 532:fe11edbda85c 216 */
mbed_official 532:fe11edbda85c 217
mbed_official 532:fe11edbda85c 218 /** @defgroup QSPI_Exported_Functions_Group1 Initialization/de-initialization functions
mbed_official 532:fe11edbda85c 219 * @brief Initialization and Configuration functions
mbed_official 532:fe11edbda85c 220 *
mbed_official 532:fe11edbda85c 221 @verbatim
mbed_official 532:fe11edbda85c 222 ===============================================================================
mbed_official 532:fe11edbda85c 223 ##### Initialization and Configuration functions #####
mbed_official 532:fe11edbda85c 224 ===============================================================================
mbed_official 532:fe11edbda85c 225 [..]
mbed_official 532:fe11edbda85c 226 This subsection provides a set of functions allowing to :
mbed_official 532:fe11edbda85c 227 (+) Initialize the QuadSPI.
mbed_official 532:fe11edbda85c 228 (+) De-initialize the QuadSPI.
mbed_official 532:fe11edbda85c 229
mbed_official 532:fe11edbda85c 230 @endverbatim
mbed_official 532:fe11edbda85c 231 * @{
mbed_official 532:fe11edbda85c 232 */
mbed_official 532:fe11edbda85c 233
mbed_official 532:fe11edbda85c 234 /**
mbed_official 532:fe11edbda85c 235 * @brief Initializes the QSPI mode according to the specified parameters
mbed_official 532:fe11edbda85c 236 * in the QSPI_InitTypeDef and creates the associated handle.
mbed_official 532:fe11edbda85c 237 * @param hqspi: qspi handle
mbed_official 532:fe11edbda85c 238 * @retval HAL status
mbed_official 532:fe11edbda85c 239 */
mbed_official 532:fe11edbda85c 240 HAL_StatusTypeDef HAL_QSPI_Init(QSPI_HandleTypeDef *hqspi)
mbed_official 532:fe11edbda85c 241 {
mbed_official 532:fe11edbda85c 242 HAL_StatusTypeDef status = HAL_ERROR;
mbed_official 532:fe11edbda85c 243
mbed_official 532:fe11edbda85c 244 /* Check the QSPI handle allocation */
mbed_official 532:fe11edbda85c 245 if(hqspi == NULL)
mbed_official 532:fe11edbda85c 246 {
mbed_official 532:fe11edbda85c 247 return HAL_ERROR;
mbed_official 532:fe11edbda85c 248 }
mbed_official 532:fe11edbda85c 249
mbed_official 532:fe11edbda85c 250 /* Check the parameters */
mbed_official 532:fe11edbda85c 251 assert_param(IS_QSPI_ALL_INSTANCE(hqspi->Instance));
mbed_official 532:fe11edbda85c 252 assert_param(IS_QSPI_CLOCK_PRESCALER(hqspi->Init.ClockPrescaler));
mbed_official 532:fe11edbda85c 253 assert_param(IS_QSPI_FIFO_THRESHOLD(hqspi->Init.FifoThreshold));
mbed_official 532:fe11edbda85c 254 assert_param(IS_QSPI_SSHIFT(hqspi->Init.SampleShifting));
mbed_official 532:fe11edbda85c 255 assert_param(IS_QSPI_FLASH_SIZE(hqspi->Init.FlashSize));
mbed_official 532:fe11edbda85c 256 assert_param(IS_QSPI_CS_HIGH_TIME(hqspi->Init.ChipSelectHighTime));
mbed_official 532:fe11edbda85c 257 assert_param(IS_QSPI_CLOCK_MODE(hqspi->Init.ClockMode));
mbed_official 532:fe11edbda85c 258 assert_param(IS_QSPI_DUAL_FLASH_MODE(hqspi->Init.DualFlash));
mbed_official 532:fe11edbda85c 259
mbed_official 532:fe11edbda85c 260 if (hqspi->Init.DualFlash != QSPI_DUALFLASH_ENABLE )
mbed_official 532:fe11edbda85c 261 {
mbed_official 532:fe11edbda85c 262 assert_param(IS_QSPI_FLASH_ID(hqspi->Init.FlashID));
mbed_official 532:fe11edbda85c 263 }
mbed_official 532:fe11edbda85c 264
mbed_official 532:fe11edbda85c 265 /* Process locked */
mbed_official 532:fe11edbda85c 266 __HAL_LOCK(hqspi);
mbed_official 532:fe11edbda85c 267
mbed_official 532:fe11edbda85c 268 if(hqspi->State == HAL_QSPI_STATE_RESET)
mbed_official 532:fe11edbda85c 269 {
mbed_official 532:fe11edbda85c 270 /* Allocate lock resource and initialize it */
mbed_official 532:fe11edbda85c 271 hqspi->Lock = HAL_UNLOCKED;
mbed_official 532:fe11edbda85c 272
mbed_official 532:fe11edbda85c 273 /* Init the low level hardware : GPIO, CLOCK */
mbed_official 532:fe11edbda85c 274 HAL_QSPI_MspInit(hqspi);
mbed_official 532:fe11edbda85c 275
mbed_official 532:fe11edbda85c 276 /* Configure the default timeout for the QSPI memory access */
mbed_official 532:fe11edbda85c 277 HAL_QSPI_SetTimeout(hqspi, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);
mbed_official 532:fe11edbda85c 278 }
mbed_official 532:fe11edbda85c 279
mbed_official 532:fe11edbda85c 280 /* Configure QSPI FIFO Threshold */
mbed_official 532:fe11edbda85c 281 MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_FTHRES, ((hqspi->Init.FifoThreshold - 1) << 8));
mbed_official 532:fe11edbda85c 282
mbed_official 532:fe11edbda85c 283 /* Wait till BUSY flag reset */
mbed_official 532:fe11edbda85c 284 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, hqspi->Timeout);
mbed_official 532:fe11edbda85c 285
mbed_official 532:fe11edbda85c 286 if(status == HAL_OK)
mbed_official 532:fe11edbda85c 287 {
mbed_official 532:fe11edbda85c 288
mbed_official 532:fe11edbda85c 289 /* Configure QSPI Clock Prescaler and Sample Shift */
mbed_official 532:fe11edbda85c 290 MODIFY_REG(hqspi->Instance->CR,(QUADSPI_CR_PRESCALER | QUADSPI_CR_SSHIFT | QUADSPI_CR_FSEL | QUADSPI_CR_DFM), ((hqspi->Init.ClockPrescaler << 24)| hqspi->Init.SampleShifting | hqspi->Init.FlashID| hqspi->Init.DualFlash ));
mbed_official 532:fe11edbda85c 291
mbed_official 532:fe11edbda85c 292 /* Configure QSPI Flash Size, CS High Time and Clock Mode */
mbed_official 532:fe11edbda85c 293 MODIFY_REG(hqspi->Instance->DCR, (QUADSPI_DCR_FSIZE | QUADSPI_DCR_CSHT | QUADSPI_DCR_CKMODE),
mbed_official 532:fe11edbda85c 294 ((hqspi->Init.FlashSize << 16) | hqspi->Init.ChipSelectHighTime | hqspi->Init.ClockMode));
mbed_official 532:fe11edbda85c 295
mbed_official 532:fe11edbda85c 296 /* Enable the QSPI peripheral */
mbed_official 532:fe11edbda85c 297 __HAL_QSPI_ENABLE(hqspi);
mbed_official 532:fe11edbda85c 298
mbed_official 532:fe11edbda85c 299 /* Set QSPI error code to none */
mbed_official 532:fe11edbda85c 300 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 532:fe11edbda85c 301
mbed_official 532:fe11edbda85c 302 /* Initialize the QSPI state */
mbed_official 532:fe11edbda85c 303 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 532:fe11edbda85c 304 }
mbed_official 532:fe11edbda85c 305
mbed_official 532:fe11edbda85c 306 /* Release Lock */
mbed_official 532:fe11edbda85c 307 __HAL_UNLOCK(hqspi);
mbed_official 532:fe11edbda85c 308
mbed_official 532:fe11edbda85c 309 /* Return function status */
mbed_official 532:fe11edbda85c 310 return status;
mbed_official 532:fe11edbda85c 311 }
mbed_official 532:fe11edbda85c 312
mbed_official 532:fe11edbda85c 313 /**
mbed_official 532:fe11edbda85c 314 * @brief DeInitializes the QSPI peripheral
mbed_official 532:fe11edbda85c 315 * @param hqspi: qspi handle
mbed_official 532:fe11edbda85c 316 * @retval HAL status
mbed_official 532:fe11edbda85c 317 */
mbed_official 532:fe11edbda85c 318 HAL_StatusTypeDef HAL_QSPI_DeInit(QSPI_HandleTypeDef *hqspi)
mbed_official 532:fe11edbda85c 319 {
mbed_official 532:fe11edbda85c 320 /* Check the QSPI handle allocation */
mbed_official 532:fe11edbda85c 321 if(hqspi == NULL)
mbed_official 532:fe11edbda85c 322 {
mbed_official 532:fe11edbda85c 323 return HAL_ERROR;
mbed_official 532:fe11edbda85c 324 }
mbed_official 532:fe11edbda85c 325
mbed_official 532:fe11edbda85c 326 /* Process locked */
mbed_official 532:fe11edbda85c 327 __HAL_LOCK(hqspi);
mbed_official 532:fe11edbda85c 328
mbed_official 532:fe11edbda85c 329 /* Disable the QSPI Peripheral Clock */
mbed_official 532:fe11edbda85c 330 __HAL_QSPI_DISABLE(hqspi);
mbed_official 532:fe11edbda85c 331
mbed_official 532:fe11edbda85c 332 /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
mbed_official 532:fe11edbda85c 333 HAL_QSPI_MspDeInit(hqspi);
mbed_official 532:fe11edbda85c 334
mbed_official 532:fe11edbda85c 335 /* Set QSPI error code to none */
mbed_official 532:fe11edbda85c 336 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 532:fe11edbda85c 337
mbed_official 532:fe11edbda85c 338 /* Initialize the QSPI state */
mbed_official 532:fe11edbda85c 339 hqspi->State = HAL_QSPI_STATE_RESET;
mbed_official 532:fe11edbda85c 340
mbed_official 532:fe11edbda85c 341 /* Release Lock */
mbed_official 532:fe11edbda85c 342 __HAL_UNLOCK(hqspi);
mbed_official 532:fe11edbda85c 343
mbed_official 532:fe11edbda85c 344 return HAL_OK;
mbed_official 532:fe11edbda85c 345 }
mbed_official 532:fe11edbda85c 346
mbed_official 532:fe11edbda85c 347 /**
mbed_official 532:fe11edbda85c 348 * @brief QSPI MSP Init
mbed_official 532:fe11edbda85c 349 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 350 * @retval None
mbed_official 532:fe11edbda85c 351 */
mbed_official 532:fe11edbda85c 352 __weak void HAL_QSPI_MspInit(QSPI_HandleTypeDef *hqspi)
mbed_official 532:fe11edbda85c 353 {
mbed_official 532:fe11edbda85c 354 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 532:fe11edbda85c 355 the HAL_QSPI_MspInit can be implemented in the user file
mbed_official 532:fe11edbda85c 356 */
mbed_official 532:fe11edbda85c 357 }
mbed_official 532:fe11edbda85c 358
mbed_official 532:fe11edbda85c 359 /**
mbed_official 532:fe11edbda85c 360 * @brief QSPI MSP DeInit
mbed_official 532:fe11edbda85c 361 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 362 * @retval None
mbed_official 532:fe11edbda85c 363 */
mbed_official 532:fe11edbda85c 364 __weak void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef *hqspi)
mbed_official 532:fe11edbda85c 365 {
mbed_official 532:fe11edbda85c 366 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 532:fe11edbda85c 367 the HAL_QSPI_MspDeInit can be implemented in the user file
mbed_official 532:fe11edbda85c 368 */
mbed_official 532:fe11edbda85c 369 }
mbed_official 532:fe11edbda85c 370
mbed_official 532:fe11edbda85c 371 /**
mbed_official 532:fe11edbda85c 372 * @}
mbed_official 532:fe11edbda85c 373 */
mbed_official 532:fe11edbda85c 374
mbed_official 532:fe11edbda85c 375 /** @defgroup QSPI_Exported_Functions_Group2 IO operation functions
mbed_official 532:fe11edbda85c 376 * @brief QSPI Transmit/Receive functions
mbed_official 532:fe11edbda85c 377 *
mbed_official 532:fe11edbda85c 378 @verbatim
mbed_official 532:fe11edbda85c 379 ===============================================================================
mbed_official 532:fe11edbda85c 380 ##### I/O operation functions #####
mbed_official 532:fe11edbda85c 381 ===============================================================================
mbed_official 532:fe11edbda85c 382 [..]
mbed_official 532:fe11edbda85c 383 This subsection provides a set of functions allowing to :
mbed_official 532:fe11edbda85c 384 (+) Handle the interrupts.
mbed_official 532:fe11edbda85c 385 (+) Handle the command sequence.
mbed_official 532:fe11edbda85c 386 (+) Transmit data in blocking, interrupt or DMA mode.
mbed_official 532:fe11edbda85c 387 (+) Receive data in blocking, interrupt or DMA mode.
mbed_official 532:fe11edbda85c 388 (+) Manage the auto-polling functional mode.
mbed_official 532:fe11edbda85c 389 (+) Manage the memory-mapped functional mode.
mbed_official 532:fe11edbda85c 390
mbed_official 532:fe11edbda85c 391 @endverbatim
mbed_official 532:fe11edbda85c 392 * @{
mbed_official 532:fe11edbda85c 393 */
mbed_official 532:fe11edbda85c 394
mbed_official 532:fe11edbda85c 395 /**
mbed_official 532:fe11edbda85c 396 * @brief This function handles QSPI interrupt request.
mbed_official 532:fe11edbda85c 397 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 398 * @retval None.
mbed_official 532:fe11edbda85c 399 */
mbed_official 532:fe11edbda85c 400 void HAL_QSPI_IRQHandler(QSPI_HandleTypeDef *hqspi)
mbed_official 532:fe11edbda85c 401 {
mbed_official 532:fe11edbda85c 402 __IO uint32_t *data_reg;
mbed_official 532:fe11edbda85c 403 uint32_t flag = 0, itsource = 0;
mbed_official 532:fe11edbda85c 404
mbed_official 532:fe11edbda85c 405 /* QSPI FIFO Threshold interrupt occurred ----------------------------------*/
mbed_official 532:fe11edbda85c 406 flag = __HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT);
mbed_official 532:fe11edbda85c 407 itsource = __HAL_QSPI_GET_IT_SOURCE(hqspi, QSPI_IT_FT);
mbed_official 532:fe11edbda85c 408
mbed_official 532:fe11edbda85c 409 if((flag != RESET) && (itsource != RESET))
mbed_official 532:fe11edbda85c 410 {
mbed_official 532:fe11edbda85c 411 data_reg = &hqspi->Instance->DR;
mbed_official 532:fe11edbda85c 412
mbed_official 532:fe11edbda85c 413 if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX)
mbed_official 532:fe11edbda85c 414 {
mbed_official 532:fe11edbda85c 415 /* Transmission process */
mbed_official 532:fe11edbda85c 416 while(__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT) != 0)
mbed_official 532:fe11edbda85c 417 {
mbed_official 532:fe11edbda85c 418 if (hqspi->TxXferCount > 0)
mbed_official 532:fe11edbda85c 419 {
mbed_official 532:fe11edbda85c 420 /* Fill the FIFO until it is full */
mbed_official 532:fe11edbda85c 421 *(__IO uint8_t *)data_reg = *hqspi->pTxBuffPtr++;
mbed_official 532:fe11edbda85c 422 hqspi->TxXferCount--;
mbed_official 532:fe11edbda85c 423 }
mbed_official 532:fe11edbda85c 424 else
mbed_official 532:fe11edbda85c 425 {
mbed_official 532:fe11edbda85c 426 /* No more data available for the transfer */
mbed_official 532:fe11edbda85c 427 break;
mbed_official 532:fe11edbda85c 428 }
mbed_official 532:fe11edbda85c 429 }
mbed_official 532:fe11edbda85c 430 }
mbed_official 532:fe11edbda85c 431 else if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_RX)
mbed_official 532:fe11edbda85c 432 {
mbed_official 532:fe11edbda85c 433 /* Receiving Process */
mbed_official 532:fe11edbda85c 434 while(__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT) != 0)
mbed_official 532:fe11edbda85c 435 {
mbed_official 532:fe11edbda85c 436 if (hqspi->RxXferCount > 0)
mbed_official 532:fe11edbda85c 437 {
mbed_official 532:fe11edbda85c 438 /* Read the FIFO until it is empty */
mbed_official 532:fe11edbda85c 439 *hqspi->pRxBuffPtr++ = *(__IO uint8_t *)data_reg;
mbed_official 532:fe11edbda85c 440 hqspi->RxXferCount--;
mbed_official 532:fe11edbda85c 441 }
mbed_official 532:fe11edbda85c 442 else
mbed_official 532:fe11edbda85c 443 {
mbed_official 532:fe11edbda85c 444 /* All data have been received for the transfer */
mbed_official 532:fe11edbda85c 445 break;
mbed_official 532:fe11edbda85c 446 }
mbed_official 532:fe11edbda85c 447 }
mbed_official 532:fe11edbda85c 448 }
mbed_official 532:fe11edbda85c 449
mbed_official 532:fe11edbda85c 450 /* FIFO Threshold callback */
mbed_official 532:fe11edbda85c 451 HAL_QSPI_FifoThresholdCallback(hqspi);
mbed_official 532:fe11edbda85c 452 }
mbed_official 532:fe11edbda85c 453
mbed_official 532:fe11edbda85c 454 /* QSPI Transfer Complete interrupt occurred -------------------------------*/
mbed_official 532:fe11edbda85c 455 flag = __HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 532:fe11edbda85c 456 itsource = __HAL_QSPI_GET_IT_SOURCE(hqspi, QSPI_IT_TC);
mbed_official 532:fe11edbda85c 457
mbed_official 532:fe11edbda85c 458 if((flag != RESET) && (itsource != RESET))
mbed_official 532:fe11edbda85c 459 {
mbed_official 532:fe11edbda85c 460 /* Clear interrupt */
mbed_official 532:fe11edbda85c 461 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 532:fe11edbda85c 462
mbed_official 532:fe11edbda85c 463 /* Disable the QSPI FIFO Threshold, Transfer Error and Transfer complete Interrupts */
mbed_official 532:fe11edbda85c 464 __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_TC | QSPI_IT_TE | QSPI_IT_FT);
mbed_official 532:fe11edbda85c 465
mbed_official 532:fe11edbda85c 466 /* Transfer complete callback */
mbed_official 532:fe11edbda85c 467 if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX)
mbed_official 532:fe11edbda85c 468 {
mbed_official 532:fe11edbda85c 469 /* Clear Busy bit */
mbed_official 532:fe11edbda85c 470 HAL_QSPI_Abort(hqspi);
mbed_official 532:fe11edbda85c 471
mbed_official 532:fe11edbda85c 472 /* TX Complete callback */
mbed_official 532:fe11edbda85c 473 HAL_QSPI_TxCpltCallback(hqspi);
mbed_official 532:fe11edbda85c 474 }
mbed_official 532:fe11edbda85c 475 else if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_RX)
mbed_official 532:fe11edbda85c 476 {
mbed_official 532:fe11edbda85c 477 data_reg = &hqspi->Instance->DR;
mbed_official 532:fe11edbda85c 478 while(READ_BIT(hqspi->Instance->SR, QUADSPI_SR_FLEVEL) != 0)
mbed_official 532:fe11edbda85c 479 {
mbed_official 532:fe11edbda85c 480 if (hqspi->RxXferCount > 0)
mbed_official 532:fe11edbda85c 481 {
mbed_official 532:fe11edbda85c 482 /* Read the last data received in the FIFO until it is empty */
mbed_official 532:fe11edbda85c 483 *hqspi->pRxBuffPtr++ = *(__IO uint8_t *)data_reg;
mbed_official 532:fe11edbda85c 484 hqspi->RxXferCount--;
mbed_official 532:fe11edbda85c 485 }
mbed_official 532:fe11edbda85c 486 else
mbed_official 532:fe11edbda85c 487 {
mbed_official 532:fe11edbda85c 488 /* All data have been received for the transfer */
mbed_official 532:fe11edbda85c 489 break;
mbed_official 532:fe11edbda85c 490 }
mbed_official 532:fe11edbda85c 491 }
mbed_official 532:fe11edbda85c 492
mbed_official 532:fe11edbda85c 493 /* Workaround - Extra data written in the FIFO at the end of a read transfer */
mbed_official 532:fe11edbda85c 494 HAL_QSPI_Abort(hqspi);
mbed_official 532:fe11edbda85c 495
mbed_official 532:fe11edbda85c 496 /* RX Complete callback */
mbed_official 532:fe11edbda85c 497 HAL_QSPI_RxCpltCallback(hqspi);
mbed_official 532:fe11edbda85c 498 }
mbed_official 532:fe11edbda85c 499 else if(hqspi->State == HAL_QSPI_STATE_BUSY)
mbed_official 532:fe11edbda85c 500 {
mbed_official 532:fe11edbda85c 501 /* Command Complete callback */
mbed_official 532:fe11edbda85c 502 HAL_QSPI_CmdCpltCallback(hqspi);
mbed_official 532:fe11edbda85c 503 }
mbed_official 532:fe11edbda85c 504
mbed_official 532:fe11edbda85c 505 /* Change state of QSPI */
mbed_official 532:fe11edbda85c 506 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 532:fe11edbda85c 507 }
mbed_official 532:fe11edbda85c 508
mbed_official 532:fe11edbda85c 509 /* QSPI Status Match interrupt occurred ------------------------------------*/
mbed_official 532:fe11edbda85c 510 flag = __HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_SM);
mbed_official 532:fe11edbda85c 511 itsource = __HAL_QSPI_GET_IT_SOURCE(hqspi, QSPI_IT_SM);
mbed_official 532:fe11edbda85c 512
mbed_official 532:fe11edbda85c 513 if((flag != RESET) && (itsource != RESET))
mbed_official 532:fe11edbda85c 514 {
mbed_official 532:fe11edbda85c 515 /* Clear interrupt */
mbed_official 532:fe11edbda85c 516 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_SM);
mbed_official 532:fe11edbda85c 517
mbed_official 532:fe11edbda85c 518 /* Check if the automatic poll mode stop is activated */
mbed_official 532:fe11edbda85c 519 if(READ_BIT(hqspi->Instance->CR, QUADSPI_CR_APMS) != 0)
mbed_official 532:fe11edbda85c 520 {
mbed_official 532:fe11edbda85c 521 /* Disable the QSPI FIFO Threshold, Transfer Error and Status Match Interrupts */
mbed_official 532:fe11edbda85c 522 __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_SM | QSPI_IT_FT | QSPI_IT_TE);
mbed_official 532:fe11edbda85c 523
mbed_official 532:fe11edbda85c 524 /* Change state of QSPI */
mbed_official 532:fe11edbda85c 525 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 532:fe11edbda85c 526 }
mbed_official 532:fe11edbda85c 527
mbed_official 532:fe11edbda85c 528 /* Status match callback */
mbed_official 532:fe11edbda85c 529 HAL_QSPI_StatusMatchCallback(hqspi);
mbed_official 532:fe11edbda85c 530 }
mbed_official 532:fe11edbda85c 531
mbed_official 532:fe11edbda85c 532 /* QSPI Transfer Error interrupt occurred ----------------------------------*/
mbed_official 532:fe11edbda85c 533 flag = __HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_TE);
mbed_official 532:fe11edbda85c 534 itsource = __HAL_QSPI_GET_IT_SOURCE(hqspi, QSPI_IT_TE);
mbed_official 532:fe11edbda85c 535
mbed_official 532:fe11edbda85c 536 if((flag != RESET) && (itsource != RESET))
mbed_official 532:fe11edbda85c 537 {
mbed_official 532:fe11edbda85c 538 /* Clear interrupt */
mbed_official 532:fe11edbda85c 539 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TE);
mbed_official 532:fe11edbda85c 540
mbed_official 532:fe11edbda85c 541 /* Disable all the QSPI Interrupts */
mbed_official 532:fe11edbda85c 542 __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_SM | QSPI_IT_TC | QSPI_IT_TE | QSPI_IT_FT);
mbed_official 532:fe11edbda85c 543
mbed_official 532:fe11edbda85c 544 /* Set error code */
mbed_official 532:fe11edbda85c 545 hqspi->ErrorCode |= HAL_QSPI_ERROR_TRANSFER;
mbed_official 532:fe11edbda85c 546
mbed_official 532:fe11edbda85c 547 /* Change state of QSPI */
mbed_official 532:fe11edbda85c 548 hqspi->State = HAL_QSPI_STATE_ERROR;
mbed_official 532:fe11edbda85c 549
mbed_official 532:fe11edbda85c 550 /* Error callback */
mbed_official 532:fe11edbda85c 551 HAL_QSPI_ErrorCallback(hqspi);
mbed_official 532:fe11edbda85c 552 }
mbed_official 532:fe11edbda85c 553
mbed_official 532:fe11edbda85c 554 /* QSPI Time out interrupt occurred -----------------------------------------*/
mbed_official 532:fe11edbda85c 555 flag = __HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_TO);
mbed_official 532:fe11edbda85c 556 itsource = __HAL_QSPI_GET_IT_SOURCE(hqspi, QSPI_IT_TO);
mbed_official 532:fe11edbda85c 557
mbed_official 532:fe11edbda85c 558 if((flag != RESET) && (itsource != RESET))
mbed_official 532:fe11edbda85c 559 {
mbed_official 532:fe11edbda85c 560 /* Clear interrupt */
mbed_official 532:fe11edbda85c 561 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TO);
mbed_official 532:fe11edbda85c 562
mbed_official 532:fe11edbda85c 563 /* Time out callback */
mbed_official 532:fe11edbda85c 564 HAL_QSPI_TimeOutCallback(hqspi);
mbed_official 532:fe11edbda85c 565 }
mbed_official 532:fe11edbda85c 566 }
mbed_official 532:fe11edbda85c 567
mbed_official 532:fe11edbda85c 568 /**
mbed_official 532:fe11edbda85c 569 * @brief Sets the command configuration.
mbed_official 532:fe11edbda85c 570 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 571 * @param cmd : structure that contains the command configuration information
mbed_official 532:fe11edbda85c 572 * @param Timeout : Time out duration
mbed_official 532:fe11edbda85c 573 * @note This function is used only in Indirect Read or Write Modes
mbed_official 532:fe11edbda85c 574 * @retval HAL status
mbed_official 532:fe11edbda85c 575 */
mbed_official 532:fe11edbda85c 576 HAL_StatusTypeDef HAL_QSPI_Command(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t Timeout)
mbed_official 532:fe11edbda85c 577 {
mbed_official 532:fe11edbda85c 578 HAL_StatusTypeDef status = HAL_ERROR;
mbed_official 532:fe11edbda85c 579
mbed_official 532:fe11edbda85c 580 /* Check the parameters */
mbed_official 532:fe11edbda85c 581 assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode));
mbed_official 532:fe11edbda85c 582 if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
mbed_official 532:fe11edbda85c 583 {
mbed_official 532:fe11edbda85c 584 assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction));
mbed_official 532:fe11edbda85c 585 }
mbed_official 532:fe11edbda85c 586
mbed_official 532:fe11edbda85c 587 assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode));
mbed_official 532:fe11edbda85c 588 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 532:fe11edbda85c 589 {
mbed_official 532:fe11edbda85c 590 assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize));
mbed_official 532:fe11edbda85c 591 }
mbed_official 532:fe11edbda85c 592
mbed_official 532:fe11edbda85c 593 assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode));
mbed_official 532:fe11edbda85c 594 if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
mbed_official 532:fe11edbda85c 595 {
mbed_official 532:fe11edbda85c 596 assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize));
mbed_official 532:fe11edbda85c 597 }
mbed_official 532:fe11edbda85c 598
mbed_official 532:fe11edbda85c 599 assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles));
mbed_official 532:fe11edbda85c 600 assert_param(IS_QSPI_DATA_MODE(cmd->DataMode));
mbed_official 532:fe11edbda85c 601
mbed_official 532:fe11edbda85c 602 assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode));
mbed_official 532:fe11edbda85c 603 assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle));
mbed_official 532:fe11edbda85c 604 assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode));
mbed_official 532:fe11edbda85c 605
mbed_official 532:fe11edbda85c 606 /* Process locked */
mbed_official 532:fe11edbda85c 607 __HAL_LOCK(hqspi);
mbed_official 532:fe11edbda85c 608
mbed_official 532:fe11edbda85c 609 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 532:fe11edbda85c 610 {
mbed_official 532:fe11edbda85c 611 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 532:fe11edbda85c 612
mbed_official 532:fe11edbda85c 613 /* Update QSPI state */
mbed_official 532:fe11edbda85c 614 hqspi->State = HAL_QSPI_STATE_BUSY;
mbed_official 532:fe11edbda85c 615
mbed_official 532:fe11edbda85c 616 /* Wait till BUSY flag reset */
mbed_official 532:fe11edbda85c 617 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, Timeout);
mbed_official 532:fe11edbda85c 618
mbed_official 532:fe11edbda85c 619 if (status == HAL_OK)
mbed_official 532:fe11edbda85c 620 {
mbed_official 532:fe11edbda85c 621 /* Call the configuration function */
mbed_official 532:fe11edbda85c 622 QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE);
mbed_official 532:fe11edbda85c 623
mbed_official 532:fe11edbda85c 624 if (cmd->DataMode == QSPI_DATA_NONE)
mbed_official 532:fe11edbda85c 625 {
mbed_official 532:fe11edbda85c 626 /* When there is no data phase, the transfer start as soon as the configuration is done
mbed_official 532:fe11edbda85c 627 so wait until TC flag is set to go back in idle state */
mbed_official 532:fe11edbda85c 628 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, Timeout) != HAL_OK)
mbed_official 532:fe11edbda85c 629 {
mbed_official 532:fe11edbda85c 630 status = HAL_TIMEOUT;
mbed_official 532:fe11edbda85c 631 }
mbed_official 532:fe11edbda85c 632 else
mbed_official 532:fe11edbda85c 633 {
mbed_official 532:fe11edbda85c 634 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 532:fe11edbda85c 635
mbed_official 532:fe11edbda85c 636 /* Update QSPI state */
mbed_official 532:fe11edbda85c 637 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 532:fe11edbda85c 638 }
mbed_official 532:fe11edbda85c 639
mbed_official 532:fe11edbda85c 640 }
mbed_official 532:fe11edbda85c 641 else
mbed_official 532:fe11edbda85c 642 {
mbed_official 532:fe11edbda85c 643 /* Update QSPI state */
mbed_official 532:fe11edbda85c 644 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 532:fe11edbda85c 645 }
mbed_official 532:fe11edbda85c 646 }
mbed_official 532:fe11edbda85c 647 }
mbed_official 532:fe11edbda85c 648 else
mbed_official 532:fe11edbda85c 649 {
mbed_official 532:fe11edbda85c 650 status = HAL_BUSY;
mbed_official 532:fe11edbda85c 651 }
mbed_official 532:fe11edbda85c 652
mbed_official 532:fe11edbda85c 653 /* Process unlocked */
mbed_official 532:fe11edbda85c 654 __HAL_UNLOCK(hqspi);
mbed_official 532:fe11edbda85c 655
mbed_official 532:fe11edbda85c 656 /* Return function status */
mbed_official 532:fe11edbda85c 657 return status;
mbed_official 532:fe11edbda85c 658 }
mbed_official 532:fe11edbda85c 659
mbed_official 532:fe11edbda85c 660 /**
mbed_official 532:fe11edbda85c 661 * @brief Sets the command configuration in interrupt mode.
mbed_official 532:fe11edbda85c 662 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 663 * @param cmd : structure that contains the command configuration information
mbed_official 532:fe11edbda85c 664 * @note This function is used only in Indirect Read or Write Modes
mbed_official 532:fe11edbda85c 665 * @retval HAL status
mbed_official 532:fe11edbda85c 666 */
mbed_official 532:fe11edbda85c 667 HAL_StatusTypeDef HAL_QSPI_Command_IT(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd)
mbed_official 532:fe11edbda85c 668 {
mbed_official 532:fe11edbda85c 669 HAL_StatusTypeDef status = HAL_ERROR;
mbed_official 532:fe11edbda85c 670
mbed_official 532:fe11edbda85c 671 /* Check the parameters */
mbed_official 532:fe11edbda85c 672 assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode));
mbed_official 532:fe11edbda85c 673 if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
mbed_official 532:fe11edbda85c 674 {
mbed_official 532:fe11edbda85c 675 assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction));
mbed_official 532:fe11edbda85c 676 }
mbed_official 532:fe11edbda85c 677
mbed_official 532:fe11edbda85c 678 assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode));
mbed_official 532:fe11edbda85c 679 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 532:fe11edbda85c 680 {
mbed_official 532:fe11edbda85c 681 assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize));
mbed_official 532:fe11edbda85c 682 }
mbed_official 532:fe11edbda85c 683
mbed_official 532:fe11edbda85c 684 assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode));
mbed_official 532:fe11edbda85c 685 if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
mbed_official 532:fe11edbda85c 686 {
mbed_official 532:fe11edbda85c 687 assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize));
mbed_official 532:fe11edbda85c 688 }
mbed_official 532:fe11edbda85c 689
mbed_official 532:fe11edbda85c 690 assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles));
mbed_official 532:fe11edbda85c 691 assert_param(IS_QSPI_DATA_MODE(cmd->DataMode));
mbed_official 532:fe11edbda85c 692
mbed_official 532:fe11edbda85c 693 assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode));
mbed_official 532:fe11edbda85c 694 assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle));
mbed_official 532:fe11edbda85c 695 assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode));
mbed_official 532:fe11edbda85c 696
mbed_official 532:fe11edbda85c 697 /* Process locked */
mbed_official 532:fe11edbda85c 698 __HAL_LOCK(hqspi);
mbed_official 532:fe11edbda85c 699
mbed_official 532:fe11edbda85c 700 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 532:fe11edbda85c 701 {
mbed_official 532:fe11edbda85c 702 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 532:fe11edbda85c 703
mbed_official 532:fe11edbda85c 704 /* Update QSPI state */
mbed_official 532:fe11edbda85c 705 hqspi->State = HAL_QSPI_STATE_BUSY;
mbed_official 532:fe11edbda85c 706
mbed_official 532:fe11edbda85c 707 /* Wait till BUSY flag reset */
mbed_official 532:fe11edbda85c 708 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, hqspi->Timeout);
mbed_official 532:fe11edbda85c 709
mbed_official 532:fe11edbda85c 710 if (status == HAL_OK)
mbed_official 532:fe11edbda85c 711 {
mbed_official 532:fe11edbda85c 712 if (cmd->DataMode == QSPI_DATA_NONE)
mbed_official 532:fe11edbda85c 713 {
mbed_official 532:fe11edbda85c 714 /* When there is no data phase, the transfer start as soon as the configuration is done
mbed_official 532:fe11edbda85c 715 so activate TC and TE interrupts */
mbed_official 532:fe11edbda85c 716 /* Enable the QSPI Transfer Error Interrupt */
mbed_official 532:fe11edbda85c 717 __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE | QSPI_IT_TC);
mbed_official 532:fe11edbda85c 718 }
mbed_official 532:fe11edbda85c 719
mbed_official 532:fe11edbda85c 720 /* Call the configuration function */
mbed_official 532:fe11edbda85c 721 QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE);
mbed_official 532:fe11edbda85c 722
mbed_official 532:fe11edbda85c 723 if (cmd->DataMode != QSPI_DATA_NONE)
mbed_official 532:fe11edbda85c 724 {
mbed_official 532:fe11edbda85c 725 /* Update QSPI state */
mbed_official 532:fe11edbda85c 726 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 532:fe11edbda85c 727 }
mbed_official 532:fe11edbda85c 728 }
mbed_official 532:fe11edbda85c 729 }
mbed_official 532:fe11edbda85c 730 else
mbed_official 532:fe11edbda85c 731 {
mbed_official 532:fe11edbda85c 732 status = HAL_BUSY;
mbed_official 532:fe11edbda85c 733 }
mbed_official 532:fe11edbda85c 734
mbed_official 532:fe11edbda85c 735 /* Process unlocked */
mbed_official 532:fe11edbda85c 736 __HAL_UNLOCK(hqspi);
mbed_official 532:fe11edbda85c 737
mbed_official 532:fe11edbda85c 738 /* Return function status */
mbed_official 532:fe11edbda85c 739 return status;
mbed_official 532:fe11edbda85c 740 }
mbed_official 532:fe11edbda85c 741
mbed_official 532:fe11edbda85c 742 /**
mbed_official 532:fe11edbda85c 743 * @brief Transmit an amount of data in blocking mode.
mbed_official 532:fe11edbda85c 744 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 745 * @param pData: pointer to data buffer
mbed_official 532:fe11edbda85c 746 * @param Timeout : Time out duration
mbed_official 532:fe11edbda85c 747 * @note This function is used only in Indirect Write Mode
mbed_official 532:fe11edbda85c 748 * @retval HAL status
mbed_official 532:fe11edbda85c 749 */
mbed_official 532:fe11edbda85c 750 HAL_StatusTypeDef HAL_QSPI_Transmit(QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout)
mbed_official 532:fe11edbda85c 751 {
mbed_official 532:fe11edbda85c 752 HAL_StatusTypeDef status = HAL_OK;
mbed_official 532:fe11edbda85c 753 __IO uint32_t *data_reg = &hqspi->Instance->DR;
mbed_official 532:fe11edbda85c 754
mbed_official 532:fe11edbda85c 755 /* Process locked */
mbed_official 532:fe11edbda85c 756 __HAL_LOCK(hqspi);
mbed_official 532:fe11edbda85c 757
mbed_official 532:fe11edbda85c 758 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 532:fe11edbda85c 759 {
mbed_official 532:fe11edbda85c 760 if(pData != NULL )
mbed_official 532:fe11edbda85c 761 {
mbed_official 532:fe11edbda85c 762 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 532:fe11edbda85c 763
mbed_official 532:fe11edbda85c 764 /* Update state */
mbed_official 532:fe11edbda85c 765 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_TX;
mbed_official 532:fe11edbda85c 766
mbed_official 532:fe11edbda85c 767 /* Configure counters and size of the handle */
mbed_official 532:fe11edbda85c 768 hqspi->TxXferCount = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 532:fe11edbda85c 769 hqspi->TxXferSize = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 532:fe11edbda85c 770 hqspi->pTxBuffPtr = pData;
mbed_official 532:fe11edbda85c 771
mbed_official 532:fe11edbda85c 772 /* Configure QSPI: CCR register with functional as indirect write */
mbed_official 532:fe11edbda85c 773 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE);
mbed_official 532:fe11edbda85c 774
mbed_official 532:fe11edbda85c 775 while(hqspi->TxXferCount > 0)
mbed_official 532:fe11edbda85c 776 {
mbed_official 532:fe11edbda85c 777 /* Wait until FT flag is set to send data */
mbed_official 532:fe11edbda85c 778 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_FT, SET, Timeout) != HAL_OK)
mbed_official 532:fe11edbda85c 779 {
mbed_official 532:fe11edbda85c 780 status = HAL_TIMEOUT;
mbed_official 532:fe11edbda85c 781 break;
mbed_official 532:fe11edbda85c 782 }
mbed_official 532:fe11edbda85c 783
mbed_official 532:fe11edbda85c 784 *(__IO uint8_t *)data_reg = *hqspi->pTxBuffPtr++;
mbed_official 532:fe11edbda85c 785 hqspi->TxXferCount--;
mbed_official 532:fe11edbda85c 786 }
mbed_official 532:fe11edbda85c 787
mbed_official 532:fe11edbda85c 788 if (status == HAL_OK)
mbed_official 532:fe11edbda85c 789 {
mbed_official 532:fe11edbda85c 790 /* Wait until TC flag is set to go back in idle state */
mbed_official 532:fe11edbda85c 791 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, Timeout) != HAL_OK)
mbed_official 532:fe11edbda85c 792 {
mbed_official 532:fe11edbda85c 793 status = HAL_TIMEOUT;
mbed_official 532:fe11edbda85c 794 }
mbed_official 532:fe11edbda85c 795 else
mbed_official 532:fe11edbda85c 796 {
mbed_official 532:fe11edbda85c 797 /* Clear Transfer Complete bit */
mbed_official 532:fe11edbda85c 798 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 532:fe11edbda85c 799
mbed_official 532:fe11edbda85c 800 /* Clear Busy bit */
mbed_official 532:fe11edbda85c 801 status = HAL_QSPI_Abort(hqspi);
mbed_official 532:fe11edbda85c 802 }
mbed_official 532:fe11edbda85c 803 }
mbed_official 532:fe11edbda85c 804
mbed_official 532:fe11edbda85c 805 /* Update QSPI state */
mbed_official 532:fe11edbda85c 806 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 532:fe11edbda85c 807 }
mbed_official 532:fe11edbda85c 808 else
mbed_official 532:fe11edbda85c 809 {
mbed_official 532:fe11edbda85c 810 status = HAL_ERROR;
mbed_official 532:fe11edbda85c 811 }
mbed_official 532:fe11edbda85c 812 }
mbed_official 532:fe11edbda85c 813 else
mbed_official 532:fe11edbda85c 814 {
mbed_official 532:fe11edbda85c 815 status = HAL_BUSY;
mbed_official 532:fe11edbda85c 816 }
mbed_official 532:fe11edbda85c 817
mbed_official 532:fe11edbda85c 818 /* Process unlocked */
mbed_official 532:fe11edbda85c 819 __HAL_UNLOCK(hqspi);
mbed_official 532:fe11edbda85c 820
mbed_official 532:fe11edbda85c 821 return status;
mbed_official 532:fe11edbda85c 822 }
mbed_official 532:fe11edbda85c 823
mbed_official 532:fe11edbda85c 824
mbed_official 532:fe11edbda85c 825 /**
mbed_official 532:fe11edbda85c 826 * @brief Receive an amount of data in blocking mode
mbed_official 532:fe11edbda85c 827 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 828 * @param pData: pointer to data buffer
mbed_official 532:fe11edbda85c 829 * @param Timeout : Time out duration
mbed_official 532:fe11edbda85c 830 * @note This function is used only in Indirect Read Mode
mbed_official 532:fe11edbda85c 831 * @retval HAL status
mbed_official 532:fe11edbda85c 832 */
mbed_official 532:fe11edbda85c 833 HAL_StatusTypeDef HAL_QSPI_Receive(QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout)
mbed_official 532:fe11edbda85c 834 {
mbed_official 532:fe11edbda85c 835 HAL_StatusTypeDef status = HAL_OK;
mbed_official 532:fe11edbda85c 836 uint32_t addr_reg = READ_REG(hqspi->Instance->AR);
mbed_official 532:fe11edbda85c 837 __IO uint32_t *data_reg = &hqspi->Instance->DR;
mbed_official 532:fe11edbda85c 838
mbed_official 532:fe11edbda85c 839 /* Process locked */
mbed_official 532:fe11edbda85c 840 __HAL_LOCK(hqspi);
mbed_official 532:fe11edbda85c 841
mbed_official 532:fe11edbda85c 842 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 532:fe11edbda85c 843 {
mbed_official 532:fe11edbda85c 844 if(pData != NULL )
mbed_official 532:fe11edbda85c 845 {
mbed_official 532:fe11edbda85c 846 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 532:fe11edbda85c 847
mbed_official 532:fe11edbda85c 848 /* Update state */
mbed_official 532:fe11edbda85c 849 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_RX;
mbed_official 532:fe11edbda85c 850
mbed_official 532:fe11edbda85c 851 /* Configure counters and size of the handle */
mbed_official 532:fe11edbda85c 852 hqspi->RxXferCount = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 532:fe11edbda85c 853 hqspi->RxXferSize = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 532:fe11edbda85c 854 hqspi->pRxBuffPtr = pData;
mbed_official 532:fe11edbda85c 855
mbed_official 532:fe11edbda85c 856 /* Configure QSPI: CCR register with functional as indirect read */
mbed_official 532:fe11edbda85c 857 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ);
mbed_official 532:fe11edbda85c 858
mbed_official 532:fe11edbda85c 859 /* Start the transfer by re-writing the address in AR register */
mbed_official 532:fe11edbda85c 860 WRITE_REG(hqspi->Instance->AR, addr_reg);
mbed_official 532:fe11edbda85c 861
mbed_official 532:fe11edbda85c 862 while(hqspi->RxXferCount > 0)
mbed_official 532:fe11edbda85c 863 {
mbed_official 532:fe11edbda85c 864 /* Wait until FT or TC flag is set to read received data */
mbed_official 532:fe11edbda85c 865 if(QSPI_WaitFlagStateUntilTimeout(hqspi, (QSPI_FLAG_FT | QSPI_FLAG_TC), SET, Timeout) != HAL_OK)
mbed_official 532:fe11edbda85c 866 {
mbed_official 532:fe11edbda85c 867 status = HAL_TIMEOUT;
mbed_official 532:fe11edbda85c 868 break;
mbed_official 532:fe11edbda85c 869 }
mbed_official 532:fe11edbda85c 870
mbed_official 532:fe11edbda85c 871 *hqspi->pRxBuffPtr++ = *(__IO uint8_t *)data_reg;
mbed_official 532:fe11edbda85c 872 hqspi->RxXferCount--;
mbed_official 532:fe11edbda85c 873 }
mbed_official 532:fe11edbda85c 874
mbed_official 532:fe11edbda85c 875 if (status == HAL_OK)
mbed_official 532:fe11edbda85c 876 {
mbed_official 532:fe11edbda85c 877 /* Wait until TC flag is set to go back in idle state */
mbed_official 532:fe11edbda85c 878 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, Timeout) != HAL_OK)
mbed_official 532:fe11edbda85c 879 {
mbed_official 532:fe11edbda85c 880 status = HAL_TIMEOUT;
mbed_official 532:fe11edbda85c 881 }
mbed_official 532:fe11edbda85c 882 else
mbed_official 532:fe11edbda85c 883 {
mbed_official 532:fe11edbda85c 884 /* Clear Transfer Complete bit */
mbed_official 532:fe11edbda85c 885 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 532:fe11edbda85c 886
mbed_official 532:fe11edbda85c 887 /* Workaround - Extra data written in the FIFO at the end of a read transfer */
mbed_official 532:fe11edbda85c 888 status = HAL_QSPI_Abort(hqspi);
mbed_official 532:fe11edbda85c 889 }
mbed_official 532:fe11edbda85c 890 }
mbed_official 532:fe11edbda85c 891
mbed_official 532:fe11edbda85c 892 /* Update QSPI state */
mbed_official 532:fe11edbda85c 893 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 532:fe11edbda85c 894 }
mbed_official 532:fe11edbda85c 895 else
mbed_official 532:fe11edbda85c 896 {
mbed_official 532:fe11edbda85c 897 status = HAL_ERROR;
mbed_official 532:fe11edbda85c 898 }
mbed_official 532:fe11edbda85c 899 }
mbed_official 532:fe11edbda85c 900 else
mbed_official 532:fe11edbda85c 901 {
mbed_official 532:fe11edbda85c 902 status = HAL_BUSY;
mbed_official 532:fe11edbda85c 903 }
mbed_official 532:fe11edbda85c 904
mbed_official 532:fe11edbda85c 905 /* Process unlocked */
mbed_official 532:fe11edbda85c 906 __HAL_UNLOCK(hqspi);
mbed_official 532:fe11edbda85c 907
mbed_official 532:fe11edbda85c 908 return status;
mbed_official 532:fe11edbda85c 909 }
mbed_official 532:fe11edbda85c 910
mbed_official 532:fe11edbda85c 911 /**
mbed_official 532:fe11edbda85c 912 * @brief Send an amount of data in interrupt mode
mbed_official 532:fe11edbda85c 913 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 914 * @param pData: pointer to data buffer
mbed_official 532:fe11edbda85c 915 * @note This function is used only in Indirect Write Mode
mbed_official 532:fe11edbda85c 916 * @retval HAL status
mbed_official 532:fe11edbda85c 917 */
mbed_official 532:fe11edbda85c 918 HAL_StatusTypeDef HAL_QSPI_Transmit_IT(QSPI_HandleTypeDef *hqspi, uint8_t *pData)
mbed_official 532:fe11edbda85c 919 {
mbed_official 532:fe11edbda85c 920 HAL_StatusTypeDef status = HAL_OK;
mbed_official 532:fe11edbda85c 921
mbed_official 532:fe11edbda85c 922 /* Process locked */
mbed_official 532:fe11edbda85c 923 __HAL_LOCK(hqspi);
mbed_official 532:fe11edbda85c 924
mbed_official 532:fe11edbda85c 925 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 532:fe11edbda85c 926 {
mbed_official 532:fe11edbda85c 927 if(pData != NULL )
mbed_official 532:fe11edbda85c 928 {
mbed_official 532:fe11edbda85c 929 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 532:fe11edbda85c 930
mbed_official 532:fe11edbda85c 931 /* Update state */
mbed_official 532:fe11edbda85c 932 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_TX;
mbed_official 532:fe11edbda85c 933
mbed_official 532:fe11edbda85c 934 /* Configure counters and size of the handle */
mbed_official 532:fe11edbda85c 935 hqspi->TxXferCount = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 532:fe11edbda85c 936 hqspi->TxXferSize = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 532:fe11edbda85c 937 hqspi->pTxBuffPtr = pData;
mbed_official 532:fe11edbda85c 938
mbed_official 532:fe11edbda85c 939 /* Configure QSPI: CCR register with functional as indirect write */
mbed_official 532:fe11edbda85c 940 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE);
mbed_official 532:fe11edbda85c 941
mbed_official 532:fe11edbda85c 942 /* Enable the QSPI transfer error, FIFO threshold and transfert complete Interrupts */
mbed_official 532:fe11edbda85c 943 __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE | QSPI_IT_FT | QSPI_IT_TC);
mbed_official 532:fe11edbda85c 944
mbed_official 532:fe11edbda85c 945 }
mbed_official 532:fe11edbda85c 946 else
mbed_official 532:fe11edbda85c 947 {
mbed_official 532:fe11edbda85c 948 status = HAL_ERROR;
mbed_official 532:fe11edbda85c 949 }
mbed_official 532:fe11edbda85c 950 }
mbed_official 532:fe11edbda85c 951 else
mbed_official 532:fe11edbda85c 952 {
mbed_official 532:fe11edbda85c 953 status = HAL_BUSY;
mbed_official 532:fe11edbda85c 954 }
mbed_official 532:fe11edbda85c 955
mbed_official 532:fe11edbda85c 956 /* Process unlocked */
mbed_official 532:fe11edbda85c 957 __HAL_UNLOCK(hqspi);
mbed_official 532:fe11edbda85c 958
mbed_official 532:fe11edbda85c 959 return status;
mbed_official 532:fe11edbda85c 960 }
mbed_official 532:fe11edbda85c 961
mbed_official 532:fe11edbda85c 962 /**
mbed_official 532:fe11edbda85c 963 * @brief Receive an amount of data in no-blocking mode with Interrupt
mbed_official 532:fe11edbda85c 964 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 965 * @param pData: pointer to data buffer
mbed_official 532:fe11edbda85c 966 * @note This function is used only in Indirect Read Mode
mbed_official 532:fe11edbda85c 967 * @retval HAL status
mbed_official 532:fe11edbda85c 968 */
mbed_official 532:fe11edbda85c 969 HAL_StatusTypeDef HAL_QSPI_Receive_IT(QSPI_HandleTypeDef *hqspi, uint8_t *pData)
mbed_official 532:fe11edbda85c 970 {
mbed_official 532:fe11edbda85c 971 HAL_StatusTypeDef status = HAL_OK;
mbed_official 532:fe11edbda85c 972 uint32_t addr_reg = READ_REG(hqspi->Instance->AR);
mbed_official 532:fe11edbda85c 973
mbed_official 532:fe11edbda85c 974 /* Process locked */
mbed_official 532:fe11edbda85c 975 __HAL_LOCK(hqspi);
mbed_official 532:fe11edbda85c 976
mbed_official 532:fe11edbda85c 977 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 532:fe11edbda85c 978 {
mbed_official 532:fe11edbda85c 979 if(pData != NULL )
mbed_official 532:fe11edbda85c 980 {
mbed_official 532:fe11edbda85c 981 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 532:fe11edbda85c 982
mbed_official 532:fe11edbda85c 983 /* Update state */
mbed_official 532:fe11edbda85c 984 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_RX;
mbed_official 532:fe11edbda85c 985
mbed_official 532:fe11edbda85c 986 /* Configure counters and size of the handle */
mbed_official 532:fe11edbda85c 987 hqspi->RxXferCount = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 532:fe11edbda85c 988 hqspi->RxXferSize = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 532:fe11edbda85c 989 hqspi->pRxBuffPtr = pData;
mbed_official 532:fe11edbda85c 990
mbed_official 532:fe11edbda85c 991 /* Configure QSPI: CCR register with functional as indirect read */
mbed_official 532:fe11edbda85c 992 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ);
mbed_official 532:fe11edbda85c 993
mbed_official 532:fe11edbda85c 994 /* Start the transfer by re-writing the address in AR register */
mbed_official 532:fe11edbda85c 995 WRITE_REG(hqspi->Instance->AR, addr_reg);
mbed_official 532:fe11edbda85c 996
mbed_official 532:fe11edbda85c 997 /* Enable the QSPI transfer error, FIFO threshold and transfert complete Interrupts */
mbed_official 532:fe11edbda85c 998 __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE | QSPI_IT_FT | QSPI_IT_TC);
mbed_official 532:fe11edbda85c 999 }
mbed_official 532:fe11edbda85c 1000 else
mbed_official 532:fe11edbda85c 1001 {
mbed_official 532:fe11edbda85c 1002 status = HAL_ERROR;
mbed_official 532:fe11edbda85c 1003 }
mbed_official 532:fe11edbda85c 1004 }
mbed_official 532:fe11edbda85c 1005 else
mbed_official 532:fe11edbda85c 1006 {
mbed_official 532:fe11edbda85c 1007 status = HAL_BUSY;
mbed_official 532:fe11edbda85c 1008 }
mbed_official 532:fe11edbda85c 1009
mbed_official 532:fe11edbda85c 1010 /* Process unlocked */
mbed_official 532:fe11edbda85c 1011 __HAL_UNLOCK(hqspi);
mbed_official 532:fe11edbda85c 1012
mbed_official 532:fe11edbda85c 1013 return status;
mbed_official 532:fe11edbda85c 1014 }
mbed_official 532:fe11edbda85c 1015
mbed_official 532:fe11edbda85c 1016 /**
mbed_official 532:fe11edbda85c 1017 * @brief Sends an amount of data in non blocking mode with DMA.
mbed_official 532:fe11edbda85c 1018 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 1019 * @param pData: pointer to data buffer
mbed_official 532:fe11edbda85c 1020 * @note This function is used only in Indirect Write Mode
mbed_official 532:fe11edbda85c 1021 * @retval HAL status
mbed_official 532:fe11edbda85c 1022 */
mbed_official 532:fe11edbda85c 1023 HAL_StatusTypeDef HAL_QSPI_Transmit_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pData)
mbed_official 532:fe11edbda85c 1024 {
mbed_official 532:fe11edbda85c 1025 HAL_StatusTypeDef status = HAL_OK;
mbed_official 532:fe11edbda85c 1026 uint32_t *tmp;
mbed_official 532:fe11edbda85c 1027
mbed_official 532:fe11edbda85c 1028 /* Process locked */
mbed_official 532:fe11edbda85c 1029 __HAL_LOCK(hqspi);
mbed_official 532:fe11edbda85c 1030
mbed_official 532:fe11edbda85c 1031 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 532:fe11edbda85c 1032 {
mbed_official 532:fe11edbda85c 1033 if(pData != NULL )
mbed_official 532:fe11edbda85c 1034 {
mbed_official 532:fe11edbda85c 1035 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 532:fe11edbda85c 1036
mbed_official 532:fe11edbda85c 1037 /* Update state */
mbed_official 532:fe11edbda85c 1038 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_TX;
mbed_official 532:fe11edbda85c 1039
mbed_official 532:fe11edbda85c 1040 /* Configure counters and size of the handle */
mbed_official 532:fe11edbda85c 1041 hqspi->TxXferCount = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 532:fe11edbda85c 1042 hqspi->TxXferSize = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 532:fe11edbda85c 1043 hqspi->pTxBuffPtr = pData;
mbed_official 532:fe11edbda85c 1044
mbed_official 532:fe11edbda85c 1045 /* Configure QSPI: CCR register with functional mode as indirect write */
mbed_official 532:fe11edbda85c 1046 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE);
mbed_official 532:fe11edbda85c 1047
mbed_official 532:fe11edbda85c 1048 /* Set the QSPI DMA transfer complete callback */
mbed_official 532:fe11edbda85c 1049 hqspi->hdma->XferCpltCallback = QSPI_DMATxCplt;
mbed_official 532:fe11edbda85c 1050
mbed_official 532:fe11edbda85c 1051 /* Set the QSPI DMA Half transfer complete callback */
mbed_official 532:fe11edbda85c 1052 hqspi->hdma->XferHalfCpltCallback = QSPI_DMATxHalfCplt;
mbed_official 532:fe11edbda85c 1053
mbed_official 532:fe11edbda85c 1054 /* Set the DMA error callback */
mbed_official 532:fe11edbda85c 1055 hqspi->hdma->XferErrorCallback = QSPI_DMAError;
mbed_official 532:fe11edbda85c 1056
mbed_official 532:fe11edbda85c 1057 /* Configure the direction of the DMA */
mbed_official 532:fe11edbda85c 1058 hqspi->hdma->Init.Direction = DMA_MEMORY_TO_PERIPH;
mbed_official 532:fe11edbda85c 1059 MODIFY_REG(hqspi->hdma->Instance->CR, DMA_SxCR_DIR, hqspi->hdma->Init.Direction);
mbed_official 532:fe11edbda85c 1060
mbed_official 532:fe11edbda85c 1061 /* Enable the QSPI transmit DMA Channel */
mbed_official 532:fe11edbda85c 1062 tmp = (uint32_t*)&pData;
mbed_official 532:fe11edbda85c 1063 HAL_DMA_Start_IT(hqspi->hdma, *(uint32_t*)tmp, (uint32_t)&hqspi->Instance->DR, hqspi->TxXferSize);
mbed_official 532:fe11edbda85c 1064
mbed_official 532:fe11edbda85c 1065 /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */
mbed_official 532:fe11edbda85c 1066 SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
mbed_official 532:fe11edbda85c 1067 }
mbed_official 532:fe11edbda85c 1068 else
mbed_official 532:fe11edbda85c 1069 {
mbed_official 532:fe11edbda85c 1070 status = HAL_OK;
mbed_official 532:fe11edbda85c 1071 }
mbed_official 532:fe11edbda85c 1072 }
mbed_official 532:fe11edbda85c 1073 else
mbed_official 532:fe11edbda85c 1074 {
mbed_official 532:fe11edbda85c 1075 status = HAL_BUSY;
mbed_official 532:fe11edbda85c 1076 }
mbed_official 532:fe11edbda85c 1077
mbed_official 532:fe11edbda85c 1078 /* Process unlocked */
mbed_official 532:fe11edbda85c 1079 __HAL_UNLOCK(hqspi);
mbed_official 532:fe11edbda85c 1080
mbed_official 532:fe11edbda85c 1081 return status;
mbed_official 532:fe11edbda85c 1082 }
mbed_official 532:fe11edbda85c 1083
mbed_official 532:fe11edbda85c 1084 /**
mbed_official 532:fe11edbda85c 1085 * @brief Receives an amount of data in non blocking mode with DMA.
mbed_official 532:fe11edbda85c 1086 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 1087 * @param pData: pointer to data buffer.
mbed_official 532:fe11edbda85c 1088 * @note This function is used only in Indirect Read Mode
mbed_official 532:fe11edbda85c 1089 * @retval HAL status
mbed_official 532:fe11edbda85c 1090 */
mbed_official 532:fe11edbda85c 1091 HAL_StatusTypeDef HAL_QSPI_Receive_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pData)
mbed_official 532:fe11edbda85c 1092 {
mbed_official 532:fe11edbda85c 1093 HAL_StatusTypeDef status = HAL_OK;
mbed_official 532:fe11edbda85c 1094 uint32_t *tmp;
mbed_official 532:fe11edbda85c 1095 uint32_t addr_reg = READ_REG(hqspi->Instance->AR);
mbed_official 532:fe11edbda85c 1096
mbed_official 532:fe11edbda85c 1097 /* Process locked */
mbed_official 532:fe11edbda85c 1098 __HAL_LOCK(hqspi);
mbed_official 532:fe11edbda85c 1099
mbed_official 532:fe11edbda85c 1100 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 532:fe11edbda85c 1101 {
mbed_official 532:fe11edbda85c 1102 if(pData != NULL )
mbed_official 532:fe11edbda85c 1103 {
mbed_official 532:fe11edbda85c 1104 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 532:fe11edbda85c 1105
mbed_official 532:fe11edbda85c 1106 /* Update state */
mbed_official 532:fe11edbda85c 1107 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_RX;
mbed_official 532:fe11edbda85c 1108
mbed_official 532:fe11edbda85c 1109 /* Configure counters and size of the handle */
mbed_official 532:fe11edbda85c 1110 hqspi->RxXferCount = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 532:fe11edbda85c 1111 hqspi->RxXferSize = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 532:fe11edbda85c 1112 hqspi->pRxBuffPtr = pData;
mbed_official 532:fe11edbda85c 1113
mbed_official 532:fe11edbda85c 1114 /* Set the QSPI DMA transfer complete callback */
mbed_official 532:fe11edbda85c 1115 hqspi->hdma->XferCpltCallback = QSPI_DMARxCplt;
mbed_official 532:fe11edbda85c 1116
mbed_official 532:fe11edbda85c 1117 /* Set the QSPI DMA Half transfer complete callback */
mbed_official 532:fe11edbda85c 1118 hqspi->hdma->XferHalfCpltCallback = QSPI_DMARxHalfCplt;
mbed_official 532:fe11edbda85c 1119
mbed_official 532:fe11edbda85c 1120 /* Set the DMA error callback */
mbed_official 532:fe11edbda85c 1121 hqspi->hdma->XferErrorCallback = QSPI_DMAError;
mbed_official 532:fe11edbda85c 1122
mbed_official 532:fe11edbda85c 1123 /* Configure the direction of the DMA */
mbed_official 532:fe11edbda85c 1124 hqspi->hdma->Init.Direction = DMA_PERIPH_TO_MEMORY;
mbed_official 532:fe11edbda85c 1125 MODIFY_REG(hqspi->hdma->Instance->CR, DMA_SxCR_DIR, hqspi->hdma->Init.Direction);
mbed_official 532:fe11edbda85c 1126
mbed_official 532:fe11edbda85c 1127 /* Enable the DMA Channel */
mbed_official 532:fe11edbda85c 1128 tmp = (uint32_t*)&pData;
mbed_official 532:fe11edbda85c 1129 HAL_DMA_Start_IT(hqspi->hdma, (uint32_t)&hqspi->Instance->DR, *(uint32_t*)tmp, hqspi->RxXferSize);
mbed_official 532:fe11edbda85c 1130
mbed_official 532:fe11edbda85c 1131 /* Configure QSPI: CCR register with functional as indirect read */
mbed_official 532:fe11edbda85c 1132 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ);
mbed_official 532:fe11edbda85c 1133
mbed_official 532:fe11edbda85c 1134 /* Start the transfer by re-writing the address in AR register */
mbed_official 532:fe11edbda85c 1135 WRITE_REG(hqspi->Instance->AR, addr_reg);
mbed_official 532:fe11edbda85c 1136
mbed_official 532:fe11edbda85c 1137 /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */
mbed_official 532:fe11edbda85c 1138 SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
mbed_official 532:fe11edbda85c 1139 }
mbed_official 532:fe11edbda85c 1140 else
mbed_official 532:fe11edbda85c 1141 {
mbed_official 532:fe11edbda85c 1142 status = HAL_ERROR;
mbed_official 532:fe11edbda85c 1143 }
mbed_official 532:fe11edbda85c 1144 }
mbed_official 532:fe11edbda85c 1145 else
mbed_official 532:fe11edbda85c 1146 {
mbed_official 532:fe11edbda85c 1147 status = HAL_BUSY;
mbed_official 532:fe11edbda85c 1148 }
mbed_official 532:fe11edbda85c 1149
mbed_official 532:fe11edbda85c 1150 /* Process unlocked */
mbed_official 532:fe11edbda85c 1151 __HAL_UNLOCK(hqspi);
mbed_official 532:fe11edbda85c 1152
mbed_official 532:fe11edbda85c 1153 return status;
mbed_official 532:fe11edbda85c 1154 }
mbed_official 532:fe11edbda85c 1155
mbed_official 532:fe11edbda85c 1156 /**
mbed_official 532:fe11edbda85c 1157 * @brief Configure the QSPI Automatic Polling Mode in blocking mode.
mbed_official 532:fe11edbda85c 1158 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 1159 * @param cmd: structure that contains the command configuration information.
mbed_official 532:fe11edbda85c 1160 * @param cfg: structure that contains the polling configuration information.
mbed_official 532:fe11edbda85c 1161 * @param Timeout : Time out duration
mbed_official 532:fe11edbda85c 1162 * @note This function is used only in Automatic Polling Mode
mbed_official 532:fe11edbda85c 1163 * @retval HAL status
mbed_official 532:fe11edbda85c 1164 */
mbed_official 532:fe11edbda85c 1165 HAL_StatusTypeDef HAL_QSPI_AutoPolling(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg, uint32_t Timeout)
mbed_official 532:fe11edbda85c 1166 {
mbed_official 532:fe11edbda85c 1167 HAL_StatusTypeDef status = HAL_ERROR;
mbed_official 532:fe11edbda85c 1168
mbed_official 532:fe11edbda85c 1169 /* Check the parameters */
mbed_official 532:fe11edbda85c 1170 assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode));
mbed_official 532:fe11edbda85c 1171 if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
mbed_official 532:fe11edbda85c 1172 {
mbed_official 532:fe11edbda85c 1173 assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction));
mbed_official 532:fe11edbda85c 1174 }
mbed_official 532:fe11edbda85c 1175
mbed_official 532:fe11edbda85c 1176 assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode));
mbed_official 532:fe11edbda85c 1177 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 532:fe11edbda85c 1178 {
mbed_official 532:fe11edbda85c 1179 assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize));
mbed_official 532:fe11edbda85c 1180 }
mbed_official 532:fe11edbda85c 1181
mbed_official 532:fe11edbda85c 1182 assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode));
mbed_official 532:fe11edbda85c 1183 if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
mbed_official 532:fe11edbda85c 1184 {
mbed_official 532:fe11edbda85c 1185 assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize));
mbed_official 532:fe11edbda85c 1186 }
mbed_official 532:fe11edbda85c 1187
mbed_official 532:fe11edbda85c 1188 assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles));
mbed_official 532:fe11edbda85c 1189 assert_param(IS_QSPI_DATA_MODE(cmd->DataMode));
mbed_official 532:fe11edbda85c 1190
mbed_official 532:fe11edbda85c 1191 assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode));
mbed_official 532:fe11edbda85c 1192 assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle));
mbed_official 532:fe11edbda85c 1193 assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode));
mbed_official 532:fe11edbda85c 1194
mbed_official 532:fe11edbda85c 1195 assert_param(IS_QSPI_INTERVAL(cfg->Interval));
mbed_official 532:fe11edbda85c 1196 assert_param(IS_QSPI_STATUS_BYTES_SIZE(cfg->StatusBytesSize));
mbed_official 532:fe11edbda85c 1197 assert_param(IS_QSPI_MATCH_MODE(cfg->MatchMode));
mbed_official 532:fe11edbda85c 1198
mbed_official 532:fe11edbda85c 1199 /* Process locked */
mbed_official 532:fe11edbda85c 1200 __HAL_LOCK(hqspi);
mbed_official 532:fe11edbda85c 1201
mbed_official 532:fe11edbda85c 1202 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 532:fe11edbda85c 1203 {
mbed_official 532:fe11edbda85c 1204
mbed_official 532:fe11edbda85c 1205 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 532:fe11edbda85c 1206
mbed_official 532:fe11edbda85c 1207 /* Update state */
mbed_official 532:fe11edbda85c 1208 hqspi->State = HAL_QSPI_STATE_BUSY_AUTO_POLLING;
mbed_official 532:fe11edbda85c 1209
mbed_official 532:fe11edbda85c 1210 /* Wait till BUSY flag reset */
mbed_official 532:fe11edbda85c 1211 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, Timeout);
mbed_official 532:fe11edbda85c 1212
mbed_official 532:fe11edbda85c 1213 if (status == HAL_OK)
mbed_official 532:fe11edbda85c 1214 {
mbed_official 532:fe11edbda85c 1215 /* Configure QSPI: PSMAR register with the status match value */
mbed_official 532:fe11edbda85c 1216 WRITE_REG(hqspi->Instance->PSMAR, cfg->Match);
mbed_official 532:fe11edbda85c 1217
mbed_official 532:fe11edbda85c 1218 /* Configure QSPI: PSMKR register with the status mask value */
mbed_official 532:fe11edbda85c 1219 WRITE_REG(hqspi->Instance->PSMKR, cfg->Mask);
mbed_official 532:fe11edbda85c 1220
mbed_official 532:fe11edbda85c 1221 /* Configure QSPI: PIR register with the interval value */
mbed_official 532:fe11edbda85c 1222 WRITE_REG(hqspi->Instance->PIR, cfg->Interval);
mbed_official 532:fe11edbda85c 1223
mbed_official 532:fe11edbda85c 1224 /* Configure QSPI: CR register with Match mode and Automatic stop enabled
mbed_official 532:fe11edbda85c 1225 (otherwise there will be an infinite loop in blocking mode) */
mbed_official 532:fe11edbda85c 1226 MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PMM | QUADSPI_CR_APMS),
mbed_official 532:fe11edbda85c 1227 (cfg->MatchMode | QSPI_AUTOMATIC_STOP_ENABLE));
mbed_official 532:fe11edbda85c 1228
mbed_official 532:fe11edbda85c 1229 /* Call the configuration function */
mbed_official 532:fe11edbda85c 1230 cmd->NbData = cfg->StatusBytesSize;
mbed_official 532:fe11edbda85c 1231 QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_AUTO_POLLING);
mbed_official 532:fe11edbda85c 1232
mbed_official 532:fe11edbda85c 1233 /* Wait until SM flag is set to go back in idle state */
mbed_official 532:fe11edbda85c 1234 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_SM, SET, Timeout) != HAL_OK)
mbed_official 532:fe11edbda85c 1235 {
mbed_official 532:fe11edbda85c 1236 status = HAL_TIMEOUT;
mbed_official 532:fe11edbda85c 1237 }
mbed_official 532:fe11edbda85c 1238 else
mbed_official 532:fe11edbda85c 1239 {
mbed_official 532:fe11edbda85c 1240 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_SM);
mbed_official 532:fe11edbda85c 1241
mbed_official 532:fe11edbda85c 1242 /* Update state */
mbed_official 532:fe11edbda85c 1243 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 532:fe11edbda85c 1244 }
mbed_official 532:fe11edbda85c 1245 }
mbed_official 532:fe11edbda85c 1246 }
mbed_official 532:fe11edbda85c 1247 else
mbed_official 532:fe11edbda85c 1248 {
mbed_official 532:fe11edbda85c 1249 status = HAL_BUSY;
mbed_official 532:fe11edbda85c 1250 }
mbed_official 532:fe11edbda85c 1251 /* Process unlocked */
mbed_official 532:fe11edbda85c 1252 __HAL_UNLOCK(hqspi);
mbed_official 532:fe11edbda85c 1253
mbed_official 532:fe11edbda85c 1254 /* Return function status */
mbed_official 532:fe11edbda85c 1255 return status;
mbed_official 532:fe11edbda85c 1256 }
mbed_official 532:fe11edbda85c 1257
mbed_official 532:fe11edbda85c 1258 /**
mbed_official 532:fe11edbda85c 1259 * @brief Configure the QSPI Automatic Polling Mode in non-blocking mode.
mbed_official 532:fe11edbda85c 1260 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 1261 * @param cmd: structure that contains the command configuration information.
mbed_official 532:fe11edbda85c 1262 * @param cfg: structure that contains the polling configuration information.
mbed_official 532:fe11edbda85c 1263 * @note This function is used only in Automatic Polling Mode
mbed_official 532:fe11edbda85c 1264 * @retval HAL status
mbed_official 532:fe11edbda85c 1265 */
mbed_official 532:fe11edbda85c 1266 HAL_StatusTypeDef HAL_QSPI_AutoPolling_IT(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg)
mbed_official 532:fe11edbda85c 1267 {
mbed_official 532:fe11edbda85c 1268 HAL_StatusTypeDef status = HAL_ERROR;
mbed_official 532:fe11edbda85c 1269
mbed_official 532:fe11edbda85c 1270 /* Check the parameters */
mbed_official 532:fe11edbda85c 1271 assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode));
mbed_official 532:fe11edbda85c 1272 if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
mbed_official 532:fe11edbda85c 1273 {
mbed_official 532:fe11edbda85c 1274 assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction));
mbed_official 532:fe11edbda85c 1275 }
mbed_official 532:fe11edbda85c 1276
mbed_official 532:fe11edbda85c 1277 assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode));
mbed_official 532:fe11edbda85c 1278 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 532:fe11edbda85c 1279 {
mbed_official 532:fe11edbda85c 1280 assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize));
mbed_official 532:fe11edbda85c 1281 }
mbed_official 532:fe11edbda85c 1282
mbed_official 532:fe11edbda85c 1283 assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode));
mbed_official 532:fe11edbda85c 1284 if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
mbed_official 532:fe11edbda85c 1285 {
mbed_official 532:fe11edbda85c 1286 assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize));
mbed_official 532:fe11edbda85c 1287 }
mbed_official 532:fe11edbda85c 1288
mbed_official 532:fe11edbda85c 1289 assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles));
mbed_official 532:fe11edbda85c 1290 assert_param(IS_QSPI_DATA_MODE(cmd->DataMode));
mbed_official 532:fe11edbda85c 1291
mbed_official 532:fe11edbda85c 1292 assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode));
mbed_official 532:fe11edbda85c 1293 assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle));
mbed_official 532:fe11edbda85c 1294 assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode));
mbed_official 532:fe11edbda85c 1295
mbed_official 532:fe11edbda85c 1296 assert_param(IS_QSPI_INTERVAL(cfg->Interval));
mbed_official 532:fe11edbda85c 1297 assert_param(IS_QSPI_STATUS_BYTES_SIZE(cfg->StatusBytesSize));
mbed_official 532:fe11edbda85c 1298 assert_param(IS_QSPI_MATCH_MODE(cfg->MatchMode));
mbed_official 532:fe11edbda85c 1299 assert_param(IS_QSPI_AUTOMATIC_STOP(cfg->AutomaticStop));
mbed_official 532:fe11edbda85c 1300
mbed_official 532:fe11edbda85c 1301 /* Process locked */
mbed_official 532:fe11edbda85c 1302 __HAL_LOCK(hqspi);
mbed_official 532:fe11edbda85c 1303
mbed_official 532:fe11edbda85c 1304 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 532:fe11edbda85c 1305 {
mbed_official 532:fe11edbda85c 1306 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 532:fe11edbda85c 1307
mbed_official 532:fe11edbda85c 1308 /* Update state */
mbed_official 532:fe11edbda85c 1309 hqspi->State = HAL_QSPI_STATE_BUSY_AUTO_POLLING;
mbed_official 532:fe11edbda85c 1310
mbed_official 532:fe11edbda85c 1311 /* Wait till BUSY flag reset */
mbed_official 532:fe11edbda85c 1312 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, hqspi->Timeout);
mbed_official 532:fe11edbda85c 1313
mbed_official 532:fe11edbda85c 1314 if (status == HAL_OK)
mbed_official 532:fe11edbda85c 1315 {
mbed_official 532:fe11edbda85c 1316 /* Configure QSPI: PSMAR register with the status match value */
mbed_official 532:fe11edbda85c 1317 WRITE_REG(hqspi->Instance->PSMAR, cfg->Match);
mbed_official 532:fe11edbda85c 1318
mbed_official 532:fe11edbda85c 1319 /* Configure QSPI: PSMKR register with the status mask value */
mbed_official 532:fe11edbda85c 1320 WRITE_REG(hqspi->Instance->PSMKR, cfg->Mask);
mbed_official 532:fe11edbda85c 1321
mbed_official 532:fe11edbda85c 1322 /* Configure QSPI: PIR register with the interval value */
mbed_official 532:fe11edbda85c 1323 WRITE_REG(hqspi->Instance->PIR, cfg->Interval);
mbed_official 532:fe11edbda85c 1324
mbed_official 532:fe11edbda85c 1325 /* Configure QSPI: CR register with Match mode and Automatic stop mode */
mbed_official 532:fe11edbda85c 1326 MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PMM | QUADSPI_CR_APMS),
mbed_official 532:fe11edbda85c 1327 (cfg->MatchMode | cfg->AutomaticStop));
mbed_official 532:fe11edbda85c 1328
mbed_official 532:fe11edbda85c 1329 /* Call the configuration function */
mbed_official 532:fe11edbda85c 1330 cmd->NbData = cfg->StatusBytesSize;
mbed_official 532:fe11edbda85c 1331 QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_AUTO_POLLING);
mbed_official 532:fe11edbda85c 1332
mbed_official 532:fe11edbda85c 1333 /* Enable the QSPI Transfer Error, FIFO threshold and status match Interrupt */
mbed_official 532:fe11edbda85c 1334 __HAL_QSPI_ENABLE_IT(hqspi, (QSPI_IT_FT | QSPI_IT_SM | QSPI_IT_TE));
mbed_official 532:fe11edbda85c 1335 }
mbed_official 532:fe11edbda85c 1336 }
mbed_official 532:fe11edbda85c 1337 else
mbed_official 532:fe11edbda85c 1338 {
mbed_official 532:fe11edbda85c 1339 status = HAL_BUSY;
mbed_official 532:fe11edbda85c 1340 }
mbed_official 532:fe11edbda85c 1341
mbed_official 532:fe11edbda85c 1342 /* Process unlocked */
mbed_official 532:fe11edbda85c 1343 __HAL_UNLOCK(hqspi);
mbed_official 532:fe11edbda85c 1344
mbed_official 532:fe11edbda85c 1345 /* Return function status */
mbed_official 532:fe11edbda85c 1346 return status;
mbed_official 532:fe11edbda85c 1347 }
mbed_official 532:fe11edbda85c 1348
mbed_official 532:fe11edbda85c 1349 /**
mbed_official 532:fe11edbda85c 1350 * @brief Configure the Memory Mapped mode.
mbed_official 532:fe11edbda85c 1351 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 1352 * @param cmd: structure that contains the command configuration information.
mbed_official 532:fe11edbda85c 1353 * @param cfg: structure that contains the memory mapped configuration information.
mbed_official 532:fe11edbda85c 1354 * @note This function is used only in Memory mapped Mode
mbed_official 532:fe11edbda85c 1355 * @retval HAL status
mbed_official 532:fe11edbda85c 1356 */
mbed_official 532:fe11edbda85c 1357 HAL_StatusTypeDef HAL_QSPI_MemoryMapped(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_MemoryMappedTypeDef *cfg)
mbed_official 532:fe11edbda85c 1358 {
mbed_official 532:fe11edbda85c 1359 HAL_StatusTypeDef status = HAL_ERROR;
mbed_official 532:fe11edbda85c 1360
mbed_official 532:fe11edbda85c 1361 /* Check the parameters */
mbed_official 532:fe11edbda85c 1362 assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode));
mbed_official 532:fe11edbda85c 1363 if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
mbed_official 532:fe11edbda85c 1364 {
mbed_official 532:fe11edbda85c 1365 assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction));
mbed_official 532:fe11edbda85c 1366 }
mbed_official 532:fe11edbda85c 1367
mbed_official 532:fe11edbda85c 1368 assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode));
mbed_official 532:fe11edbda85c 1369 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 532:fe11edbda85c 1370 {
mbed_official 532:fe11edbda85c 1371 assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize));
mbed_official 532:fe11edbda85c 1372 }
mbed_official 532:fe11edbda85c 1373
mbed_official 532:fe11edbda85c 1374 assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode));
mbed_official 532:fe11edbda85c 1375 if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
mbed_official 532:fe11edbda85c 1376 {
mbed_official 532:fe11edbda85c 1377 assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize));
mbed_official 532:fe11edbda85c 1378 }
mbed_official 532:fe11edbda85c 1379
mbed_official 532:fe11edbda85c 1380 assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles));
mbed_official 532:fe11edbda85c 1381 assert_param(IS_QSPI_DATA_MODE(cmd->DataMode));
mbed_official 532:fe11edbda85c 1382
mbed_official 532:fe11edbda85c 1383 assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode));
mbed_official 532:fe11edbda85c 1384 assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle));
mbed_official 532:fe11edbda85c 1385 assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode));
mbed_official 532:fe11edbda85c 1386
mbed_official 532:fe11edbda85c 1387 assert_param(IS_QSPI_TIMEOUT_ACTIVATION(cfg->TimeOutActivation));
mbed_official 532:fe11edbda85c 1388
mbed_official 532:fe11edbda85c 1389 /* Process locked */
mbed_official 532:fe11edbda85c 1390 __HAL_LOCK(hqspi);
mbed_official 532:fe11edbda85c 1391
mbed_official 532:fe11edbda85c 1392 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 532:fe11edbda85c 1393 {
mbed_official 532:fe11edbda85c 1394 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 532:fe11edbda85c 1395
mbed_official 532:fe11edbda85c 1396 /* Update state */
mbed_official 532:fe11edbda85c 1397 hqspi->State = HAL_QSPI_STATE_BUSY_MEM_MAPPED;
mbed_official 532:fe11edbda85c 1398
mbed_official 532:fe11edbda85c 1399 /* Wait till BUSY flag reset */
mbed_official 532:fe11edbda85c 1400 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, hqspi->Timeout);
mbed_official 532:fe11edbda85c 1401
mbed_official 532:fe11edbda85c 1402 if (status == HAL_OK)
mbed_official 532:fe11edbda85c 1403 {
mbed_official 532:fe11edbda85c 1404 /* Configure QSPI: CR register with time out counter enable */
mbed_official 532:fe11edbda85c 1405 MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_TCEN, cfg->TimeOutActivation);
mbed_official 532:fe11edbda85c 1406
mbed_official 532:fe11edbda85c 1407 if (cfg->TimeOutActivation == QSPI_TIMEOUT_COUNTER_ENABLE)
mbed_official 532:fe11edbda85c 1408 {
mbed_official 532:fe11edbda85c 1409 assert_param(IS_QSPI_TIMEOUT_PERIOD(cfg->TimeOutPeriod));
mbed_official 532:fe11edbda85c 1410
mbed_official 532:fe11edbda85c 1411 /* Configure QSPI: LPTR register with the low-power time out value */
mbed_official 532:fe11edbda85c 1412 WRITE_REG(hqspi->Instance->LPTR, cfg->TimeOutPeriod);
mbed_official 532:fe11edbda85c 1413
mbed_official 532:fe11edbda85c 1414 /* Enable the QSPI TimeOut Interrupt */
mbed_official 532:fe11edbda85c 1415 __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TO);
mbed_official 532:fe11edbda85c 1416 }
mbed_official 532:fe11edbda85c 1417
mbed_official 532:fe11edbda85c 1418 /* Call the configuration function */
mbed_official 532:fe11edbda85c 1419 QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED);
mbed_official 532:fe11edbda85c 1420
mbed_official 532:fe11edbda85c 1421 }
mbed_official 532:fe11edbda85c 1422 }
mbed_official 532:fe11edbda85c 1423 else
mbed_official 532:fe11edbda85c 1424 {
mbed_official 532:fe11edbda85c 1425 status = HAL_BUSY;
mbed_official 532:fe11edbda85c 1426
mbed_official 532:fe11edbda85c 1427 }
mbed_official 532:fe11edbda85c 1428
mbed_official 532:fe11edbda85c 1429 /* Process unlocked */
mbed_official 532:fe11edbda85c 1430 __HAL_UNLOCK(hqspi);
mbed_official 532:fe11edbda85c 1431
mbed_official 532:fe11edbda85c 1432 /* Return function status */
mbed_official 532:fe11edbda85c 1433 return status;
mbed_official 532:fe11edbda85c 1434 }
mbed_official 532:fe11edbda85c 1435
mbed_official 532:fe11edbda85c 1436 /**
mbed_official 532:fe11edbda85c 1437 * @brief Transfer Error callbacks
mbed_official 532:fe11edbda85c 1438 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 1439 * @retval None
mbed_official 532:fe11edbda85c 1440 */
mbed_official 532:fe11edbda85c 1441 __weak void HAL_QSPI_ErrorCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 532:fe11edbda85c 1442 {
mbed_official 532:fe11edbda85c 1443 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 532:fe11edbda85c 1444 the HAL_QSPI_ErrorCallback could be implemented in the user file
mbed_official 532:fe11edbda85c 1445 */
mbed_official 532:fe11edbda85c 1446 }
mbed_official 532:fe11edbda85c 1447
mbed_official 532:fe11edbda85c 1448 /**
mbed_official 532:fe11edbda85c 1449 * @brief Command completed callbacks.
mbed_official 532:fe11edbda85c 1450 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 1451 * @retval None
mbed_official 532:fe11edbda85c 1452 */
mbed_official 532:fe11edbda85c 1453 __weak void HAL_QSPI_CmdCpltCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 532:fe11edbda85c 1454 {
mbed_official 532:fe11edbda85c 1455 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 532:fe11edbda85c 1456 the HAL_QSPI_CmdCpltCallback could be implemented in the user file
mbed_official 532:fe11edbda85c 1457 */
mbed_official 532:fe11edbda85c 1458 }
mbed_official 532:fe11edbda85c 1459
mbed_official 532:fe11edbda85c 1460 /**
mbed_official 532:fe11edbda85c 1461 * @brief Rx Transfer completed callbacks.
mbed_official 532:fe11edbda85c 1462 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 1463 * @retval None
mbed_official 532:fe11edbda85c 1464 */
mbed_official 532:fe11edbda85c 1465 __weak void HAL_QSPI_RxCpltCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 532:fe11edbda85c 1466 {
mbed_official 532:fe11edbda85c 1467 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 532:fe11edbda85c 1468 the HAL_QSPI_RxCpltCallback could be implemented in the user file
mbed_official 532:fe11edbda85c 1469 */
mbed_official 532:fe11edbda85c 1470 }
mbed_official 532:fe11edbda85c 1471
mbed_official 532:fe11edbda85c 1472 /**
mbed_official 532:fe11edbda85c 1473 * @brief Tx Transfer completed callbacks.
mbed_official 532:fe11edbda85c 1474 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 1475 * @retval None
mbed_official 532:fe11edbda85c 1476 */
mbed_official 532:fe11edbda85c 1477 __weak void HAL_QSPI_TxCpltCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 532:fe11edbda85c 1478 {
mbed_official 532:fe11edbda85c 1479 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 532:fe11edbda85c 1480 the HAL_QSPI_TxCpltCallback could be implemented in the user file
mbed_official 532:fe11edbda85c 1481 */
mbed_official 532:fe11edbda85c 1482 }
mbed_official 532:fe11edbda85c 1483
mbed_official 532:fe11edbda85c 1484 /**
mbed_official 532:fe11edbda85c 1485 * @brief Rx Half Transfer completed callbacks.
mbed_official 532:fe11edbda85c 1486 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 1487 * @retval None
mbed_official 532:fe11edbda85c 1488 */
mbed_official 532:fe11edbda85c 1489 __weak void HAL_QSPI_RxHalfCpltCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 532:fe11edbda85c 1490 {
mbed_official 532:fe11edbda85c 1491 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 532:fe11edbda85c 1492 the HAL_QSPI_RxHalfCpltCallback could be implemented in the user file
mbed_official 532:fe11edbda85c 1493 */
mbed_official 532:fe11edbda85c 1494 }
mbed_official 532:fe11edbda85c 1495
mbed_official 532:fe11edbda85c 1496 /**
mbed_official 532:fe11edbda85c 1497 * @brief Tx Half Transfer completed callbacks.
mbed_official 532:fe11edbda85c 1498 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 1499 * @retval None
mbed_official 532:fe11edbda85c 1500 */
mbed_official 532:fe11edbda85c 1501 __weak void HAL_QSPI_TxHalfCpltCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 532:fe11edbda85c 1502 {
mbed_official 532:fe11edbda85c 1503 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 532:fe11edbda85c 1504 the HAL_QSPI_TxHalfCpltCallback could be implemented in the user file
mbed_official 532:fe11edbda85c 1505 */
mbed_official 532:fe11edbda85c 1506 }
mbed_official 532:fe11edbda85c 1507
mbed_official 532:fe11edbda85c 1508 /**
mbed_official 532:fe11edbda85c 1509 * @brief FIFO Threshold callbacks
mbed_official 532:fe11edbda85c 1510 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 1511 * @retval None
mbed_official 532:fe11edbda85c 1512 */
mbed_official 532:fe11edbda85c 1513 __weak void HAL_QSPI_FifoThresholdCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 532:fe11edbda85c 1514 {
mbed_official 532:fe11edbda85c 1515 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 532:fe11edbda85c 1516 the HAL_QSPI_FIFOThresholdCallback could be implemented in the user file
mbed_official 532:fe11edbda85c 1517 */
mbed_official 532:fe11edbda85c 1518 }
mbed_official 532:fe11edbda85c 1519
mbed_official 532:fe11edbda85c 1520 /**
mbed_official 532:fe11edbda85c 1521 * @brief Status Match callbacks
mbed_official 532:fe11edbda85c 1522 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 1523 * @retval None
mbed_official 532:fe11edbda85c 1524 */
mbed_official 532:fe11edbda85c 1525 __weak void HAL_QSPI_StatusMatchCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 532:fe11edbda85c 1526 {
mbed_official 532:fe11edbda85c 1527 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 532:fe11edbda85c 1528 the HAL_QSPI_StatusMatchCallback could be implemented in the user file
mbed_official 532:fe11edbda85c 1529 */
mbed_official 532:fe11edbda85c 1530 }
mbed_official 532:fe11edbda85c 1531
mbed_official 532:fe11edbda85c 1532 /**
mbed_official 532:fe11edbda85c 1533 * @brief Timeout callbacks
mbed_official 532:fe11edbda85c 1534 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 1535 * @retval None
mbed_official 532:fe11edbda85c 1536 */
mbed_official 532:fe11edbda85c 1537 __weak void HAL_QSPI_TimeOutCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 532:fe11edbda85c 1538 {
mbed_official 532:fe11edbda85c 1539 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 532:fe11edbda85c 1540 the HAL_QSPI_TimeOutCallback could be implemented in the user file
mbed_official 532:fe11edbda85c 1541 */
mbed_official 532:fe11edbda85c 1542 }
mbed_official 532:fe11edbda85c 1543
mbed_official 532:fe11edbda85c 1544 /**
mbed_official 532:fe11edbda85c 1545 * @}
mbed_official 532:fe11edbda85c 1546 */
mbed_official 532:fe11edbda85c 1547
mbed_official 532:fe11edbda85c 1548 /** @defgroup QSPI_Exported_Functions_Group3 Peripheral Control and State functions
mbed_official 532:fe11edbda85c 1549 * @brief QSPI control and State functions
mbed_official 532:fe11edbda85c 1550 *
mbed_official 532:fe11edbda85c 1551 @verbatim
mbed_official 532:fe11edbda85c 1552 ===============================================================================
mbed_official 532:fe11edbda85c 1553 ##### Peripheral Control and State functions #####
mbed_official 532:fe11edbda85c 1554 ===============================================================================
mbed_official 532:fe11edbda85c 1555 [..]
mbed_official 532:fe11edbda85c 1556 This subsection provides a set of functions allowing to :
mbed_official 532:fe11edbda85c 1557 (+) Check in run-time the state of the driver.
mbed_official 532:fe11edbda85c 1558 (+) Check the error code set during last operation.
mbed_official 532:fe11edbda85c 1559 (+) Abort any operation.
mbed_official 532:fe11edbda85c 1560 .....
mbed_official 532:fe11edbda85c 1561 @endverbatim
mbed_official 532:fe11edbda85c 1562 * @{
mbed_official 532:fe11edbda85c 1563 */
mbed_official 532:fe11edbda85c 1564
mbed_official 532:fe11edbda85c 1565 /**
mbed_official 532:fe11edbda85c 1566 * @brief Return the QSPI state.
mbed_official 532:fe11edbda85c 1567 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 1568 * @retval HAL state
mbed_official 532:fe11edbda85c 1569 */
mbed_official 532:fe11edbda85c 1570 HAL_QSPI_StateTypeDef HAL_QSPI_GetState(QSPI_HandleTypeDef *hqspi)
mbed_official 532:fe11edbda85c 1571 {
mbed_official 532:fe11edbda85c 1572 return hqspi->State;
mbed_official 532:fe11edbda85c 1573 }
mbed_official 532:fe11edbda85c 1574
mbed_official 532:fe11edbda85c 1575 /**
mbed_official 532:fe11edbda85c 1576 * @brief Return the QSPI error code
mbed_official 532:fe11edbda85c 1577 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 1578 * @retval QSPI Error Code
mbed_official 532:fe11edbda85c 1579 */
mbed_official 532:fe11edbda85c 1580 uint32_t HAL_QSPI_GetError(QSPI_HandleTypeDef *hqspi)
mbed_official 532:fe11edbda85c 1581 {
mbed_official 532:fe11edbda85c 1582 return hqspi->ErrorCode;
mbed_official 532:fe11edbda85c 1583 }
mbed_official 532:fe11edbda85c 1584
mbed_official 532:fe11edbda85c 1585 /**
mbed_official 532:fe11edbda85c 1586 * @brief Abort the current transmission
mbed_official 532:fe11edbda85c 1587 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 1588 * @retval HAL status
mbed_official 532:fe11edbda85c 1589 */
mbed_official 532:fe11edbda85c 1590 HAL_StatusTypeDef HAL_QSPI_Abort(QSPI_HandleTypeDef *hqspi)
mbed_official 532:fe11edbda85c 1591 {
mbed_official 532:fe11edbda85c 1592 HAL_StatusTypeDef status = HAL_ERROR;
mbed_official 532:fe11edbda85c 1593
mbed_official 532:fe11edbda85c 1594 /* Configure QSPI: CR register with Abort request */
mbed_official 532:fe11edbda85c 1595 SET_BIT(hqspi->Instance->CR, QUADSPI_CR_ABORT);
mbed_official 532:fe11edbda85c 1596
mbed_official 532:fe11edbda85c 1597 /* Wait until TC flag is set to go back in idle state */
mbed_official 532:fe11edbda85c 1598 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, hqspi->Timeout) != HAL_OK)
mbed_official 532:fe11edbda85c 1599 {
mbed_official 532:fe11edbda85c 1600 status = HAL_TIMEOUT;
mbed_official 532:fe11edbda85c 1601 }
mbed_official 532:fe11edbda85c 1602 else
mbed_official 532:fe11edbda85c 1603 {
mbed_official 532:fe11edbda85c 1604 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 532:fe11edbda85c 1605
mbed_official 532:fe11edbda85c 1606 /* Wait until BUSY flag is reset */
mbed_official 532:fe11edbda85c 1607 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, hqspi->Timeout);
mbed_official 532:fe11edbda85c 1608
mbed_official 532:fe11edbda85c 1609 /* Update state */
mbed_official 532:fe11edbda85c 1610 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 532:fe11edbda85c 1611 }
mbed_official 532:fe11edbda85c 1612
mbed_official 532:fe11edbda85c 1613 return status;
mbed_official 532:fe11edbda85c 1614 }
mbed_official 532:fe11edbda85c 1615
mbed_official 532:fe11edbda85c 1616 /** @brief Set QSPI timeout
mbed_official 532:fe11edbda85c 1617 * @param hqspi: QSPI handle.
mbed_official 532:fe11edbda85c 1618 * @param Timeout: Timeout for the QSPI memory access.
mbed_official 532:fe11edbda85c 1619 * @retval None
mbed_official 532:fe11edbda85c 1620 */
mbed_official 532:fe11edbda85c 1621 void HAL_QSPI_SetTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Timeout)
mbed_official 532:fe11edbda85c 1622 {
mbed_official 532:fe11edbda85c 1623 hqspi->Timeout = Timeout;
mbed_official 532:fe11edbda85c 1624 }
mbed_official 532:fe11edbda85c 1625
mbed_official 532:fe11edbda85c 1626 /**
mbed_official 532:fe11edbda85c 1627 * @}
mbed_official 532:fe11edbda85c 1628 */
mbed_official 532:fe11edbda85c 1629
mbed_official 532:fe11edbda85c 1630 /* Private functions ---------------------------------------------------------*/
mbed_official 532:fe11edbda85c 1631
mbed_official 532:fe11edbda85c 1632 /**
mbed_official 532:fe11edbda85c 1633 * @brief DMA QSPI receive process complete callback.
mbed_official 532:fe11edbda85c 1634 * @param hdma: DMA handle
mbed_official 532:fe11edbda85c 1635 * @retval None
mbed_official 532:fe11edbda85c 1636 */
mbed_official 532:fe11edbda85c 1637 static void QSPI_DMARxCplt(DMA_HandleTypeDef *hdma)
mbed_official 532:fe11edbda85c 1638 {
mbed_official 532:fe11edbda85c 1639 QSPI_HandleTypeDef* hqspi = ( QSPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 532:fe11edbda85c 1640 hqspi->RxXferCount = 0;
mbed_official 532:fe11edbda85c 1641
mbed_official 532:fe11edbda85c 1642 /* Wait for QSPI TC Flag */
mbed_official 532:fe11edbda85c 1643 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, hqspi->Timeout) != HAL_OK)
mbed_official 532:fe11edbda85c 1644 {
mbed_official 532:fe11edbda85c 1645 /* Time out Occurred */
mbed_official 532:fe11edbda85c 1646 HAL_QSPI_ErrorCallback(hqspi);
mbed_official 532:fe11edbda85c 1647 }
mbed_official 532:fe11edbda85c 1648 else
mbed_official 532:fe11edbda85c 1649 {
mbed_official 532:fe11edbda85c 1650 /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */
mbed_official 532:fe11edbda85c 1651 CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
mbed_official 532:fe11edbda85c 1652
mbed_official 532:fe11edbda85c 1653 /* Disable the DMA channel */
mbed_official 532:fe11edbda85c 1654 HAL_DMA_Abort(hdma);
mbed_official 532:fe11edbda85c 1655
mbed_official 532:fe11edbda85c 1656 /* Clear Transfer Complete bit */
mbed_official 532:fe11edbda85c 1657 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 532:fe11edbda85c 1658
mbed_official 532:fe11edbda85c 1659 /* Workaround - Extra data written in the FIFO at the end of a read transfer */
mbed_official 532:fe11edbda85c 1660 HAL_QSPI_Abort(hqspi);
mbed_official 532:fe11edbda85c 1661
mbed_official 532:fe11edbda85c 1662 /* Update state */
mbed_official 532:fe11edbda85c 1663 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 532:fe11edbda85c 1664
mbed_official 532:fe11edbda85c 1665 HAL_QSPI_RxCpltCallback(hqspi);
mbed_official 532:fe11edbda85c 1666 }
mbed_official 532:fe11edbda85c 1667 }
mbed_official 532:fe11edbda85c 1668
mbed_official 532:fe11edbda85c 1669 /**
mbed_official 532:fe11edbda85c 1670 * @brief DMA QSPI transmit process complete callback.
mbed_official 532:fe11edbda85c 1671 * @param hdma: DMA handle
mbed_official 532:fe11edbda85c 1672 * @retval None
mbed_official 532:fe11edbda85c 1673 */
mbed_official 532:fe11edbda85c 1674 static void QSPI_DMATxCplt(DMA_HandleTypeDef *hdma)
mbed_official 532:fe11edbda85c 1675 {
mbed_official 532:fe11edbda85c 1676 QSPI_HandleTypeDef* hqspi = ( QSPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 532:fe11edbda85c 1677 hqspi->TxXferCount = 0;
mbed_official 532:fe11edbda85c 1678
mbed_official 532:fe11edbda85c 1679 /* Wait for QSPI TC Flag */
mbed_official 532:fe11edbda85c 1680 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, hqspi->Timeout) != HAL_OK)
mbed_official 532:fe11edbda85c 1681 {
mbed_official 532:fe11edbda85c 1682 /* Time out Occurred */
mbed_official 532:fe11edbda85c 1683 HAL_QSPI_ErrorCallback(hqspi);
mbed_official 532:fe11edbda85c 1684 }
mbed_official 532:fe11edbda85c 1685 else
mbed_official 532:fe11edbda85c 1686 {
mbed_official 532:fe11edbda85c 1687 /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */
mbed_official 532:fe11edbda85c 1688 CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
mbed_official 532:fe11edbda85c 1689
mbed_official 532:fe11edbda85c 1690 /* Disable the DMA channel */
mbed_official 532:fe11edbda85c 1691 HAL_DMA_Abort(hdma);
mbed_official 532:fe11edbda85c 1692
mbed_official 532:fe11edbda85c 1693 /* Clear Transfer Complete bit */
mbed_official 532:fe11edbda85c 1694 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 532:fe11edbda85c 1695
mbed_official 532:fe11edbda85c 1696 /* Clear Busy bit */
mbed_official 532:fe11edbda85c 1697 HAL_QSPI_Abort(hqspi);
mbed_official 532:fe11edbda85c 1698
mbed_official 532:fe11edbda85c 1699 /* Update state */
mbed_official 532:fe11edbda85c 1700 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 532:fe11edbda85c 1701
mbed_official 532:fe11edbda85c 1702 HAL_QSPI_TxCpltCallback(hqspi);
mbed_official 532:fe11edbda85c 1703 }
mbed_official 532:fe11edbda85c 1704 }
mbed_official 532:fe11edbda85c 1705
mbed_official 532:fe11edbda85c 1706 /**
mbed_official 532:fe11edbda85c 1707 * @brief DMA QSPI receive process half complete callback
mbed_official 532:fe11edbda85c 1708 * @param hdma : DMA handle
mbed_official 532:fe11edbda85c 1709 * @retval None
mbed_official 532:fe11edbda85c 1710 */
mbed_official 532:fe11edbda85c 1711 static void QSPI_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
mbed_official 532:fe11edbda85c 1712 {
mbed_official 532:fe11edbda85c 1713 QSPI_HandleTypeDef* hqspi = (QSPI_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
mbed_official 532:fe11edbda85c 1714
mbed_official 532:fe11edbda85c 1715 HAL_QSPI_RxHalfCpltCallback(hqspi);
mbed_official 532:fe11edbda85c 1716 }
mbed_official 532:fe11edbda85c 1717
mbed_official 532:fe11edbda85c 1718 /**
mbed_official 532:fe11edbda85c 1719 * @brief DMA QSPI transmit process half complete callback
mbed_official 532:fe11edbda85c 1720 * @param hdma : DMA handle
mbed_official 532:fe11edbda85c 1721 * @retval None
mbed_official 532:fe11edbda85c 1722 */
mbed_official 532:fe11edbda85c 1723 static void QSPI_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
mbed_official 532:fe11edbda85c 1724 {
mbed_official 532:fe11edbda85c 1725 QSPI_HandleTypeDef* hqspi = (QSPI_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
mbed_official 532:fe11edbda85c 1726
mbed_official 532:fe11edbda85c 1727 HAL_QSPI_TxHalfCpltCallback(hqspi);
mbed_official 532:fe11edbda85c 1728 }
mbed_official 532:fe11edbda85c 1729
mbed_official 532:fe11edbda85c 1730 /**
mbed_official 532:fe11edbda85c 1731 * @brief DMA QSPI communication error callback.
mbed_official 532:fe11edbda85c 1732 * @param hdma: DMA handle
mbed_official 532:fe11edbda85c 1733 * @retval None
mbed_official 532:fe11edbda85c 1734 */
mbed_official 532:fe11edbda85c 1735 static void QSPI_DMAError(DMA_HandleTypeDef *hdma)
mbed_official 532:fe11edbda85c 1736 {
mbed_official 532:fe11edbda85c 1737 QSPI_HandleTypeDef* hqspi = ( QSPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 532:fe11edbda85c 1738
mbed_official 532:fe11edbda85c 1739 hqspi->RxXferCount = 0;
mbed_official 532:fe11edbda85c 1740 hqspi->TxXferCount = 0;
mbed_official 532:fe11edbda85c 1741 hqspi->State = HAL_QSPI_STATE_ERROR;
mbed_official 532:fe11edbda85c 1742 hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA;
mbed_official 532:fe11edbda85c 1743
mbed_official 532:fe11edbda85c 1744 HAL_QSPI_ErrorCallback(hqspi);
mbed_official 532:fe11edbda85c 1745 }
mbed_official 532:fe11edbda85c 1746
mbed_official 532:fe11edbda85c 1747 /**
mbed_official 532:fe11edbda85c 1748 * @brief This function wait a flag state until time out.
mbed_official 532:fe11edbda85c 1749 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 1750 * @param Flag: Flag checked
mbed_official 532:fe11edbda85c 1751 * @param State: Value of the flag expected
mbed_official 532:fe11edbda85c 1752 * @param Timeout: Duration of the time out
mbed_official 532:fe11edbda85c 1753 * @retval HAL status
mbed_official 532:fe11edbda85c 1754 */
mbed_official 532:fe11edbda85c 1755 static HAL_StatusTypeDef QSPI_WaitFlagStateUntilTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Flag,
mbed_official 532:fe11edbda85c 1756 FlagStatus State, uint32_t Timeout)
mbed_official 532:fe11edbda85c 1757 {
mbed_official 532:fe11edbda85c 1758 uint32_t tickstart = HAL_GetTick();
mbed_official 532:fe11edbda85c 1759
mbed_official 532:fe11edbda85c 1760 /* Wait until flag is in expected state */
mbed_official 532:fe11edbda85c 1761 while((FlagStatus)(__HAL_QSPI_GET_FLAG(hqspi, Flag)) != State)
mbed_official 532:fe11edbda85c 1762 {
mbed_official 532:fe11edbda85c 1763 /* Check for the Timeout */
mbed_official 532:fe11edbda85c 1764 if (Timeout != HAL_MAX_DELAY)
mbed_official 532:fe11edbda85c 1765 {
mbed_official 532:fe11edbda85c 1766 if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
mbed_official 532:fe11edbda85c 1767 {
mbed_official 532:fe11edbda85c 1768 hqspi->State = HAL_QSPI_STATE_ERROR;
mbed_official 532:fe11edbda85c 1769 hqspi->ErrorCode |= HAL_QSPI_ERROR_TIMEOUT;
mbed_official 532:fe11edbda85c 1770
mbed_official 532:fe11edbda85c 1771 return HAL_TIMEOUT;
mbed_official 532:fe11edbda85c 1772 }
mbed_official 532:fe11edbda85c 1773 }
mbed_official 532:fe11edbda85c 1774 }
mbed_official 532:fe11edbda85c 1775 return HAL_OK;
mbed_official 532:fe11edbda85c 1776 }
mbed_official 532:fe11edbda85c 1777
mbed_official 532:fe11edbda85c 1778 /**
mbed_official 532:fe11edbda85c 1779 * @brief This function configures the communication registers
mbed_official 532:fe11edbda85c 1780 * @param hqspi: QSPI handle
mbed_official 532:fe11edbda85c 1781 * @param cmd: structure that contains the command configuration information
mbed_official 532:fe11edbda85c 1782 * @param FunctionalMode: functional mode to configured
mbed_official 532:fe11edbda85c 1783 * This parameter can be one of the following values:
mbed_official 532:fe11edbda85c 1784 * @arg QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE: Indirect write mode
mbed_official 532:fe11edbda85c 1785 * @arg QSPI_FUNCTIONAL_MODE_INDIRECT_READ: Indirect read mode
mbed_official 532:fe11edbda85c 1786 * @arg QSPI_FUNCTIONAL_MODE_AUTO_POLLING: Automatic polling mode
mbed_official 532:fe11edbda85c 1787 * @arg QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED: Memory-mapped mode
mbed_official 532:fe11edbda85c 1788 * @retval None
mbed_official 532:fe11edbda85c 1789 */
mbed_official 532:fe11edbda85c 1790 static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t FunctionalMode)
mbed_official 532:fe11edbda85c 1791 {
mbed_official 532:fe11edbda85c 1792 assert_param(IS_QSPI_FUNCTIONAL_MODE(FunctionalMode));
mbed_official 532:fe11edbda85c 1793
mbed_official 532:fe11edbda85c 1794 if ((cmd->DataMode != QSPI_DATA_NONE) && (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED))
mbed_official 532:fe11edbda85c 1795 {
mbed_official 532:fe11edbda85c 1796 /* Configure QSPI: DLR register with the number of data to read or write */
mbed_official 532:fe11edbda85c 1797 WRITE_REG(hqspi->Instance->DLR, (cmd->NbData - 1));
mbed_official 532:fe11edbda85c 1798 }
mbed_official 532:fe11edbda85c 1799
mbed_official 532:fe11edbda85c 1800 if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
mbed_official 532:fe11edbda85c 1801 {
mbed_official 532:fe11edbda85c 1802 if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
mbed_official 532:fe11edbda85c 1803 {
mbed_official 532:fe11edbda85c 1804 /* Configure QSPI: ABR register with alternate bytes value */
mbed_official 532:fe11edbda85c 1805 WRITE_REG(hqspi->Instance->ABR, cmd->AlternateBytes);
mbed_official 532:fe11edbda85c 1806
mbed_official 532:fe11edbda85c 1807 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 532:fe11edbda85c 1808 {
mbed_official 532:fe11edbda85c 1809 /*---- Command with instruction, address and alternate bytes ----*/
mbed_official 532:fe11edbda85c 1810 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 532:fe11edbda85c 1811 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 532:fe11edbda85c 1812 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateBytesSize |
mbed_official 532:fe11edbda85c 1813 cmd->AlternateByteMode | cmd->AddressSize | cmd->AddressMode |
mbed_official 532:fe11edbda85c 1814 cmd->InstructionMode | cmd->Instruction | FunctionalMode));
mbed_official 532:fe11edbda85c 1815
mbed_official 532:fe11edbda85c 1816 if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED)
mbed_official 532:fe11edbda85c 1817 {
mbed_official 532:fe11edbda85c 1818 /* Configure QSPI: AR register with address value */
mbed_official 532:fe11edbda85c 1819 WRITE_REG(hqspi->Instance->AR, cmd->Address);
mbed_official 532:fe11edbda85c 1820 }
mbed_official 532:fe11edbda85c 1821 }
mbed_official 532:fe11edbda85c 1822 else
mbed_official 532:fe11edbda85c 1823 {
mbed_official 532:fe11edbda85c 1824 /*---- Command with instruction and alternate bytes ----*/
mbed_official 532:fe11edbda85c 1825 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 532:fe11edbda85c 1826 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 532:fe11edbda85c 1827 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateBytesSize |
mbed_official 532:fe11edbda85c 1828 cmd->AlternateByteMode | cmd->AddressMode | cmd->InstructionMode |
mbed_official 532:fe11edbda85c 1829 cmd->Instruction | FunctionalMode));
mbed_official 532:fe11edbda85c 1830 }
mbed_official 532:fe11edbda85c 1831 }
mbed_official 532:fe11edbda85c 1832 else
mbed_official 532:fe11edbda85c 1833 {
mbed_official 532:fe11edbda85c 1834 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 532:fe11edbda85c 1835 {
mbed_official 532:fe11edbda85c 1836 /*---- Command with instruction and address ----*/
mbed_official 532:fe11edbda85c 1837 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 532:fe11edbda85c 1838 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 532:fe11edbda85c 1839 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateByteMode |
mbed_official 532:fe11edbda85c 1840 cmd->AddressSize | cmd->AddressMode | cmd->InstructionMode |
mbed_official 532:fe11edbda85c 1841 cmd->Instruction | FunctionalMode));
mbed_official 532:fe11edbda85c 1842
mbed_official 532:fe11edbda85c 1843 if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED)
mbed_official 532:fe11edbda85c 1844 {
mbed_official 532:fe11edbda85c 1845 /* Configure QSPI: AR register with address value */
mbed_official 532:fe11edbda85c 1846 WRITE_REG(hqspi->Instance->AR, cmd->Address);
mbed_official 532:fe11edbda85c 1847 }
mbed_official 532:fe11edbda85c 1848 }
mbed_official 532:fe11edbda85c 1849 else
mbed_official 532:fe11edbda85c 1850 {
mbed_official 532:fe11edbda85c 1851 /*---- Command with only instruction ----*/
mbed_official 532:fe11edbda85c 1852 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 532:fe11edbda85c 1853 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 532:fe11edbda85c 1854 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateByteMode |
mbed_official 532:fe11edbda85c 1855 cmd->AddressMode | cmd->InstructionMode | cmd->Instruction |
mbed_official 532:fe11edbda85c 1856 FunctionalMode));
mbed_official 532:fe11edbda85c 1857 }
mbed_official 532:fe11edbda85c 1858 }
mbed_official 532:fe11edbda85c 1859 }
mbed_official 532:fe11edbda85c 1860 else
mbed_official 532:fe11edbda85c 1861 {
mbed_official 532:fe11edbda85c 1862 if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
mbed_official 532:fe11edbda85c 1863 {
mbed_official 532:fe11edbda85c 1864 /* Configure QSPI: ABR register with alternate bytes value */
mbed_official 532:fe11edbda85c 1865 WRITE_REG(hqspi->Instance->ABR, cmd->AlternateBytes);
mbed_official 532:fe11edbda85c 1866
mbed_official 532:fe11edbda85c 1867 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 532:fe11edbda85c 1868 {
mbed_official 532:fe11edbda85c 1869 /*---- Command with address and alternate bytes ----*/
mbed_official 532:fe11edbda85c 1870 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 532:fe11edbda85c 1871 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 532:fe11edbda85c 1872 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateBytesSize |
mbed_official 532:fe11edbda85c 1873 cmd->AlternateByteMode | cmd->AddressSize | cmd->AddressMode |
mbed_official 532:fe11edbda85c 1874 cmd->InstructionMode | FunctionalMode));
mbed_official 532:fe11edbda85c 1875
mbed_official 532:fe11edbda85c 1876 if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED)
mbed_official 532:fe11edbda85c 1877 {
mbed_official 532:fe11edbda85c 1878 /* Configure QSPI: AR register with address value */
mbed_official 532:fe11edbda85c 1879 WRITE_REG(hqspi->Instance->AR, cmd->Address);
mbed_official 532:fe11edbda85c 1880 }
mbed_official 532:fe11edbda85c 1881 }
mbed_official 532:fe11edbda85c 1882 else
mbed_official 532:fe11edbda85c 1883 {
mbed_official 532:fe11edbda85c 1884 /*---- Command with only alternate bytes ----*/
mbed_official 532:fe11edbda85c 1885 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 532:fe11edbda85c 1886 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 532:fe11edbda85c 1887 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateBytesSize |
mbed_official 532:fe11edbda85c 1888 cmd->AlternateByteMode | cmd->AddressMode | cmd->InstructionMode |
mbed_official 532:fe11edbda85c 1889 FunctionalMode));
mbed_official 532:fe11edbda85c 1890 }
mbed_official 532:fe11edbda85c 1891 }
mbed_official 532:fe11edbda85c 1892 else
mbed_official 532:fe11edbda85c 1893 {
mbed_official 532:fe11edbda85c 1894 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 532:fe11edbda85c 1895 {
mbed_official 532:fe11edbda85c 1896 /*---- Command with only address ----*/
mbed_official 532:fe11edbda85c 1897 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 532:fe11edbda85c 1898 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 532:fe11edbda85c 1899 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateByteMode |
mbed_official 532:fe11edbda85c 1900 cmd->AddressSize | cmd->AddressMode | cmd->InstructionMode |
mbed_official 532:fe11edbda85c 1901 FunctionalMode));
mbed_official 532:fe11edbda85c 1902
mbed_official 532:fe11edbda85c 1903 if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED)
mbed_official 532:fe11edbda85c 1904 {
mbed_official 532:fe11edbda85c 1905 /* Configure QSPI: AR register with address value */
mbed_official 532:fe11edbda85c 1906 WRITE_REG(hqspi->Instance->AR, cmd->Address);
mbed_official 532:fe11edbda85c 1907 }
mbed_official 532:fe11edbda85c 1908 }
mbed_official 532:fe11edbda85c 1909 else
mbed_official 532:fe11edbda85c 1910 {
mbed_official 532:fe11edbda85c 1911 /*---- Command with only data phase ----*/
mbed_official 532:fe11edbda85c 1912 if (cmd->DataMode != QSPI_DATA_NONE)
mbed_official 532:fe11edbda85c 1913 {
mbed_official 532:fe11edbda85c 1914 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 532:fe11edbda85c 1915 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 532:fe11edbda85c 1916 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateByteMode |
mbed_official 532:fe11edbda85c 1917 cmd->AddressMode | cmd->InstructionMode | FunctionalMode));
mbed_official 532:fe11edbda85c 1918 }
mbed_official 532:fe11edbda85c 1919 }
mbed_official 532:fe11edbda85c 1920 }
mbed_official 532:fe11edbda85c 1921 }
mbed_official 532:fe11edbda85c 1922 }
mbed_official 532:fe11edbda85c 1923
mbed_official 532:fe11edbda85c 1924 /**
mbed_official 532:fe11edbda85c 1925 * @}
mbed_official 532:fe11edbda85c 1926 */
mbed_official 532:fe11edbda85c 1927
mbed_official 532:fe11edbda85c 1928 /**
mbed_official 532:fe11edbda85c 1929 * @}
mbed_official 532:fe11edbda85c 1930 */
mbed_official 532:fe11edbda85c 1931 #endif /* STM32F446xx */
mbed_official 532:fe11edbda85c 1932
mbed_official 532:fe11edbda85c 1933 #endif /* HAL_QSPI_MODULE_ENABLED */
mbed_official 532:fe11edbda85c 1934 /**
mbed_official 532:fe11edbda85c 1935 * @}
mbed_official 532:fe11edbda85c 1936 */
mbed_official 532:fe11edbda85c 1937
mbed_official 532:fe11edbda85c 1938 /**
mbed_official 532:fe11edbda85c 1939 * @}
mbed_official 532:fe11edbda85c 1940 */
mbed_official 532:fe11edbda85c 1941
mbed_official 532:fe11edbda85c 1942 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/