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Last commit 20 Feb 2019 by 
mbed official
targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_i2s.h@630:825f75ca301e, 2015-09-28 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Sep 28 10:45:10 2015 +0100
- Revision:
- 630:825f75ca301e
- Parent:
- 441:d2c15dda23c1
Synchronized with git revision 54fbe4144faf309c37205a5d39fa665daa919f10
Full URL: https://github.com/mbedmicro/mbed/commit/54fbe4144faf309c37205a5d39fa665daa919f10/
NUCLEO_F031K6 : Add new target
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 340:28d1f895c6fe | 1 | /** |
| mbed_official | 340:28d1f895c6fe | 2 | ****************************************************************************** |
| mbed_official | 340:28d1f895c6fe | 3 | * @file stm32f0xx_hal_i2s.h |
| mbed_official | 340:28d1f895c6fe | 4 | * @author MCD Application Team |
| mbed_official | 630:825f75ca301e | 5 | * @version V1.3.0 |
| mbed_official | 630:825f75ca301e | 6 | * @date 26-June-2015 |
| mbed_official | 340:28d1f895c6fe | 7 | * @brief Header file of I2S HAL module. |
| mbed_official | 340:28d1f895c6fe | 8 | ****************************************************************************** |
| mbed_official | 340:28d1f895c6fe | 9 | * @attention |
| mbed_official | 340:28d1f895c6fe | 10 | * |
| mbed_official | 630:825f75ca301e | 11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
| mbed_official | 340:28d1f895c6fe | 12 | * |
| mbed_official | 340:28d1f895c6fe | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 340:28d1f895c6fe | 14 | * are permitted provided that the following conditions are met: |
| mbed_official | 340:28d1f895c6fe | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 340:28d1f895c6fe | 16 | * this list of conditions and the following disclaimer. |
| mbed_official | 340:28d1f895c6fe | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 340:28d1f895c6fe | 18 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 340:28d1f895c6fe | 19 | * and/or other materials provided with the distribution. |
| mbed_official | 340:28d1f895c6fe | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 340:28d1f895c6fe | 21 | * may be used to endorse or promote products derived from this software |
| mbed_official | 340:28d1f895c6fe | 22 | * without specific prior written permission. |
| mbed_official | 340:28d1f895c6fe | 23 | * |
| mbed_official | 340:28d1f895c6fe | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 340:28d1f895c6fe | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 340:28d1f895c6fe | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 340:28d1f895c6fe | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 340:28d1f895c6fe | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 340:28d1f895c6fe | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 340:28d1f895c6fe | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 340:28d1f895c6fe | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 340:28d1f895c6fe | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 340:28d1f895c6fe | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 340:28d1f895c6fe | 34 | * |
| mbed_official | 340:28d1f895c6fe | 35 | ****************************************************************************** |
| mbed_official | 340:28d1f895c6fe | 36 | */ |
| mbed_official | 340:28d1f895c6fe | 37 | |
| mbed_official | 340:28d1f895c6fe | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 39 | #ifndef __STM32F0xx_HAL_I2S_H |
| mbed_official | 340:28d1f895c6fe | 40 | #define __STM32F0xx_HAL_I2S_H |
| mbed_official | 340:28d1f895c6fe | 41 | |
| mbed_official | 340:28d1f895c6fe | 42 | #ifdef __cplusplus |
| mbed_official | 340:28d1f895c6fe | 43 | extern "C" { |
| mbed_official | 340:28d1f895c6fe | 44 | #endif |
| mbed_official | 340:28d1f895c6fe | 45 | |
| mbed_official | 340:28d1f895c6fe | 46 | #if defined(STM32F031x6) || defined(STM32F038xx) || \ |
| mbed_official | 340:28d1f895c6fe | 47 | defined(STM32F051x8) || defined(STM32F058xx) || \ |
| mbed_official | 340:28d1f895c6fe | 48 | defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \ |
| mbed_official | 340:28d1f895c6fe | 49 | defined(STM32F042x6) || defined(STM32F048xx) || \ |
| mbed_official | 340:28d1f895c6fe | 50 | defined(STM32F091xC) || defined(STM32F098xx) |
| mbed_official | 340:28d1f895c6fe | 51 | |
| mbed_official | 340:28d1f895c6fe | 52 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 53 | #include "stm32f0xx_hal_def.h" |
| mbed_official | 340:28d1f895c6fe | 54 | |
| mbed_official | 340:28d1f895c6fe | 55 | /** @addtogroup STM32F0xx_HAL_Driver |
| mbed_official | 340:28d1f895c6fe | 56 | * @{ |
| mbed_official | 340:28d1f895c6fe | 57 | */ |
| mbed_official | 340:28d1f895c6fe | 58 | |
| mbed_official | 340:28d1f895c6fe | 59 | /** @addtogroup I2S |
| mbed_official | 340:28d1f895c6fe | 60 | * @{ |
| mbed_official | 340:28d1f895c6fe | 61 | */ |
| mbed_official | 340:28d1f895c6fe | 62 | |
| mbed_official | 340:28d1f895c6fe | 63 | /* Exported types ------------------------------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 64 | /** @defgroup I2S_Exported_Types I2S Exported Types |
| mbed_official | 340:28d1f895c6fe | 65 | * @{ |
| mbed_official | 340:28d1f895c6fe | 66 | */ |
| mbed_official | 340:28d1f895c6fe | 67 | |
| mbed_official | 340:28d1f895c6fe | 68 | /** |
| mbed_official | 340:28d1f895c6fe | 69 | * @brief I2S Init structure definition |
| mbed_official | 340:28d1f895c6fe | 70 | */ |
| mbed_official | 340:28d1f895c6fe | 71 | typedef struct |
| mbed_official | 340:28d1f895c6fe | 72 | { |
| mbed_official | 340:28d1f895c6fe | 73 | uint32_t Mode; /*!< Specifies the I2S operating mode. |
| mbed_official | 340:28d1f895c6fe | 74 | This parameter can be a value of @ref I2S_Mode */ |
| mbed_official | 340:28d1f895c6fe | 75 | |
| mbed_official | 340:28d1f895c6fe | 76 | uint32_t Standard; /*!< Specifies the standard used for the I2S communication. |
| mbed_official | 340:28d1f895c6fe | 77 | This parameter can be a value of @ref I2S_Standard */ |
| mbed_official | 340:28d1f895c6fe | 78 | |
| mbed_official | 340:28d1f895c6fe | 79 | uint32_t DataFormat; /*!< Specifies the data format for the I2S communication. |
| mbed_official | 340:28d1f895c6fe | 80 | This parameter can be a value of @ref I2S_Data_Format */ |
| mbed_official | 340:28d1f895c6fe | 81 | |
| mbed_official | 340:28d1f895c6fe | 82 | uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. |
| mbed_official | 340:28d1f895c6fe | 83 | This parameter can be a value of @ref I2S_MCLK_Output */ |
| mbed_official | 340:28d1f895c6fe | 84 | |
| mbed_official | 340:28d1f895c6fe | 85 | uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication. |
| mbed_official | 340:28d1f895c6fe | 86 | This parameter can be a value of @ref I2S_Audio_Frequency */ |
| mbed_official | 340:28d1f895c6fe | 87 | |
| mbed_official | 340:28d1f895c6fe | 88 | uint32_t CPOL; /*!< Specifies the idle state of the I2S clock. |
| mbed_official | 340:28d1f895c6fe | 89 | This parameter can be a value of @ref I2S_Clock_Polarity */ |
| mbed_official | 340:28d1f895c6fe | 90 | }I2S_InitTypeDef; |
| mbed_official | 340:28d1f895c6fe | 91 | |
| mbed_official | 340:28d1f895c6fe | 92 | /** |
| mbed_official | 340:28d1f895c6fe | 93 | * @brief HAL State structures definition |
| mbed_official | 340:28d1f895c6fe | 94 | */ |
| mbed_official | 340:28d1f895c6fe | 95 | typedef enum |
| mbed_official | 340:28d1f895c6fe | 96 | { |
| mbed_official | 340:28d1f895c6fe | 97 | HAL_I2S_STATE_RESET = 0x00, /*!< I2S not yet initialized or disabled */ |
| mbed_official | 340:28d1f895c6fe | 98 | HAL_I2S_STATE_READY = 0x01, /*!< I2S initialized and ready for use */ |
| mbed_official | 340:28d1f895c6fe | 99 | HAL_I2S_STATE_BUSY = 0x02, /*!< I2S internal process is ongoing */ |
| mbed_official | 340:28d1f895c6fe | 100 | HAL_I2S_STATE_BUSY_TX = 0x03, /*!< Data Transmission process is ongoing */ |
| mbed_official | 340:28d1f895c6fe | 101 | HAL_I2S_STATE_BUSY_RX = 0x04, /*!< Data Reception process is ongoing */ |
| mbed_official | 340:28d1f895c6fe | 102 | HAL_I2S_STATE_PAUSE = 0x06, /*!< I2S pause state: used in case of DMA */ |
| mbed_official | 340:28d1f895c6fe | 103 | HAL_I2S_STATE_ERROR = 0x07 /*!< I2S error state */ |
| mbed_official | 340:28d1f895c6fe | 104 | }HAL_I2S_StateTypeDef; |
| mbed_official | 340:28d1f895c6fe | 105 | |
| mbed_official | 340:28d1f895c6fe | 106 | /** |
| mbed_official | 340:28d1f895c6fe | 107 | * @brief I2S handle Structure definition |
| mbed_official | 340:28d1f895c6fe | 108 | */ |
| mbed_official | 340:28d1f895c6fe | 109 | typedef struct |
| mbed_official | 340:28d1f895c6fe | 110 | { |
| mbed_official | 441:d2c15dda23c1 | 111 | SPI_TypeDef *Instance; /*!< I2S registers base address */ |
| mbed_official | 340:28d1f895c6fe | 112 | |
| mbed_official | 441:d2c15dda23c1 | 113 | I2S_InitTypeDef Init; /*!< I2S communication parameters */ |
| mbed_official | 340:28d1f895c6fe | 114 | |
| mbed_official | 441:d2c15dda23c1 | 115 | uint16_t *pTxBuffPtr; /*!< Pointer to I2S Tx transfer buffer */ |
| mbed_official | 340:28d1f895c6fe | 116 | |
| mbed_official | 441:d2c15dda23c1 | 117 | __IO uint16_t TxXferSize; /*!< I2S Tx transfer size */ |
| mbed_official | 340:28d1f895c6fe | 118 | |
| mbed_official | 441:d2c15dda23c1 | 119 | __IO uint16_t TxXferCount; /*!< I2S Tx transfer Counter */ |
| mbed_official | 340:28d1f895c6fe | 120 | |
| mbed_official | 441:d2c15dda23c1 | 121 | uint16_t *pRxBuffPtr; /*!< Pointer to I2S Rx transfer buffer */ |
| mbed_official | 340:28d1f895c6fe | 122 | |
| mbed_official | 441:d2c15dda23c1 | 123 | __IO uint16_t RxXferSize; /*!< I2S Rx transfer size */ |
| mbed_official | 340:28d1f895c6fe | 124 | |
| mbed_official | 441:d2c15dda23c1 | 125 | __IO uint16_t RxXferCount; /*!< I2S Rx transfer counter |
| mbed_official | 340:28d1f895c6fe | 126 | (This field is initialized at the |
| mbed_official | 340:28d1f895c6fe | 127 | same value as transfer size at the |
| mbed_official | 340:28d1f895c6fe | 128 | beginning of the transfer and |
| mbed_official | 340:28d1f895c6fe | 129 | decremented when a sample is received. |
| mbed_official | 340:28d1f895c6fe | 130 | NbSamplesReceived = RxBufferSize-RxBufferCount) */ |
| mbed_official | 340:28d1f895c6fe | 131 | |
| mbed_official | 441:d2c15dda23c1 | 132 | DMA_HandleTypeDef *hdmatx; /*!< I2S Tx DMA handle parameters */ |
| mbed_official | 340:28d1f895c6fe | 133 | |
| mbed_official | 441:d2c15dda23c1 | 134 | DMA_HandleTypeDef *hdmarx; /*!< I2S Rx DMA handle parameters */ |
| mbed_official | 340:28d1f895c6fe | 135 | |
| mbed_official | 441:d2c15dda23c1 | 136 | __IO HAL_LockTypeDef Lock; /*!< I2S locking object */ |
| mbed_official | 340:28d1f895c6fe | 137 | |
| mbed_official | 441:d2c15dda23c1 | 138 | __IO HAL_I2S_StateTypeDef State; /*!< I2S communication state */ |
| mbed_official | 340:28d1f895c6fe | 139 | |
| mbed_official | 441:d2c15dda23c1 | 140 | __IO uint32_t ErrorCode; /*!< I2S Error code |
| mbed_official | 441:d2c15dda23c1 | 141 | This parameter can be a value of @ref I2S_Error */ |
| mbed_official | 340:28d1f895c6fe | 142 | |
| mbed_official | 340:28d1f895c6fe | 143 | }I2S_HandleTypeDef; |
| mbed_official | 340:28d1f895c6fe | 144 | /** |
| mbed_official | 340:28d1f895c6fe | 145 | * @} |
| mbed_official | 340:28d1f895c6fe | 146 | */ |
| mbed_official | 340:28d1f895c6fe | 147 | |
| mbed_official | 340:28d1f895c6fe | 148 | /* Exported constants --------------------------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 149 | /** @defgroup I2S_Exported_Constants I2S Exported Constants |
| mbed_official | 340:28d1f895c6fe | 150 | * @{ |
| mbed_official | 340:28d1f895c6fe | 151 | */ |
| mbed_official | 441:d2c15dda23c1 | 152 | /** @defgroup I2S_Error I2S Error |
| mbed_official | 441:d2c15dda23c1 | 153 | * @{ |
| mbed_official | 441:d2c15dda23c1 | 154 | */ |
| mbed_official | 441:d2c15dda23c1 | 155 | #define HAL_I2S_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ |
| mbed_official | 441:d2c15dda23c1 | 156 | #define HAL_I2S_ERROR_TIMEOUT ((uint32_t)0x00000001) /*!< Timeout error */ |
| mbed_official | 441:d2c15dda23c1 | 157 | #define HAL_I2S_ERROR_OVR ((uint32_t)0x00000002) /*!< OVR error */ |
| mbed_official | 441:d2c15dda23c1 | 158 | #define HAL_I2S_ERROR_UDR ((uint32_t)0x00000004) /*!< UDR error */ |
| mbed_official | 441:d2c15dda23c1 | 159 | #define HAL_I2S_ERROR_DMA ((uint32_t)0x00000008) /*!< DMA transfer error */ |
| mbed_official | 441:d2c15dda23c1 | 160 | #define HAL_I2S_ERROR_UNKNOW ((uint32_t)0x00000010) /*!< Unknow Error error */ |
| mbed_official | 441:d2c15dda23c1 | 161 | /** |
| mbed_official | 441:d2c15dda23c1 | 162 | * @} |
| mbed_official | 441:d2c15dda23c1 | 163 | */ |
| mbed_official | 340:28d1f895c6fe | 164 | |
| mbed_official | 340:28d1f895c6fe | 165 | /** @defgroup I2S_Mode I2S Mode |
| mbed_official | 340:28d1f895c6fe | 166 | * @{ |
| mbed_official | 340:28d1f895c6fe | 167 | */ |
| mbed_official | 340:28d1f895c6fe | 168 | #define I2S_MODE_SLAVE_TX ((uint32_t)0x00000000) |
| mbed_official | 340:28d1f895c6fe | 169 | #define I2S_MODE_SLAVE_RX ((uint32_t)0x00000100) |
| mbed_official | 340:28d1f895c6fe | 170 | #define I2S_MODE_MASTER_TX ((uint32_t)0x00000200) |
| mbed_official | 340:28d1f895c6fe | 171 | #define I2S_MODE_MASTER_RX ((uint32_t)0x00000300) |
| mbed_official | 340:28d1f895c6fe | 172 | |
| mbed_official | 340:28d1f895c6fe | 173 | #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \ |
| mbed_official | 340:28d1f895c6fe | 174 | ((MODE) == I2S_MODE_SLAVE_RX) || \ |
| mbed_official | 340:28d1f895c6fe | 175 | ((MODE) == I2S_MODE_MASTER_TX)|| \ |
| mbed_official | 340:28d1f895c6fe | 176 | ((MODE) == I2S_MODE_MASTER_RX)) |
| mbed_official | 340:28d1f895c6fe | 177 | /** |
| mbed_official | 340:28d1f895c6fe | 178 | * @} |
| mbed_official | 340:28d1f895c6fe | 179 | */ |
| mbed_official | 340:28d1f895c6fe | 180 | |
| mbed_official | 340:28d1f895c6fe | 181 | /** @defgroup I2S_Standard I2S Standard |
| mbed_official | 340:28d1f895c6fe | 182 | * @{ |
| mbed_official | 340:28d1f895c6fe | 183 | */ |
| mbed_official | 340:28d1f895c6fe | 184 | #define I2S_STANDARD_PHILIPS ((uint32_t)0x00000000) |
| mbed_official | 340:28d1f895c6fe | 185 | #define I2S_STANDARD_MSB ((uint32_t)0x00000010) |
| mbed_official | 340:28d1f895c6fe | 186 | #define I2S_STANDARD_LSB ((uint32_t)0x00000020) |
| mbed_official | 340:28d1f895c6fe | 187 | #define I2S_STANDARD_PCM_SHORT ((uint32_t)0x00000030) |
| mbed_official | 340:28d1f895c6fe | 188 | #define I2S_STANDARD_PCM_LONG ((uint32_t)0x000000B0) |
| mbed_official | 340:28d1f895c6fe | 189 | |
| mbed_official | 340:28d1f895c6fe | 190 | #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \ |
| mbed_official | 340:28d1f895c6fe | 191 | ((STANDARD) == I2S_STANDARD_MSB) || \ |
| mbed_official | 340:28d1f895c6fe | 192 | ((STANDARD) == I2S_STANDARD_LSB) || \ |
| mbed_official | 340:28d1f895c6fe | 193 | ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \ |
| mbed_official | 340:28d1f895c6fe | 194 | ((STANDARD) == I2S_STANDARD_PCM_LONG)) |
| mbed_official | 340:28d1f895c6fe | 195 | /** |
| mbed_official | 340:28d1f895c6fe | 196 | * @} |
| mbed_official | 340:28d1f895c6fe | 197 | */ |
| mbed_official | 340:28d1f895c6fe | 198 | |
| mbed_official | 340:28d1f895c6fe | 199 | /** @defgroup I2S_Data_Format I2S Data Format |
| mbed_official | 340:28d1f895c6fe | 200 | * @{ |
| mbed_official | 340:28d1f895c6fe | 201 | */ |
| mbed_official | 340:28d1f895c6fe | 202 | #define I2S_DATAFORMAT_16B ((uint32_t)0x00000000) |
| mbed_official | 340:28d1f895c6fe | 203 | #define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t)0x00000001) |
| mbed_official | 340:28d1f895c6fe | 204 | #define I2S_DATAFORMAT_24B ((uint32_t)0x00000003) |
| mbed_official | 340:28d1f895c6fe | 205 | #define I2S_DATAFORMAT_32B ((uint32_t)0x00000005) |
| mbed_official | 340:28d1f895c6fe | 206 | |
| mbed_official | 340:28d1f895c6fe | 207 | #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \ |
| mbed_official | 340:28d1f895c6fe | 208 | ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \ |
| mbed_official | 340:28d1f895c6fe | 209 | ((FORMAT) == I2S_DATAFORMAT_24B) || \ |
| mbed_official | 340:28d1f895c6fe | 210 | ((FORMAT) == I2S_DATAFORMAT_32B)) |
| mbed_official | 340:28d1f895c6fe | 211 | /** |
| mbed_official | 340:28d1f895c6fe | 212 | * @} |
| mbed_official | 340:28d1f895c6fe | 213 | */ |
| mbed_official | 340:28d1f895c6fe | 214 | |
| mbed_official | 340:28d1f895c6fe | 215 | /** @defgroup I2S_MCLK_Output I2S MCLK Output |
| mbed_official | 340:28d1f895c6fe | 216 | * @{ |
| mbed_official | 340:28d1f895c6fe | 217 | */ |
| mbed_official | 340:28d1f895c6fe | 218 | #define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE) |
| mbed_official | 340:28d1f895c6fe | 219 | #define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000) |
| mbed_official | 340:28d1f895c6fe | 220 | |
| mbed_official | 340:28d1f895c6fe | 221 | #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \ |
| mbed_official | 340:28d1f895c6fe | 222 | ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE)) |
| mbed_official | 340:28d1f895c6fe | 223 | /** |
| mbed_official | 340:28d1f895c6fe | 224 | * @} |
| mbed_official | 340:28d1f895c6fe | 225 | */ |
| mbed_official | 340:28d1f895c6fe | 226 | |
| mbed_official | 340:28d1f895c6fe | 227 | /** @defgroup I2S_Audio_Frequency I2S Audio Frequency |
| mbed_official | 340:28d1f895c6fe | 228 | * @{ |
| mbed_official | 340:28d1f895c6fe | 229 | */ |
| mbed_official | 340:28d1f895c6fe | 230 | #define I2S_AUDIOFREQ_192K ((uint32_t)192000) |
| mbed_official | 340:28d1f895c6fe | 231 | #define I2S_AUDIOFREQ_96K ((uint32_t)96000) |
| mbed_official | 340:28d1f895c6fe | 232 | #define I2S_AUDIOFREQ_48K ((uint32_t)48000) |
| mbed_official | 340:28d1f895c6fe | 233 | #define I2S_AUDIOFREQ_44K ((uint32_t)44100) |
| mbed_official | 340:28d1f895c6fe | 234 | #define I2S_AUDIOFREQ_32K ((uint32_t)32000) |
| mbed_official | 340:28d1f895c6fe | 235 | #define I2S_AUDIOFREQ_22K ((uint32_t)22050) |
| mbed_official | 340:28d1f895c6fe | 236 | #define I2S_AUDIOFREQ_16K ((uint32_t)16000) |
| mbed_official | 340:28d1f895c6fe | 237 | #define I2S_AUDIOFREQ_11K ((uint32_t)11025) |
| mbed_official | 340:28d1f895c6fe | 238 | #define I2S_AUDIOFREQ_8K ((uint32_t)8000) |
| mbed_official | 340:28d1f895c6fe | 239 | #define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2) |
| mbed_official | 340:28d1f895c6fe | 240 | |
| mbed_official | 340:28d1f895c6fe | 241 | #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \ |
| mbed_official | 340:28d1f895c6fe | 242 | ((FREQ) <= I2S_AUDIOFREQ_192K)) || \ |
| mbed_official | 340:28d1f895c6fe | 243 | ((FREQ) == I2S_AUDIOFREQ_DEFAULT)) |
| mbed_official | 340:28d1f895c6fe | 244 | /** |
| mbed_official | 340:28d1f895c6fe | 245 | * @} |
| mbed_official | 340:28d1f895c6fe | 246 | */ |
| mbed_official | 340:28d1f895c6fe | 247 | |
| mbed_official | 340:28d1f895c6fe | 248 | /** @defgroup I2S_Clock_Polarity I2S Clock Polarity |
| mbed_official | 340:28d1f895c6fe | 249 | * @{ |
| mbed_official | 340:28d1f895c6fe | 250 | */ |
| mbed_official | 340:28d1f895c6fe | 251 | #define I2S_CPOL_LOW ((uint32_t)0x00000000) |
| mbed_official | 340:28d1f895c6fe | 252 | #define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL) |
| mbed_official | 340:28d1f895c6fe | 253 | |
| mbed_official | 340:28d1f895c6fe | 254 | #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \ |
| mbed_official | 340:28d1f895c6fe | 255 | ((CPOL) == I2S_CPOL_HIGH)) |
| mbed_official | 340:28d1f895c6fe | 256 | /** |
| mbed_official | 340:28d1f895c6fe | 257 | * @} |
| mbed_official | 340:28d1f895c6fe | 258 | */ |
| mbed_official | 340:28d1f895c6fe | 259 | |
| mbed_official | 340:28d1f895c6fe | 260 | /** @defgroup I2S_Interrupt_configuration_definition I2S Interrupt configuration definition |
| mbed_official | 340:28d1f895c6fe | 261 | * @{ |
| mbed_official | 340:28d1f895c6fe | 262 | */ |
| mbed_official | 340:28d1f895c6fe | 263 | #define I2S_IT_TXE SPI_CR2_TXEIE |
| mbed_official | 340:28d1f895c6fe | 264 | #define I2S_IT_RXNE SPI_CR2_RXNEIE |
| mbed_official | 340:28d1f895c6fe | 265 | #define I2S_IT_ERR SPI_CR2_ERRIE |
| mbed_official | 340:28d1f895c6fe | 266 | /** |
| mbed_official | 340:28d1f895c6fe | 267 | * @} |
| mbed_official | 340:28d1f895c6fe | 268 | */ |
| mbed_official | 340:28d1f895c6fe | 269 | |
| mbed_official | 340:28d1f895c6fe | 270 | /** @defgroup I2S_Flag_definition I2S Flag definition |
| mbed_official | 340:28d1f895c6fe | 271 | * @{ |
| mbed_official | 340:28d1f895c6fe | 272 | */ |
| mbed_official | 340:28d1f895c6fe | 273 | #define I2S_FLAG_TXE SPI_SR_TXE |
| mbed_official | 340:28d1f895c6fe | 274 | #define I2S_FLAG_RXNE SPI_SR_RXNE |
| mbed_official | 340:28d1f895c6fe | 275 | |
| mbed_official | 340:28d1f895c6fe | 276 | #define I2S_FLAG_UDR SPI_SR_UDR |
| mbed_official | 340:28d1f895c6fe | 277 | #define I2S_FLAG_OVR SPI_SR_OVR |
| mbed_official | 340:28d1f895c6fe | 278 | #define I2S_FLAG_FRE SPI_SR_FRE |
| mbed_official | 340:28d1f895c6fe | 279 | |
| mbed_official | 340:28d1f895c6fe | 280 | #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE |
| mbed_official | 340:28d1f895c6fe | 281 | #define I2S_FLAG_BSY SPI_SR_BSY |
| mbed_official | 340:28d1f895c6fe | 282 | /** |
| mbed_official | 340:28d1f895c6fe | 283 | * @} |
| mbed_official | 340:28d1f895c6fe | 284 | */ |
| mbed_official | 340:28d1f895c6fe | 285 | |
| mbed_official | 340:28d1f895c6fe | 286 | /** |
| mbed_official | 340:28d1f895c6fe | 287 | * @} |
| mbed_official | 340:28d1f895c6fe | 288 | */ |
| mbed_official | 340:28d1f895c6fe | 289 | |
| mbed_official | 340:28d1f895c6fe | 290 | /* Exported macros -----------------------------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 291 | /** @defgroup I2S_Exported_macros I2S Exported Macros |
| mbed_official | 340:28d1f895c6fe | 292 | * @{ |
| mbed_official | 340:28d1f895c6fe | 293 | */ |
| mbed_official | 340:28d1f895c6fe | 294 | |
| mbed_official | 340:28d1f895c6fe | 295 | /** @brief Reset I2S handle state |
| mbed_official | 340:28d1f895c6fe | 296 | * @param __HANDLE__: I2S handle. |
| mbed_official | 340:28d1f895c6fe | 297 | * @retval None |
| mbed_official | 340:28d1f895c6fe | 298 | */ |
| mbed_official | 340:28d1f895c6fe | 299 | #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET) |
| mbed_official | 340:28d1f895c6fe | 300 | |
| mbed_official | 340:28d1f895c6fe | 301 | /** @brief Enable or disable the specified SPI peripheral (in I2S mode). |
| mbed_official | 340:28d1f895c6fe | 302 | * @param __HANDLE__: specifies the I2S Handle. |
| mbed_official | 340:28d1f895c6fe | 303 | * @retval None |
| mbed_official | 340:28d1f895c6fe | 304 | */ |
| mbed_official | 340:28d1f895c6fe | 305 | #define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE) |
| mbed_official | 340:28d1f895c6fe | 306 | #define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &= (uint16_t)(~SPI_I2SCFGR_I2SE)) |
| mbed_official | 340:28d1f895c6fe | 307 | |
| mbed_official | 340:28d1f895c6fe | 308 | /** @brief Enable or disable the specified I2S interrupts. |
| mbed_official | 340:28d1f895c6fe | 309 | * @param __HANDLE__: specifies the I2S Handle. |
| mbed_official | 340:28d1f895c6fe | 310 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
| mbed_official | 340:28d1f895c6fe | 311 | * This parameter can be one of the following values: |
| mbed_official | 340:28d1f895c6fe | 312 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
| mbed_official | 340:28d1f895c6fe | 313 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
| mbed_official | 340:28d1f895c6fe | 314 | * @arg I2S_IT_ERR: Error interrupt enable |
| mbed_official | 340:28d1f895c6fe | 315 | * @retval None |
| mbed_official | 340:28d1f895c6fe | 316 | */ |
| mbed_official | 340:28d1f895c6fe | 317 | #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__)) |
| mbed_official | 340:28d1f895c6fe | 318 | #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (uint16_t)(~(__INTERRUPT__))) |
| mbed_official | 340:28d1f895c6fe | 319 | |
| mbed_official | 340:28d1f895c6fe | 320 | /** @brief Checks if the specified I2S interrupt source is enabled or disabled. |
| mbed_official | 340:28d1f895c6fe | 321 | * @param __HANDLE__: specifies the I2S Handle. |
| mbed_official | 340:28d1f895c6fe | 322 | * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral. |
| mbed_official | 340:28d1f895c6fe | 323 | * @param __INTERRUPT__: specifies the I2S interrupt source to check. |
| mbed_official | 340:28d1f895c6fe | 324 | * This parameter can be one of the following values: |
| mbed_official | 340:28d1f895c6fe | 325 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
| mbed_official | 340:28d1f895c6fe | 326 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
| mbed_official | 340:28d1f895c6fe | 327 | * @arg I2S_IT_ERR: Error interrupt enable |
| mbed_official | 340:28d1f895c6fe | 328 | * @retval The new state of __IT__ (TRUE or FALSE). |
| mbed_official | 340:28d1f895c6fe | 329 | */ |
| mbed_official | 340:28d1f895c6fe | 330 | #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| mbed_official | 340:28d1f895c6fe | 331 | |
| mbed_official | 340:28d1f895c6fe | 332 | /** @brief Checks whether the specified I2S flag is set or not. |
| mbed_official | 340:28d1f895c6fe | 333 | * @param __HANDLE__: specifies the I2S Handle. |
| mbed_official | 340:28d1f895c6fe | 334 | * @param __FLAG__: specifies the flag to check. |
| mbed_official | 340:28d1f895c6fe | 335 | * This parameter can be one of the following values: |
| mbed_official | 340:28d1f895c6fe | 336 | * @arg I2S_FLAG_RXNE: Receive buffer not empty flag |
| mbed_official | 340:28d1f895c6fe | 337 | * @arg I2S_FLAG_TXE: Transmit buffer empty flag |
| mbed_official | 340:28d1f895c6fe | 338 | * @arg I2S_FLAG_UDR: Underrun flag |
| mbed_official | 340:28d1f895c6fe | 339 | * @arg I2S_FLAG_OVR: Overrun flag |
| mbed_official | 340:28d1f895c6fe | 340 | * @arg I2S_FLAG_FRE: Frame error flag |
| mbed_official | 340:28d1f895c6fe | 341 | * @arg I2S_FLAG_CHSIDE: Channel Side flag |
| mbed_official | 340:28d1f895c6fe | 342 | * @arg I2S_FLAG_BSY: Busy flag |
| mbed_official | 340:28d1f895c6fe | 343 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| mbed_official | 340:28d1f895c6fe | 344 | */ |
| mbed_official | 340:28d1f895c6fe | 345 | #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
| mbed_official | 340:28d1f895c6fe | 346 | |
| mbed_official | 340:28d1f895c6fe | 347 | /** @brief Clears the I2S OVR pending flag. |
| mbed_official | 340:28d1f895c6fe | 348 | * @param __HANDLE__: specifies the I2S Handle. |
| mbed_official | 340:28d1f895c6fe | 349 | * @retval None |
| mbed_official | 340:28d1f895c6fe | 350 | */ |
| mbed_official | 441:d2c15dda23c1 | 351 | #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{ \ |
| mbed_official | 441:d2c15dda23c1 | 352 | __IO uint32_t tmpreg; \ |
| mbed_official | 441:d2c15dda23c1 | 353 | tmpreg = (__HANDLE__)->Instance->DR; \ |
| mbed_official | 441:d2c15dda23c1 | 354 | tmpreg = (__HANDLE__)->Instance->SR; \ |
| mbed_official | 441:d2c15dda23c1 | 355 | UNUSED(tmpreg); \ |
| mbed_official | 441:d2c15dda23c1 | 356 | }while(0) |
| mbed_official | 340:28d1f895c6fe | 357 | /** @brief Clears the I2S UDR pending flag. |
| mbed_official | 340:28d1f895c6fe | 358 | * @param __HANDLE__: specifies the I2S Handle. |
| mbed_official | 340:28d1f895c6fe | 359 | * @retval None |
| mbed_official | 340:28d1f895c6fe | 360 | */ |
| mbed_official | 441:d2c15dda23c1 | 361 | #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) do{\ |
| mbed_official | 441:d2c15dda23c1 | 362 | __IO uint32_t tmpreg;\ |
| mbed_official | 441:d2c15dda23c1 | 363 | tmpreg = ((__HANDLE__)->Instance->SR);\ |
| mbed_official | 441:d2c15dda23c1 | 364 | UNUSED(tmpreg); \ |
| mbed_official | 441:d2c15dda23c1 | 365 | }while(0) |
| mbed_official | 340:28d1f895c6fe | 366 | /** |
| mbed_official | 340:28d1f895c6fe | 367 | * @} |
| mbed_official | 340:28d1f895c6fe | 368 | */ |
| mbed_official | 340:28d1f895c6fe | 369 | |
| mbed_official | 340:28d1f895c6fe | 370 | /* Exported functions --------------------------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 371 | /** @addtogroup I2S_Exported_Functions |
| mbed_official | 340:28d1f895c6fe | 372 | * @{ |
| mbed_official | 340:28d1f895c6fe | 373 | */ |
| mbed_official | 340:28d1f895c6fe | 374 | |
| mbed_official | 340:28d1f895c6fe | 375 | /** @addtogroup I2S_Exported_Functions_Group1 |
| mbed_official | 340:28d1f895c6fe | 376 | * @{ |
| mbed_official | 340:28d1f895c6fe | 377 | */ |
| mbed_official | 340:28d1f895c6fe | 378 | /* Initialization/de-initialization functions **********************************/ |
| mbed_official | 340:28d1f895c6fe | 379 | HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s); |
| mbed_official | 340:28d1f895c6fe | 380 | HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s); |
| mbed_official | 340:28d1f895c6fe | 381 | void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s); |
| mbed_official | 340:28d1f895c6fe | 382 | void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s); |
| mbed_official | 340:28d1f895c6fe | 383 | /** |
| mbed_official | 340:28d1f895c6fe | 384 | * @} |
| mbed_official | 340:28d1f895c6fe | 385 | */ |
| mbed_official | 340:28d1f895c6fe | 386 | |
| mbed_official | 340:28d1f895c6fe | 387 | /** @addtogroup I2S_Exported_Functions_Group2 |
| mbed_official | 340:28d1f895c6fe | 388 | * @{ |
| mbed_official | 340:28d1f895c6fe | 389 | */ |
| mbed_official | 340:28d1f895c6fe | 390 | /* I/O operation functions ***************************************************/ |
| mbed_official | 340:28d1f895c6fe | 391 | /* Blocking mode: Polling */ |
| mbed_official | 340:28d1f895c6fe | 392 | HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
| mbed_official | 340:28d1f895c6fe | 393 | HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
| mbed_official | 340:28d1f895c6fe | 394 | |
| mbed_official | 340:28d1f895c6fe | 395 | /* Non-Blocking mode: Interrupt */ |
| mbed_official | 340:28d1f895c6fe | 396 | HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
| mbed_official | 340:28d1f895c6fe | 397 | HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
| mbed_official | 340:28d1f895c6fe | 398 | void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s); |
| mbed_official | 340:28d1f895c6fe | 399 | |
| mbed_official | 340:28d1f895c6fe | 400 | /* Non-Blocking mode: DMA */ |
| mbed_official | 340:28d1f895c6fe | 401 | HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
| mbed_official | 340:28d1f895c6fe | 402 | HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
| mbed_official | 340:28d1f895c6fe | 403 | |
| mbed_official | 340:28d1f895c6fe | 404 | HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s); |
| mbed_official | 340:28d1f895c6fe | 405 | HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s); |
| mbed_official | 340:28d1f895c6fe | 406 | HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s); |
| mbed_official | 340:28d1f895c6fe | 407 | |
| mbed_official | 340:28d1f895c6fe | 408 | /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ |
| mbed_official | 340:28d1f895c6fe | 409 | void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s); |
| mbed_official | 340:28d1f895c6fe | 410 | void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s); |
| mbed_official | 340:28d1f895c6fe | 411 | void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s); |
| mbed_official | 340:28d1f895c6fe | 412 | void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s); |
| mbed_official | 340:28d1f895c6fe | 413 | void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); |
| mbed_official | 340:28d1f895c6fe | 414 | /** |
| mbed_official | 340:28d1f895c6fe | 415 | * @} |
| mbed_official | 340:28d1f895c6fe | 416 | */ |
| mbed_official | 340:28d1f895c6fe | 417 | |
| mbed_official | 340:28d1f895c6fe | 418 | /** @addtogroup I2S_Exported_Functions_Group3 |
| mbed_official | 340:28d1f895c6fe | 419 | * @{ |
| mbed_official | 340:28d1f895c6fe | 420 | */ |
| mbed_official | 340:28d1f895c6fe | 421 | /* Peripheral Control and State functions ************************************/ |
| mbed_official | 340:28d1f895c6fe | 422 | HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s); |
| mbed_official | 441:d2c15dda23c1 | 423 | uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); |
| mbed_official | 340:28d1f895c6fe | 424 | /** |
| mbed_official | 340:28d1f895c6fe | 425 | * @} |
| mbed_official | 340:28d1f895c6fe | 426 | */ |
| mbed_official | 340:28d1f895c6fe | 427 | |
| mbed_official | 340:28d1f895c6fe | 428 | /** |
| mbed_official | 340:28d1f895c6fe | 429 | * @} |
| mbed_official | 340:28d1f895c6fe | 430 | */ |
| mbed_official | 340:28d1f895c6fe | 431 | |
| mbed_official | 340:28d1f895c6fe | 432 | |
| mbed_official | 340:28d1f895c6fe | 433 | /** |
| mbed_official | 340:28d1f895c6fe | 434 | * @} |
| mbed_official | 340:28d1f895c6fe | 435 | */ |
| mbed_official | 340:28d1f895c6fe | 436 | |
| mbed_official | 340:28d1f895c6fe | 437 | /** |
| mbed_official | 340:28d1f895c6fe | 438 | * @} |
| mbed_official | 340:28d1f895c6fe | 439 | */ |
| mbed_official | 340:28d1f895c6fe | 440 | #endif /* defined(STM32F031x6) || defined(STM32F038xx) || */ |
| mbed_official | 340:28d1f895c6fe | 441 | /* defined(STM32F051x8) || defined(STM32F058xx) || */ |
| mbed_official | 340:28d1f895c6fe | 442 | /* defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) ||*/ |
| mbed_official | 340:28d1f895c6fe | 443 | /* defined(STM32F042x6) || defined(STM32F048xx) || */ |
| mbed_official | 340:28d1f895c6fe | 444 | /* defined(STM32F091xC) || defined(STM32F098xx) */ |
| mbed_official | 340:28d1f895c6fe | 445 | |
| mbed_official | 340:28d1f895c6fe | 446 | #ifdef __cplusplus |
| mbed_official | 340:28d1f895c6fe | 447 | } |
| mbed_official | 340:28d1f895c6fe | 448 | #endif |
| mbed_official | 340:28d1f895c6fe | 449 | |
| mbed_official | 340:28d1f895c6fe | 450 | |
| mbed_official | 340:28d1f895c6fe | 451 | #endif /* __STM32F0xx_HAL_I2S_H */ |
| mbed_official | 340:28d1f895c6fe | 452 | |
| mbed_official | 340:28d1f895c6fe | 453 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
