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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_adc.h@630:825f75ca301e, 2015-09-28 (annotated)

Committer:
mbed_official
Date:
Mon Sep 28 10:45:10 2015 +0100
Revision:
630:825f75ca301e
Parent:
441:d2c15dda23c1 
Synchronized with git revision 54fbe4144faf309c37205a5d39fa665daa919f10



Full URL: https://github.com/mbedmicro/mbed/commit/54fbe4144faf309c37205a5d39fa665daa919f10/



NUCLEO_F031K6 : Add new target

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UserRevisionLine numberNew contents of line
mbed_official 340:28d1f895c6fe 1 /**
mbed_official 340:28d1f895c6fe 2 ******************************************************************************
mbed_official 340:28d1f895c6fe 3 * @file stm32f0xx_hal_adc.h
mbed_official 340:28d1f895c6fe 4 * @author MCD Application Team
mbed_official 630:825f75ca301e 5 * @version V1.3.0
mbed_official 630:825f75ca301e 6 * @date 26-June-2015
mbed_official 340:28d1f895c6fe 7 * @brief Header file containing functions prototypes of ADC HAL library.
mbed_official 340:28d1f895c6fe 8 ******************************************************************************
mbed_official 340:28d1f895c6fe 9 * @attention
mbed_official 340:28d1f895c6fe 10 *
mbed_official 630:825f75ca301e 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 340:28d1f895c6fe 12 *
mbed_official 340:28d1f895c6fe 13 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 340:28d1f895c6fe 14 * are permitted provided that the following conditions are met:
mbed_official 340:28d1f895c6fe 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 340:28d1f895c6fe 16 * this list of conditions and the following disclaimer.
mbed_official 340:28d1f895c6fe 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 340:28d1f895c6fe 18 * this list of conditions and the following disclaimer in the documentation
mbed_official 340:28d1f895c6fe 19 * and/or other materials provided with the distribution.
mbed_official 340:28d1f895c6fe 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 340:28d1f895c6fe 21 * may be used to endorse or promote products derived from this software
mbed_official 340:28d1f895c6fe 22 * without specific prior written permission.
mbed_official 340:28d1f895c6fe 23 *
mbed_official 340:28d1f895c6fe 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 340:28d1f895c6fe 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 340:28d1f895c6fe 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 340:28d1f895c6fe 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 340:28d1f895c6fe 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 340:28d1f895c6fe 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 340:28d1f895c6fe 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 340:28d1f895c6fe 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 340:28d1f895c6fe 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 340:28d1f895c6fe 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 340:28d1f895c6fe 34 *
mbed_official 340:28d1f895c6fe 35 ******************************************************************************
mbed_official 340:28d1f895c6fe 36 */
mbed_official 340:28d1f895c6fe 37
mbed_official 340:28d1f895c6fe 38 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 340:28d1f895c6fe 39 #ifndef __STM32F0xx_HAL_ADC_H
mbed_official 340:28d1f895c6fe 40 #define __STM32F0xx_HAL_ADC_H
mbed_official 340:28d1f895c6fe 41
mbed_official 340:28d1f895c6fe 42 #ifdef __cplusplus
mbed_official 340:28d1f895c6fe 43 extern "C" {
mbed_official 340:28d1f895c6fe 44 #endif
mbed_official 340:28d1f895c6fe 45
mbed_official 340:28d1f895c6fe 46 /* Includes ------------------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 47 #include "stm32f0xx_hal_def.h"
mbed_official 340:28d1f895c6fe 48
mbed_official 340:28d1f895c6fe 49 /** @addtogroup STM32F0xx_HAL_Driver
mbed_official 340:28d1f895c6fe 50 * @{
mbed_official 340:28d1f895c6fe 51 */
mbed_official 340:28d1f895c6fe 52
mbed_official 340:28d1f895c6fe 53 /** @addtogroup ADC
mbed_official 340:28d1f895c6fe 54 * @{
mbed_official 340:28d1f895c6fe 55 */
mbed_official 340:28d1f895c6fe 56
mbed_official 340:28d1f895c6fe 57 /* Exported types ------------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 58 /** @defgroup ADC_Exported_Types ADC Exported Types
mbed_official 340:28d1f895c6fe 59 * @{
mbed_official 340:28d1f895c6fe 60 */
mbed_official 340:28d1f895c6fe 61
mbed_official 340:28d1f895c6fe 62 /**
mbed_official 340:28d1f895c6fe 63 * @brief Structure definition of ADC initialization and regular group
mbed_official 340:28d1f895c6fe 64 * @note The setting of these parameters with function HAL_ADC_Init() is conditioned to ADC state.
mbed_official 340:28d1f895c6fe 65 * ADC state can be either:
mbed_official 340:28d1f895c6fe 66 * - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'ClockPrescaler')
mbed_official 630:825f75ca301e 67 * - For all parameters except 'ClockPrescaler' and 'resolution': ADC enabled without conversion on going on regular group.
mbed_official 340:28d1f895c6fe 68 * If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed
mbed_official 441:d2c15dda23c1 69 * without error reporting (as it can be the expected behaviour in case of intended action to update another parameter (which fulfills the ADC state condition) on the fly).
mbed_official 340:28d1f895c6fe 70 */
mbed_official 340:28d1f895c6fe 71 typedef struct
mbed_official 340:28d1f895c6fe 72 {
mbed_official 340:28d1f895c6fe 73 uint32_t ClockPrescaler; /*!< Select ADC clock source (synchronous clock derived from APB clock or asynchronous clock derived from ADC dedicated HSI RC oscillator 14MHz) and clock prescaler.
mbed_official 340:28d1f895c6fe 74 This parameter can be a value of @ref ADC_ClockPrescaler
mbed_official 340:28d1f895c6fe 75 Note: In case of usage of the ADC dedicated HSI RC oscillator, it must be preliminarily enabled at RCC top level.
mbed_official 340:28d1f895c6fe 76 Note: This parameter can be modified only if the ADC is disabled */
mbed_official 340:28d1f895c6fe 77 uint32_t Resolution; /*!< Configures the ADC resolution.
mbed_official 340:28d1f895c6fe 78 This parameter can be a value of @ref ADC_Resolution */
mbed_official 340:28d1f895c6fe 79 uint32_t DataAlign; /*!< Specifies whether the ADC data alignment is left or right.
mbed_official 340:28d1f895c6fe 80 This parameter can be a value of @ref ADC_Data_align */
mbed_official 340:28d1f895c6fe 81 uint32_t ScanConvMode; /*!< Configures the sequencer of regular group.
mbed_official 340:28d1f895c6fe 82 This parameter can be associated to parameter 'DiscontinuousConvMode' to have main sequence subdivided in successive parts.
mbed_official 340:28d1f895c6fe 83 Sequencer is automatically enabled if several channels are set (sequencer cannot be disabled, as it can be the case on other STM32 devices):
mbed_official 340:28d1f895c6fe 84 If only 1 channel is set: Conversion is performed in single mode.
mbed_official 340:28d1f895c6fe 85 If several channels are set: Conversions are performed in sequence mode (ranks defined by each channel number: channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
mbed_official 340:28d1f895c6fe 86 Scan direction can be set to forward (from channel 0 to channel 18) or backward (from channel 18 to channel 0).
mbed_official 340:28d1f895c6fe 87 This parameter can be a value of @ref ADC_Scan_mode */
mbed_official 340:28d1f895c6fe 88 uint32_t EOCSelection; /*!< Specifies what EOC (End Of Conversion) flag is used for conversion by polling and interruption: end of conversion of each rank or complete sequence.
mbed_official 340:28d1f895c6fe 89 This parameter can be a value of @ref ADC_EOCSelection. */
mbed_official 340:28d1f895c6fe 90 uint32_t LowPowerAutoWait; /*!< Selects the dynamic low power Auto Delay: new conversion start only when the previous
mbed_official 630:825f75ca301e 91 conversion (for regular group) has been treated by user software, using function HAL_ADC_GetValue().
mbed_official 630:825f75ca301e 92 This feature automatically adapts the ADC conversions trigs to the speed of the system that reads the data. Moreover, this avoids risk of overrun for low frequency applications.
mbed_official 340:28d1f895c6fe 93 This parameter can be set to ENABLE or DISABLE.
mbed_official 340:28d1f895c6fe 94 Note: Do not use with interruption or DMA (HAL_ADC_Start_IT(), HAL_ADC_Start_DMA()) since they have to clear immediately the EOC flag to free the IRQ vector sequencer.
mbed_official 340:28d1f895c6fe 95 Do use with polling: 1. Start conversion with HAL_ADC_Start(), 2. Later on, when conversion data is needed: use HAL_ADC_PollForConversion() to ensure that conversion is completed
mbed_official 340:28d1f895c6fe 96 and use HAL_ADC_GetValue() to retrieve conversion result and trig another conversion. */
mbed_official 340:28d1f895c6fe 97 uint32_t LowPowerAutoPowerOff; /*!< Selects the auto-off mode: the ADC automatically powers-off after a conversion and automatically wakes-up when a new conversion is triggered (with startup time between trigger and start of sampling).
mbed_official 340:28d1f895c6fe 98 This feature can be combined with automatic wait mode (parameter 'LowPowerAutoWait').
mbed_official 340:28d1f895c6fe 99 This parameter can be set to ENABLE or DISABLE.
mbed_official 340:28d1f895c6fe 100 Note: If enabled, this feature also turns off the ADC dedicated 14 MHz RC oscillator (HSI14) */
mbed_official 340:28d1f895c6fe 101 uint32_t ContinuousConvMode; /*!< Specifies whether the conversion is performed in single mode (one conversion) or continuous mode for regular group,
mbed_official 340:28d1f895c6fe 102 after the selected trigger occurred (software start or external trigger).
mbed_official 340:28d1f895c6fe 103 This parameter can be set to ENABLE or DISABLE. */
mbed_official 340:28d1f895c6fe 104 uint32_t DiscontinuousConvMode; /*!< Specifies whether the conversions sequence of regular group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
mbed_official 340:28d1f895c6fe 105 Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
mbed_official 340:28d1f895c6fe 106 Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
mbed_official 340:28d1f895c6fe 107 This parameter can be set to ENABLE or DISABLE
mbed_official 340:28d1f895c6fe 108 Note: Number of discontinuous ranks increment is fixed to one-by-one. */
mbed_official 340:28d1f895c6fe 109 uint32_t ExternalTrigConv; /*!< Selects the external event used to trigger the conversion start of regular group.
mbed_official 340:28d1f895c6fe 110 If set to ADC_SOFTWARE_START, external triggers are disabled.
mbed_official 340:28d1f895c6fe 111 This parameter can be a value of @ref ADC_External_trigger_source_Regular */
mbed_official 340:28d1f895c6fe 112 uint32_t ExternalTrigConvEdge; /*!< Selects the external trigger edge of regular group.
mbed_official 340:28d1f895c6fe 113 If trigger is set to ADC_SOFTWARE_START, this parameter is discarded.
mbed_official 340:28d1f895c6fe 114 This parameter can be a value of @ref ADC_External_trigger_edge_Regular */
mbed_official 340:28d1f895c6fe 115 uint32_t DMAContinuousRequests; /*!< Specifies whether the DMA requests are performed in one shot mode (DMA transfer stop when number of conversions is reached)
mbed_official 340:28d1f895c6fe 116 or in Continuous mode (DMA transfer unlimited, whatever number of conversions).
mbed_official 340:28d1f895c6fe 117 Note: In continuous mode, DMA must be configured in circular mode. Otherwise an overrun will be triggered when DMA buffer maximum pointer is reached.
mbed_official 340:28d1f895c6fe 118 This parameter can be set to ENABLE or DISABLE. */
mbed_official 340:28d1f895c6fe 119 uint32_t Overrun; /*!< Select the behaviour in case of overrun: data preserved or overwritten
mbed_official 340:28d1f895c6fe 120 This parameter has an effect on regular group only, including in DMA mode.
mbed_official 340:28d1f895c6fe 121 This parameter can be a value of @ref ADC_Overrun */
mbed_official 630:825f75ca301e 122 uint32_t SamplingTimeCommon; /*!< Sampling time value to be set for the selected channel.
mbed_official 630:825f75ca301e 123 Unit: ADC clock cycles
mbed_official 630:825f75ca301e 124 Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits, 10.5 cycles at 10 bits, 8.5 cycles at 8 bits, 6.5 cycles at 6 bits).
mbed_official 630:825f75ca301e 125 Note: On STM32F0 devices, the sampling time setting is common to all channels. On some other STM32 devices, this parameter in channel wise and is located into ADC channel initialization structure.
mbed_official 630:825f75ca301e 126 This parameter can be a value of @ref ADC_sampling_times
mbed_official 630:825f75ca301e 127 Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor),
mbed_official 630:825f75ca301e 128 sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
mbed_official 630:825f75ca301e 129 Refer to device datasheet for timings values, parameters TS_vrefint, TS_vbat, TS_temp (values rough order: 5us to 17us). */
mbed_official 340:28d1f895c6fe 130 }ADC_InitTypeDef;
mbed_official 340:28d1f895c6fe 131
mbed_official 340:28d1f895c6fe 132 /**
mbed_official 340:28d1f895c6fe 133 * @brief Structure definition of ADC channel for regular group
mbed_official 340:28d1f895c6fe 134 * @note The setting of these parameters with function HAL_ADC_ConfigChannel() is conditioned to ADC state.
mbed_official 340:28d1f895c6fe 135 * ADC state can be either:
mbed_official 340:28d1f895c6fe 136 * - For all parameters: ADC disabled or enabled without conversion on going on regular group.
mbed_official 340:28d1f895c6fe 137 * If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed
mbed_official 340:28d1f895c6fe 138 * without error reporting (as it can be the expected behaviour in case of intended action to update another parameter (which fulfills the ADC state condition) on the fly).
mbed_official 340:28d1f895c6fe 139 */
mbed_official 340:28d1f895c6fe 140 typedef struct
mbed_official 340:28d1f895c6fe 141 {
mbed_official 340:28d1f895c6fe 142 uint32_t Channel; /*!< Specifies the channel to configure into ADC regular group.
mbed_official 340:28d1f895c6fe 143 This parameter can be a value of @ref ADC_channels
mbed_official 340:28d1f895c6fe 144 Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability. */
mbed_official 340:28d1f895c6fe 145 uint32_t Rank; /*!< Add or remove the channel from ADC regular group sequencer.
mbed_official 630:825f75ca301e 146 On STM32F0 devices, number of ranks in the sequence is defined by number of channels enabled, rank of each channel is defined by channel number (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...)..
mbed_official 340:28d1f895c6fe 147 Despite the channel rank is fixed, this parameter allow an additional possibility: to remove the selected rank (selected channel) from sequencer.
mbed_official 340:28d1f895c6fe 148 This parameter can be a value of @ref ADC_rank */
mbed_official 340:28d1f895c6fe 149 uint32_t SamplingTime; /*!< Sampling time value to be set for the selected channel.
mbed_official 340:28d1f895c6fe 150 Unit: ADC clock cycles
mbed_official 340:28d1f895c6fe 151 Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits, 10.5 cycles at 10 bits, 8.5 cycles at 8 bits, 6.5 cycles at 6 bits).
mbed_official 340:28d1f895c6fe 152 This parameter can be a value of @ref ADC_sampling_times
mbed_official 340:28d1f895c6fe 153 Caution: this setting impacts the entire regular group. Therefore, call of HAL_ADC_ConfigChannel() to configure a channel can impact the configuration of other channels previously set.
mbed_official 630:825f75ca301e 154 Caution: Obsolete parameter. Use parameter "SamplingTimeCommon" in ADC initialization structure.
mbed_official 630:825f75ca301e 155 If parameter "SamplingTimeCommon" is set to a valid sampling time, parameter "SamplingTime" is discarded.
mbed_official 340:28d1f895c6fe 156 Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor),
mbed_official 340:28d1f895c6fe 157 sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
mbed_official 340:28d1f895c6fe 158 Refer to device datasheet for timings values, parameters TS_vrefint, TS_vbat, TS_temp (values rough order: 5us to 17us). */
mbed_official 340:28d1f895c6fe 159 }ADC_ChannelConfTypeDef;
mbed_official 340:28d1f895c6fe 160
mbed_official 340:28d1f895c6fe 161 /**
mbed_official 340:28d1f895c6fe 162 * @brief Structure definition of ADC analog watchdog
mbed_official 340:28d1f895c6fe 163 * @note The setting of these parameters with function HAL_ADC_AnalogWDGConfig() is conditioned to ADC state.
mbed_official 340:28d1f895c6fe 164 * ADC state can be either: ADC disabled or ADC enabled without conversion on going on regular group.
mbed_official 340:28d1f895c6fe 165 */
mbed_official 340:28d1f895c6fe 166 typedef struct
mbed_official 340:28d1f895c6fe 167 {
mbed_official 340:28d1f895c6fe 168 uint32_t WatchdogMode; /*!< Configures the ADC analog watchdog mode: single/all/none channels.
mbed_official 340:28d1f895c6fe 169 This parameter can be a value of @ref ADC_analog_watchdog_mode. */
mbed_official 340:28d1f895c6fe 170 uint32_t Channel; /*!< Selects which ADC channel to monitor by analog watchdog.
mbed_official 340:28d1f895c6fe 171 This parameter has an effect only if parameter 'WatchdogMode' is configured on single channel. Only 1 channel can be monitored.
mbed_official 340:28d1f895c6fe 172 This parameter can be a value of @ref ADC_channels. */
mbed_official 340:28d1f895c6fe 173 uint32_t ITMode; /*!< Specifies whether the analog watchdog is configured in interrupt or polling mode.
mbed_official 340:28d1f895c6fe 174 This parameter can be set to ENABLE or DISABLE */
mbed_official 340:28d1f895c6fe 175 uint32_t HighThreshold; /*!< Configures the ADC analog watchdog High threshold value.
mbed_official 340:28d1f895c6fe 176 Depending of ADC resolution selected (12, 10, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
mbed_official 340:28d1f895c6fe 177 uint32_t LowThreshold; /*!< Configures the ADC analog watchdog High threshold value.
mbed_official 340:28d1f895c6fe 178 Depending of ADC resolution selected (12, 10, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
mbed_official 340:28d1f895c6fe 179 }ADC_AnalogWDGConfTypeDef;
mbed_official 340:28d1f895c6fe 180
mbed_official 340:28d1f895c6fe 181 /**
mbed_official 630:825f75ca301e 182 * @brief HAL ADC state machine: ADC states definition (bitfields)
mbed_official 340:28d1f895c6fe 183 */
mbed_official 630:825f75ca301e 184 /* States of ADC global scope */
mbed_official 630:825f75ca301e 185 #define HAL_ADC_STATE_RESET ((uint32_t)0x00000000) /*!< ADC not yet initialized or disabled */
mbed_official 630:825f75ca301e 186 #define HAL_ADC_STATE_READY ((uint32_t)0x00000001) /*!< ADC peripheral ready for use */
mbed_official 630:825f75ca301e 187 #define HAL_ADC_STATE_BUSY_INTERNAL ((uint32_t)0x00000002) /*!< ADC is busy to internal process (initialization, calibration) */
mbed_official 630:825f75ca301e 188 #define HAL_ADC_STATE_TIMEOUT ((uint32_t)0x00000004) /*!< TimeOut occurrence */
mbed_official 630:825f75ca301e 189
mbed_official 630:825f75ca301e 190 /* States of ADC errors */
mbed_official 630:825f75ca301e 191 #define HAL_ADC_STATE_ERROR_INTERNAL ((uint32_t)0x00000010) /*!< Internal error occurrence */
mbed_official 630:825f75ca301e 192 #define HAL_ADC_STATE_ERROR_CONFIG ((uint32_t)0x00000020) /*!< Configuration error occurrence */
mbed_official 630:825f75ca301e 193 #define HAL_ADC_STATE_ERROR_DMA ((uint32_t)0x00000040) /*!< DMA error occurrence */
mbed_official 630:825f75ca301e 194
mbed_official 630:825f75ca301e 195 /* States of ADC group regular */
mbed_official 630:825f75ca301e 196 #define HAL_ADC_STATE_REG_BUSY ((uint32_t)0x00000100) /*!< A conversion on group regular is ongoing or can occur (either by continuous mode,
mbed_official 630:825f75ca301e 197 external trigger, low power auto power-on, multimode ADC master control) */
mbed_official 630:825f75ca301e 198 #define HAL_ADC_STATE_REG_EOC ((uint32_t)0x00000200) /*!< Conversion data available on group regular */
mbed_official 630:825f75ca301e 199 #define HAL_ADC_STATE_REG_OVR ((uint32_t)0x00000400) /*!< Overrun occurrence */
mbed_official 630:825f75ca301e 200 #define HAL_ADC_STATE_REG_EOSMP ((uint32_t)0x00000800) /*!< Not available on STM32F0 device: End Of Sampling flag raised */
mbed_official 630:825f75ca301e 201
mbed_official 630:825f75ca301e 202 /* States of ADC group injected */
mbed_official 630:825f75ca301e 203 #define HAL_ADC_STATE_INJ_BUSY ((uint32_t)0x00001000) /*!< Not available on STM32F0 device: A conversion on group injected is ongoing or can occur (either by auto-injection mode,
mbed_official 630:825f75ca301e 204 external trigger, low power auto power-on, multimode ADC master control) */
mbed_official 630:825f75ca301e 205 #define HAL_ADC_STATE_INJ_EOC ((uint32_t)0x00002000) /*!< Not available on STM32F0 device: Conversion data available on group injected */
mbed_official 630:825f75ca301e 206 #define HAL_ADC_STATE_INJ_JQOVF ((uint32_t)0x00004000) /*!< Not available on STM32F0 device: Not available on STM32F0 device: Injected queue overflow occurrence */
mbed_official 630:825f75ca301e 207
mbed_official 630:825f75ca301e 208 /* States of ADC analog watchdogs */
mbed_official 630:825f75ca301e 209 #define HAL_ADC_STATE_AWD1 ((uint32_t)0x00010000) /*!< Out-of-window occurrence of analog watchdog 1 */
mbed_official 630:825f75ca301e 210 #define HAL_ADC_STATE_AWD2 ((uint32_t)0x00020000) /*!< Not available on STM32F0 device: Out-of-window occurrence of analog watchdog 2 */
mbed_official 630:825f75ca301e 211 #define HAL_ADC_STATE_AWD3 ((uint32_t)0x00040000) /*!< Not available on STM32F0 device: Out-of-window occurrence of analog watchdog 3 */
mbed_official 630:825f75ca301e 212
mbed_official 630:825f75ca301e 213 /* States of ADC multi-mode */
mbed_official 630:825f75ca301e 214 #define HAL_ADC_STATE_MULTIMODE_SLAVE ((uint32_t)0x00100000) /*!< Not available on STM32F0 device: ADC in multimode slave state, controlled by another ADC master ( */
mbed_official 630:825f75ca301e 215
mbed_official 340:28d1f895c6fe 216
mbed_official 340:28d1f895c6fe 217 /**
mbed_official 340:28d1f895c6fe 218 * @brief ADC handle Structure definition
mbed_official 340:28d1f895c6fe 219 */
mbed_official 340:28d1f895c6fe 220 typedef struct
mbed_official 340:28d1f895c6fe 221 {
mbed_official 340:28d1f895c6fe 222 ADC_TypeDef *Instance; /*!< Register base address */
mbed_official 340:28d1f895c6fe 223
mbed_official 340:28d1f895c6fe 224 ADC_InitTypeDef Init; /*!< ADC required parameters */
mbed_official 340:28d1f895c6fe 225
mbed_official 340:28d1f895c6fe 226 DMA_HandleTypeDef *DMA_Handle; /*!< Pointer DMA Handler */
mbed_official 340:28d1f895c6fe 227
mbed_official 340:28d1f895c6fe 228 HAL_LockTypeDef Lock; /*!< ADC locking object */
mbed_official 340:28d1f895c6fe 229
mbed_official 630:825f75ca301e 230 __IO uint32_t State; /*!< ADC communication state (bitmap of ADC states) */
mbed_official 340:28d1f895c6fe 231
mbed_official 340:28d1f895c6fe 232 __IO uint32_t ErrorCode; /*!< ADC Error code */
mbed_official 340:28d1f895c6fe 233 }ADC_HandleTypeDef;
mbed_official 340:28d1f895c6fe 234 /**
mbed_official 340:28d1f895c6fe 235 * @}
mbed_official 340:28d1f895c6fe 236 */
mbed_official 340:28d1f895c6fe 237
mbed_official 340:28d1f895c6fe 238
mbed_official 340:28d1f895c6fe 239
mbed_official 340:28d1f895c6fe 240 /* Exported constants --------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 241
mbed_official 340:28d1f895c6fe 242 /** @defgroup ADC_Exported_Constants ADC Exported Constants
mbed_official 340:28d1f895c6fe 243 * @{
mbed_official 340:28d1f895c6fe 244 */
mbed_official 340:28d1f895c6fe 245
mbed_official 340:28d1f895c6fe 246 /** @defgroup ADC_Error_Code ADC Error Code
mbed_official 340:28d1f895c6fe 247 * @{
mbed_official 340:28d1f895c6fe 248 */
mbed_official 340:28d1f895c6fe 249 #define HAL_ADC_ERROR_NONE ((uint32_t)0x00) /*!< No error */
mbed_official 340:28d1f895c6fe 250 #define HAL_ADC_ERROR_INTERNAL ((uint32_t)0x01) /*!< ADC IP internal error: if problem of clocking,
mbed_official 340:28d1f895c6fe 251 enable/disable, erroneous state */
mbed_official 340:28d1f895c6fe 252 #define HAL_ADC_ERROR_OVR ((uint32_t)0x02) /*!< Overrun error */
mbed_official 340:28d1f895c6fe 253 #define HAL_ADC_ERROR_DMA ((uint32_t)0x04) /*!< DMA transfer error */
mbed_official 340:28d1f895c6fe 254
mbed_official 340:28d1f895c6fe 255 /**
mbed_official 340:28d1f895c6fe 256 * @}
mbed_official 340:28d1f895c6fe 257 */
mbed_official 340:28d1f895c6fe 258
mbed_official 340:28d1f895c6fe 259 /** @defgroup ADC_ClockPrescaler ADC ClockPrescaler
mbed_official 340:28d1f895c6fe 260 * @{
mbed_official 340:28d1f895c6fe 261 */
mbed_official 630:825f75ca301e 262 #define ADC_CLOCK_ASYNC_DIV1 ((uint32_t)0x00000000) /*!< ADC asynchronous clock derived from ADC dedicated HSI */
mbed_official 340:28d1f895c6fe 263
mbed_official 340:28d1f895c6fe 264 #define ADC_CLOCK_SYNC_PCLK_DIV2 ((uint32_t)ADC_CFGR2_CKMODE_0) /*!< ADC synchronous clock derived from AHB clock divided by a prescaler of 2 */
mbed_official 340:28d1f895c6fe 265 #define ADC_CLOCK_SYNC_PCLK_DIV4 ((uint32_t)ADC_CFGR2_CKMODE_1) /*!< ADC synchronous clock derived from AHB clock divided by a prescaler of 4 */
mbed_official 340:28d1f895c6fe 266
mbed_official 340:28d1f895c6fe 267 /**
mbed_official 340:28d1f895c6fe 268 * @}
mbed_official 340:28d1f895c6fe 269 */
mbed_official 340:28d1f895c6fe 270
mbed_official 340:28d1f895c6fe 271 /** @defgroup ADC_Resolution ADC Resolution
mbed_official 340:28d1f895c6fe 272 * @{
mbed_official 340:28d1f895c6fe 273 */
mbed_official 630:825f75ca301e 274 #define ADC_RESOLUTION_12B ((uint32_t)0x00000000) /*!< ADC 12-bit resolution */
mbed_official 630:825f75ca301e 275 #define ADC_RESOLUTION_10B ((uint32_t)ADC_CFGR1_RES_0) /*!< ADC 10-bit resolution */
mbed_official 630:825f75ca301e 276 #define ADC_RESOLUTION_8B ((uint32_t)ADC_CFGR1_RES_1) /*!< ADC 8-bit resolution */
mbed_official 630:825f75ca301e 277 #define ADC_RESOLUTION_6B ((uint32_t)ADC_CFGR1_RES) /*!< ADC 6-bit resolution */
mbed_official 340:28d1f895c6fe 278 /**
mbed_official 340:28d1f895c6fe 279 * @}
mbed_official 340:28d1f895c6fe 280 */
mbed_official 340:28d1f895c6fe 281
mbed_official 340:28d1f895c6fe 282 /** @defgroup ADC_Data_align ADC Data_align
mbed_official 340:28d1f895c6fe 283 * @{
mbed_official 340:28d1f895c6fe 284 */
mbed_official 340:28d1f895c6fe 285 #define ADC_DATAALIGN_RIGHT ((uint32_t)0x00000000)
mbed_official 340:28d1f895c6fe 286 #define ADC_DATAALIGN_LEFT ((uint32_t)ADC_CFGR1_ALIGN)
mbed_official 340:28d1f895c6fe 287 /**
mbed_official 340:28d1f895c6fe 288 * @}
mbed_official 340:28d1f895c6fe 289 */
mbed_official 340:28d1f895c6fe 290
mbed_official 340:28d1f895c6fe 291 /** @defgroup ADC_Scan_mode ADC Scan mode
mbed_official 340:28d1f895c6fe 292 * @{
mbed_official 340:28d1f895c6fe 293 */
mbed_official 340:28d1f895c6fe 294 /* Note: Scan mode values must be compatible with other STM32 devices having */
mbed_official 340:28d1f895c6fe 295 /* a configurable sequencer. */
mbed_official 340:28d1f895c6fe 296 /* Scan direction setting values are defined by taking in account */
mbed_official 340:28d1f895c6fe 297 /* already defined values for other STM32 devices: */
mbed_official 340:28d1f895c6fe 298 /* ADC_SCAN_DISABLE ((uint32_t)0x00000000) */
mbed_official 340:28d1f895c6fe 299 /* ADC_SCAN_ENABLE ((uint32_t)0x00000001) */
mbed_official 340:28d1f895c6fe 300 /* Scan direction forward is considered as default setting equivalent */
mbed_official 340:28d1f895c6fe 301 /* to scan enable. */
mbed_official 340:28d1f895c6fe 302 /* Scan direction backward is considered as additional setting. */
mbed_official 340:28d1f895c6fe 303 /* In case of migration from another STM32 device, the user will be */
mbed_official 340:28d1f895c6fe 304 /* warned of change of setting choices with assert check. */
mbed_official 340:28d1f895c6fe 305 #define ADC_SCAN_DIRECTION_FORWARD ((uint32_t)0x00000001) /*!< Scan direction forward: from channel 0 to channel 18 */
mbed_official 340:28d1f895c6fe 306 #define ADC_SCAN_DIRECTION_BACKWARD ((uint32_t)0x00000002) /*!< Scan direction backward: from channel 18 to channel 0 */
mbed_official 340:28d1f895c6fe 307
mbed_official 340:28d1f895c6fe 308 #define ADC_SCAN_ENABLE ADC_SCAN_DIRECTION_FORWARD /* For compatibility with other STM32 devices */
mbed_official 340:28d1f895c6fe 309
mbed_official 340:28d1f895c6fe 310 /**
mbed_official 340:28d1f895c6fe 311 * @}
mbed_official 340:28d1f895c6fe 312 */
mbed_official 340:28d1f895c6fe 313
mbed_official 340:28d1f895c6fe 314 /** @defgroup ADC_External_trigger_edge_Regular ADC External trigger edge Regular
mbed_official 340:28d1f895c6fe 315 * @{
mbed_official 340:28d1f895c6fe 316 */
mbed_official 340:28d1f895c6fe 317 #define ADC_EXTERNALTRIGCONVEDGE_NONE ((uint32_t)0x00000000)
mbed_official 340:28d1f895c6fe 318 #define ADC_EXTERNALTRIGCONVEDGE_RISING ((uint32_t)ADC_CFGR1_EXTEN_0)
mbed_official 340:28d1f895c6fe 319 #define ADC_EXTERNALTRIGCONVEDGE_FALLING ((uint32_t)ADC_CFGR1_EXTEN_1)
mbed_official 340:28d1f895c6fe 320 #define ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING ((uint32_t)ADC_CFGR1_EXTEN)
mbed_official 340:28d1f895c6fe 321 /**
mbed_official 340:28d1f895c6fe 322 * @}
mbed_official 340:28d1f895c6fe 323 */
mbed_official 340:28d1f895c6fe 324
mbed_official 340:28d1f895c6fe 325 /** @defgroup ADC_EOCSelection ADC EOCSelection
mbed_official 340:28d1f895c6fe 326 * @{
mbed_official 340:28d1f895c6fe 327 */
mbed_official 630:825f75ca301e 328 #define ADC_EOC_SINGLE_CONV ((uint32_t) ADC_ISR_EOC)
mbed_official 630:825f75ca301e 329 #define ADC_EOC_SEQ_CONV ((uint32_t) ADC_ISR_EOS)
mbed_official 630:825f75ca301e 330 #define ADC_EOC_SINGLE_SEQ_CONV ((uint32_t)(ADC_ISR_EOC | ADC_ISR_EOS)) /*!< reserved for future use */
mbed_official 340:28d1f895c6fe 331 /**
mbed_official 340:28d1f895c6fe 332 * @}
mbed_official 340:28d1f895c6fe 333 */
mbed_official 340:28d1f895c6fe 334
mbed_official 340:28d1f895c6fe 335 /** @defgroup ADC_Overrun ADC Overrun
mbed_official 340:28d1f895c6fe 336 * @{
mbed_official 340:28d1f895c6fe 337 */
mbed_official 630:825f75ca301e 338 #define ADC_OVR_DATA_OVERWRITTEN ((uint32_t)0x00000000)
mbed_official 630:825f75ca301e 339 #define ADC_OVR_DATA_PRESERVED ((uint32_t)0x00000001)
mbed_official 340:28d1f895c6fe 340 /**
mbed_official 340:28d1f895c6fe 341 * @}
mbed_official 340:28d1f895c6fe 342 */
mbed_official 340:28d1f895c6fe 343
mbed_official 340:28d1f895c6fe 344 /** @defgroup ADC_rank ADC rank
mbed_official 340:28d1f895c6fe 345 * @{
mbed_official 340:28d1f895c6fe 346 */
mbed_official 630:825f75ca301e 347 #define ADC_RANK_CHANNEL_NUMBER ((uint32_t)0x00001000) /*!< Enable the rank of the selected channels. Number of ranks in the sequence is defined by number of channels enabled, rank of each channel is defined by channel number (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...) */
mbed_official 340:28d1f895c6fe 348 #define ADC_RANK_NONE ((uint32_t)0x00001001) /*!< Disable the selected rank (selected channel) from sequencer */
mbed_official 340:28d1f895c6fe 349 /**
mbed_official 340:28d1f895c6fe 350 * @}
mbed_official 340:28d1f895c6fe 351 */
mbed_official 340:28d1f895c6fe 352
mbed_official 340:28d1f895c6fe 353 /** @defgroup ADC_sampling_times ADC sampling times
mbed_official 340:28d1f895c6fe 354 * @{
mbed_official 630:825f75ca301e 355 */
mbed_official 630:825f75ca301e 356 /* Note: Parameter "ADC_SAMPLETIME_1CYCLE_5" defined with a dummy bit */
mbed_official 630:825f75ca301e 357 /* to distinguish this parameter versus reset value 0x00000000, */
mbed_official 630:825f75ca301e 358 /* in the context of management of parameters "SamplingTimeCommon" */
mbed_official 630:825f75ca301e 359 /* and "SamplingTime" (obsolete)). */
mbed_official 630:825f75ca301e 360 #define ADC_SAMPLETIME_1CYCLE_5 ((uint32_t)0x10000000) /*!< Sampling time 1.5 ADC clock cycle */
mbed_official 340:28d1f895c6fe 361 #define ADC_SAMPLETIME_7CYCLES_5 ((uint32_t) ADC_SMPR_SMP_0) /*!< Sampling time 7.5 ADC clock cycles */
mbed_official 340:28d1f895c6fe 362 #define ADC_SAMPLETIME_13CYCLES_5 ((uint32_t) ADC_SMPR_SMP_1) /*!< Sampling time 13.5 ADC clock cycles */
mbed_official 340:28d1f895c6fe 363 #define ADC_SAMPLETIME_28CYCLES_5 ((uint32_t)(ADC_SMPR_SMP_1 | ADC_SMPR_SMP_0)) /*!< Sampling time 28.5 ADC clock cycles */
mbed_official 340:28d1f895c6fe 364 #define ADC_SAMPLETIME_41CYCLES_5 ((uint32_t) ADC_SMPR_SMP_2) /*!< Sampling time 41.5 ADC clock cycles */
mbed_official 340:28d1f895c6fe 365 #define ADC_SAMPLETIME_55CYCLES_5 ((uint32_t)(ADC_SMPR_SMP_2 | ADC_SMPR_SMP_0)) /*!< Sampling time 55.5 ADC clock cycles */
mbed_official 340:28d1f895c6fe 366 #define ADC_SAMPLETIME_71CYCLES_5 ((uint32_t)(ADC_SMPR_SMP_2 | ADC_SMPR_SMP_1)) /*!< Sampling time 71.5 ADC clock cycles */
mbed_official 340:28d1f895c6fe 367 #define ADC_SAMPLETIME_239CYCLES_5 ((uint32_t) ADC_SMPR_SMP) /*!< Sampling time 239.5 ADC clock cycles */
mbed_official 340:28d1f895c6fe 368 /**
mbed_official 340:28d1f895c6fe 369 * @}
mbed_official 340:28d1f895c6fe 370 */
mbed_official 340:28d1f895c6fe 371
mbed_official 340:28d1f895c6fe 372 /** @defgroup ADC_analog_watchdog_mode ADC analog watchdog mode
mbed_official 340:28d1f895c6fe 373 * @{
mbed_official 340:28d1f895c6fe 374 */
mbed_official 340:28d1f895c6fe 375 #define ADC_ANALOGWATCHDOG_NONE ((uint32_t) 0x00000000)
mbed_official 340:28d1f895c6fe 376 #define ADC_ANALOGWATCHDOG_SINGLE_REG ((uint32_t)(ADC_CFGR1_AWDSGL | ADC_CFGR1_AWDEN))
mbed_official 340:28d1f895c6fe 377 #define ADC_ANALOGWATCHDOG_ALL_REG ((uint32_t) ADC_CFGR1_AWDEN)
mbed_official 340:28d1f895c6fe 378 /**
mbed_official 340:28d1f895c6fe 379 * @}
mbed_official 340:28d1f895c6fe 380 */
mbed_official 340:28d1f895c6fe 381
mbed_official 340:28d1f895c6fe 382 /** @defgroup ADC_Event_type ADC Event type
mbed_official 340:28d1f895c6fe 383 * @{
mbed_official 340:28d1f895c6fe 384 */
mbed_official 630:825f75ca301e 385 #define ADC_AWD_EVENT ((uint32_t)ADC_FLAG_AWD) /*!< ADC Analog watchdog 1 event */
mbed_official 630:825f75ca301e 386 #define ADC_OVR_EVENT ((uint32_t)ADC_FLAG_OVR) /*!< ADC overrun event */
mbed_official 340:28d1f895c6fe 387 /**
mbed_official 340:28d1f895c6fe 388 * @}
mbed_official 340:28d1f895c6fe 389 */
mbed_official 340:28d1f895c6fe 390
mbed_official 340:28d1f895c6fe 391 /** @defgroup ADC_interrupts_definition ADC interrupts definition
mbed_official 340:28d1f895c6fe 392 * @{
mbed_official 340:28d1f895c6fe 393 */
mbed_official 340:28d1f895c6fe 394 #define ADC_IT_AWD ADC_IER_AWDIE /*!< ADC Analog watchdog interrupt source */
mbed_official 340:28d1f895c6fe 395 #define ADC_IT_OVR ADC_IER_OVRIE /*!< ADC overrun interrupt source */
mbed_official 340:28d1f895c6fe 396 #define ADC_IT_EOS ADC_IER_EOSEQIE /*!< ADC End of Regular sequence of Conversions interrupt source */
mbed_official 340:28d1f895c6fe 397 #define ADC_IT_EOC ADC_IER_EOCIE /*!< ADC End of Regular Conversion interrupt source */
mbed_official 340:28d1f895c6fe 398 #define ADC_IT_EOSMP ADC_IER_EOSMPIE /*!< ADC End of Sampling interrupt source */
mbed_official 340:28d1f895c6fe 399 #define ADC_IT_RDY ADC_IER_ADRDYIE /*!< ADC Ready interrupt source */
mbed_official 340:28d1f895c6fe 400 /**
mbed_official 340:28d1f895c6fe 401 * @}
mbed_official 340:28d1f895c6fe 402 */
mbed_official 340:28d1f895c6fe 403
mbed_official 340:28d1f895c6fe 404 /** @defgroup ADC_flags_definition ADC flags definition
mbed_official 340:28d1f895c6fe 405 * @{
mbed_official 340:28d1f895c6fe 406 */
mbed_official 340:28d1f895c6fe 407 #define ADC_FLAG_AWD ADC_ISR_AWD /*!< ADC Analog watchdog flag */
mbed_official 340:28d1f895c6fe 408 #define ADC_FLAG_OVR ADC_ISR_OVR /*!< ADC overrun flag */
mbed_official 340:28d1f895c6fe 409 #define ADC_FLAG_EOS ADC_ISR_EOSEQ /*!< ADC End of Regular sequence of Conversions flag */
mbed_official 340:28d1f895c6fe 410 #define ADC_FLAG_EOC ADC_ISR_EOC /*!< ADC End of Regular Conversion flag */
mbed_official 340:28d1f895c6fe 411 #define ADC_FLAG_EOSMP ADC_ISR_EOSMP /*!< ADC End of Sampling flag */
mbed_official 340:28d1f895c6fe 412 #define ADC_FLAG_RDY ADC_ISR_ADRDY /*!< ADC Ready flag */
mbed_official 340:28d1f895c6fe 413 /**
mbed_official 340:28d1f895c6fe 414 * @}
mbed_official 340:28d1f895c6fe 415 */
mbed_official 340:28d1f895c6fe 416
mbed_official 630:825f75ca301e 417 /**
mbed_official 630:825f75ca301e 418 * @}
mbed_official 340:28d1f895c6fe 419 */
mbed_official 630:825f75ca301e 420
mbed_official 630:825f75ca301e 421
mbed_official 630:825f75ca301e 422 /* Private constants ---------------------------------------------------------*/
mbed_official 630:825f75ca301e 423
mbed_official 630:825f75ca301e 424 /** @addtogroup ADC_Private_Constants ADC Private Constants
mbed_official 630:825f75ca301e 425 * @{
mbed_official 630:825f75ca301e 426 */
mbed_official 630:825f75ca301e 427
mbed_official 630:825f75ca301e 428 /** @defgroup ADC_Internal_HAL_driver_Ext_trig_src_Regular ADC Internal HAL driver Ext trig src Regular
mbed_official 630:825f75ca301e 429 * @{
mbed_official 630:825f75ca301e 430 */
mbed_official 630:825f75ca301e 431
mbed_official 630:825f75ca301e 432 /* List of external triggers of regular group for ADC1: */
mbed_official 630:825f75ca301e 433 /* (used internally by HAL driver. To not use into HAL structure parameters) */
mbed_official 630:825f75ca301e 434 #define ADC1_2_EXTERNALTRIG_T1_TRGO ((uint32_t)0x00000000)
mbed_official 630:825f75ca301e 435 #define ADC1_2_EXTERNALTRIG_T1_CC4 ((uint32_t)ADC_CFGR1_EXTSEL_0)
mbed_official 630:825f75ca301e 436 #define ADC1_2_EXTERNALTRIG_T2_TRGO ((uint32_t)ADC_CFGR1_EXTSEL_1)
mbed_official 630:825f75ca301e 437 #define ADC1_2_EXTERNALTRIG_T3_TRGO ((uint32_t)(ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0))
mbed_official 630:825f75ca301e 438 #define ADC1_2_EXTERNALTRIG_T15_TRGO ((uint32_t)ADC_CFGR1_EXTSEL_2)
mbed_official 340:28d1f895c6fe 439 /**
mbed_official 340:28d1f895c6fe 440 * @}
mbed_official 340:28d1f895c6fe 441 */
mbed_official 340:28d1f895c6fe 442
mbed_official 630:825f75ca301e 443 /* Combination of all post-conversion flags bits: EOC/EOS, OVR, AWD */
mbed_official 630:825f75ca301e 444 #define ADC_FLAG_POSTCONV_ALL (ADC_FLAG_AWD | ADC_FLAG_OVR | ADC_FLAG_EOS | ADC_FLAG_EOC)
mbed_official 340:28d1f895c6fe 445
mbed_official 340:28d1f895c6fe 446 /**
mbed_official 340:28d1f895c6fe 447 * @}
mbed_official 630:825f75ca301e 448 */
mbed_official 630:825f75ca301e 449
mbed_official 630:825f75ca301e 450
mbed_official 630:825f75ca301e 451 /* Exported macro ------------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 452
mbed_official 340:28d1f895c6fe 453 /** @defgroup ADC_Exported_Macros ADC Exported Macros
mbed_official 340:28d1f895c6fe 454 * @{
mbed_official 340:28d1f895c6fe 455 */
mbed_official 630:825f75ca301e 456 /* Macro for internal HAL driver usage, and possibly can be used into code of */
mbed_official 630:825f75ca301e 457 /* final user. */
mbed_official 630:825f75ca301e 458
mbed_official 630:825f75ca301e 459 /**
mbed_official 630:825f75ca301e 460 * @brief Enable the ADC peripheral
mbed_official 630:825f75ca301e 461 * @param __HANDLE__: ADC handle
mbed_official 630:825f75ca301e 462 * @retval None
mbed_official 630:825f75ca301e 463 */
mbed_official 630:825f75ca301e 464 #define __HAL_ADC_ENABLE(__HANDLE__) \
mbed_official 630:825f75ca301e 465 ((__HANDLE__)->Instance->CR |= ADC_CR_ADEN)
mbed_official 630:825f75ca301e 466
mbed_official 630:825f75ca301e 467 /**
mbed_official 630:825f75ca301e 468 * @brief Disable the ADC peripheral
mbed_official 630:825f75ca301e 469 * @param __HANDLE__: ADC handle
mbed_official 630:825f75ca301e 470 * @retval None
mbed_official 630:825f75ca301e 471 */
mbed_official 630:825f75ca301e 472 #define __HAL_ADC_DISABLE(__HANDLE__) \
mbed_official 630:825f75ca301e 473 do{ \
mbed_official 630:825f75ca301e 474 (__HANDLE__)->Instance->CR |= ADC_CR_ADDIS; \
mbed_official 630:825f75ca301e 475 __HAL_ADC_CLEAR_FLAG((__HANDLE__), (ADC_FLAG_EOSMP | ADC_FLAG_RDY)); \
mbed_official 630:825f75ca301e 476 } while(0)
mbed_official 630:825f75ca301e 477
mbed_official 630:825f75ca301e 478 /**
mbed_official 630:825f75ca301e 479 * @brief Enable the ADC end of conversion interrupt.
mbed_official 630:825f75ca301e 480 * @param __HANDLE__: ADC handle
mbed_official 630:825f75ca301e 481 * @param __INTERRUPT__: ADC Interrupt
mbed_official 630:825f75ca301e 482 * This parameter can be any combination of the following values:
mbed_official 630:825f75ca301e 483 * @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source
mbed_official 630:825f75ca301e 484 * @arg ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt source
mbed_official 630:825f75ca301e 485 * @arg ADC_IT_AWD: ADC Analog watchdog interrupt source
mbed_official 630:825f75ca301e 486 * @arg ADC_IT_OVR: ADC overrun interrupt source
mbed_official 630:825f75ca301e 487 * @arg ADC_IT_EOSMP: ADC End of Sampling interrupt source
mbed_official 630:825f75ca301e 488 * @arg ADC_IT_RDY: ADC Ready interrupt source
mbed_official 630:825f75ca301e 489 * @retval None
mbed_official 630:825f75ca301e 490 */
mbed_official 630:825f75ca301e 491 #define __HAL_ADC_ENABLE_IT(__HANDLE__, __INTERRUPT__) \
mbed_official 630:825f75ca301e 492 (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
mbed_official 630:825f75ca301e 493
mbed_official 630:825f75ca301e 494 /**
mbed_official 630:825f75ca301e 495 * @brief Disable the ADC end of conversion interrupt.
mbed_official 630:825f75ca301e 496 * @param __HANDLE__: ADC handle
mbed_official 630:825f75ca301e 497 * @param __INTERRUPT__: ADC Interrupt
mbed_official 630:825f75ca301e 498 * This parameter can be any combination of the following values:
mbed_official 630:825f75ca301e 499 * @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source
mbed_official 630:825f75ca301e 500 * @arg ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt source
mbed_official 630:825f75ca301e 501 * @arg ADC_IT_AWD: ADC Analog watchdog interrupt source
mbed_official 630:825f75ca301e 502 * @arg ADC_IT_OVR: ADC overrun interrupt source
mbed_official 630:825f75ca301e 503 * @arg ADC_IT_EOSMP: ADC End of Sampling interrupt source
mbed_official 630:825f75ca301e 504 * @arg ADC_IT_RDY: ADC Ready interrupt source
mbed_official 630:825f75ca301e 505 * @retval None
mbed_official 630:825f75ca301e 506 */
mbed_official 630:825f75ca301e 507 #define __HAL_ADC_DISABLE_IT(__HANDLE__, __INTERRUPT__) \
mbed_official 630:825f75ca301e 508 (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
mbed_official 630:825f75ca301e 509
mbed_official 630:825f75ca301e 510 /** @brief Checks if the specified ADC interrupt source is enabled or disabled.
mbed_official 630:825f75ca301e 511 * @param __HANDLE__: ADC handle
mbed_official 630:825f75ca301e 512 * @param __INTERRUPT__: ADC interrupt source to check
mbed_official 630:825f75ca301e 513 * This parameter can be any combination of the following values:
mbed_official 630:825f75ca301e 514 * @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source
mbed_official 630:825f75ca301e 515 * @arg ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt source
mbed_official 630:825f75ca301e 516 * @arg ADC_IT_AWD: ADC Analog watchdog interrupt source
mbed_official 630:825f75ca301e 517 * @arg ADC_IT_OVR: ADC overrun interrupt source
mbed_official 630:825f75ca301e 518 * @arg ADC_IT_EOSMP: ADC End of Sampling interrupt source
mbed_official 630:825f75ca301e 519 * @arg ADC_IT_RDY: ADC Ready interrupt source
mbed_official 630:825f75ca301e 520 * @retval State ofinterruption (SET or RESET)
mbed_official 630:825f75ca301e 521 */
mbed_official 630:825f75ca301e 522 #define __HAL_ADC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \
mbed_official 630:825f75ca301e 523 (((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__))
mbed_official 630:825f75ca301e 524
mbed_official 630:825f75ca301e 525 /**
mbed_official 630:825f75ca301e 526 * @brief Get the selected ADC's flag status.
mbed_official 630:825f75ca301e 527 * @param __HANDLE__: ADC handle
mbed_official 630:825f75ca301e 528 * @param __FLAG__: ADC flag
mbed_official 630:825f75ca301e 529 * This parameter can be any combination of the following values:
mbed_official 630:825f75ca301e 530 * @arg ADC_FLAG_EOC: ADC End of Regular conversion flag
mbed_official 630:825f75ca301e 531 * @arg ADC_FLAG_EOS: ADC End of Regular sequence of Conversions flag
mbed_official 630:825f75ca301e 532 * @arg ADC_FLAG_AWD: ADC Analog watchdog flag
mbed_official 630:825f75ca301e 533 * @arg ADC_FLAG_OVR: ADC overrun flag
mbed_official 630:825f75ca301e 534 * @arg ADC_FLAG_EOSMP: ADC End of Sampling flag
mbed_official 630:825f75ca301e 535 * @arg ADC_FLAG_RDY: ADC Ready flag
mbed_official 630:825f75ca301e 536 * @retval None
mbed_official 630:825f75ca301e 537 */
mbed_official 630:825f75ca301e 538 #define __HAL_ADC_GET_FLAG(__HANDLE__, __FLAG__) \
mbed_official 630:825f75ca301e 539 ((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__))
mbed_official 630:825f75ca301e 540
mbed_official 630:825f75ca301e 541 /**
mbed_official 630:825f75ca301e 542 * @brief Clear the ADC's pending flags
mbed_official 630:825f75ca301e 543 * @param __HANDLE__: ADC handle
mbed_official 630:825f75ca301e 544 * @param __FLAG__: ADC flag
mbed_official 630:825f75ca301e 545 * This parameter can be any combination of the following values:
mbed_official 630:825f75ca301e 546 * @arg ADC_FLAG_EOC: ADC End of Regular conversion flag
mbed_official 630:825f75ca301e 547 * @arg ADC_FLAG_EOS: ADC End of Regular sequence of Conversions flag
mbed_official 630:825f75ca301e 548 * @arg ADC_FLAG_AWD: ADC Analog watchdog flag
mbed_official 630:825f75ca301e 549 * @arg ADC_FLAG_OVR: ADC overrun flag
mbed_official 630:825f75ca301e 550 * @arg ADC_FLAG_EOSMP: ADC End of Sampling flag
mbed_official 630:825f75ca301e 551 * @arg ADC_FLAG_RDY: ADC Ready flag
mbed_official 630:825f75ca301e 552 * @retval None
mbed_official 630:825f75ca301e 553 */
mbed_official 630:825f75ca301e 554 /* Note: bit cleared bit by writing 1 (writing 0 has no effect on any bit of register ISR) */
mbed_official 630:825f75ca301e 555 #define __HAL_ADC_CLEAR_FLAG(__HANDLE__, __FLAG__) \
mbed_official 630:825f75ca301e 556 (((__HANDLE__)->Instance->ISR) = (__FLAG__))
mbed_official 630:825f75ca301e 557
mbed_official 340:28d1f895c6fe 558 /** @brief Reset ADC handle state
mbed_official 340:28d1f895c6fe 559 * @param __HANDLE__: ADC handle
mbed_official 340:28d1f895c6fe 560 * @retval None
mbed_official 340:28d1f895c6fe 561 */
mbed_official 630:825f75ca301e 562 #define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) \
mbed_official 630:825f75ca301e 563 ((__HANDLE__)->State = HAL_ADC_STATE_RESET)
mbed_official 630:825f75ca301e 564
mbed_official 630:825f75ca301e 565 /**
mbed_official 630:825f75ca301e 566 * @}
mbed_official 630:825f75ca301e 567 */
mbed_official 630:825f75ca301e 568
mbed_official 630:825f75ca301e 569
mbed_official 630:825f75ca301e 570 /* Private macro -------------------------------------------------------------*/
mbed_official 630:825f75ca301e 571
mbed_official 630:825f75ca301e 572 /** @defgroup ADC_Private_Macros ADC Private Macros
mbed_official 630:825f75ca301e 573 * @{
mbed_official 630:825f75ca301e 574 */
mbed_official 630:825f75ca301e 575 /* Macro reserved for internal HAL driver usage, not intended to be used in */
mbed_official 630:825f75ca301e 576 /* code of final user. */
mbed_official 630:825f75ca301e 577
mbed_official 340:28d1f895c6fe 578
mbed_official 630:825f75ca301e 579 /**
mbed_official 630:825f75ca301e 580 * @brief Verification of hardware constraints before ADC can be enabled
mbed_official 630:825f75ca301e 581 * @param __HANDLE__: ADC handle
mbed_official 630:825f75ca301e 582 * @retval SET (ADC can be enabled) or RESET (ADC cannot be enabled)
mbed_official 630:825f75ca301e 583 */
mbed_official 630:825f75ca301e 584 #define ADC_ENABLING_CONDITIONS(__HANDLE__) \
mbed_official 630:825f75ca301e 585 (( ( ((__HANDLE__)->Instance->CR) & \
mbed_official 630:825f75ca301e 586 (ADC_CR_ADCAL | ADC_CR_ADSTP | ADC_CR_ADSTART | ADC_CR_ADDIS | ADC_CR_ADEN) \
mbed_official 630:825f75ca301e 587 ) == RESET \
mbed_official 630:825f75ca301e 588 ) ? SET : RESET)
mbed_official 630:825f75ca301e 589
mbed_official 630:825f75ca301e 590 /**
mbed_official 630:825f75ca301e 591 * @brief Verification of hardware constraints before ADC can be disabled
mbed_official 630:825f75ca301e 592 * @param __HANDLE__: ADC handle
mbed_official 630:825f75ca301e 593 * @retval SET (ADC can be disabled) or RESET (ADC cannot be disabled)
mbed_official 630:825f75ca301e 594 */
mbed_official 630:825f75ca301e 595 #define ADC_DISABLING_CONDITIONS(__HANDLE__) \
mbed_official 630:825f75ca301e 596 (( ( ((__HANDLE__)->Instance->CR) & \
mbed_official 630:825f75ca301e 597 (ADC_CR_ADSTART | ADC_CR_ADEN)) == ADC_CR_ADEN \
mbed_official 630:825f75ca301e 598 ) ? SET : RESET)
mbed_official 340:28d1f895c6fe 599
mbed_official 340:28d1f895c6fe 600 /**
mbed_official 340:28d1f895c6fe 601 * @brief Verification of ADC state: enabled or disabled
mbed_official 340:28d1f895c6fe 602 * @param __HANDLE__: ADC handle
mbed_official 340:28d1f895c6fe 603 * @retval SET (ADC enabled) or RESET (ADC disabled)
mbed_official 340:28d1f895c6fe 604 */
mbed_official 340:28d1f895c6fe 605 /* Note: If low power mode AutoPowerOff is enabled, power-on/off phases are */
mbed_official 340:28d1f895c6fe 606 /* performed automatically by hardware and flag ADC_FLAG_RDY is not */
mbed_official 340:28d1f895c6fe 607 /* set. */
mbed_official 630:825f75ca301e 608 #define ADC_IS_ENABLE(__HANDLE__) \
mbed_official 630:825f75ca301e 609 (( ((((__HANDLE__)->Instance->CR) & (ADC_CR_ADEN | ADC_CR_ADDIS)) == ADC_CR_ADEN) && \
mbed_official 630:825f75ca301e 610 (((((__HANDLE__)->Instance->ISR) & ADC_FLAG_RDY) == ADC_FLAG_RDY) || \
mbed_official 630:825f75ca301e 611 ((((__HANDLE__)->Instance->CFGR1) & ADC_CFGR1_AUTOFF) == ADC_CFGR1_AUTOFF) ) \
mbed_official 630:825f75ca301e 612 ) ? SET : RESET)
mbed_official 340:28d1f895c6fe 613
mbed_official 340:28d1f895c6fe 614 /**
mbed_official 340:28d1f895c6fe 615 * @brief Test if conversion trigger of regular group is software start
mbed_official 340:28d1f895c6fe 616 * or external trigger.
mbed_official 340:28d1f895c6fe 617 * @param __HANDLE__: ADC handle
mbed_official 340:28d1f895c6fe 618 * @retval SET (software start) or RESET (external trigger)
mbed_official 340:28d1f895c6fe 619 */
mbed_official 630:825f75ca301e 620 #define ADC_IS_SOFTWARE_START_REGULAR(__HANDLE__) \
mbed_official 630:825f75ca301e 621 (((__HANDLE__)->Instance->CFGR1 & ADC_CFGR1_EXTEN) == RESET)
mbed_official 340:28d1f895c6fe 622
mbed_official 340:28d1f895c6fe 623 /**
mbed_official 340:28d1f895c6fe 624 * @brief Check if no conversion on going on regular group
mbed_official 340:28d1f895c6fe 625 * @param __HANDLE__: ADC handle
mbed_official 340:28d1f895c6fe 626 * @retval SET (conversion is on going) or RESET (no conversion is on going)
mbed_official 340:28d1f895c6fe 627 */
mbed_official 630:825f75ca301e 628 #define ADC_IS_CONVERSION_ONGOING_REGULAR(__HANDLE__) \
mbed_official 630:825f75ca301e 629 (( (((__HANDLE__)->Instance->CR) & ADC_CR_ADSTART) == RESET \
mbed_official 630:825f75ca301e 630 ) ? RESET : SET)
mbed_official 340:28d1f895c6fe 631
mbed_official 340:28d1f895c6fe 632 /**
mbed_official 340:28d1f895c6fe 633 * @brief Returns resolution bits in CFGR1 register: RES[1:0].
mbed_official 340:28d1f895c6fe 634 * Returned value is among parameters to @ref ADC_Resolution.
mbed_official 340:28d1f895c6fe 635 * @param __HANDLE__: ADC handle
mbed_official 340:28d1f895c6fe 636 * @retval None
mbed_official 340:28d1f895c6fe 637 */
mbed_official 630:825f75ca301e 638 #define ADC_GET_RESOLUTION(__HANDLE__) \
mbed_official 630:825f75ca301e 639 (((__HANDLE__)->Instance->CFGR1) & ADC_CFGR1_RES)
mbed_official 340:28d1f895c6fe 640
mbed_official 340:28d1f895c6fe 641 /**
mbed_official 340:28d1f895c6fe 642 * @brief Returns ADC sample time bits in SMPR register: SMP[2:0].
mbed_official 340:28d1f895c6fe 643 * Returned value is among parameters to @ref ADC_Resolution.
mbed_official 340:28d1f895c6fe 644 * @param __HANDLE__: ADC handle
mbed_official 340:28d1f895c6fe 645 * @retval None
mbed_official 340:28d1f895c6fe 646 */
mbed_official 630:825f75ca301e 647 #define ADC_GET_SAMPLINGTIME(__HANDLE__) \
mbed_official 630:825f75ca301e 648 (((__HANDLE__)->Instance->SMPR) & ADC_SMPR_SMP)
mbed_official 340:28d1f895c6fe 649
mbed_official 340:28d1f895c6fe 650 /**
mbed_official 630:825f75ca301e 651 * @brief Simultaneously clears and sets specific bits of the handle State
mbed_official 630:825f75ca301e 652 * @note: ADC_STATE_CLR_SET() macro is merely aliased to generic macro MODIFY_REG(),
mbed_official 630:825f75ca301e 653 * the first parameter is the ADC handle State, the second parameter is the
mbed_official 630:825f75ca301e 654 * bit field to clear, the third and last parameter is the bit field to set.
mbed_official 340:28d1f895c6fe 655 * @retval None
mbed_official 340:28d1f895c6fe 656 */
mbed_official 630:825f75ca301e 657 #define ADC_STATE_CLR_SET MODIFY_REG
mbed_official 340:28d1f895c6fe 658
mbed_official 340:28d1f895c6fe 659 /**
mbed_official 340:28d1f895c6fe 660 * @brief Clear ADC error code (set it to error code: "no error")
mbed_official 340:28d1f895c6fe 661 * @param __HANDLE__: ADC handle
mbed_official 340:28d1f895c6fe 662 * @retval None
mbed_official 340:28d1f895c6fe 663 */
mbed_official 630:825f75ca301e 664 #define ADC_CLEAR_ERRORCODE(__HANDLE__) \
mbed_official 630:825f75ca301e 665 ((__HANDLE__)->ErrorCode = HAL_ADC_ERROR_NONE)
mbed_official 340:28d1f895c6fe 666
mbed_official 340:28d1f895c6fe 667
mbed_official 340:28d1f895c6fe 668 /**
mbed_official 340:28d1f895c6fe 669 * @brief Configure the channel number into channel selection register
mbed_official 340:28d1f895c6fe 670 * @param _CHANNEL_: ADC Channel
mbed_official 340:28d1f895c6fe 671 * @retval None
mbed_official 340:28d1f895c6fe 672 */
mbed_official 340:28d1f895c6fe 673 /* This function converts ADC channels from numbers (see defgroup ADC_channels)
mbed_official 340:28d1f895c6fe 674 to bitfields, to get the equivalence of CMSIS channels:
mbed_official 340:28d1f895c6fe 675 ADC_CHANNEL_0 ((uint32_t) ADC_CHSELR_CHSEL0)
mbed_official 340:28d1f895c6fe 676 ADC_CHANNEL_1 ((uint32_t) ADC_CHSELR_CHSEL1)
mbed_official 340:28d1f895c6fe 677 ADC_CHANNEL_2 ((uint32_t) ADC_CHSELR_CHSEL2)
mbed_official 340:28d1f895c6fe 678 ADC_CHANNEL_3 ((uint32_t) ADC_CHSELR_CHSEL3)
mbed_official 340:28d1f895c6fe 679 ADC_CHANNEL_4 ((uint32_t) ADC_CHSELR_CHSEL4)
mbed_official 340:28d1f895c6fe 680 ADC_CHANNEL_5 ((uint32_t) ADC_CHSELR_CHSEL5)
mbed_official 340:28d1f895c6fe 681 ADC_CHANNEL_6 ((uint32_t) ADC_CHSELR_CHSEL6)
mbed_official 340:28d1f895c6fe 682 ADC_CHANNEL_7 ((uint32_t) ADC_CHSELR_CHSEL7)
mbed_official 340:28d1f895c6fe 683 ADC_CHANNEL_8 ((uint32_t) ADC_CHSELR_CHSEL8)
mbed_official 340:28d1f895c6fe 684 ADC_CHANNEL_9 ((uint32_t) ADC_CHSELR_CHSEL9)
mbed_official 340:28d1f895c6fe 685 ADC_CHANNEL_10 ((uint32_t) ADC_CHSELR_CHSEL10)
mbed_official 340:28d1f895c6fe 686 ADC_CHANNEL_11 ((uint32_t) ADC_CHSELR_CHSEL11)
mbed_official 340:28d1f895c6fe 687 ADC_CHANNEL_12 ((uint32_t) ADC_CHSELR_CHSEL12)
mbed_official 340:28d1f895c6fe 688 ADC_CHANNEL_13 ((uint32_t) ADC_CHSELR_CHSEL13)
mbed_official 340:28d1f895c6fe 689 ADC_CHANNEL_14 ((uint32_t) ADC_CHSELR_CHSEL14)
mbed_official 340:28d1f895c6fe 690 ADC_CHANNEL_15 ((uint32_t) ADC_CHSELR_CHSEL15)
mbed_official 340:28d1f895c6fe 691 ADC_CHANNEL_16 ((uint32_t) ADC_CHSELR_CHSEL16)
mbed_official 340:28d1f895c6fe 692 ADC_CHANNEL_17 ((uint32_t) ADC_CHSELR_CHSEL17)
mbed_official 340:28d1f895c6fe 693 ADC_CHANNEL_18 ((uint32_t) ADC_CHSELR_CHSEL18)
mbed_official 340:28d1f895c6fe 694 */
mbed_official 630:825f75ca301e 695 #define ADC_CHSELR_CHANNEL(_CHANNEL_) \
mbed_official 630:825f75ca301e 696 ( 1U << (_CHANNEL_))
mbed_official 340:28d1f895c6fe 697
mbed_official 630:825f75ca301e 698 /**
mbed_official 630:825f75ca301e 699 * @brief Set the ADC's sample time
mbed_official 630:825f75ca301e 700 * @param _SAMPLETIME_: Sample time parameter.
mbed_official 630:825f75ca301e 701 * @retval None
mbed_official 340:28d1f895c6fe 702 */
mbed_official 630:825f75ca301e 703 /* Note: ADC sampling time set using mask ADC_SMPR_SMP due to parameter */
mbed_official 630:825f75ca301e 704 /* "ADC_SAMPLETIME_1CYCLE_5" defined with a dummy bit (bit used to */
mbed_official 630:825f75ca301e 705 /* distinguish this parameter versus reset value 0x00000000, */
mbed_official 630:825f75ca301e 706 /* in the context of management of parameters "SamplingTimeCommon" */
mbed_official 630:825f75ca301e 707 /* and "SamplingTime" (obsolete)). */
mbed_official 630:825f75ca301e 708 #define ADC_SMPR_SET(_SAMPLETIME_) \
mbed_official 630:825f75ca301e 709 ((_SAMPLETIME_) & (ADC_SMPR_SMP))
mbed_official 340:28d1f895c6fe 710
mbed_official 340:28d1f895c6fe 711 /**
mbed_official 340:28d1f895c6fe 712 * @brief Set the Analog Watchdog 1 channel.
mbed_official 340:28d1f895c6fe 713 * @param _CHANNEL_: channel to be monitored by Analog Watchdog 1.
mbed_official 340:28d1f895c6fe 714 * @retval None
mbed_official 340:28d1f895c6fe 715 */
mbed_official 630:825f75ca301e 716 #define ADC_CFGR_AWDCH(_CHANNEL_) \
mbed_official 630:825f75ca301e 717 ((_CHANNEL_) << 26)
mbed_official 340:28d1f895c6fe 718
mbed_official 340:28d1f895c6fe 719 /**
mbed_official 340:28d1f895c6fe 720 * @brief Enable ADC discontinuous conversion mode for regular group
mbed_official 441:d2c15dda23c1 721 * @param _REG_DISCONTINUOUS_MODE_: Regular discontinuous mode.
mbed_official 340:28d1f895c6fe 722 * @retval None
mbed_official 340:28d1f895c6fe 723 */
mbed_official 630:825f75ca301e 724 #define ADC_CFGR1_REG_DISCCONTINUOUS(_REG_DISCONTINUOUS_MODE_) \
mbed_official 630:825f75ca301e 725 ((_REG_DISCONTINUOUS_MODE_) << 16)
mbed_official 340:28d1f895c6fe 726
mbed_official 340:28d1f895c6fe 727 /**
mbed_official 340:28d1f895c6fe 728 * @brief Enable the ADC auto off mode.
mbed_official 340:28d1f895c6fe 729 * @param _AUTOOFF_: Auto off bit enable or disable.
mbed_official 340:28d1f895c6fe 730 * @retval None
mbed_official 340:28d1f895c6fe 731 */
mbed_official 630:825f75ca301e 732 #define ADC_CFGR1_AUTOOFF(_AUTOOFF_) \
mbed_official 630:825f75ca301e 733 ((_AUTOOFF_) << 15)
mbed_official 340:28d1f895c6fe 734
mbed_official 340:28d1f895c6fe 735 /**
mbed_official 340:28d1f895c6fe 736 * @brief Enable the ADC auto delay mode.
mbed_official 340:28d1f895c6fe 737 * @param _AUTOWAIT_: Auto delay bit enable or disable.
mbed_official 340:28d1f895c6fe 738 * @retval None
mbed_official 340:28d1f895c6fe 739 */
mbed_official 630:825f75ca301e 740 #define ADC_CFGR1_AUTOWAIT(_AUTOWAIT_) \
mbed_official 630:825f75ca301e 741 ((_AUTOWAIT_) << 14)
mbed_official 340:28d1f895c6fe 742
mbed_official 340:28d1f895c6fe 743 /**
mbed_official 340:28d1f895c6fe 744 * @brief Enable ADC continuous conversion mode.
mbed_official 340:28d1f895c6fe 745 * @param _CONTINUOUS_MODE_: Continuous mode.
mbed_official 340:28d1f895c6fe 746 * @retval None
mbed_official 340:28d1f895c6fe 747 */
mbed_official 630:825f75ca301e 748 #define ADC_CFGR1_CONTINUOUS(_CONTINUOUS_MODE_) \
mbed_official 630:825f75ca301e 749 ((_CONTINUOUS_MODE_) << 13)
mbed_official 340:28d1f895c6fe 750
mbed_official 340:28d1f895c6fe 751 /**
mbed_official 340:28d1f895c6fe 752 * @brief Enable ADC overrun mode.
mbed_official 340:28d1f895c6fe 753 * @param _OVERRUN_MODE_: Overrun mode.
mbed_official 340:28d1f895c6fe 754 * @retval Overun bit setting to be programmed into CFGR register
mbed_official 340:28d1f895c6fe 755 */
mbed_official 340:28d1f895c6fe 756 /* Note: Bit ADC_CFGR1_OVRMOD not used directly in constant */
mbed_official 630:825f75ca301e 757 /* "ADC_OVR_DATA_OVERWRITTEN" to have this case defined to 0x00, to set it */
mbed_official 630:825f75ca301e 758 /* as the default case to be compliant with other STM32 devices. */
mbed_official 630:825f75ca301e 759 #define ADC_CFGR1_OVERRUN(_OVERRUN_MODE_) \
mbed_official 630:825f75ca301e 760 ( ( (_OVERRUN_MODE_) != (ADC_OVR_DATA_PRESERVED) \
mbed_official 340:28d1f895c6fe 761 )? (ADC_CFGR1_OVRMOD) : (0x00000000) \
mbed_official 340:28d1f895c6fe 762 )
mbed_official 340:28d1f895c6fe 763
mbed_official 340:28d1f895c6fe 764 /**
mbed_official 340:28d1f895c6fe 765 * @brief Enable ADC scan mode to convert multiple ranks with sequencer.
mbed_official 340:28d1f895c6fe 766 * @param _SCAN_MODE_: Scan conversion mode.
mbed_official 340:28d1f895c6fe 767 * @retval None
mbed_official 340:28d1f895c6fe 768 */
mbed_official 630:825f75ca301e 769 /* Note: Scan mode set using this macro (instead of parameter direct set) */
mbed_official 630:825f75ca301e 770 /* due to different modes on other STM32 devices: to avoid any */
mbed_official 630:825f75ca301e 771 /* unwanted setting, the exact parameter corresponding to the device */
mbed_official 630:825f75ca301e 772 /* must be passed to this macro. */
mbed_official 630:825f75ca301e 773 #define ADC_SCANDIR(_SCAN_MODE_) \
mbed_official 340:28d1f895c6fe 774 ( ( (_SCAN_MODE_) == (ADC_SCAN_DIRECTION_BACKWARD) \
mbed_official 340:28d1f895c6fe 775 )? (ADC_CFGR1_SCANDIR) : (0x00000000) \
mbed_official 340:28d1f895c6fe 776 )
mbed_official 630:825f75ca301e 777
mbed_official 340:28d1f895c6fe 778 /**
mbed_official 340:28d1f895c6fe 779 * @brief Enable the ADC DMA continuous request.
mbed_official 340:28d1f895c6fe 780 * @param _DMACONTREQ_MODE_: DMA continuous request mode.
mbed_official 340:28d1f895c6fe 781 * @retval None
mbed_official 340:28d1f895c6fe 782 */
mbed_official 630:825f75ca301e 783 #define ADC_CFGR1_DMACONTREQ(_DMACONTREQ_MODE_) \
mbed_official 630:825f75ca301e 784 ((_DMACONTREQ_MODE_) << 1)
mbed_official 441:d2c15dda23c1 785
mbed_official 340:28d1f895c6fe 786 /**
mbed_official 340:28d1f895c6fe 787 * @brief Configure the analog watchdog high threshold into register TR.
mbed_official 340:28d1f895c6fe 788 * @param _Threshold_: Threshold value
mbed_official 340:28d1f895c6fe 789 * @retval None
mbed_official 340:28d1f895c6fe 790 */
mbed_official 630:825f75ca301e 791 #define ADC_TRX_HIGHTHRESHOLD(_Threshold_) \
mbed_official 630:825f75ca301e 792 ((_Threshold_) << 16)
mbed_official 630:825f75ca301e 793
mbed_official 340:28d1f895c6fe 794 /**
mbed_official 340:28d1f895c6fe 795 * @brief Shift the AWD threshold in function of the selected ADC resolution.
mbed_official 340:28d1f895c6fe 796 * Thresholds have to be left-aligned on bit 11, the LSB (right bits) are set to 0.
mbed_official 340:28d1f895c6fe 797 * If resolution 12 bits, no shift.
mbed_official 340:28d1f895c6fe 798 * If resolution 10 bits, shift of 2 ranks on the left.
mbed_official 340:28d1f895c6fe 799 * If resolution 8 bits, shift of 4 ranks on the left.
mbed_official 340:28d1f895c6fe 800 * If resolution 6 bits, shift of 6 ranks on the left.
mbed_official 340:28d1f895c6fe 801 * therefore, shift = (12 - resolution) = 12 - (12- (((RES[1:0]) >> 3)*2))
mbed_official 340:28d1f895c6fe 802 * @param __HANDLE__: ADC handle
mbed_official 340:28d1f895c6fe 803 * @param _Threshold_: Value to be shifted
mbed_official 340:28d1f895c6fe 804 * @retval None
mbed_official 340:28d1f895c6fe 805 */
mbed_official 630:825f75ca301e 806 #define ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(__HANDLE__, _Threshold_) \
mbed_official 630:825f75ca301e 807 ((_Threshold_) << ((((__HANDLE__)->Instance->CFGR1 & ADC_CFGR1_RES) >> 3)*2))
mbed_official 630:825f75ca301e 808
mbed_official 630:825f75ca301e 809
mbed_official 630:825f75ca301e 810 #define IS_ADC_CLOCKPRESCALER(ADC_CLOCK) (((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV1) || \
mbed_official 630:825f75ca301e 811 ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV2) || \
mbed_official 630:825f75ca301e 812 ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV4) )
mbed_official 630:825f75ca301e 813
mbed_official 630:825f75ca301e 814 #define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_RESOLUTION_12B) || \
mbed_official 630:825f75ca301e 815 ((RESOLUTION) == ADC_RESOLUTION_10B) || \
mbed_official 630:825f75ca301e 816 ((RESOLUTION) == ADC_RESOLUTION_8B) || \
mbed_official 630:825f75ca301e 817 ((RESOLUTION) == ADC_RESOLUTION_6B) )
mbed_official 630:825f75ca301e 818
mbed_official 630:825f75ca301e 819 #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DATAALIGN_RIGHT) || \
mbed_official 630:825f75ca301e 820 ((ALIGN) == ADC_DATAALIGN_LEFT) )
mbed_official 630:825f75ca301e 821
mbed_official 630:825f75ca301e 822 #define IS_ADC_SCAN_MODE(SCAN_MODE) (((SCAN_MODE) == ADC_SCAN_DIRECTION_FORWARD) || \
mbed_official 630:825f75ca301e 823 ((SCAN_MODE) == ADC_SCAN_DIRECTION_BACKWARD) )
mbed_official 630:825f75ca301e 824
mbed_official 630:825f75ca301e 825 #define IS_ADC_EXTTRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGCONVEDGE_NONE) || \
mbed_official 630:825f75ca301e 826 ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISING) || \
mbed_official 630:825f75ca301e 827 ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_FALLING) || \
mbed_official 630:825f75ca301e 828 ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING) )
mbed_official 630:825f75ca301e 829
mbed_official 630:825f75ca301e 830 #define IS_ADC_EOC_SELECTION(EOC_SELECTION) (((EOC_SELECTION) == ADC_EOC_SINGLE_CONV) || \
mbed_official 630:825f75ca301e 831 ((EOC_SELECTION) == ADC_EOC_SEQ_CONV) || \
mbed_official 630:825f75ca301e 832 ((EOC_SELECTION) == ADC_EOC_SINGLE_SEQ_CONV) )
mbed_official 630:825f75ca301e 833
mbed_official 630:825f75ca301e 834 #define IS_ADC_OVERRUN(OVR) (((OVR) == ADC_OVR_DATA_PRESERVED) || \
mbed_official 630:825f75ca301e 835 ((OVR) == ADC_OVR_DATA_OVERWRITTEN) )
mbed_official 630:825f75ca301e 836
mbed_official 630:825f75ca301e 837 #define IS_ADC_RANK(WATCHDOG) (((WATCHDOG) == ADC_RANK_CHANNEL_NUMBER) || \
mbed_official 630:825f75ca301e 838 ((WATCHDOG) == ADC_RANK_NONE) )
mbed_official 630:825f75ca301e 839
mbed_official 630:825f75ca301e 840 #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SAMPLETIME_1CYCLE_5) || \
mbed_official 630:825f75ca301e 841 ((TIME) == ADC_SAMPLETIME_7CYCLES_5) || \
mbed_official 630:825f75ca301e 842 ((TIME) == ADC_SAMPLETIME_13CYCLES_5) || \
mbed_official 630:825f75ca301e 843 ((TIME) == ADC_SAMPLETIME_28CYCLES_5) || \
mbed_official 630:825f75ca301e 844 ((TIME) == ADC_SAMPLETIME_41CYCLES_5) || \
mbed_official 630:825f75ca301e 845 ((TIME) == ADC_SAMPLETIME_55CYCLES_5) || \
mbed_official 630:825f75ca301e 846 ((TIME) == ADC_SAMPLETIME_71CYCLES_5) || \
mbed_official 630:825f75ca301e 847 ((TIME) == ADC_SAMPLETIME_239CYCLES_5) )
mbed_official 630:825f75ca301e 848
mbed_official 630:825f75ca301e 849 #define IS_ADC_ANALOG_WATCHDOG_MODE(WATCHDOG) (((WATCHDOG) == ADC_ANALOGWATCHDOG_NONE) || \
mbed_official 630:825f75ca301e 850 ((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_REG) || \
mbed_official 630:825f75ca301e 851 ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_REG) )
mbed_official 630:825f75ca301e 852
mbed_official 630:825f75ca301e 853 #define IS_ADC_EVENT_TYPE(EVENT) (((EVENT) == ADC_AWD_EVENT) || \
mbed_official 630:825f75ca301e 854 ((EVENT) == ADC_OVR_EVENT) )
mbed_official 630:825f75ca301e 855
mbed_official 630:825f75ca301e 856 /** @defgroup ADC_range_verification ADC range verification
mbed_official 630:825f75ca301e 857 * in function of ADC resolution selected (12, 10, 8 or 6 bits)
mbed_official 630:825f75ca301e 858 * @{
mbed_official 630:825f75ca301e 859 */
mbed_official 630:825f75ca301e 860 #define IS_ADC_RANGE(RESOLUTION, ADC_VALUE) \
mbed_official 630:825f75ca301e 861 ((((RESOLUTION) == ADC_RESOLUTION_12B) && ((ADC_VALUE) <= ((uint32_t)0x0FFF))) || \
mbed_official 630:825f75ca301e 862 (((RESOLUTION) == ADC_RESOLUTION_10B) && ((ADC_VALUE) <= ((uint32_t)0x03FF))) || \
mbed_official 630:825f75ca301e 863 (((RESOLUTION) == ADC_RESOLUTION_8B) && ((ADC_VALUE) <= ((uint32_t)0x00FF))) || \
mbed_official 630:825f75ca301e 864 (((RESOLUTION) == ADC_RESOLUTION_6B) && ((ADC_VALUE) <= ((uint32_t)0x003F))) )
mbed_official 630:825f75ca301e 865 /**
mbed_official 630:825f75ca301e 866 * @}
mbed_official 630:825f75ca301e 867 */
mbed_official 630:825f75ca301e 868
mbed_official 630:825f75ca301e 869 /** @defgroup ADC_regular_rank_verification ADC regular rank verification
mbed_official 630:825f75ca301e 870 * @{
mbed_official 630:825f75ca301e 871 */
mbed_official 630:825f75ca301e 872 #define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= ((uint32_t)1)) && ((RANK) <= ((uint32_t)16)))
mbed_official 630:825f75ca301e 873 /**
mbed_official 630:825f75ca301e 874 * @}
mbed_official 630:825f75ca301e 875 */
mbed_official 340:28d1f895c6fe 876
mbed_official 340:28d1f895c6fe 877 /**
mbed_official 340:28d1f895c6fe 878 * @}
mbed_official 340:28d1f895c6fe 879 */
mbed_official 340:28d1f895c6fe 880
mbed_official 340:28d1f895c6fe 881 /* Include ADC HAL Extension module */
mbed_official 340:28d1f895c6fe 882 #include "stm32f0xx_hal_adc_ex.h"
mbed_official 340:28d1f895c6fe 883
mbed_official 340:28d1f895c6fe 884 /* Exported functions --------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 885 /** @addtogroup ADC_Exported_Functions
mbed_official 340:28d1f895c6fe 886 * @{
mbed_official 340:28d1f895c6fe 887 */
mbed_official 340:28d1f895c6fe 888
mbed_official 340:28d1f895c6fe 889 /** @addtogroup ADC_Exported_Functions_Group1
mbed_official 340:28d1f895c6fe 890 * @{
mbed_official 340:28d1f895c6fe 891 */
mbed_official 340:28d1f895c6fe 892
mbed_official 340:28d1f895c6fe 893
mbed_official 340:28d1f895c6fe 894 /* Initialization and de-initialization functions **********************************/
mbed_official 340:28d1f895c6fe 895 HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc);
mbed_official 340:28d1f895c6fe 896 HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc);
mbed_official 340:28d1f895c6fe 897 void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc);
mbed_official 340:28d1f895c6fe 898 void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc);
mbed_official 340:28d1f895c6fe 899 /**
mbed_official 340:28d1f895c6fe 900 * @}
mbed_official 340:28d1f895c6fe 901 */
mbed_official 340:28d1f895c6fe 902
mbed_official 340:28d1f895c6fe 903 /* IO operation functions *****************************************************/
mbed_official 340:28d1f895c6fe 904
mbed_official 340:28d1f895c6fe 905 /** @addtogroup ADC_Exported_Functions_Group2
mbed_official 340:28d1f895c6fe 906 * @{
mbed_official 340:28d1f895c6fe 907 */
mbed_official 340:28d1f895c6fe 908
mbed_official 340:28d1f895c6fe 909
mbed_official 340:28d1f895c6fe 910 /* Blocking mode: Polling */
mbed_official 340:28d1f895c6fe 911 HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc);
mbed_official 340:28d1f895c6fe 912 HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc);
mbed_official 340:28d1f895c6fe 913 HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
mbed_official 340:28d1f895c6fe 914 HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout);
mbed_official 340:28d1f895c6fe 915
mbed_official 340:28d1f895c6fe 916 /* Non-blocking mode: Interruption */
mbed_official 340:28d1f895c6fe 917 HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc);
mbed_official 340:28d1f895c6fe 918 HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc);
mbed_official 340:28d1f895c6fe 919
mbed_official 340:28d1f895c6fe 920 /* Non-blocking mode: DMA */
mbed_official 340:28d1f895c6fe 921 HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
mbed_official 340:28d1f895c6fe 922 HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc);
mbed_official 340:28d1f895c6fe 923
mbed_official 340:28d1f895c6fe 924 /* ADC retrieve conversion value intended to be used with polling or interruption */
mbed_official 340:28d1f895c6fe 925 uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc);
mbed_official 340:28d1f895c6fe 926
mbed_official 340:28d1f895c6fe 927 /* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption and DMA) */
mbed_official 340:28d1f895c6fe 928 void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc);
mbed_official 340:28d1f895c6fe 929 void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc);
mbed_official 340:28d1f895c6fe 930 void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc);
mbed_official 340:28d1f895c6fe 931 void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc);
mbed_official 340:28d1f895c6fe 932 void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc);
mbed_official 340:28d1f895c6fe 933 /**
mbed_official 340:28d1f895c6fe 934 * @}
mbed_official 340:28d1f895c6fe 935 */
mbed_official 340:28d1f895c6fe 936
mbed_official 340:28d1f895c6fe 937
mbed_official 340:28d1f895c6fe 938 /* Peripheral Control functions ***********************************************/
mbed_official 340:28d1f895c6fe 939 /** @addtogroup ADC_Exported_Functions_Group3
mbed_official 340:28d1f895c6fe 940 * @{
mbed_official 340:28d1f895c6fe 941 */
mbed_official 340:28d1f895c6fe 942 HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig);
mbed_official 340:28d1f895c6fe 943 HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig);
mbed_official 340:28d1f895c6fe 944 /**
mbed_official 340:28d1f895c6fe 945 * @}
mbed_official 340:28d1f895c6fe 946 */
mbed_official 340:28d1f895c6fe 947
mbed_official 340:28d1f895c6fe 948
mbed_official 340:28d1f895c6fe 949 /* Peripheral State functions *************************************************/
mbed_official 340:28d1f895c6fe 950 /** @addtogroup ADC_Exported_Functions_Group4
mbed_official 340:28d1f895c6fe 951 * @{
mbed_official 340:28d1f895c6fe 952 */
mbed_official 630:825f75ca301e 953 uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc);
mbed_official 340:28d1f895c6fe 954 uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
mbed_official 340:28d1f895c6fe 955 /**
mbed_official 340:28d1f895c6fe 956 * @}
mbed_official 340:28d1f895c6fe 957 */
mbed_official 340:28d1f895c6fe 958
mbed_official 340:28d1f895c6fe 959
mbed_official 340:28d1f895c6fe 960 /**
mbed_official 340:28d1f895c6fe 961 * @}
mbed_official 340:28d1f895c6fe 962 */
mbed_official 340:28d1f895c6fe 963
mbed_official 340:28d1f895c6fe 964
mbed_official 340:28d1f895c6fe 965 /**
mbed_official 340:28d1f895c6fe 966 * @}
mbed_official 340:28d1f895c6fe 967 */
mbed_official 340:28d1f895c6fe 968
mbed_official 340:28d1f895c6fe 969 /**
mbed_official 340:28d1f895c6fe 970 * @}
mbed_official 340:28d1f895c6fe 971 */
mbed_official 340:28d1f895c6fe 972
mbed_official 340:28d1f895c6fe 973 #ifdef __cplusplus
mbed_official 340:28d1f895c6fe 974 }
mbed_official 340:28d1f895c6fe 975 #endif
mbed_official 340:28d1f895c6fe 976
mbed_official 340:28d1f895c6fe 977
mbed_official 340:28d1f895c6fe 978 #endif /* __STM32F0xx_HAL_ADC_H */
mbed_official 340:28d1f895c6fe 979
mbed_official 340:28d1f895c6fe 980 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
mbed_official 340:28d1f895c6fe 981