mbed official / mbed-src

mbed library sources

Dependents:   Encrypted my_mbed lklk CyaSSL_DTLS_Cellular ... more

Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

Import librarymbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2s_ex.c@632:7687fb9c4f91, 2015-09-28 (annotated)

Committer:
mbed_official
Date:
Mon Sep 28 14:00:11 2015 +0100
Revision:
632:7687fb9c4f91
Parent:
385:be64abf45658
Child:
634:ac7d6880524d
Synchronized with git revision f7ce4ed029cc611121464252ff28d5e8beb895b0



Full URL: https://github.com/mbedmicro/mbed/commit/f7ce4ed029cc611121464252ff28d5e8beb895b0/



NUCLEO_F303K8 - add support of the STM32F303K8

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 330:c80ac197fa6a 1 /**
mbed_official 330:c80ac197fa6a 2 ******************************************************************************
mbed_official 330:c80ac197fa6a 3 * @file stm32f3xx_hal_i2s_ex.c
mbed_official 330:c80ac197fa6a 4 * @author MCD Application Team
mbed_official 632:7687fb9c4f91 5 * @version V1.1.1
mbed_official 632:7687fb9c4f91 6 * @date 19-June-2015
mbed_official 330:c80ac197fa6a 7 * @brief I2S Extended HAL module driver.
mbed_official 330:c80ac197fa6a 8 * This file provides firmware functions to manage the following
mbed_official 330:c80ac197fa6a 9 * functionalities of I2S Extended peripheral:
mbed_official 330:c80ac197fa6a 10 * + Extended features Functions
mbed_official 330:c80ac197fa6a 11 *
mbed_official 330:c80ac197fa6a 12 @verbatim
mbed_official 330:c80ac197fa6a 13 ==============================================================================
mbed_official 330:c80ac197fa6a 14 ##### I2S Extended features #####
mbed_official 330:c80ac197fa6a 15 ==============================================================================
mbed_official 330:c80ac197fa6a 16 [..]
mbed_official 330:c80ac197fa6a 17 (#) In I2S full duplex mode, each SPI peripheral is able to manage sending and receiving
mbed_official 330:c80ac197fa6a 18 data simultaneously using two data lines. Each SPI peripheral has an extended block
mbed_official 330:c80ac197fa6a 19 called I2Sxext ie. I2S2ext for SPI2 and I2S3ext for SPI3).
mbed_official 330:c80ac197fa6a 20 (#) The Extended block is not a full SPI IP, it is used only as I2S slave to
mbed_official 330:c80ac197fa6a 21 implement full duplex mode. The Extended block uses the same clock sources
mbed_official 330:c80ac197fa6a 22 as its master (refer to the following Figure).
mbed_official 330:c80ac197fa6a 23
mbed_official 330:c80ac197fa6a 24 +-----------------------+
mbed_official 330:c80ac197fa6a 25 I2Sx_SCK | |
mbed_official 330:c80ac197fa6a 26 ----------+-->| I2Sx |------------------->I2Sx_SD(in/out)
mbed_official 330:c80ac197fa6a 27 +--|-->| |
mbed_official 330:c80ac197fa6a 28 | | +-----------------------+
mbed_official 330:c80ac197fa6a 29 | |
mbed_official 330:c80ac197fa6a 30 I2S_WS | |
mbed_official 330:c80ac197fa6a 31 ------>| |
mbed_official 330:c80ac197fa6a 32 | | +-----------------------+
mbed_official 330:c80ac197fa6a 33 | +-->| |
mbed_official 330:c80ac197fa6a 34 | | I2Sx_ext |------------------->I2Sx_extSD(in/out)
mbed_official 330:c80ac197fa6a 35 +----->| |
mbed_official 330:c80ac197fa6a 36 +-----------------------+
mbed_official 330:c80ac197fa6a 37
mbed_official 330:c80ac197fa6a 38 (#) Both I2Sx and I2Sx_ext can be configured as transmitters or receivers.
mbed_official 330:c80ac197fa6a 39
mbed_official 330:c80ac197fa6a 40 -@- Only I2Sx can deliver SCK and WS to I2Sx_ext in full duplex mode, where
mbed_official 330:c80ac197fa6a 41 I2Sx can be I2S2 or I2S3.
mbed_official 330:c80ac197fa6a 42
mbed_official 330:c80ac197fa6a 43 ===============================================================================
mbed_official 330:c80ac197fa6a 44 ##### How to use this driver #####
mbed_official 330:c80ac197fa6a 45 ===============================================================================
mbed_official 330:c80ac197fa6a 46 [..]
mbed_official 330:c80ac197fa6a 47 Three mode of operations are available within this driver :
mbed_official 330:c80ac197fa6a 48
mbed_official 330:c80ac197fa6a 49 *** Polling mode IO operation ***
mbed_official 330:c80ac197fa6a 50 =================================
mbed_official 330:c80ac197fa6a 51 [..]
mbed_official 330:c80ac197fa6a 52 (+) Send and receive in the same time an amount of data in blocking mode using HAL_I2S_TransmitReceive()
mbed_official 330:c80ac197fa6a 53
mbed_official 330:c80ac197fa6a 54 *** Interrupt mode IO operation ***
mbed_official 330:c80ac197fa6a 55 ===================================
mbed_official 330:c80ac197fa6a 56 [..]
mbed_official 330:c80ac197fa6a 57 (+) Send and receive in the same time an amount of data in non blocking mode using HAL_I2S_TransmitReceive_IT()
mbed_official 330:c80ac197fa6a 58 (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
mbed_official 330:c80ac197fa6a 59 add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
mbed_official 330:c80ac197fa6a 60 (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
mbed_official 330:c80ac197fa6a 61 add his own code by customization of function pointer HAL_I2S_TxCpltCallback
mbed_official 330:c80ac197fa6a 62 (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
mbed_official 330:c80ac197fa6a 63 add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
mbed_official 330:c80ac197fa6a 64 (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
mbed_official 330:c80ac197fa6a 65 add his own code by customization of function pointer HAL_I2S_RxCpltCallback
mbed_official 330:c80ac197fa6a 66 (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
mbed_official 330:c80ac197fa6a 67 add his own code by customization of function pointer HAL_I2S_ErrorCallback
mbed_official 330:c80ac197fa6a 68
mbed_official 330:c80ac197fa6a 69 *** DMA mode IO operation ***
mbed_official 330:c80ac197fa6a 70 ==============================
mbed_official 330:c80ac197fa6a 71 [..]
mbed_official 330:c80ac197fa6a 72 (+) Send and receive an amount of data in non blocking mode (DMA) using HAL_I2S_TransmitReceive_DMA()
mbed_official 330:c80ac197fa6a 73 (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
mbed_official 330:c80ac197fa6a 74 add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
mbed_official 330:c80ac197fa6a 75 (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
mbed_official 330:c80ac197fa6a 76 add his own code by customization of function pointer HAL_I2S_TxCpltCallback
mbed_official 330:c80ac197fa6a 77 (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
mbed_official 330:c80ac197fa6a 78 add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
mbed_official 330:c80ac197fa6a 79 (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
mbed_official 330:c80ac197fa6a 80 add his own code by customization of function pointer HAL_I2S_RxCpltCallback
mbed_official 330:c80ac197fa6a 81 (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
mbed_official 330:c80ac197fa6a 82 add his own code by customization of function pointer HAL_I2S_ErrorCallback
mbed_official 330:c80ac197fa6a 83 (+) Pause the DMA Transfer using HAL_I2S_DMAPause()
mbed_official 330:c80ac197fa6a 84 (+) Resume the DMA Transfer using HAL_I2S_DMAResume()
mbed_official 330:c80ac197fa6a 85 (+) Stop the DMA Transfer using HAL_I2S_DMAStop()
mbed_official 330:c80ac197fa6a 86
mbed_official 330:c80ac197fa6a 87 @endverbatim
mbed_official 330:c80ac197fa6a 88 ******************************************************************************
mbed_official 330:c80ac197fa6a 89 * @attention
mbed_official 330:c80ac197fa6a 90 *
mbed_official 632:7687fb9c4f91 91 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 330:c80ac197fa6a 92 *
mbed_official 330:c80ac197fa6a 93 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 330:c80ac197fa6a 94 * are permitted provided that the following conditions are met:
mbed_official 330:c80ac197fa6a 95 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 330:c80ac197fa6a 96 * this list of conditions and the following disclaimer.
mbed_official 330:c80ac197fa6a 97 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 330:c80ac197fa6a 98 * this list of conditions and the following disclaimer in the documentation
mbed_official 330:c80ac197fa6a 99 * and/or other materials provided with the distribution.
mbed_official 330:c80ac197fa6a 100 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 330:c80ac197fa6a 101 * may be used to endorse or promote products derived from this software
mbed_official 330:c80ac197fa6a 102 * without specific prior written permission.
mbed_official 330:c80ac197fa6a 103 *
mbed_official 330:c80ac197fa6a 104 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 330:c80ac197fa6a 105 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 330:c80ac197fa6a 106 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 330:c80ac197fa6a 107 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 330:c80ac197fa6a 108 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 330:c80ac197fa6a 109 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 330:c80ac197fa6a 110 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 330:c80ac197fa6a 111 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 330:c80ac197fa6a 112 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 330:c80ac197fa6a 113 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 330:c80ac197fa6a 114 *
mbed_official 330:c80ac197fa6a 115 ******************************************************************************
mbed_official 330:c80ac197fa6a 116 */
mbed_official 330:c80ac197fa6a 117
mbed_official 330:c80ac197fa6a 118 /* Includes ------------------------------------------------------------------*/
mbed_official 330:c80ac197fa6a 119 #include "stm32f3xx_hal.h"
mbed_official 330:c80ac197fa6a 120
mbed_official 330:c80ac197fa6a 121 /** @addtogroup STM32F3xx_HAL_Driver
mbed_official 330:c80ac197fa6a 122 * @{
mbed_official 330:c80ac197fa6a 123 */
mbed_official 330:c80ac197fa6a 124
mbed_official 330:c80ac197fa6a 125 #ifdef HAL_I2S_MODULE_ENABLED
mbed_official 330:c80ac197fa6a 126
mbed_official 330:c80ac197fa6a 127 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
mbed_official 330:c80ac197fa6a 128 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
mbed_official 330:c80ac197fa6a 129 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \
mbed_official 330:c80ac197fa6a 130 defined(STM32F373xC) || defined(STM32F378xx)
mbed_official 330:c80ac197fa6a 131
mbed_official 330:c80ac197fa6a 132 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
mbed_official 330:c80ac197fa6a 133 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)
mbed_official 330:c80ac197fa6a 134
mbed_official 330:c80ac197fa6a 135 /** @defgroup I2SEx I2S Extended HAL module driver
mbed_official 330:c80ac197fa6a 136 * @brief I2S Extended HAL module driver
mbed_official 330:c80ac197fa6a 137 * @{
mbed_official 330:c80ac197fa6a 138 */
mbed_official 330:c80ac197fa6a 139
mbed_official 330:c80ac197fa6a 140 /* Private typedef -----------------------------------------------------------*/
mbed_official 330:c80ac197fa6a 141 /** @defgroup I2SEx_Private_Typedef I2S Extended Private Typedef
mbed_official 330:c80ac197fa6a 142 * @{
mbed_official 330:c80ac197fa6a 143 */
mbed_official 330:c80ac197fa6a 144 typedef enum
mbed_official 330:c80ac197fa6a 145 {
mbed_official 330:c80ac197fa6a 146 I2S_USE_I2S = 0x00, /*!< I2Sx should be used */
mbed_official 330:c80ac197fa6a 147 I2S_USE_I2SEXT = 0x01 /*!< I2Sx_ext should be used */
mbed_official 330:c80ac197fa6a 148 }I2S_UseTypeDef;
mbed_official 330:c80ac197fa6a 149 /**
mbed_official 330:c80ac197fa6a 150 * @}
mbed_official 330:c80ac197fa6a 151 */
mbed_official 330:c80ac197fa6a 152
mbed_official 330:c80ac197fa6a 153 /* Private define ------------------------------------------------------------*/
mbed_official 330:c80ac197fa6a 154 /* Private macro -------------------------------------------------------------*/
mbed_official 330:c80ac197fa6a 155 /* Private variables ---------------------------------------------------------*/
mbed_official 330:c80ac197fa6a 156 /* Private function prototypes -----------------------------------------------*/
mbed_official 330:c80ac197fa6a 157 /** @defgroup I2SEx_Private_Functions I2S Extended Private Functions
mbed_official 330:c80ac197fa6a 158 * @{
mbed_official 330:c80ac197fa6a 159 */
mbed_official 330:c80ac197fa6a 160 static void I2S_TxRxDMACplt(DMA_HandleTypeDef *hdma);
mbed_official 330:c80ac197fa6a 161 static void I2S_TxRxDMAError(DMA_HandleTypeDef *hdma);
mbed_official 330:c80ac197fa6a 162 static void I2S_FullDuplexTx_IT(I2S_HandleTypeDef *hi2s, I2S_UseTypeDef i2sUsed);
mbed_official 330:c80ac197fa6a 163 static void I2S_FullDuplexRx_IT(I2S_HandleTypeDef *hi2s, I2S_UseTypeDef i2sUsed);
mbed_official 330:c80ac197fa6a 164 static HAL_StatusTypeDef I2S_FullDuplexWaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag,
mbed_official 330:c80ac197fa6a 165 uint32_t State, uint32_t Timeout, I2S_UseTypeDef i2sUsed);
mbed_official 330:c80ac197fa6a 166 /**
mbed_official 330:c80ac197fa6a 167 * @}
mbed_official 330:c80ac197fa6a 168 */
mbed_official 330:c80ac197fa6a 169
mbed_official 330:c80ac197fa6a 170 /**
mbed_official 330:c80ac197fa6a 171 * @}
mbed_official 330:c80ac197fa6a 172 */
mbed_official 330:c80ac197fa6a 173 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
mbed_official 330:c80ac197fa6a 174 /* STM32F302xC || STM32F303xC || STM32F358xx */
mbed_official 330:c80ac197fa6a 175
mbed_official 330:c80ac197fa6a 176 /* Exported functions ---------------------------------------------------------*/
mbed_official 330:c80ac197fa6a 177
mbed_official 330:c80ac197fa6a 178 /** @addtogroup I2S I2S HAL module driver
mbed_official 330:c80ac197fa6a 179 * @{
mbed_official 330:c80ac197fa6a 180 */
mbed_official 330:c80ac197fa6a 181
mbed_official 330:c80ac197fa6a 182 /** @addtogroup I2S_Exported_Functions I2S Exported Functions
mbed_official 330:c80ac197fa6a 183 * @{
mbed_official 330:c80ac197fa6a 184 */
mbed_official 330:c80ac197fa6a 185
mbed_official 330:c80ac197fa6a 186 /** @addtogroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions
mbed_official 330:c80ac197fa6a 187 * @brief Initialization and Configuration functions
mbed_official 330:c80ac197fa6a 188 *
mbed_official 330:c80ac197fa6a 189 @verbatim
mbed_official 330:c80ac197fa6a 190 ===============================================================================
mbed_official 330:c80ac197fa6a 191 ##### Initialization/de-initialization functions #####
mbed_official 330:c80ac197fa6a 192 ===============================================================================
mbed_official 330:c80ac197fa6a 193 [..] This subsection provides a set of functions allowing to initialize and
mbed_official 330:c80ac197fa6a 194 de-initialiaze the I2Sx peripheral in simplex mode:
mbed_official 330:c80ac197fa6a 195
mbed_official 330:c80ac197fa6a 196 (+) User must Implement HAL_I2S_MspInit() function in which he configures
mbed_official 330:c80ac197fa6a 197 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
mbed_official 330:c80ac197fa6a 198
mbed_official 330:c80ac197fa6a 199 (+) Call the function HAL_I2S_Init() to configure the selected device with
mbed_official 330:c80ac197fa6a 200 the selected configuration:
mbed_official 330:c80ac197fa6a 201 (++) Mode
mbed_official 330:c80ac197fa6a 202 (++) Standard
mbed_official 330:c80ac197fa6a 203 (++) Data Format
mbed_official 330:c80ac197fa6a 204 (++) MCLK Output
mbed_official 330:c80ac197fa6a 205 (++) Audio frequency
mbed_official 330:c80ac197fa6a 206 (++) Polarity
mbed_official 330:c80ac197fa6a 207
mbed_official 330:c80ac197fa6a 208 (+) Call the function HAL_I2S_DeInit() to restore the default configuration
mbed_official 330:c80ac197fa6a 209 of the selected I2Sx periperal.
mbed_official 330:c80ac197fa6a 210 @endverbatim
mbed_official 330:c80ac197fa6a 211 * @{
mbed_official 330:c80ac197fa6a 212 */
mbed_official 330:c80ac197fa6a 213
mbed_official 330:c80ac197fa6a 214 /**
mbed_official 330:c80ac197fa6a 215 * @brief Initializes the I2S according to the specified parameters
mbed_official 330:c80ac197fa6a 216 * in the I2S_InitTypeDef and create the associated handle.
mbed_official 330:c80ac197fa6a 217 * @param hi2s: I2S handle
mbed_official 330:c80ac197fa6a 218 * @retval HAL status
mbed_official 330:c80ac197fa6a 219 */
mbed_official 330:c80ac197fa6a 220 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
mbed_official 330:c80ac197fa6a 221 {
mbed_official 330:c80ac197fa6a 222 uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
mbed_official 330:c80ac197fa6a 223 uint32_t tmp = 0, i2sclk = 0;
mbed_official 330:c80ac197fa6a 224 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
mbed_official 330:c80ac197fa6a 225 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)
mbed_official 330:c80ac197fa6a 226 RCC_PeriphCLKInitTypeDef rccperiphclkinit;
mbed_official 330:c80ac197fa6a 227 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
mbed_official 330:c80ac197fa6a 228 /* STM32F302xC || STM32F303xC || STM32F358xx */
mbed_official 330:c80ac197fa6a 229
mbed_official 330:c80ac197fa6a 230 /* Check the I2S handle allocation */
mbed_official 632:7687fb9c4f91 231 if(hi2s == NULL)
mbed_official 330:c80ac197fa6a 232 {
mbed_official 330:c80ac197fa6a 233 return HAL_ERROR;
mbed_official 330:c80ac197fa6a 234 }
mbed_official 330:c80ac197fa6a 235
mbed_official 330:c80ac197fa6a 236 /* Check the parameters */
mbed_official 330:c80ac197fa6a 237 assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
mbed_official 330:c80ac197fa6a 238 assert_param(IS_I2S_MODE(hi2s->Init.Mode));
mbed_official 330:c80ac197fa6a 239 assert_param(IS_I2S_STANDARD(hi2s->Init.Standard));
mbed_official 330:c80ac197fa6a 240 assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat));
mbed_official 330:c80ac197fa6a 241 assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput));
mbed_official 330:c80ac197fa6a 242 assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq));
mbed_official 330:c80ac197fa6a 243 assert_param(IS_I2S_CPOL(hi2s->Init.CPOL));
mbed_official 330:c80ac197fa6a 244 assert_param(IS_I2S_CLOCKSOURCE(hi2s->Init.ClockSource));
mbed_official 330:c80ac197fa6a 245 assert_param(IS_I2S_FULLDUPLEX_MODE(hi2s->Init.FullDuplexMode));
mbed_official 330:c80ac197fa6a 246
mbed_official 330:c80ac197fa6a 247 hi2s->State = HAL_I2S_STATE_BUSY;
mbed_official 330:c80ac197fa6a 248
mbed_official 330:c80ac197fa6a 249 /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
mbed_official 330:c80ac197fa6a 250 HAL_I2S_MspInit(hi2s);
mbed_official 330:c80ac197fa6a 251
mbed_official 330:c80ac197fa6a 252 /*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/
mbed_official 330:c80ac197fa6a 253 /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
mbed_official 330:c80ac197fa6a 254 hi2s->Instance->I2SCFGR &= ~(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CKPOL | \
mbed_official 330:c80ac197fa6a 255 SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG | \
mbed_official 330:c80ac197fa6a 256 SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD);
mbed_official 330:c80ac197fa6a 257 hi2s->Instance->I2SPR = 0x0002;
mbed_official 330:c80ac197fa6a 258
mbed_official 330:c80ac197fa6a 259 /* Get the I2SCFGR register value */
mbed_official 330:c80ac197fa6a 260 tmpreg = hi2s->Instance->I2SCFGR;
mbed_official 330:c80ac197fa6a 261
mbed_official 330:c80ac197fa6a 262 /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
mbed_official 330:c80ac197fa6a 263 if(hi2s->Init.AudioFreq == I2S_AUDIOFREQ_DEFAULT)
mbed_official 330:c80ac197fa6a 264 {
mbed_official 330:c80ac197fa6a 265 i2sodd = (uint16_t)0;
mbed_official 330:c80ac197fa6a 266 i2sdiv = (uint16_t)2;
mbed_official 330:c80ac197fa6a 267 }
mbed_official 330:c80ac197fa6a 268 /* If the requested audio frequency is not the default, compute the prescaler */
mbed_official 330:c80ac197fa6a 269 else
mbed_official 330:c80ac197fa6a 270 {
mbed_official 330:c80ac197fa6a 271 /* Check the frame length (For the Prescaler computing) *******************/
mbed_official 330:c80ac197fa6a 272 if(hi2s->Init.DataFormat == I2S_DATAFORMAT_16B)
mbed_official 330:c80ac197fa6a 273 {
mbed_official 330:c80ac197fa6a 274 /* Packet length is 16 bits */
mbed_official 330:c80ac197fa6a 275 packetlength = 1;
mbed_official 330:c80ac197fa6a 276 }
mbed_official 330:c80ac197fa6a 277 else
mbed_official 330:c80ac197fa6a 278 {
mbed_official 330:c80ac197fa6a 279 /* Packet length is 32 bits */
mbed_official 330:c80ac197fa6a 280 packetlength = 2;
mbed_official 330:c80ac197fa6a 281 }
mbed_official 330:c80ac197fa6a 282
mbed_official 330:c80ac197fa6a 283 /* Get I2S source Clock frequency ****************************************/
mbed_official 330:c80ac197fa6a 284 #if defined (STM32F302xE) || defined (STM32F303xE) || defined (STM32F398xx) || \
mbed_official 330:c80ac197fa6a 285 defined (STM32F302xC) || defined (STM32F303xC) || defined (STM32F358xx)
mbed_official 330:c80ac197fa6a 286 rccperiphclkinit.PeriphClockSelection = RCC_PERIPHCLK_I2S;
mbed_official 330:c80ac197fa6a 287
mbed_official 330:c80ac197fa6a 288 /* If an external I2S clock has to be used, the specific define should be set
mbed_official 330:c80ac197fa6a 289 in the project configuration or in the stm32f3xx_conf.h file */
mbed_official 330:c80ac197fa6a 290 if(hi2s->Init.ClockSource == I2S_CLOCK_EXTERNAL)
mbed_official 330:c80ac197fa6a 291 {
mbed_official 330:c80ac197fa6a 292 /* Set external clock as I2S clock source */
mbed_official 330:c80ac197fa6a 293 rccperiphclkinit.I2sClockSelection = RCC_I2SCLKSOURCE_EXT;
mbed_official 330:c80ac197fa6a 294 HAL_RCCEx_PeriphCLKConfig(&rccperiphclkinit);
mbed_official 330:c80ac197fa6a 295
mbed_official 330:c80ac197fa6a 296 /* Set the I2S clock to the external clock value */
mbed_official 330:c80ac197fa6a 297 i2sclk = EXTERNAL_CLOCK_VALUE;
mbed_official 330:c80ac197fa6a 298 }
mbed_official 330:c80ac197fa6a 299 else
mbed_official 330:c80ac197fa6a 300 {
mbed_official 330:c80ac197fa6a 301 /* Set SYSCLK as I2S clock source */
mbed_official 330:c80ac197fa6a 302 rccperiphclkinit.I2sClockSelection = RCC_I2SCLKSOURCE_SYSCLK;
mbed_official 330:c80ac197fa6a 303 HAL_RCCEx_PeriphCLKConfig(&rccperiphclkinit);
mbed_official 330:c80ac197fa6a 304
mbed_official 330:c80ac197fa6a 305 /* Get the I2S source clock value */
mbed_official 330:c80ac197fa6a 306 i2sclk = HAL_RCC_GetSysClockFreq();
mbed_official 330:c80ac197fa6a 307 }
mbed_official 330:c80ac197fa6a 308 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
mbed_official 330:c80ac197fa6a 309 /* STM32F302xC || STM32F303xC || STM32F358xx */
mbed_official 330:c80ac197fa6a 310
mbed_official 330:c80ac197fa6a 311 #if defined (STM32F373xC) || defined (STM32F378xx)
mbed_official 330:c80ac197fa6a 312 if(hi2s->Instance == SPI1)
mbed_official 330:c80ac197fa6a 313 {
mbed_official 330:c80ac197fa6a 314 i2sclk = HAL_RCC_GetPCLK2Freq();
mbed_official 330:c80ac197fa6a 315 }
mbed_official 330:c80ac197fa6a 316 else if((hi2s->Instance == SPI2) || (hi2s->Instance == SPI3))
mbed_official 330:c80ac197fa6a 317 {
mbed_official 330:c80ac197fa6a 318 i2sclk = HAL_RCC_GetPCLK1Freq();
mbed_official 330:c80ac197fa6a 319 }
mbed_official 330:c80ac197fa6a 320 #endif /* STM32F373xC || STM32F378xx */
mbed_official 330:c80ac197fa6a 321
mbed_official 330:c80ac197fa6a 322 /* Compute the Real divider depending on the MCLK output state, with a floating point */
mbed_official 330:c80ac197fa6a 323 if(hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE)
mbed_official 330:c80ac197fa6a 324 {
mbed_official 330:c80ac197fa6a 325 /* MCLK output is enabled */
mbed_official 330:c80ac197fa6a 326 tmp = (uint16_t)(((((i2sclk / 256) * 10) / hi2s->Init.AudioFreq)) + 5);
mbed_official 330:c80ac197fa6a 327 }
mbed_official 330:c80ac197fa6a 328 else
mbed_official 330:c80ac197fa6a 329 {
mbed_official 330:c80ac197fa6a 330 /* MCLK output is disabled */
mbed_official 330:c80ac197fa6a 331 tmp = (uint16_t)(((((i2sclk / (32 * packetlength)) *10 ) / hi2s->Init.AudioFreq)) + 5);
mbed_official 330:c80ac197fa6a 332 }
mbed_official 330:c80ac197fa6a 333
mbed_official 330:c80ac197fa6a 334 /* Remove the flatting point */
mbed_official 330:c80ac197fa6a 335 tmp = tmp / 10;
mbed_official 330:c80ac197fa6a 336
mbed_official 330:c80ac197fa6a 337 /* Check the parity of the divider */
mbed_official 330:c80ac197fa6a 338 i2sodd = (uint16_t)(tmp & (uint16_t)0x0001);
mbed_official 330:c80ac197fa6a 339
mbed_official 330:c80ac197fa6a 340 /* Compute the i2sdiv prescaler */
mbed_official 330:c80ac197fa6a 341 i2sdiv = (uint16_t)((tmp - i2sodd) / 2);
mbed_official 330:c80ac197fa6a 342
mbed_official 330:c80ac197fa6a 343 /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
mbed_official 330:c80ac197fa6a 344 i2sodd = (uint16_t) (i2sodd << 8);
mbed_official 330:c80ac197fa6a 345 }
mbed_official 330:c80ac197fa6a 346
mbed_official 330:c80ac197fa6a 347 /* Test if the divider is 1 or 0 or greater than 0xFF */
mbed_official 330:c80ac197fa6a 348 if((i2sdiv < 2) || (i2sdiv > 0xFF))
mbed_official 330:c80ac197fa6a 349 {
mbed_official 330:c80ac197fa6a 350 /* Set the default values */
mbed_official 330:c80ac197fa6a 351 i2sdiv = 2;
mbed_official 330:c80ac197fa6a 352 i2sodd = 0;
mbed_official 330:c80ac197fa6a 353 }
mbed_official 330:c80ac197fa6a 354
mbed_official 330:c80ac197fa6a 355 /* Write to SPIx I2SPR register the computed value */
mbed_official 330:c80ac197fa6a 356 hi2s->Instance->I2SPR = (uint16_t)((uint16_t)i2sdiv | (uint16_t)(i2sodd | (uint16_t)hi2s->Init.MCLKOutput));
mbed_official 330:c80ac197fa6a 357
mbed_official 330:c80ac197fa6a 358 /* Configure the I2S with the I2S_InitStruct values */
mbed_official 330:c80ac197fa6a 359 tmpreg |= (uint16_t)((uint16_t)SPI_I2SCFGR_I2SMOD | (uint16_t)(hi2s->Init.Mode | \
mbed_official 330:c80ac197fa6a 360 (uint16_t)(hi2s->Init.Standard | (uint16_t)(hi2s->Init.DataFormat | \
mbed_official 330:c80ac197fa6a 361 (uint16_t)hi2s->Init.CPOL))));
mbed_official 330:c80ac197fa6a 362
mbed_official 330:c80ac197fa6a 363 /* Write to SPIx I2SCFGR */
mbed_official 330:c80ac197fa6a 364 hi2s->Instance->I2SCFGR = tmpreg;
mbed_official 330:c80ac197fa6a 365
mbed_official 330:c80ac197fa6a 366 #if defined (STM32F302xE) || defined (STM32F303xE) || defined (STM32F398xx) || \
mbed_official 330:c80ac197fa6a 367 defined (STM32F302xC) || defined (STM32F303xC) || defined (STM32F358xx)
mbed_official 330:c80ac197fa6a 368 if (hi2s->Init.FullDuplexMode == I2S_FULLDUPLEXMODE_ENABLE)
mbed_official 330:c80ac197fa6a 369 {
mbed_official 330:c80ac197fa6a 370 /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
mbed_official 330:c80ac197fa6a 371 I2SxEXT(hi2s->Instance)->I2SCFGR &= ~(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CKPOL | \
mbed_official 330:c80ac197fa6a 372 SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG | \
mbed_official 330:c80ac197fa6a 373 SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD);
mbed_official 330:c80ac197fa6a 374 I2SxEXT(hi2s->Instance)->I2SPR = 0x0002;
mbed_official 330:c80ac197fa6a 375
mbed_official 330:c80ac197fa6a 376 /* Get the I2SCFGR register value */
mbed_official 330:c80ac197fa6a 377 tmpreg = I2SxEXT(hi2s->Instance)->I2SCFGR;
mbed_official 330:c80ac197fa6a 378
mbed_official 330:c80ac197fa6a 379 /* Get the mode to be configured for the extended I2S */
mbed_official 330:c80ac197fa6a 380 if((hi2s->Init.Mode == I2S_MODE_MASTER_TX) || (hi2s->Init.Mode == I2S_MODE_SLAVE_TX))
mbed_official 330:c80ac197fa6a 381 {
mbed_official 330:c80ac197fa6a 382 tmp = I2S_MODE_SLAVE_RX;
mbed_official 330:c80ac197fa6a 383 }
mbed_official 330:c80ac197fa6a 384 else
mbed_official 330:c80ac197fa6a 385 {
mbed_official 330:c80ac197fa6a 386 if((hi2s->Init.Mode == I2S_MODE_MASTER_RX) || (hi2s->Init.Mode == I2S_MODE_SLAVE_RX))
mbed_official 330:c80ac197fa6a 387 {
mbed_official 330:c80ac197fa6a 388 tmp = I2S_MODE_SLAVE_TX;
mbed_official 330:c80ac197fa6a 389 }
mbed_official 330:c80ac197fa6a 390 }
mbed_official 330:c80ac197fa6a 391
mbed_official 330:c80ac197fa6a 392 /* Configure the I2S Slave with the I2S Master parameter values */
mbed_official 330:c80ac197fa6a 393 tmpreg |= (uint16_t)((uint16_t)SPI_I2SCFGR_I2SMOD | (uint16_t)(tmp | \
mbed_official 330:c80ac197fa6a 394 (uint16_t)(hi2s->Init.Standard | (uint16_t)(hi2s->Init.DataFormat | \
mbed_official 330:c80ac197fa6a 395 (uint16_t)hi2s->Init.CPOL))));
mbed_official 330:c80ac197fa6a 396
mbed_official 330:c80ac197fa6a 397 /* Write to SPIx I2SCFGR */
mbed_official 330:c80ac197fa6a 398 I2SxEXT(hi2s->Instance)->I2SCFGR = tmpreg;
mbed_official 330:c80ac197fa6a 399 }
mbed_official 330:c80ac197fa6a 400 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
mbed_official 330:c80ac197fa6a 401 /* STM32F302xC || STM32F303xC || STM32F358xx */
mbed_official 330:c80ac197fa6a 402
mbed_official 330:c80ac197fa6a 403 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official 330:c80ac197fa6a 404 hi2s->State= HAL_I2S_STATE_READY;
mbed_official 330:c80ac197fa6a 405
mbed_official 330:c80ac197fa6a 406 return HAL_OK;
mbed_official 330:c80ac197fa6a 407 }
mbed_official 330:c80ac197fa6a 408 /**
mbed_official 330:c80ac197fa6a 409 * @}
mbed_official 330:c80ac197fa6a 410 */
mbed_official 330:c80ac197fa6a 411
mbed_official 330:c80ac197fa6a 412 #if defined (STM32F302xE) || defined (STM32F303xE) || defined (STM32F398xx) || \
mbed_official 330:c80ac197fa6a 413 defined (STM32F302xC) || defined (STM32F303xC) || defined (STM32F358xx)
mbed_official 330:c80ac197fa6a 414 /** @addtogroup I2S_Exported_Functions_Group2 Input and Output operation functions
mbed_official 330:c80ac197fa6a 415 * @{
mbed_official 330:c80ac197fa6a 416 */
mbed_official 330:c80ac197fa6a 417
mbed_official 330:c80ac197fa6a 418 /**
mbed_official 330:c80ac197fa6a 419 * @brief This function handles I2S/I2Sext interrupt requests in full-duplex mode.
mbed_official 330:c80ac197fa6a 420 * @param hi2s: I2S handle
mbed_official 330:c80ac197fa6a 421 * @retval HAL status
mbed_official 330:c80ac197fa6a 422 */
mbed_official 330:c80ac197fa6a 423 void HAL_I2S_FullDuplex_IRQHandler(I2S_HandleTypeDef *hi2s)
mbed_official 330:c80ac197fa6a 424 {
mbed_official 330:c80ac197fa6a 425 __IO uint32_t i2ssr = hi2s->Instance->SR ;
mbed_official 330:c80ac197fa6a 426 __IO uint32_t i2sextsr = I2SxEXT(hi2s->Instance)->SR;
mbed_official 330:c80ac197fa6a 427
mbed_official 330:c80ac197fa6a 428 /* Check if the I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX Mode is selected */
mbed_official 330:c80ac197fa6a 429 if(((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_TX) || ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX))
mbed_official 330:c80ac197fa6a 430 {
mbed_official 330:c80ac197fa6a 431 /* I2S in mode Transmitter -------------------------------------------------*/
mbed_official 330:c80ac197fa6a 432 if(((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET))
mbed_official 330:c80ac197fa6a 433 {
mbed_official 330:c80ac197fa6a 434 /* When the I2S mode is configured as I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX,
mbed_official 330:c80ac197fa6a 435 the I2S TXE interrupt will be generated to manage the full-duplex transmit phase. */
mbed_official 330:c80ac197fa6a 436 I2S_FullDuplexTx_IT(hi2s, I2S_USE_I2S);
mbed_official 330:c80ac197fa6a 437 }
mbed_official 330:c80ac197fa6a 438
mbed_official 330:c80ac197fa6a 439 /* I2Sext in mode Receiver -----------------------------------------------*/
mbed_official 330:c80ac197fa6a 440 if(((i2sextsr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2SEXT_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET))
mbed_official 330:c80ac197fa6a 441 {
mbed_official 330:c80ac197fa6a 442 /* When the I2S mode is configured as I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX,
mbed_official 330:c80ac197fa6a 443 the I2Sext RXNE interrupt will be generated to manage the full-duplex receive phase. */
mbed_official 330:c80ac197fa6a 444 I2S_FullDuplexRx_IT(hi2s, I2S_USE_I2SEXT);
mbed_official 330:c80ac197fa6a 445 }
mbed_official 330:c80ac197fa6a 446
mbed_official 330:c80ac197fa6a 447 /* I2Sext Overrun error interrupt occured --------------------------------*/
mbed_official 330:c80ac197fa6a 448 if(((i2sextsr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2SEXT_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
mbed_official 330:c80ac197fa6a 449 {
mbed_official 330:c80ac197fa6a 450 /* Disable RXNE and ERR interrupt */
mbed_official 330:c80ac197fa6a 451 __HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
mbed_official 330:c80ac197fa6a 452
mbed_official 330:c80ac197fa6a 453 /* Disable TXE and ERR interrupt */
mbed_official 330:c80ac197fa6a 454 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
mbed_official 330:c80ac197fa6a 455
mbed_official 330:c80ac197fa6a 456 /* Set the I2S State ready */
mbed_official 330:c80ac197fa6a 457 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 330:c80ac197fa6a 458
mbed_official 330:c80ac197fa6a 459 /* Set the error code and execute error callback*/
mbed_official 330:c80ac197fa6a 460 hi2s->ErrorCode |= HAL_I2S_ERROR_OVR;
mbed_official 330:c80ac197fa6a 461 HAL_I2S_ErrorCallback(hi2s);
mbed_official 330:c80ac197fa6a 462 }
mbed_official 330:c80ac197fa6a 463
mbed_official 330:c80ac197fa6a 464 /* I2S Underrun error interrupt occured ----------------------------------*/
mbed_official 330:c80ac197fa6a 465 if(((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
mbed_official 330:c80ac197fa6a 466 {
mbed_official 330:c80ac197fa6a 467 /* Disable TXE and ERR interrupt */
mbed_official 330:c80ac197fa6a 468 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
mbed_official 330:c80ac197fa6a 469
mbed_official 330:c80ac197fa6a 470 /* Disable RXNE and ERR interrupt */
mbed_official 330:c80ac197fa6a 471 __HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
mbed_official 330:c80ac197fa6a 472
mbed_official 330:c80ac197fa6a 473 /* Set the I2S State ready */
mbed_official 330:c80ac197fa6a 474 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 330:c80ac197fa6a 475
mbed_official 330:c80ac197fa6a 476 /* Set the error code and execute error callback*/
mbed_official 330:c80ac197fa6a 477 hi2s->ErrorCode |= HAL_I2S_ERROR_UDR;
mbed_official 330:c80ac197fa6a 478 HAL_I2S_ErrorCallback(hi2s);
mbed_official 330:c80ac197fa6a 479 }
mbed_official 330:c80ac197fa6a 480 }
mbed_official 330:c80ac197fa6a 481 /* The I2S_MODE_MASTER_RX or I2S_MODE_SLAVE_RX Mode is selected */
mbed_official 330:c80ac197fa6a 482 else
mbed_official 330:c80ac197fa6a 483 {
mbed_official 330:c80ac197fa6a 484 /* I2Sext in mode Transmitter ----------------------------------------------*/
mbed_official 330:c80ac197fa6a 485 if(((i2sextsr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2SEXT_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET))
mbed_official 330:c80ac197fa6a 486 {
mbed_official 330:c80ac197fa6a 487 /* When the I2S mode is configured as I2S_MODE_MASTER_RX or I2S_MODE_SLAVE_RX,
mbed_official 330:c80ac197fa6a 488 the I2Sext TXE interrupt will be generated to manage the full-duplex transmit phase. */
mbed_official 330:c80ac197fa6a 489 I2S_FullDuplexTx_IT(hi2s, I2S_USE_I2SEXT);
mbed_official 330:c80ac197fa6a 490 }
mbed_official 330:c80ac197fa6a 491
mbed_official 330:c80ac197fa6a 492 /* I2S in mode Receiver --------------------------------------------------*/
mbed_official 330:c80ac197fa6a 493 if(((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET))
mbed_official 330:c80ac197fa6a 494 {
mbed_official 330:c80ac197fa6a 495 /* When the I2S mode is configured as I2S_MODE_MASTER_RX or I2S_MODE_SLAVE_RX,
mbed_official 330:c80ac197fa6a 496 the I2S RXNE interrupt will be generated to manage the full-duplex receive phase. */
mbed_official 330:c80ac197fa6a 497 I2S_FullDuplexRx_IT(hi2s, I2S_USE_I2S);
mbed_official 330:c80ac197fa6a 498 }
mbed_official 330:c80ac197fa6a 499
mbed_official 330:c80ac197fa6a 500 /* I2S Overrun error interrupt occured -------------------------------------*/
mbed_official 330:c80ac197fa6a 501 if(((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
mbed_official 330:c80ac197fa6a 502 {
mbed_official 330:c80ac197fa6a 503 /* Disable RXNE and ERR interrupt */
mbed_official 330:c80ac197fa6a 504 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
mbed_official 330:c80ac197fa6a 505
mbed_official 330:c80ac197fa6a 506 /* Disable TXE and ERR interrupt */
mbed_official 330:c80ac197fa6a 507 __HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
mbed_official 330:c80ac197fa6a 508
mbed_official 330:c80ac197fa6a 509 /* Set the I2S State ready */
mbed_official 330:c80ac197fa6a 510 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 330:c80ac197fa6a 511
mbed_official 330:c80ac197fa6a 512 /* Set the error code and execute error callback*/
mbed_official 330:c80ac197fa6a 513 hi2s->ErrorCode |= HAL_I2S_ERROR_OVR;
mbed_official 330:c80ac197fa6a 514 HAL_I2S_ErrorCallback(hi2s);
mbed_official 330:c80ac197fa6a 515 }
mbed_official 330:c80ac197fa6a 516
mbed_official 330:c80ac197fa6a 517 /* I2Sext Underrun error interrupt occured -------------------------------*/
mbed_official 330:c80ac197fa6a 518 if(((i2sextsr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2SEXT_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
mbed_official 330:c80ac197fa6a 519 {
mbed_official 330:c80ac197fa6a 520 /* Disable TXE and ERR interrupt */
mbed_official 330:c80ac197fa6a 521 __HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
mbed_official 330:c80ac197fa6a 522
mbed_official 330:c80ac197fa6a 523 /* Disable RXNE and ERR interrupt */
mbed_official 330:c80ac197fa6a 524 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
mbed_official 330:c80ac197fa6a 525
mbed_official 330:c80ac197fa6a 526 /* Set the I2S State ready */
mbed_official 330:c80ac197fa6a 527 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 330:c80ac197fa6a 528
mbed_official 330:c80ac197fa6a 529 /* Set the error code and execute error callback*/
mbed_official 330:c80ac197fa6a 530 hi2s->ErrorCode |= HAL_I2S_ERROR_UDR;
mbed_official 330:c80ac197fa6a 531 HAL_I2S_ErrorCallback(hi2s);
mbed_official 330:c80ac197fa6a 532 }
mbed_official 330:c80ac197fa6a 533 }
mbed_official 330:c80ac197fa6a 534 }
mbed_official 330:c80ac197fa6a 535
mbed_official 330:c80ac197fa6a 536 /**
mbed_official 330:c80ac197fa6a 537 * @brief Tx and Rx Transfer completed callbacks
mbed_official 330:c80ac197fa6a 538 * @param hi2s: I2S handle
mbed_official 330:c80ac197fa6a 539 * @retval None
mbed_official 330:c80ac197fa6a 540 */
mbed_official 330:c80ac197fa6a 541 __weak void HAL_I2S_TxRxCpltCallback(I2S_HandleTypeDef *hi2s)
mbed_official 330:c80ac197fa6a 542 {
mbed_official 330:c80ac197fa6a 543 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 330:c80ac197fa6a 544 the HAL_I2S_TxRxCpltCallback could be implenetd in the user file
mbed_official 330:c80ac197fa6a 545 */
mbed_official 330:c80ac197fa6a 546 }
mbed_official 330:c80ac197fa6a 547
mbed_official 330:c80ac197fa6a 548 /**
mbed_official 330:c80ac197fa6a 549 * @}
mbed_official 330:c80ac197fa6a 550 */
mbed_official 330:c80ac197fa6a 551
mbed_official 330:c80ac197fa6a 552 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
mbed_official 330:c80ac197fa6a 553 /* STM32F302xC || STM32F303xC || STM32F358xx */
mbed_official 330:c80ac197fa6a 554
mbed_official 330:c80ac197fa6a 555 /** @addtogroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions
mbed_official 330:c80ac197fa6a 556 * @brief Peripheral State functions
mbed_official 330:c80ac197fa6a 557 *
mbed_official 330:c80ac197fa6a 558 *
mbed_official 330:c80ac197fa6a 559 @verbatim
mbed_official 330:c80ac197fa6a 560 ===============================================================================
mbed_official 330:c80ac197fa6a 561 ##### Peripheral State functions #####
mbed_official 330:c80ac197fa6a 562 ===============================================================================
mbed_official 330:c80ac197fa6a 563 [..]
mbed_official 330:c80ac197fa6a 564 This subsection permit to get in run-time the status of the peripheral
mbed_official 330:c80ac197fa6a 565 and the data flow.
mbed_official 330:c80ac197fa6a 566
mbed_official 330:c80ac197fa6a 567 @endverbatim
mbed_official 330:c80ac197fa6a 568 * @{
mbed_official 330:c80ac197fa6a 569 */
mbed_official 330:c80ac197fa6a 570 /**
mbed_official 330:c80ac197fa6a 571 * @brief Pauses the audio stream playing from the Media.
mbed_official 330:c80ac197fa6a 572 * @param hi2s : I2S handle
mbed_official 330:c80ac197fa6a 573 * @retval None
mbed_official 330:c80ac197fa6a 574 */
mbed_official 330:c80ac197fa6a 575 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s)
mbed_official 330:c80ac197fa6a 576 {
mbed_official 330:c80ac197fa6a 577 /* Process Locked */
mbed_official 330:c80ac197fa6a 578 __HAL_LOCK(hi2s);
mbed_official 330:c80ac197fa6a 579
mbed_official 330:c80ac197fa6a 580 if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
mbed_official 330:c80ac197fa6a 581 {
mbed_official 330:c80ac197fa6a 582 /* Pause the audio file playing by disabling the I2S DMA request */
mbed_official 330:c80ac197fa6a 583 hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
mbed_official 330:c80ac197fa6a 584 }
mbed_official 330:c80ac197fa6a 585 else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
mbed_official 330:c80ac197fa6a 586 {
mbed_official 330:c80ac197fa6a 587 /* Pause the audio file playing by disabling the I2S DMA request */
mbed_official 330:c80ac197fa6a 588 hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
mbed_official 330:c80ac197fa6a 589 }
mbed_official 330:c80ac197fa6a 590 #if defined (STM32F302xE) || defined (STM32F303xE) || defined (STM32F398xx) || \
mbed_official 330:c80ac197fa6a 591 defined (STM32F302xC) || defined (STM32F303xC) || defined (STM32F358xx)
mbed_official 330:c80ac197fa6a 592 else if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX)
mbed_official 330:c80ac197fa6a 593 {
mbed_official 330:c80ac197fa6a 594 /* Pause the audio file playing by disabling the I2S DMA request */
mbed_official 330:c80ac197fa6a 595 hi2s->Instance->CR2 &= (uint32_t)(~(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN));
mbed_official 330:c80ac197fa6a 596 I2SxEXT(hi2s->Instance)->CR2 &= (uint32_t)(~(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN));
mbed_official 330:c80ac197fa6a 597 }
mbed_official 330:c80ac197fa6a 598 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
mbed_official 330:c80ac197fa6a 599 /* STM32F302xC || STM32F303xC || STM32F358xx */
mbed_official 330:c80ac197fa6a 600
mbed_official 330:c80ac197fa6a 601 /* Process Unlocked */
mbed_official 330:c80ac197fa6a 602 __HAL_UNLOCK(hi2s);
mbed_official 330:c80ac197fa6a 603
mbed_official 330:c80ac197fa6a 604 return HAL_OK;
mbed_official 330:c80ac197fa6a 605 }
mbed_official 330:c80ac197fa6a 606
mbed_official 330:c80ac197fa6a 607 /**
mbed_official 330:c80ac197fa6a 608 * @brief Resumes the audio stream playing from the Media.
mbed_official 330:c80ac197fa6a 609 * @param hi2s : I2S handle
mbed_official 330:c80ac197fa6a 610 * @retval None
mbed_official 330:c80ac197fa6a 611 */
mbed_official 330:c80ac197fa6a 612 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s)
mbed_official 330:c80ac197fa6a 613 {
mbed_official 330:c80ac197fa6a 614 /* Process Locked */
mbed_official 330:c80ac197fa6a 615 __HAL_LOCK(hi2s);
mbed_official 330:c80ac197fa6a 616
mbed_official 330:c80ac197fa6a 617 if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
mbed_official 330:c80ac197fa6a 618 {
mbed_official 330:c80ac197fa6a 619 /* Enable the I2S DMA request */
mbed_official 330:c80ac197fa6a 620 hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN;
mbed_official 330:c80ac197fa6a 621 }
mbed_official 330:c80ac197fa6a 622 else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
mbed_official 330:c80ac197fa6a 623 {
mbed_official 330:c80ac197fa6a 624 /* Enable the I2S DMA request */
mbed_official 330:c80ac197fa6a 625 hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN;
mbed_official 330:c80ac197fa6a 626 }
mbed_official 330:c80ac197fa6a 627 #if defined (STM32F302xE) || defined (STM32F303xE) || defined (STM32F398xx) || \
mbed_official 330:c80ac197fa6a 628 defined (STM32F302xC) || defined (STM32F303xC) || defined (STM32F358xx)
mbed_official 330:c80ac197fa6a 629 else if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX)
mbed_official 330:c80ac197fa6a 630 {
mbed_official 330:c80ac197fa6a 631 /* Pause the audio file playing by disabling the I2S DMA request */
mbed_official 330:c80ac197fa6a 632 hi2s->Instance->CR2 |= (SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN);
mbed_official 330:c80ac197fa6a 633 I2SxEXT(hi2s->Instance)->CR2 |= (SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN);
mbed_official 330:c80ac197fa6a 634
mbed_official 330:c80ac197fa6a 635 /* If the I2Sext peripheral is still not enabled, enable it */
mbed_official 330:c80ac197fa6a 636 if ((I2SxEXT(hi2s->Instance)->I2SCFGR & SPI_I2SCFGR_I2SE) == 0)
mbed_official 330:c80ac197fa6a 637 {
mbed_official 330:c80ac197fa6a 638 /* Enable I2Sext peripheral */
mbed_official 330:c80ac197fa6a 639 __HAL_I2SEXT_ENABLE(hi2s);
mbed_official 330:c80ac197fa6a 640 }
mbed_official 330:c80ac197fa6a 641 }
mbed_official 330:c80ac197fa6a 642 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
mbed_official 330:c80ac197fa6a 643 /* STM32F302xC || STM32F303xC || STM32F358xx */
mbed_official 330:c80ac197fa6a 644
mbed_official 330:c80ac197fa6a 645 /* If the I2S peripheral is still not enabled, enable it */
mbed_official 330:c80ac197fa6a 646 if ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) == 0)
mbed_official 330:c80ac197fa6a 647 {
mbed_official 330:c80ac197fa6a 648 /* Enable I2S peripheral */
mbed_official 330:c80ac197fa6a 649 __HAL_I2S_ENABLE(hi2s);
mbed_official 330:c80ac197fa6a 650 }
mbed_official 330:c80ac197fa6a 651
mbed_official 330:c80ac197fa6a 652 /* Process Unlocked */
mbed_official 330:c80ac197fa6a 653 __HAL_UNLOCK(hi2s);
mbed_official 330:c80ac197fa6a 654
mbed_official 330:c80ac197fa6a 655 return HAL_OK;
mbed_official 330:c80ac197fa6a 656 }
mbed_official 330:c80ac197fa6a 657
mbed_official 330:c80ac197fa6a 658 /**
mbed_official 330:c80ac197fa6a 659 * @brief Resumes the audio stream playing from the Media.
mbed_official 330:c80ac197fa6a 660 * @param hi2s: I2S handle
mbed_official 330:c80ac197fa6a 661 * @retval None
mbed_official 330:c80ac197fa6a 662 */
mbed_official 330:c80ac197fa6a 663 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
mbed_official 330:c80ac197fa6a 664 {
mbed_official 330:c80ac197fa6a 665 /* Process Locked */
mbed_official 330:c80ac197fa6a 666 __HAL_LOCK(hi2s);
mbed_official 330:c80ac197fa6a 667
mbed_official 330:c80ac197fa6a 668 if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
mbed_official 330:c80ac197fa6a 669 {
mbed_official 330:c80ac197fa6a 670 /* Disable the I2S DMA requests */
mbed_official 330:c80ac197fa6a 671 hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
mbed_official 330:c80ac197fa6a 672
mbed_official 330:c80ac197fa6a 673 /* Disable the I2S DMA Channel */
mbed_official 330:c80ac197fa6a 674 HAL_DMA_Abort(hi2s->hdmatx);
mbed_official 330:c80ac197fa6a 675 }
mbed_official 330:c80ac197fa6a 676 else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
mbed_official 330:c80ac197fa6a 677 {
mbed_official 330:c80ac197fa6a 678 /* Disable the I2S DMA requests */
mbed_official 330:c80ac197fa6a 679 hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
mbed_official 330:c80ac197fa6a 680
mbed_official 330:c80ac197fa6a 681 /* Disable the I2S DMA Channel */
mbed_official 330:c80ac197fa6a 682 HAL_DMA_Abort(hi2s->hdmarx);
mbed_official 330:c80ac197fa6a 683 }
mbed_official 330:c80ac197fa6a 684 #if defined (STM32F302xE) || defined (STM32F303xE) || defined (STM32F398xx) || \
mbed_official 330:c80ac197fa6a 685 defined (STM32F302xC) || defined (STM32F303xC) || defined (STM32F358xx)
mbed_official 330:c80ac197fa6a 686 else if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX)
mbed_official 330:c80ac197fa6a 687 {
mbed_official 330:c80ac197fa6a 688 /* Disable the I2S DMA requests */
mbed_official 330:c80ac197fa6a 689 hi2s->Instance->CR2 &= (uint32_t)(~(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN));
mbed_official 330:c80ac197fa6a 690 I2SxEXT(hi2s->Instance)->CR2 &= (uint32_t)(~(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN));
mbed_official 330:c80ac197fa6a 691
mbed_official 330:c80ac197fa6a 692 /* Disable the I2S DMA Channels */
mbed_official 330:c80ac197fa6a 693 HAL_DMA_Abort(hi2s->hdmatx);
mbed_official 330:c80ac197fa6a 694 HAL_DMA_Abort(hi2s->hdmarx);
mbed_official 330:c80ac197fa6a 695
mbed_official 330:c80ac197fa6a 696 /* Disable I2Sext peripheral */
mbed_official 330:c80ac197fa6a 697 __HAL_I2SEXT_DISABLE(hi2s);
mbed_official 330:c80ac197fa6a 698 }
mbed_official 330:c80ac197fa6a 699 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
mbed_official 330:c80ac197fa6a 700 /* STM32F302xC || STM32F303xC || STM32F358xx */
mbed_official 330:c80ac197fa6a 701
mbed_official 330:c80ac197fa6a 702 /* Disable I2S peripheral */
mbed_official 330:c80ac197fa6a 703 __HAL_I2S_DISABLE(hi2s);
mbed_official 330:c80ac197fa6a 704
mbed_official 330:c80ac197fa6a 705 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 330:c80ac197fa6a 706
mbed_official 330:c80ac197fa6a 707 /* Process Unlocked */
mbed_official 330:c80ac197fa6a 708 __HAL_UNLOCK(hi2s);
mbed_official 330:c80ac197fa6a 709
mbed_official 330:c80ac197fa6a 710 return HAL_OK;
mbed_official 330:c80ac197fa6a 711 }
mbed_official 330:c80ac197fa6a 712
mbed_official 330:c80ac197fa6a 713 /**
mbed_official 330:c80ac197fa6a 714 * @}
mbed_official 330:c80ac197fa6a 715 */
mbed_official 330:c80ac197fa6a 716
mbed_official 330:c80ac197fa6a 717 /**
mbed_official 330:c80ac197fa6a 718 * @}
mbed_official 330:c80ac197fa6a 719 */
mbed_official 330:c80ac197fa6a 720
mbed_official 330:c80ac197fa6a 721 /**
mbed_official 330:c80ac197fa6a 722 * @}
mbed_official 330:c80ac197fa6a 723 */
mbed_official 330:c80ac197fa6a 724
mbed_official 330:c80ac197fa6a 725 #if defined (STM32F302xE) || defined (STM32F303xE) || defined (STM32F398xx) || \
mbed_official 330:c80ac197fa6a 726 defined (STM32F302xC) || defined (STM32F303xC) || defined (STM32F358xx)
mbed_official 330:c80ac197fa6a 727 /** @addtogroup I2SEx I2S Extended HAL module driver
mbed_official 330:c80ac197fa6a 728 * @brief I2S Extended HAL module driver
mbed_official 330:c80ac197fa6a 729 * @{
mbed_official 330:c80ac197fa6a 730 */
mbed_official 330:c80ac197fa6a 731
mbed_official 330:c80ac197fa6a 732 /** @defgroup I2SEx_Exported_Functions I2S Extended Exported Functions
mbed_official 330:c80ac197fa6a 733 * @{
mbed_official 330:c80ac197fa6a 734 */
mbed_official 330:c80ac197fa6a 735
mbed_official 330:c80ac197fa6a 736 /** @defgroup I2SEx_Exported_Functions_Group1 Extended features functions
mbed_official 330:c80ac197fa6a 737 * @brief Extended features functions
mbed_official 330:c80ac197fa6a 738 *
mbed_official 330:c80ac197fa6a 739 @verbatim
mbed_official 330:c80ac197fa6a 740 ===============================================================================
mbed_official 330:c80ac197fa6a 741 ##### Extended features Functions #####
mbed_official 330:c80ac197fa6a 742 ===============================================================================
mbed_official 330:c80ac197fa6a 743 [..]
mbed_official 330:c80ac197fa6a 744 This subsection provides a set of functions allowing to manage the I2S data
mbed_official 330:c80ac197fa6a 745 transfers.
mbed_official 330:c80ac197fa6a 746
mbed_official 330:c80ac197fa6a 747 (#) There is two mode of transfer:
mbed_official 330:c80ac197fa6a 748 (++) Blocking mode: The communication is performed in the polling mode.
mbed_official 330:c80ac197fa6a 749 The status of all data processing is returned by the same function
mbed_official 330:c80ac197fa6a 750 after finishing transfer.
mbed_official 330:c80ac197fa6a 751 (++) No-Blocking mode: The communication is performed using Interrupts
mbed_official 330:c80ac197fa6a 752 or DMA. These functions return the status of the transfer startup.
mbed_official 330:c80ac197fa6a 753 The end of the data processing will be indicated through the
mbed_official 330:c80ac197fa6a 754 dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when
mbed_official 330:c80ac197fa6a 755 using DMA mode.
mbed_official 330:c80ac197fa6a 756
mbed_official 330:c80ac197fa6a 757 (#) Blocking mode functions are :
mbed_official 330:c80ac197fa6a 758 (++) HAL_I2S_TransmitReceive()
mbed_official 330:c80ac197fa6a 759
mbed_official 330:c80ac197fa6a 760 (#) No-Blocking mode functions with Interrupt are:
mbed_official 330:c80ac197fa6a 761 (++) HAL_I2S_TransmitReceive_IT()
mbed_official 330:c80ac197fa6a 762 (++) HAL_I2SFullDuplex_IRQHandler()
mbed_official 330:c80ac197fa6a 763
mbed_official 330:c80ac197fa6a 764 (#) No-Blocking mode functions with DMA are:
mbed_official 330:c80ac197fa6a 765 (++) HAL_I2S_TransmitReceive_DMA()
mbed_official 330:c80ac197fa6a 766
mbed_official 330:c80ac197fa6a 767 (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
mbed_official 330:c80ac197fa6a 768 (++) HAL_I2S_TxRxCpltCallback()
mbed_official 330:c80ac197fa6a 769 (++) HAL_I2S_TxRxErrorCallback()
mbed_official 330:c80ac197fa6a 770
mbed_official 330:c80ac197fa6a 771 @endverbatim
mbed_official 330:c80ac197fa6a 772 * @{
mbed_official 330:c80ac197fa6a 773 */
mbed_official 330:c80ac197fa6a 774
mbed_official 330:c80ac197fa6a 775 /**
mbed_official 330:c80ac197fa6a 776 * @brief Full-Duplex Transmit/Receive data in blocking mode.
mbed_official 330:c80ac197fa6a 777 * @param hi2s: I2S handle
mbed_official 330:c80ac197fa6a 778 * @param pTxData: a 16-bit pointer to the Transmit data buffer.
mbed_official 330:c80ac197fa6a 779 * @param pRxData: a 16-bit pointer to the Receive data buffer.
mbed_official 330:c80ac197fa6a 780 * @param Size: number of data sample to be sent:
mbed_official 330:c80ac197fa6a 781 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
mbed_official 330:c80ac197fa6a 782 * configuration phase, the Size parameter means the number of 16-bit data length
mbed_official 330:c80ac197fa6a 783 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
mbed_official 330:c80ac197fa6a 784 * the Size parameter means the number of 16-bit data length.
mbed_official 330:c80ac197fa6a 785 * @param Timeout: Timeout duration
mbed_official 330:c80ac197fa6a 786 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
mbed_official 330:c80ac197fa6a 787 * between Master and Slave(example: audio streaming).
mbed_official 330:c80ac197fa6a 788 * @retval HAL status
mbed_official 330:c80ac197fa6a 789 */
mbed_official 330:c80ac197fa6a 790 HAL_StatusTypeDef HAL_I2SEx_TransmitReceive(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData, uint16_t Size, uint32_t Timeout)
mbed_official 330:c80ac197fa6a 791 {
mbed_official 632:7687fb9c4f91 792 if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
mbed_official 330:c80ac197fa6a 793 {
mbed_official 330:c80ac197fa6a 794 return HAL_ERROR;
mbed_official 330:c80ac197fa6a 795 }
mbed_official 330:c80ac197fa6a 796
mbed_official 330:c80ac197fa6a 797 /* Check the I2S State */
mbed_official 330:c80ac197fa6a 798 if(hi2s->State == HAL_I2S_STATE_READY)
mbed_official 330:c80ac197fa6a 799 {
mbed_official 330:c80ac197fa6a 800 /* Check the Data format: When a 16-bit data frame or a 16-bit data frame extended
mbed_official 330:c80ac197fa6a 801 is selected during the I2S configuration phase, the Size parameter means the number
mbed_official 330:c80ac197fa6a 802 of 16-bit data length in the transaction and when a 24-bit data frame or a 32-bit data
mbed_official 330:c80ac197fa6a 803 frame is selected the Size parameter means the number of 16-bit data length. */
mbed_official 330:c80ac197fa6a 804 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
mbed_official 330:c80ac197fa6a 805 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
mbed_official 330:c80ac197fa6a 806 {
mbed_official 330:c80ac197fa6a 807 hi2s->TxXferSize = (Size << 1);
mbed_official 330:c80ac197fa6a 808 hi2s->TxXferCount = (Size << 1);
mbed_official 330:c80ac197fa6a 809 hi2s->RxXferSize = (Size << 1);
mbed_official 330:c80ac197fa6a 810 hi2s->RxXferCount = (Size << 1);
mbed_official 330:c80ac197fa6a 811 }
mbed_official 330:c80ac197fa6a 812 else
mbed_official 330:c80ac197fa6a 813 {
mbed_official 330:c80ac197fa6a 814 hi2s->TxXferSize = Size;
mbed_official 330:c80ac197fa6a 815 hi2s->TxXferCount = Size;
mbed_official 330:c80ac197fa6a 816 hi2s->RxXferSize = Size;
mbed_official 330:c80ac197fa6a 817 hi2s->RxXferCount = Size;
mbed_official 330:c80ac197fa6a 818 }
mbed_official 330:c80ac197fa6a 819
mbed_official 330:c80ac197fa6a 820 /* Process Locked */
mbed_official 330:c80ac197fa6a 821 __HAL_LOCK(hi2s);
mbed_official 330:c80ac197fa6a 822
mbed_official 330:c80ac197fa6a 823 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official 330:c80ac197fa6a 824
mbed_official 330:c80ac197fa6a 825 /* Set the I2S State busy TX/RX */
mbed_official 330:c80ac197fa6a 826 hi2s->State = HAL_I2S_STATE_BUSY_TX_RX;
mbed_official 330:c80ac197fa6a 827
mbed_official 330:c80ac197fa6a 828 /* Check if the I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX Mode is selected */
mbed_official 330:c80ac197fa6a 829 if(((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_TX) || ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX))
mbed_official 330:c80ac197fa6a 830 {
mbed_official 330:c80ac197fa6a 831 /* Prepare the First Data before enabling the I2S */
mbed_official 330:c80ac197fa6a 832 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX)
mbed_official 330:c80ac197fa6a 833 {
mbed_official 330:c80ac197fa6a 834 hi2s->Instance->DR = (*pTxData++);
mbed_official 330:c80ac197fa6a 835 hi2s->TxXferCount--;
mbed_official 330:c80ac197fa6a 836 }
mbed_official 330:c80ac197fa6a 837
mbed_official 330:c80ac197fa6a 838 /* Check if the I2S is already enabled: The I2S is kept enabled at the end of transaction
mbed_official 330:c80ac197fa6a 839 to avoid the clock de-synchronization between Master and Slave. */
mbed_official 330:c80ac197fa6a 840 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official 330:c80ac197fa6a 841 {
mbed_official 330:c80ac197fa6a 842 /* Enable I2Sext(receiver) before enabling I2Sx peripheral */
mbed_official 330:c80ac197fa6a 843 __HAL_I2SEXT_ENABLE(hi2s);
mbed_official 330:c80ac197fa6a 844
mbed_official 330:c80ac197fa6a 845 /* Enable I2Sx peripheral */
mbed_official 330:c80ac197fa6a 846 __HAL_I2S_ENABLE(hi2s);
mbed_official 330:c80ac197fa6a 847 }
mbed_official 330:c80ac197fa6a 848
mbed_official 330:c80ac197fa6a 849 while(hi2s->RxXferCount > 0)
mbed_official 330:c80ac197fa6a 850 {
mbed_official 330:c80ac197fa6a 851 /* Wait until TXE flag is set */
mbed_official 330:c80ac197fa6a 852 if (I2S_FullDuplexWaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, SET, Timeout, I2S_USE_I2S) != HAL_OK)
mbed_official 330:c80ac197fa6a 853 {
mbed_official 330:c80ac197fa6a 854 /* Set the error code and execute error callback*/
mbed_official 330:c80ac197fa6a 855 hi2s->ErrorCode |= HAL_I2S_ERROR_TIMEOUT;
mbed_official 330:c80ac197fa6a 856 HAL_I2S_ErrorCallback(hi2s);
mbed_official 330:c80ac197fa6a 857 return HAL_TIMEOUT;
mbed_official 330:c80ac197fa6a 858 }
mbed_official 330:c80ac197fa6a 859
mbed_official 330:c80ac197fa6a 860 if (hi2s->TxXferCount > 0)
mbed_official 330:c80ac197fa6a 861 {
mbed_official 330:c80ac197fa6a 862 /* Check if an underrun occurs */
mbed_official 330:c80ac197fa6a 863 if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_UDR) == SET)
mbed_official 330:c80ac197fa6a 864 {
mbed_official 330:c80ac197fa6a 865 /* Set the I2S State ready */
mbed_official 330:c80ac197fa6a 866 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 330:c80ac197fa6a 867
mbed_official 330:c80ac197fa6a 868 /* Process Unlocked */
mbed_official 330:c80ac197fa6a 869 __HAL_UNLOCK(hi2s);
mbed_official 330:c80ac197fa6a 870
mbed_official 330:c80ac197fa6a 871 /* Set the error code and execute error callback*/
mbed_official 330:c80ac197fa6a 872 hi2s->ErrorCode |= HAL_I2S_ERROR_UDR;
mbed_official 330:c80ac197fa6a 873 HAL_I2S_ErrorCallback(hi2s);
mbed_official 330:c80ac197fa6a 874
mbed_official 330:c80ac197fa6a 875 return HAL_ERROR;
mbed_official 330:c80ac197fa6a 876 }
mbed_official 330:c80ac197fa6a 877
mbed_official 330:c80ac197fa6a 878 hi2s->Instance->DR = (*pTxData++);
mbed_official 330:c80ac197fa6a 879 hi2s->TxXferCount--;
mbed_official 330:c80ac197fa6a 880 }
mbed_official 330:c80ac197fa6a 881
mbed_official 330:c80ac197fa6a 882 /* Wait until RXNE flag is set */
mbed_official 330:c80ac197fa6a 883 if (I2S_FullDuplexWaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, SET, Timeout, I2S_USE_I2SEXT) != HAL_OK)
mbed_official 330:c80ac197fa6a 884 {
mbed_official 330:c80ac197fa6a 885 /* Set the error code and execute error callback*/
mbed_official 330:c80ac197fa6a 886 hi2s->ErrorCode |= HAL_I2S_ERROR_TIMEOUT;
mbed_official 330:c80ac197fa6a 887 HAL_I2S_ErrorCallback(hi2s);
mbed_official 330:c80ac197fa6a 888 return HAL_TIMEOUT;
mbed_official 330:c80ac197fa6a 889 }
mbed_official 330:c80ac197fa6a 890
mbed_official 330:c80ac197fa6a 891 /* Check if an overrun occurs */
mbed_official 330:c80ac197fa6a 892 if(__HAL_I2SEXT_GET_FLAG(hi2s, I2S_FLAG_OVR) == SET)
mbed_official 330:c80ac197fa6a 893 {
mbed_official 330:c80ac197fa6a 894 /* Set the I2S State ready */
mbed_official 330:c80ac197fa6a 895 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 330:c80ac197fa6a 896
mbed_official 330:c80ac197fa6a 897 /* Process Unlocked */
mbed_official 330:c80ac197fa6a 898 __HAL_UNLOCK(hi2s);
mbed_official 330:c80ac197fa6a 899
mbed_official 330:c80ac197fa6a 900 /* Set the error code and execute error callback*/
mbed_official 330:c80ac197fa6a 901 hi2s->ErrorCode |= HAL_I2S_ERROR_OVR;
mbed_official 330:c80ac197fa6a 902 HAL_I2S_ErrorCallback(hi2s);
mbed_official 330:c80ac197fa6a 903
mbed_official 330:c80ac197fa6a 904 return HAL_ERROR;
mbed_official 330:c80ac197fa6a 905 }
mbed_official 330:c80ac197fa6a 906
mbed_official 330:c80ac197fa6a 907 (*pRxData++) = I2SxEXT(hi2s->Instance)->DR;
mbed_official 330:c80ac197fa6a 908 hi2s->RxXferCount--;
mbed_official 330:c80ac197fa6a 909 }
mbed_official 330:c80ac197fa6a 910 }
mbed_official 330:c80ac197fa6a 911 /* The I2S_MODE_MASTER_RX or I2S_MODE_SLAVE_RX Mode is selected */
mbed_official 330:c80ac197fa6a 912 else
mbed_official 330:c80ac197fa6a 913 {
mbed_official 330:c80ac197fa6a 914 /* Prepare the First Data before enabling the I2S */
mbed_official 330:c80ac197fa6a 915 I2SxEXT(hi2s->Instance)->DR = (*pTxData++);
mbed_official 330:c80ac197fa6a 916 hi2s->TxXferCount--;
mbed_official 330:c80ac197fa6a 917
mbed_official 330:c80ac197fa6a 918 /* Check if the I2S is already enabled */
mbed_official 330:c80ac197fa6a 919 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official 330:c80ac197fa6a 920 {
mbed_official 330:c80ac197fa6a 921 /* Enable I2S peripheral before the I2Sext*/
mbed_official 330:c80ac197fa6a 922 __HAL_I2S_ENABLE(hi2s);
mbed_official 330:c80ac197fa6a 923
mbed_official 330:c80ac197fa6a 924 /* Enable I2Sext(transmitter) after enabling I2Sx peripheral */
mbed_official 330:c80ac197fa6a 925 __HAL_I2SEXT_ENABLE(hi2s);
mbed_official 330:c80ac197fa6a 926 }
mbed_official 330:c80ac197fa6a 927
mbed_official 330:c80ac197fa6a 928 /* Check if Master Receiver mode is selected */
mbed_official 330:c80ac197fa6a 929 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
mbed_official 330:c80ac197fa6a 930 {
mbed_official 330:c80ac197fa6a 931 /* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read
mbed_official 330:c80ac197fa6a 932 access to the SPI_SR register. */
mbed_official 330:c80ac197fa6a 933 __HAL_I2S_CLEAR_OVRFLAG(hi2s);
mbed_official 330:c80ac197fa6a 934 }
mbed_official 330:c80ac197fa6a 935
mbed_official 330:c80ac197fa6a 936 while(hi2s->RxXferCount > 0)
mbed_official 330:c80ac197fa6a 937 {
mbed_official 330:c80ac197fa6a 938 /* Wait until TXE flag is set */
mbed_official 330:c80ac197fa6a 939 if (I2S_FullDuplexWaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, SET, Timeout, I2S_USE_I2SEXT) != HAL_OK)
mbed_official 330:c80ac197fa6a 940 {
mbed_official 330:c80ac197fa6a 941 /* Set the error code and execute error callback*/
mbed_official 330:c80ac197fa6a 942 hi2s->ErrorCode |= HAL_I2S_ERROR_TIMEOUT;
mbed_official 330:c80ac197fa6a 943 HAL_I2S_ErrorCallback(hi2s);
mbed_official 330:c80ac197fa6a 944 return HAL_TIMEOUT;
mbed_official 330:c80ac197fa6a 945 }
mbed_official 330:c80ac197fa6a 946
mbed_official 330:c80ac197fa6a 947 if (hi2s->TxXferCount > 0)
mbed_official 330:c80ac197fa6a 948 {
mbed_official 330:c80ac197fa6a 949 /* Check if an underrun occurs */
mbed_official 330:c80ac197fa6a 950 if(__HAL_I2SEXT_GET_FLAG(hi2s, I2S_FLAG_UDR) == SET)
mbed_official 330:c80ac197fa6a 951 {
mbed_official 330:c80ac197fa6a 952 /* Set the I2S State ready */
mbed_official 330:c80ac197fa6a 953 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 330:c80ac197fa6a 954
mbed_official 330:c80ac197fa6a 955 /* Process Unlocked */
mbed_official 330:c80ac197fa6a 956 __HAL_UNLOCK(hi2s);
mbed_official 330:c80ac197fa6a 957
mbed_official 330:c80ac197fa6a 958 /* Set the error code and execute error callback*/
mbed_official 330:c80ac197fa6a 959 hi2s->ErrorCode |= HAL_I2S_ERROR_UDR;
mbed_official 330:c80ac197fa6a 960 HAL_I2S_ErrorCallback(hi2s);
mbed_official 330:c80ac197fa6a 961
mbed_official 330:c80ac197fa6a 962 return HAL_ERROR;
mbed_official 330:c80ac197fa6a 963 }
mbed_official 330:c80ac197fa6a 964
mbed_official 330:c80ac197fa6a 965 I2SxEXT(hi2s->Instance)->DR = (*pTxData++);
mbed_official 330:c80ac197fa6a 966 hi2s->TxXferCount--;
mbed_official 330:c80ac197fa6a 967 }
mbed_official 330:c80ac197fa6a 968
mbed_official 330:c80ac197fa6a 969 /* Wait until RXNE flag is set */
mbed_official 330:c80ac197fa6a 970 if (I2S_FullDuplexWaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, SET, Timeout, I2S_USE_I2S) != HAL_OK)
mbed_official 330:c80ac197fa6a 971 {
mbed_official 330:c80ac197fa6a 972 /* Set the error code and execute error callback*/
mbed_official 330:c80ac197fa6a 973 hi2s->ErrorCode |= HAL_I2S_ERROR_TIMEOUT;
mbed_official 330:c80ac197fa6a 974 HAL_I2S_ErrorCallback(hi2s);
mbed_official 330:c80ac197fa6a 975 return HAL_TIMEOUT;
mbed_official 330:c80ac197fa6a 976 }
mbed_official 330:c80ac197fa6a 977
mbed_official 330:c80ac197fa6a 978 /* Check if an overrun occurs */
mbed_official 330:c80ac197fa6a 979 if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_OVR) == SET)
mbed_official 330:c80ac197fa6a 980 {
mbed_official 330:c80ac197fa6a 981 /* Set the I2S State ready */
mbed_official 330:c80ac197fa6a 982 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 330:c80ac197fa6a 983
mbed_official 330:c80ac197fa6a 984 /* Process Unlocked */
mbed_official 330:c80ac197fa6a 985 __HAL_UNLOCK(hi2s);
mbed_official 330:c80ac197fa6a 986
mbed_official 330:c80ac197fa6a 987 /* Set the error code and execute error callback*/
mbed_official 330:c80ac197fa6a 988 hi2s->ErrorCode |= HAL_I2S_ERROR_OVR;
mbed_official 330:c80ac197fa6a 989 HAL_I2S_ErrorCallback(hi2s);
mbed_official 330:c80ac197fa6a 990
mbed_official 330:c80ac197fa6a 991 return HAL_ERROR;
mbed_official 330:c80ac197fa6a 992 }
mbed_official 330:c80ac197fa6a 993
mbed_official 330:c80ac197fa6a 994 (*pRxData++) = hi2s->Instance->DR;
mbed_official 330:c80ac197fa6a 995 hi2s->RxXferCount--;
mbed_official 330:c80ac197fa6a 996 }
mbed_official 330:c80ac197fa6a 997 }
mbed_official 330:c80ac197fa6a 998
mbed_official 330:c80ac197fa6a 999 /* Set the I2S State ready */
mbed_official 330:c80ac197fa6a 1000 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 330:c80ac197fa6a 1001
mbed_official 330:c80ac197fa6a 1002 /* Process Unlocked */
mbed_official 330:c80ac197fa6a 1003 __HAL_UNLOCK(hi2s);
mbed_official 330:c80ac197fa6a 1004
mbed_official 330:c80ac197fa6a 1005 return HAL_OK;
mbed_official 330:c80ac197fa6a 1006 }
mbed_official 330:c80ac197fa6a 1007 else
mbed_official 330:c80ac197fa6a 1008 {
mbed_official 330:c80ac197fa6a 1009 return HAL_BUSY;
mbed_official 330:c80ac197fa6a 1010 }
mbed_official 330:c80ac197fa6a 1011 }
mbed_official 330:c80ac197fa6a 1012
mbed_official 330:c80ac197fa6a 1013 /**
mbed_official 330:c80ac197fa6a 1014 * @brief Full-Duplex Transmit/Receive data in non-blocking mode using Interrupt
mbed_official 330:c80ac197fa6a 1015 * @param hi2s: I2S handle
mbed_official 330:c80ac197fa6a 1016 * @param pTxData: a 16-bit pointer to the Transmit data buffer.
mbed_official 330:c80ac197fa6a 1017 * @param pRxData: a 16-bit pointer to the Receive data buffer.
mbed_official 330:c80ac197fa6a 1018 * @param Size: number of data sample to be sent:
mbed_official 330:c80ac197fa6a 1019 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
mbed_official 330:c80ac197fa6a 1020 * configuration phase, the Size parameter means the number of 16-bit data length
mbed_official 330:c80ac197fa6a 1021 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
mbed_official 330:c80ac197fa6a 1022 * the Size parameter means the number of 16-bit data length.
mbed_official 330:c80ac197fa6a 1023 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
mbed_official 330:c80ac197fa6a 1024 * between Master and Slave(example: audio streaming).
mbed_official 330:c80ac197fa6a 1025 * @retval HAL status
mbed_official 330:c80ac197fa6a 1026 */
mbed_official 330:c80ac197fa6a 1027 HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData, uint16_t Size)
mbed_official 330:c80ac197fa6a 1028 {
mbed_official 330:c80ac197fa6a 1029 if(hi2s->State == HAL_I2S_STATE_READY)
mbed_official 330:c80ac197fa6a 1030 {
mbed_official 632:7687fb9c4f91 1031 if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
mbed_official 330:c80ac197fa6a 1032 {
mbed_official 330:c80ac197fa6a 1033 return HAL_ERROR;
mbed_official 330:c80ac197fa6a 1034 }
mbed_official 330:c80ac197fa6a 1035
mbed_official 330:c80ac197fa6a 1036 hi2s->pTxBuffPtr = pTxData;
mbed_official 330:c80ac197fa6a 1037 hi2s->pRxBuffPtr = pRxData;
mbed_official 330:c80ac197fa6a 1038
mbed_official 330:c80ac197fa6a 1039 /* Check the Data format: When a 16-bit data frame or a 16-bit data frame extended
mbed_official 330:c80ac197fa6a 1040 is selected during the I2S configuration phase, the Size parameter means the number
mbed_official 330:c80ac197fa6a 1041 of 16-bit data length in the transaction and when a 24-bit data frame or a 32-bit data
mbed_official 330:c80ac197fa6a 1042 frame is selected the Size parameter means the number of 16-bit data length. */
mbed_official 330:c80ac197fa6a 1043 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
mbed_official 330:c80ac197fa6a 1044 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
mbed_official 330:c80ac197fa6a 1045 {
mbed_official 330:c80ac197fa6a 1046 hi2s->TxXferSize = (Size << 1);
mbed_official 330:c80ac197fa6a 1047 hi2s->TxXferCount = (Size << 1);
mbed_official 330:c80ac197fa6a 1048 hi2s->RxXferSize = (Size << 1);
mbed_official 330:c80ac197fa6a 1049 hi2s->RxXferCount = (Size << 1);
mbed_official 330:c80ac197fa6a 1050 }
mbed_official 330:c80ac197fa6a 1051 else
mbed_official 330:c80ac197fa6a 1052 {
mbed_official 330:c80ac197fa6a 1053 hi2s->TxXferSize = Size;
mbed_official 330:c80ac197fa6a 1054 hi2s->TxXferCount = Size;
mbed_official 330:c80ac197fa6a 1055 hi2s->RxXferSize = Size;
mbed_official 330:c80ac197fa6a 1056 hi2s->RxXferCount = Size;
mbed_official 330:c80ac197fa6a 1057 }
mbed_official 330:c80ac197fa6a 1058
mbed_official 330:c80ac197fa6a 1059 /* Process Locked */
mbed_official 330:c80ac197fa6a 1060 __HAL_LOCK(hi2s);
mbed_official 330:c80ac197fa6a 1061
mbed_official 330:c80ac197fa6a 1062 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official 330:c80ac197fa6a 1063 hi2s->State = HAL_I2S_STATE_BUSY_TX_RX;
mbed_official 330:c80ac197fa6a 1064
mbed_official 330:c80ac197fa6a 1065 /* Check if the I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX Mode is selected */
mbed_official 330:c80ac197fa6a 1066 if(((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_TX) || ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX))
mbed_official 330:c80ac197fa6a 1067 {
mbed_official 330:c80ac197fa6a 1068 /* Enable I2Sext RXNE and ERR interrupts */
mbed_official 330:c80ac197fa6a 1069 __HAL_I2SEXT_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
mbed_official 330:c80ac197fa6a 1070
mbed_official 330:c80ac197fa6a 1071 /* Enable I2Sx TXE and ERR interrupts */
mbed_official 330:c80ac197fa6a 1072 __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
mbed_official 330:c80ac197fa6a 1073
mbed_official 330:c80ac197fa6a 1074 /* Check if the I2S is already enabled */
mbed_official 330:c80ac197fa6a 1075 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official 330:c80ac197fa6a 1076 {
mbed_official 330:c80ac197fa6a 1077 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX)
mbed_official 330:c80ac197fa6a 1078 {
mbed_official 330:c80ac197fa6a 1079 /* Prepare the First Data before enabling the I2S */
mbed_official 330:c80ac197fa6a 1080 if(hi2s->TxXferCount != 0)
mbed_official 330:c80ac197fa6a 1081 {
mbed_official 330:c80ac197fa6a 1082 /* Transmit First data */
mbed_official 330:c80ac197fa6a 1083 hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
mbed_official 330:c80ac197fa6a 1084 hi2s->TxXferCount--;
mbed_official 330:c80ac197fa6a 1085
mbed_official 330:c80ac197fa6a 1086 if(hi2s->TxXferCount == 0)
mbed_official 330:c80ac197fa6a 1087 {
mbed_official 330:c80ac197fa6a 1088 /* Disable TXE and ERR interrupt */
mbed_official 330:c80ac197fa6a 1089 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
mbed_official 330:c80ac197fa6a 1090
mbed_official 330:c80ac197fa6a 1091 if(hi2s->RxXferCount == 0)
mbed_official 330:c80ac197fa6a 1092 {
mbed_official 330:c80ac197fa6a 1093 /* Disable I2Sext RXNE and ERR interrupt */
mbed_official 330:c80ac197fa6a 1094 __HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_RXNE| I2S_IT_ERR));
mbed_official 330:c80ac197fa6a 1095
mbed_official 330:c80ac197fa6a 1096 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 330:c80ac197fa6a 1097 HAL_I2S_TxRxCpltCallback(hi2s);
mbed_official 330:c80ac197fa6a 1098 }
mbed_official 330:c80ac197fa6a 1099 }
mbed_official 330:c80ac197fa6a 1100 }
mbed_official 330:c80ac197fa6a 1101 }
mbed_official 330:c80ac197fa6a 1102 /* Enable I2Sext(receiver) before enabling I2Sx peripheral */
mbed_official 330:c80ac197fa6a 1103 __HAL_I2SEXT_ENABLE(hi2s);
mbed_official 330:c80ac197fa6a 1104
mbed_official 330:c80ac197fa6a 1105 /* Enable I2Sx peripheral */
mbed_official 330:c80ac197fa6a 1106 __HAL_I2S_ENABLE(hi2s);
mbed_official 330:c80ac197fa6a 1107 }
mbed_official 330:c80ac197fa6a 1108 }
mbed_official 330:c80ac197fa6a 1109 /* The I2S_MODE_MASTER_RX or I2S_MODE_SLAVE_RX Mode is selected */
mbed_official 330:c80ac197fa6a 1110 else
mbed_official 330:c80ac197fa6a 1111 {
mbed_official 330:c80ac197fa6a 1112 /* Enable I2Sext TXE and ERR interrupts */
mbed_official 330:c80ac197fa6a 1113 __HAL_I2SEXT_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
mbed_official 330:c80ac197fa6a 1114
mbed_official 330:c80ac197fa6a 1115 /* Enable I2Sext RXNE and ERR interrupts */
mbed_official 330:c80ac197fa6a 1116 __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
mbed_official 330:c80ac197fa6a 1117
mbed_official 330:c80ac197fa6a 1118 /* Check if the I2S is already enabled */
mbed_official 330:c80ac197fa6a 1119 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official 330:c80ac197fa6a 1120 {
mbed_official 330:c80ac197fa6a 1121 /* Prepare the First Data before enabling the I2S */
mbed_official 330:c80ac197fa6a 1122 if(hi2s->TxXferCount != 0)
mbed_official 330:c80ac197fa6a 1123 {
mbed_official 330:c80ac197fa6a 1124 /* Transmit First data */
mbed_official 330:c80ac197fa6a 1125 I2SxEXT(hi2s->Instance)->DR = (*hi2s->pTxBuffPtr++);
mbed_official 330:c80ac197fa6a 1126 hi2s->TxXferCount--;
mbed_official 330:c80ac197fa6a 1127
mbed_official 330:c80ac197fa6a 1128 if(hi2s->TxXferCount == 0)
mbed_official 330:c80ac197fa6a 1129 {
mbed_official 330:c80ac197fa6a 1130 /* Disable I2Sext TXE and ERR interrupt */
mbed_official 330:c80ac197fa6a 1131 __HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
mbed_official 330:c80ac197fa6a 1132
mbed_official 330:c80ac197fa6a 1133 if(hi2s->RxXferCount == 0)
mbed_official 330:c80ac197fa6a 1134 {
mbed_official 330:c80ac197fa6a 1135 /* Disable RXNE and ERR interrupt */
mbed_official 330:c80ac197fa6a 1136 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE| I2S_IT_ERR));
mbed_official 330:c80ac197fa6a 1137
mbed_official 330:c80ac197fa6a 1138 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 330:c80ac197fa6a 1139 HAL_I2S_TxRxCpltCallback(hi2s);
mbed_official 330:c80ac197fa6a 1140 }
mbed_official 330:c80ac197fa6a 1141 }
mbed_official 330:c80ac197fa6a 1142 }
mbed_official 330:c80ac197fa6a 1143 /* Enable I2Sext(transmitter) after enabling I2Sx peripheral */
mbed_official 330:c80ac197fa6a 1144 __HAL_I2SEXT_ENABLE(hi2s);
mbed_official 330:c80ac197fa6a 1145
mbed_official 330:c80ac197fa6a 1146 /* Enable I2S peripheral */
mbed_official 330:c80ac197fa6a 1147 __HAL_I2S_ENABLE(hi2s);
mbed_official 330:c80ac197fa6a 1148 }
mbed_official 330:c80ac197fa6a 1149 }
mbed_official 330:c80ac197fa6a 1150 /* Process Unlocked */
mbed_official 330:c80ac197fa6a 1151 __HAL_UNLOCK(hi2s);
mbed_official 330:c80ac197fa6a 1152
mbed_official 330:c80ac197fa6a 1153 return HAL_OK;
mbed_official 330:c80ac197fa6a 1154 }
mbed_official 330:c80ac197fa6a 1155 else
mbed_official 330:c80ac197fa6a 1156 {
mbed_official 330:c80ac197fa6a 1157 return HAL_BUSY;
mbed_official 330:c80ac197fa6a 1158 }
mbed_official 330:c80ac197fa6a 1159 }
mbed_official 330:c80ac197fa6a 1160
mbed_official 330:c80ac197fa6a 1161 /**
mbed_official 330:c80ac197fa6a 1162 * @brief Full-Duplex Transmit/Receive data in non-blocking mode using DMA
mbed_official 330:c80ac197fa6a 1163 * @param hi2s: I2S handle
mbed_official 330:c80ac197fa6a 1164 * @param pTxData: a 16-bit pointer to the Transmit data buffer.
mbed_official 330:c80ac197fa6a 1165 * @param pRxData: a 16-bit pointer to the Receive data buffer.
mbed_official 330:c80ac197fa6a 1166 * @param Size: number of data sample to be sent:
mbed_official 330:c80ac197fa6a 1167 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
mbed_official 330:c80ac197fa6a 1168 * configuration phase, the Size parameter means the number of 16-bit data length
mbed_official 330:c80ac197fa6a 1169 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
mbed_official 330:c80ac197fa6a 1170 * the Size parameter means the number of 16-bit data length.
mbed_official 330:c80ac197fa6a 1171 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
mbed_official 330:c80ac197fa6a 1172 * between Master and Slave(example: audio streaming).
mbed_official 330:c80ac197fa6a 1173 * @retval HAL status
mbed_official 330:c80ac197fa6a 1174 */
mbed_official 330:c80ac197fa6a 1175 HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData, uint16_t Size)
mbed_official 330:c80ac197fa6a 1176 {
mbed_official 330:c80ac197fa6a 1177 uint32_t *tmp;
mbed_official 330:c80ac197fa6a 1178
mbed_official 632:7687fb9c4f91 1179 if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
mbed_official 330:c80ac197fa6a 1180 {
mbed_official 330:c80ac197fa6a 1181 return HAL_ERROR;
mbed_official 330:c80ac197fa6a 1182 }
mbed_official 330:c80ac197fa6a 1183
mbed_official 330:c80ac197fa6a 1184 if(hi2s->State == HAL_I2S_STATE_READY)
mbed_official 330:c80ac197fa6a 1185 {
mbed_official 330:c80ac197fa6a 1186 hi2s->pTxBuffPtr = pTxData;
mbed_official 330:c80ac197fa6a 1187 hi2s->pRxBuffPtr = pRxData;
mbed_official 330:c80ac197fa6a 1188
mbed_official 330:c80ac197fa6a 1189 /* Check the Data format: When a 16-bit data frame or a 16-bit data frame extended
mbed_official 330:c80ac197fa6a 1190 is selected during the I2S configuration phase, the Size parameter means the number
mbed_official 330:c80ac197fa6a 1191 of 16-bit data length in the transaction and when a 24-bit data frame or a 32-bit data
mbed_official 330:c80ac197fa6a 1192 frame is selected the Size parameter means the number of 16-bit data length. */
mbed_official 330:c80ac197fa6a 1193 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
mbed_official 330:c80ac197fa6a 1194 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
mbed_official 330:c80ac197fa6a 1195 {
mbed_official 330:c80ac197fa6a 1196 hi2s->TxXferSize = (Size << 1);
mbed_official 330:c80ac197fa6a 1197 hi2s->TxXferCount = (Size << 1);
mbed_official 330:c80ac197fa6a 1198 hi2s->RxXferSize = (Size << 1);
mbed_official 330:c80ac197fa6a 1199 hi2s->RxXferCount = (Size << 1);
mbed_official 330:c80ac197fa6a 1200 }
mbed_official 330:c80ac197fa6a 1201 else
mbed_official 330:c80ac197fa6a 1202 {
mbed_official 330:c80ac197fa6a 1203 hi2s->TxXferSize = Size;
mbed_official 330:c80ac197fa6a 1204 hi2s->TxXferCount = Size;
mbed_official 330:c80ac197fa6a 1205 hi2s->RxXferSize = Size;
mbed_official 330:c80ac197fa6a 1206 hi2s->RxXferCount = Size;
mbed_official 330:c80ac197fa6a 1207 }
mbed_official 330:c80ac197fa6a 1208
mbed_official 330:c80ac197fa6a 1209 /* Process Locked */
mbed_official 330:c80ac197fa6a 1210 __HAL_LOCK(hi2s);
mbed_official 330:c80ac197fa6a 1211
mbed_official 330:c80ac197fa6a 1212 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official 330:c80ac197fa6a 1213 hi2s->State = HAL_I2S_STATE_BUSY_TX_RX;
mbed_official 330:c80ac197fa6a 1214
mbed_official 330:c80ac197fa6a 1215 /* Set the I2S Rx DMA transfer complete callback */
mbed_official 330:c80ac197fa6a 1216 hi2s->hdmarx->XferCpltCallback = I2S_TxRxDMACplt;
mbed_official 330:c80ac197fa6a 1217
mbed_official 330:c80ac197fa6a 1218 /* Set the DMA error callback */
mbed_official 330:c80ac197fa6a 1219 hi2s->hdmarx->XferErrorCallback = I2S_TxRxDMAError;
mbed_official 330:c80ac197fa6a 1220
mbed_official 330:c80ac197fa6a 1221 /* Set the I2S Tx DMA transfer complete callback */
mbed_official 330:c80ac197fa6a 1222 hi2s->hdmatx->XferCpltCallback = I2S_TxRxDMACplt;
mbed_official 330:c80ac197fa6a 1223
mbed_official 330:c80ac197fa6a 1224 /* Set the DMA error callback */
mbed_official 330:c80ac197fa6a 1225 hi2s->hdmatx->XferErrorCallback = I2S_TxRxDMAError;
mbed_official 330:c80ac197fa6a 1226
mbed_official 330:c80ac197fa6a 1227 /* Check if the I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX Mode is selected */
mbed_official 330:c80ac197fa6a 1228 if(((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_TX) || ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX))
mbed_official 330:c80ac197fa6a 1229 {
mbed_official 330:c80ac197fa6a 1230 /* Enable the Rx DMA Channel */
mbed_official 330:c80ac197fa6a 1231 tmp = (uint32_t*)&pRxData;
mbed_official 330:c80ac197fa6a 1232 HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&I2SxEXT(hi2s->Instance)->DR, *(uint32_t*)tmp, hi2s->RxXferSize);
mbed_official 330:c80ac197fa6a 1233
mbed_official 330:c80ac197fa6a 1234 /* Enable Rx DMA Request */
mbed_official 330:c80ac197fa6a 1235 I2SxEXT(hi2s->Instance)->CR2 |= SPI_CR2_RXDMAEN;
mbed_official 330:c80ac197fa6a 1236
mbed_official 330:c80ac197fa6a 1237 /* Enable the Tx DMA Channel */
mbed_official 330:c80ac197fa6a 1238 tmp = (uint32_t*)&pTxData;
mbed_official 330:c80ac197fa6a 1239 HAL_DMA_Start_IT(hi2s->hdmatx, *(uint32_t*)tmp, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize);
mbed_official 330:c80ac197fa6a 1240
mbed_official 330:c80ac197fa6a 1241 /* Enable Tx DMA Request */
mbed_official 330:c80ac197fa6a 1242 hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN;
mbed_official 330:c80ac197fa6a 1243
mbed_official 330:c80ac197fa6a 1244 /* Check if the I2S is already enabled */
mbed_official 330:c80ac197fa6a 1245 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official 330:c80ac197fa6a 1246 {
mbed_official 330:c80ac197fa6a 1247 /* Enable I2Sext(receiver) before enabling I2Sx peripheral */
mbed_official 330:c80ac197fa6a 1248 __HAL_I2SEXT_ENABLE(hi2s);
mbed_official 330:c80ac197fa6a 1249
mbed_official 330:c80ac197fa6a 1250 /* Enable I2S peripheral after the I2Sext*/
mbed_official 330:c80ac197fa6a 1251 __HAL_I2S_ENABLE(hi2s);
mbed_official 330:c80ac197fa6a 1252 }
mbed_official 330:c80ac197fa6a 1253 }
mbed_official 330:c80ac197fa6a 1254 else
mbed_official 330:c80ac197fa6a 1255 {
mbed_official 330:c80ac197fa6a 1256 /* Check if Master Receiver mode is selected */
mbed_official 330:c80ac197fa6a 1257 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
mbed_official 330:c80ac197fa6a 1258 {
mbed_official 330:c80ac197fa6a 1259 /* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read
mbed_official 330:c80ac197fa6a 1260 access to the SPI_SR register. */
mbed_official 330:c80ac197fa6a 1261 __HAL_I2S_CLEAR_OVRFLAG(hi2s);
mbed_official 330:c80ac197fa6a 1262 }
mbed_official 330:c80ac197fa6a 1263
mbed_official 330:c80ac197fa6a 1264 /* Enable the Tx DMA Channel */
mbed_official 330:c80ac197fa6a 1265 tmp = (uint32_t*)&pTxData;
mbed_official 330:c80ac197fa6a 1266 HAL_DMA_Start_IT(hi2s->hdmatx, *(uint32_t*)tmp, (uint32_t)&I2SxEXT(hi2s->Instance)->DR, hi2s->TxXferSize);
mbed_official 330:c80ac197fa6a 1267
mbed_official 330:c80ac197fa6a 1268 /* Enable Tx DMA Request */
mbed_official 330:c80ac197fa6a 1269 I2SxEXT(hi2s->Instance)->CR2 |= SPI_CR2_TXDMAEN;
mbed_official 330:c80ac197fa6a 1270
mbed_official 330:c80ac197fa6a 1271 /* Enable the Rx DMA Channel */
mbed_official 330:c80ac197fa6a 1272 tmp = (uint32_t*)&pRxData;
mbed_official 330:c80ac197fa6a 1273 HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, *(uint32_t*)tmp, hi2s->RxXferSize);
mbed_official 330:c80ac197fa6a 1274
mbed_official 330:c80ac197fa6a 1275 /* Enable Rx DMA Request */
mbed_official 330:c80ac197fa6a 1276 hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN;
mbed_official 330:c80ac197fa6a 1277
mbed_official 330:c80ac197fa6a 1278 /* Check if the I2S is already enabled */
mbed_official 330:c80ac197fa6a 1279 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official 330:c80ac197fa6a 1280 {
mbed_official 330:c80ac197fa6a 1281 /* Enable I2Sext(transmitter) before enabling I2Sx peripheral */
mbed_official 330:c80ac197fa6a 1282 __HAL_I2SEXT_ENABLE(hi2s);
mbed_official 330:c80ac197fa6a 1283
mbed_official 330:c80ac197fa6a 1284 /* Enable I2S peripheral after the I2Sext*/
mbed_official 330:c80ac197fa6a 1285 __HAL_I2S_ENABLE(hi2s);
mbed_official 330:c80ac197fa6a 1286 }
mbed_official 330:c80ac197fa6a 1287 }
mbed_official 330:c80ac197fa6a 1288
mbed_official 330:c80ac197fa6a 1289 /* Process Unlocked */
mbed_official 330:c80ac197fa6a 1290 __HAL_UNLOCK(hi2s);
mbed_official 330:c80ac197fa6a 1291
mbed_official 330:c80ac197fa6a 1292 return HAL_OK;
mbed_official 330:c80ac197fa6a 1293 }
mbed_official 330:c80ac197fa6a 1294 else
mbed_official 330:c80ac197fa6a 1295 {
mbed_official 330:c80ac197fa6a 1296 return HAL_BUSY;
mbed_official 330:c80ac197fa6a 1297 }
mbed_official 330:c80ac197fa6a 1298 }
mbed_official 330:c80ac197fa6a 1299
mbed_official 330:c80ac197fa6a 1300 /**
mbed_official 330:c80ac197fa6a 1301 * @}
mbed_official 330:c80ac197fa6a 1302 */
mbed_official 330:c80ac197fa6a 1303
mbed_official 330:c80ac197fa6a 1304 /**
mbed_official 330:c80ac197fa6a 1305 * @}
mbed_official 330:c80ac197fa6a 1306 */
mbed_official 330:c80ac197fa6a 1307
mbed_official 330:c80ac197fa6a 1308 /** @addtogroup I2SEx_Private_Functions I2S Extended Private Functions
mbed_official 330:c80ac197fa6a 1309 * @{
mbed_official 330:c80ac197fa6a 1310 */
mbed_official 330:c80ac197fa6a 1311
mbed_official 330:c80ac197fa6a 1312 /**
mbed_official 330:c80ac197fa6a 1313 * @brief DMA I2S transmit receive process complete callback
mbed_official 330:c80ac197fa6a 1314 * @param hdma: DMA handle
mbed_official 330:c80ac197fa6a 1315 * @retval None
mbed_official 330:c80ac197fa6a 1316 */
mbed_official 330:c80ac197fa6a 1317 static void I2S_TxRxDMACplt(DMA_HandleTypeDef *hdma)
mbed_official 330:c80ac197fa6a 1318 {
mbed_official 330:c80ac197fa6a 1319 I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 330:c80ac197fa6a 1320
mbed_official 330:c80ac197fa6a 1321 if (hi2s->hdmarx == hdma)
mbed_official 330:c80ac197fa6a 1322 {
mbed_official 330:c80ac197fa6a 1323 /* Disable Rx DMA Request */
mbed_official 330:c80ac197fa6a 1324 if(((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_TX) || ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX))
mbed_official 330:c80ac197fa6a 1325 {
mbed_official 330:c80ac197fa6a 1326 I2SxEXT(hi2s->Instance)->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
mbed_official 330:c80ac197fa6a 1327 }
mbed_official 330:c80ac197fa6a 1328 else
mbed_official 330:c80ac197fa6a 1329 {
mbed_official 330:c80ac197fa6a 1330 hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
mbed_official 330:c80ac197fa6a 1331 }
mbed_official 330:c80ac197fa6a 1332
mbed_official 330:c80ac197fa6a 1333 hi2s->RxXferCount = 0;
mbed_official 330:c80ac197fa6a 1334
mbed_official 330:c80ac197fa6a 1335 if (hi2s->TxXferCount == 0)
mbed_official 330:c80ac197fa6a 1336 {
mbed_official 330:c80ac197fa6a 1337 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 330:c80ac197fa6a 1338
mbed_official 330:c80ac197fa6a 1339 HAL_I2S_TxRxCpltCallback(hi2s);
mbed_official 330:c80ac197fa6a 1340 }
mbed_official 330:c80ac197fa6a 1341 }
mbed_official 330:c80ac197fa6a 1342
mbed_official 330:c80ac197fa6a 1343 if (hi2s->hdmatx == hdma)
mbed_official 330:c80ac197fa6a 1344 {
mbed_official 330:c80ac197fa6a 1345 /* Disable Tx DMA Request */
mbed_official 330:c80ac197fa6a 1346 if(((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_TX) || ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX))
mbed_official 330:c80ac197fa6a 1347 {
mbed_official 330:c80ac197fa6a 1348 hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
mbed_official 330:c80ac197fa6a 1349 }
mbed_official 330:c80ac197fa6a 1350 else
mbed_official 330:c80ac197fa6a 1351 {
mbed_official 330:c80ac197fa6a 1352 I2SxEXT(hi2s->Instance)->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
mbed_official 330:c80ac197fa6a 1353 }
mbed_official 330:c80ac197fa6a 1354
mbed_official 330:c80ac197fa6a 1355 hi2s->TxXferCount = 0;
mbed_official 330:c80ac197fa6a 1356
mbed_official 330:c80ac197fa6a 1357 if (hi2s->RxXferCount == 0)
mbed_official 330:c80ac197fa6a 1358 {
mbed_official 330:c80ac197fa6a 1359 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 330:c80ac197fa6a 1360
mbed_official 330:c80ac197fa6a 1361 HAL_I2S_TxRxCpltCallback(hi2s);
mbed_official 330:c80ac197fa6a 1362 }
mbed_official 330:c80ac197fa6a 1363 }
mbed_official 330:c80ac197fa6a 1364 }
mbed_official 330:c80ac197fa6a 1365
mbed_official 330:c80ac197fa6a 1366 /**
mbed_official 330:c80ac197fa6a 1367 * @brief DMA I2S communication error callback
mbed_official 330:c80ac197fa6a 1368 * @param hdma : DMA handle
mbed_official 330:c80ac197fa6a 1369 * @retval None
mbed_official 330:c80ac197fa6a 1370 */
mbed_official 330:c80ac197fa6a 1371 static void I2S_TxRxDMAError(DMA_HandleTypeDef *hdma)
mbed_official 330:c80ac197fa6a 1372 {
mbed_official 330:c80ac197fa6a 1373 I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 330:c80ac197fa6a 1374
mbed_official 330:c80ac197fa6a 1375 /* Disable Rx and Tx DMA Request */
mbed_official 330:c80ac197fa6a 1376 hi2s->Instance->CR2 &= (uint32_t)(~(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN));
mbed_official 330:c80ac197fa6a 1377 I2SxEXT(hi2s->Instance)->CR2 &= (uint32_t)(~(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN));
mbed_official 330:c80ac197fa6a 1378
mbed_official 330:c80ac197fa6a 1379 hi2s->TxXferCount = 0;
mbed_official 330:c80ac197fa6a 1380 hi2s->RxXferCount = 0;
mbed_official 330:c80ac197fa6a 1381
mbed_official 330:c80ac197fa6a 1382 hi2s->State= HAL_I2S_STATE_READY;
mbed_official 330:c80ac197fa6a 1383
mbed_official 330:c80ac197fa6a 1384 /* Set the error code and execute error callback*/
mbed_official 330:c80ac197fa6a 1385 hi2s->ErrorCode |= HAL_I2S_ERROR_DMA;
mbed_official 330:c80ac197fa6a 1386 HAL_I2S_ErrorCallback(hi2s);
mbed_official 330:c80ac197fa6a 1387 }
mbed_official 330:c80ac197fa6a 1388
mbed_official 330:c80ac197fa6a 1389 /**
mbed_official 330:c80ac197fa6a 1390 * @brief Full-Duplex IT handler transmit function
mbed_official 330:c80ac197fa6a 1391 * @param hi2s: I2S handle
mbed_official 330:c80ac197fa6a 1392 * @param i2sUsed: indicate if I2Sx or I2Sx_ext is concerned
mbed_official 330:c80ac197fa6a 1393 * @retval None
mbed_official 330:c80ac197fa6a 1394 */
mbed_official 330:c80ac197fa6a 1395 static void I2S_FullDuplexTx_IT(I2S_HandleTypeDef *hi2s, I2S_UseTypeDef i2sUsed)
mbed_official 330:c80ac197fa6a 1396 {
mbed_official 330:c80ac197fa6a 1397 if(i2sUsed == I2S_USE_I2S)
mbed_official 330:c80ac197fa6a 1398 {
mbed_official 330:c80ac197fa6a 1399 /* Transmit data */
mbed_official 330:c80ac197fa6a 1400 hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
mbed_official 330:c80ac197fa6a 1401 hi2s->TxXferCount--;
mbed_official 330:c80ac197fa6a 1402
mbed_official 330:c80ac197fa6a 1403 if(hi2s->TxXferCount == 0)
mbed_official 330:c80ac197fa6a 1404 {
mbed_official 330:c80ac197fa6a 1405 /* Disable TXE and ERR interrupt */
mbed_official 330:c80ac197fa6a 1406 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
mbed_official 330:c80ac197fa6a 1407
mbed_official 330:c80ac197fa6a 1408 if(hi2s->RxXferCount == 0)
mbed_official 330:c80ac197fa6a 1409 {
mbed_official 330:c80ac197fa6a 1410 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 330:c80ac197fa6a 1411 HAL_I2S_TxRxCpltCallback(hi2s);
mbed_official 330:c80ac197fa6a 1412 }
mbed_official 330:c80ac197fa6a 1413 }
mbed_official 330:c80ac197fa6a 1414 }
mbed_official 330:c80ac197fa6a 1415 else
mbed_official 330:c80ac197fa6a 1416 {
mbed_official 330:c80ac197fa6a 1417 /* Transmit data */
mbed_official 330:c80ac197fa6a 1418 I2SxEXT(hi2s->Instance)->DR = (*hi2s->pTxBuffPtr++);
mbed_official 330:c80ac197fa6a 1419 hi2s->TxXferCount--;
mbed_official 330:c80ac197fa6a 1420
mbed_official 330:c80ac197fa6a 1421 if(hi2s->TxXferCount == 0)
mbed_official 330:c80ac197fa6a 1422 {
mbed_official 330:c80ac197fa6a 1423 /* Disable I2Sext TXE and ERR interrupt */
mbed_official 330:c80ac197fa6a 1424 __HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
mbed_official 330:c80ac197fa6a 1425
mbed_official 330:c80ac197fa6a 1426 if(hi2s->RxXferCount == 0)
mbed_official 330:c80ac197fa6a 1427 {
mbed_official 330:c80ac197fa6a 1428 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 330:c80ac197fa6a 1429 HAL_I2S_TxRxCpltCallback(hi2s);
mbed_official 330:c80ac197fa6a 1430 }
mbed_official 330:c80ac197fa6a 1431 }
mbed_official 330:c80ac197fa6a 1432 }
mbed_official 330:c80ac197fa6a 1433 }
mbed_official 330:c80ac197fa6a 1434
mbed_official 330:c80ac197fa6a 1435 /**
mbed_official 330:c80ac197fa6a 1436 * @brief Full-Duplex IT handler receive function
mbed_official 330:c80ac197fa6a 1437 * @param hi2s: I2S handle
mbed_official 330:c80ac197fa6a 1438 * @param i2sUsed: indicate if I2Sx or I2Sx_ext is concerned
mbed_official 330:c80ac197fa6a 1439 * @retval None
mbed_official 330:c80ac197fa6a 1440 */
mbed_official 330:c80ac197fa6a 1441 static void I2S_FullDuplexRx_IT(I2S_HandleTypeDef *hi2s, I2S_UseTypeDef i2sUsed)
mbed_official 330:c80ac197fa6a 1442 {
mbed_official 330:c80ac197fa6a 1443 if(i2sUsed == I2S_USE_I2S)
mbed_official 330:c80ac197fa6a 1444 {
mbed_official 330:c80ac197fa6a 1445 /* Receive data */
mbed_official 330:c80ac197fa6a 1446 (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
mbed_official 330:c80ac197fa6a 1447 hi2s->RxXferCount--;
mbed_official 330:c80ac197fa6a 1448
mbed_official 330:c80ac197fa6a 1449 if(hi2s->RxXferCount == 0)
mbed_official 330:c80ac197fa6a 1450 {
mbed_official 330:c80ac197fa6a 1451 /* Disable RXNE and ERR interrupt */
mbed_official 330:c80ac197fa6a 1452 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
mbed_official 330:c80ac197fa6a 1453
mbed_official 330:c80ac197fa6a 1454 if(hi2s->TxXferCount == 0)
mbed_official 330:c80ac197fa6a 1455 {
mbed_official 330:c80ac197fa6a 1456 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 330:c80ac197fa6a 1457 HAL_I2S_TxRxCpltCallback(hi2s);
mbed_official 330:c80ac197fa6a 1458 }
mbed_official 330:c80ac197fa6a 1459 }
mbed_official 330:c80ac197fa6a 1460 }
mbed_official 330:c80ac197fa6a 1461 else
mbed_official 330:c80ac197fa6a 1462 {
mbed_official 330:c80ac197fa6a 1463 /* Receive data */
mbed_official 330:c80ac197fa6a 1464 (*hi2s->pRxBuffPtr++) = I2SxEXT(hi2s->Instance)->DR;
mbed_official 330:c80ac197fa6a 1465 hi2s->RxXferCount--;
mbed_official 330:c80ac197fa6a 1466
mbed_official 330:c80ac197fa6a 1467 if(hi2s->RxXferCount == 0)
mbed_official 330:c80ac197fa6a 1468 {
mbed_official 330:c80ac197fa6a 1469 /* Disable I2Sext RXNE and ERR interrupt */
mbed_official 330:c80ac197fa6a 1470 __HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
mbed_official 330:c80ac197fa6a 1471
mbed_official 330:c80ac197fa6a 1472 if(hi2s->TxXferCount == 0)
mbed_official 330:c80ac197fa6a 1473 {
mbed_official 330:c80ac197fa6a 1474 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 330:c80ac197fa6a 1475 HAL_I2S_TxRxCpltCallback(hi2s);
mbed_official 330:c80ac197fa6a 1476 }
mbed_official 330:c80ac197fa6a 1477 }
mbed_official 330:c80ac197fa6a 1478 }
mbed_official 330:c80ac197fa6a 1479 }
mbed_official 330:c80ac197fa6a 1480
mbed_official 330:c80ac197fa6a 1481 /**
mbed_official 330:c80ac197fa6a 1482 * @brief This function handles I2S Communication Timeout.
mbed_official 330:c80ac197fa6a 1483 * @param hi2s: I2S handle
mbed_official 330:c80ac197fa6a 1484 * @param Flag: Flag checked
mbed_official 330:c80ac197fa6a 1485 * @param State: Value of the flag expected
mbed_official 330:c80ac197fa6a 1486 * @param Timeout: Duration of the timeout
mbed_official 330:c80ac197fa6a 1487 * @param i2sUsed: I2S instance reference
mbed_official 330:c80ac197fa6a 1488 * @retval HAL status
mbed_official 330:c80ac197fa6a 1489 */
mbed_official 330:c80ac197fa6a 1490 static HAL_StatusTypeDef I2S_FullDuplexWaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag,
mbed_official 330:c80ac197fa6a 1491 uint32_t State, uint32_t Timeout, I2S_UseTypeDef i2sUsed)
mbed_official 330:c80ac197fa6a 1492 {
mbed_official 330:c80ac197fa6a 1493 uint32_t tickstart = HAL_GetTick();
mbed_official 330:c80ac197fa6a 1494
mbed_official 330:c80ac197fa6a 1495 if(i2sUsed == I2S_USE_I2S)
mbed_official 330:c80ac197fa6a 1496 {
mbed_official 330:c80ac197fa6a 1497 while((__HAL_I2S_GET_FLAG(hi2s, Flag)) != State)
mbed_official 330:c80ac197fa6a 1498 {
mbed_official 330:c80ac197fa6a 1499 if(Timeout != HAL_MAX_DELAY)
mbed_official 330:c80ac197fa6a 1500 {
mbed_official 330:c80ac197fa6a 1501 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
mbed_official 330:c80ac197fa6a 1502 {
mbed_official 330:c80ac197fa6a 1503 /* Set the I2S State ready */
mbed_official 330:c80ac197fa6a 1504 hi2s->State= HAL_I2S_STATE_READY;
mbed_official 330:c80ac197fa6a 1505
mbed_official 330:c80ac197fa6a 1506 /* Process Unlocked */
mbed_official 330:c80ac197fa6a 1507 __HAL_UNLOCK(hi2s);
mbed_official 330:c80ac197fa6a 1508
mbed_official 330:c80ac197fa6a 1509 return HAL_TIMEOUT;
mbed_official 330:c80ac197fa6a 1510 }
mbed_official 330:c80ac197fa6a 1511 }
mbed_official 330:c80ac197fa6a 1512 }
mbed_official 330:c80ac197fa6a 1513 }
mbed_official 330:c80ac197fa6a 1514 else
mbed_official 330:c80ac197fa6a 1515 {
mbed_official 330:c80ac197fa6a 1516 while((__HAL_I2SEXT_GET_FLAG(hi2s, Flag)) != State)
mbed_official 330:c80ac197fa6a 1517 {
mbed_official 330:c80ac197fa6a 1518 if(Timeout != HAL_MAX_DELAY)
mbed_official 330:c80ac197fa6a 1519 {
mbed_official 330:c80ac197fa6a 1520 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
mbed_official 330:c80ac197fa6a 1521 {
mbed_official 330:c80ac197fa6a 1522 /* Set the I2S State ready */
mbed_official 330:c80ac197fa6a 1523 hi2s->State= HAL_I2S_STATE_READY;
mbed_official 330:c80ac197fa6a 1524
mbed_official 330:c80ac197fa6a 1525 /* Process Unlocked */
mbed_official 330:c80ac197fa6a 1526 __HAL_UNLOCK(hi2s);
mbed_official 330:c80ac197fa6a 1527
mbed_official 330:c80ac197fa6a 1528 return HAL_TIMEOUT;
mbed_official 330:c80ac197fa6a 1529 }
mbed_official 330:c80ac197fa6a 1530 }
mbed_official 330:c80ac197fa6a 1531 }
mbed_official 330:c80ac197fa6a 1532 }
mbed_official 330:c80ac197fa6a 1533
mbed_official 330:c80ac197fa6a 1534 return HAL_OK;
mbed_official 330:c80ac197fa6a 1535 }
mbed_official 330:c80ac197fa6a 1536 /**
mbed_official 330:c80ac197fa6a 1537 * @}
mbed_official 330:c80ac197fa6a 1538 */
mbed_official 330:c80ac197fa6a 1539
mbed_official 330:c80ac197fa6a 1540 /**
mbed_official 330:c80ac197fa6a 1541 * @}
mbed_official 330:c80ac197fa6a 1542 */
mbed_official 330:c80ac197fa6a 1543 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
mbed_official 330:c80ac197fa6a 1544 /* STM32F302xC || STM32F303xC || STM32F358xx */
mbed_official 330:c80ac197fa6a 1545
mbed_official 330:c80ac197fa6a 1546 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
mbed_official 330:c80ac197fa6a 1547 /* STM32F302xC || STM32F303xC || STM32F358xx || */
mbed_official 330:c80ac197fa6a 1548 /* STM32F301x8 || STM32F302x8 || STM32F318xx || */
mbed_official 330:c80ac197fa6a 1549 /* STM32F373xC || STM32F378xx */
mbed_official 330:c80ac197fa6a 1550
mbed_official 330:c80ac197fa6a 1551 #endif /* HAL_I2S_MODULE_ENABLED */
mbed_official 330:c80ac197fa6a 1552
mbed_official 330:c80ac197fa6a 1553 /**
mbed_official 330:c80ac197fa6a 1554 * @}
mbed_official 330:c80ac197fa6a 1555 */
mbed_official 330:c80ac197fa6a 1556
mbed_official 330:c80ac197fa6a 1557 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/