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mbed library sources

Dependents:   Encrypted my_mbed lklk CyaSSL_DTLS_Cellular ... more

Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

Import librarymbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

targets/hal/TARGET_ARM_SSG/TARGET_MPS2/SDK/ETH_MPS2.c@580:3c14cb9b87c5, 2015-07-02 (annotated)

Committer:
mbed_official
Date:
Thu Jul 02 16:15:09 2015 +0100
Revision:
580:3c14cb9b87c5
Synchronized with git revision 213caf296f26963a7bea129b8ec4f33bbd1e6588



Full URL: https://github.com/mbedmicro/mbed/commit/213caf296f26963a7bea129b8ec4f33bbd1e6588/



commit of mps2

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 580:3c14cb9b87c5 1 /* MPS2 Peripheral Library
mbed_official 580:3c14cb9b87c5 2 *
mbed_official 580:3c14cb9b87c5 3 * Copyright (c) 2006-2015 ARM Limited
mbed_official 580:3c14cb9b87c5 4 * All rights reserved.
mbed_official 580:3c14cb9b87c5 5 *
mbed_official 580:3c14cb9b87c5 6 * Redistribution and use in source and binary forms, with or without
mbed_official 580:3c14cb9b87c5 7 * modification, are permitted provided that the following conditions are met:
mbed_official 580:3c14cb9b87c5 8 *
mbed_official 580:3c14cb9b87c5 9 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 580:3c14cb9b87c5 10 * this list of conditions and the following disclaimer.
mbed_official 580:3c14cb9b87c5 11 *
mbed_official 580:3c14cb9b87c5 12 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 580:3c14cb9b87c5 13 * this list of conditions and the following disclaimer in the documentation
mbed_official 580:3c14cb9b87c5 14 * and/or other materials provided with the distribution.
mbed_official 580:3c14cb9b87c5 15 *
mbed_official 580:3c14cb9b87c5 16 * 3. Neither the name of the copyright holder nor the names of its contributors
mbed_official 580:3c14cb9b87c5 17 * may be used to endorse or promote products derived from this software without
mbed_official 580:3c14cb9b87c5 18 * specific prior written permission.
mbed_official 580:3c14cb9b87c5 19 *
mbed_official 580:3c14cb9b87c5 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 580:3c14cb9b87c5 21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 580:3c14cb9b87c5 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
mbed_official 580:3c14cb9b87c5 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
mbed_official 580:3c14cb9b87c5 24 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
mbed_official 580:3c14cb9b87c5 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
mbed_official 580:3c14cb9b87c5 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
mbed_official 580:3c14cb9b87c5 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
mbed_official 580:3c14cb9b87c5 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
mbed_official 580:3c14cb9b87c5 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 580:3c14cb9b87c5 30 * POSSIBILITY OF SUCH DAMAGE.
mbed_official 580:3c14cb9b87c5 31 */
mbed_official 580:3c14cb9b87c5 32
mbed_official 580:3c14cb9b87c5 33 /*
mbed_official 580:3c14cb9b87c5 34 * Code implementation file for the LAN Ethernet interface.
mbed_official 580:3c14cb9b87c5 35 */
mbed_official 580:3c14cb9b87c5 36
mbed_official 580:3c14cb9b87c5 37 #include <stdio.h>
mbed_official 580:3c14cb9b87c5 38
mbed_official 580:3c14cb9b87c5 39 #include "ETH_MPS2.h"
mbed_official 580:3c14cb9b87c5 40 #include "fpga.h"
mbed_official 580:3c14cb9b87c5 41
mbed_official 580:3c14cb9b87c5 42 // SMSC9220 low-level operations
mbed_official 580:3c14cb9b87c5 43 unsigned int smsc9220_mac_regread(unsigned char regoffset, unsigned int *data)
mbed_official 580:3c14cb9b87c5 44 {
mbed_official 580:3c14cb9b87c5 45 unsigned int val, maccmd;
mbed_official 580:3c14cb9b87c5 46 int timedout;
mbed_official 580:3c14cb9b87c5 47 int error;
mbed_official 580:3c14cb9b87c5 48
mbed_official 580:3c14cb9b87c5 49 error = 0;
mbed_official 580:3c14cb9b87c5 50 val = SMSC9220->MAC_CSR_CMD;
mbed_official 580:3c14cb9b87c5 51 if(!(val & ((unsigned int)1 << 31))) { // Make sure there's no pending operation
mbed_official 580:3c14cb9b87c5 52 maccmd = 0;
mbed_official 580:3c14cb9b87c5 53 maccmd |= regoffset;
mbed_official 580:3c14cb9b87c5 54 maccmd |= ((unsigned int)1 << 30); // Indicates read
mbed_official 580:3c14cb9b87c5 55 maccmd |= ((unsigned int)1 << 31); // Start bit
mbed_official 580:3c14cb9b87c5 56 SMSC9220->MAC_CSR_CMD = maccmd; // Start operation
mbed_official 580:3c14cb9b87c5 57
mbed_official 580:3c14cb9b87c5 58 timedout = 50;
mbed_official 580:3c14cb9b87c5 59 do {
mbed_official 580:3c14cb9b87c5 60 val = SMSC9220->BYTE_TEST; // A no-op read.
mbed_official 580:3c14cb9b87c5 61 Sleepms(1);
mbed_official 580:3c14cb9b87c5 62 timedout--;
mbed_official 580:3c14cb9b87c5 63 } while(timedout && (SMSC9220->MAC_CSR_CMD & ((unsigned int)1 << 31)));
mbed_official 580:3c14cb9b87c5 64
mbed_official 580:3c14cb9b87c5 65 if(!timedout) {
mbed_official 580:3c14cb9b87c5 66 error = 1;
mbed_official 580:3c14cb9b87c5 67 }
mbed_official 580:3c14cb9b87c5 68 else
mbed_official 580:3c14cb9b87c5 69 *data = SMSC9220->MAC_CSR_DATA;
mbed_official 580:3c14cb9b87c5 70 } else {
mbed_official 580:3c14cb9b87c5 71 *data = 0;
mbed_official 580:3c14cb9b87c5 72 }
mbed_official 580:3c14cb9b87c5 73 return error;
mbed_official 580:3c14cb9b87c5 74 }
mbed_official 580:3c14cb9b87c5 75
mbed_official 580:3c14cb9b87c5 76 unsigned int smsc9220_mac_regwrite(unsigned char regoffset, unsigned int data)
mbed_official 580:3c14cb9b87c5 77 {
mbed_official 580:3c14cb9b87c5 78 unsigned int read, maccmd;
mbed_official 580:3c14cb9b87c5 79 int timedout;
mbed_official 580:3c14cb9b87c5 80 int error;
mbed_official 580:3c14cb9b87c5 81
mbed_official 580:3c14cb9b87c5 82 error = 0;
mbed_official 580:3c14cb9b87c5 83 read = SMSC9220->MAC_CSR_CMD;
mbed_official 580:3c14cb9b87c5 84 if(!(read & ((unsigned int)1 << 31))) { // Make sure there's no pending operation
mbed_official 580:3c14cb9b87c5 85 SMSC9220->MAC_CSR_DATA = data; // Store data.
mbed_official 580:3c14cb9b87c5 86 maccmd = 0;
mbed_official 580:3c14cb9b87c5 87 maccmd |= regoffset;
mbed_official 580:3c14cb9b87c5 88 maccmd &= ~((unsigned int)1 << 30); // Clear indicates write
mbed_official 580:3c14cb9b87c5 89 maccmd |= ((unsigned int)1 << 31); // Indicate start of operation
mbed_official 580:3c14cb9b87c5 90 SMSC9220->MAC_CSR_CMD = maccmd;
mbed_official 580:3c14cb9b87c5 91
mbed_official 580:3c14cb9b87c5 92 timedout = 50;
mbed_official 580:3c14cb9b87c5 93 do {
mbed_official 580:3c14cb9b87c5 94 read = SMSC9220->BYTE_TEST; // A no-op read.
mbed_official 580:3c14cb9b87c5 95 Sleepms(1);
mbed_official 580:3c14cb9b87c5 96 timedout--;
mbed_official 580:3c14cb9b87c5 97 } while(timedout && (SMSC9220->MAC_CSR_CMD & ((unsigned int)1 << 31)));
mbed_official 580:3c14cb9b87c5 98
mbed_official 580:3c14cb9b87c5 99 if(!timedout) {
mbed_official 580:3c14cb9b87c5 100 error = 1;
mbed_official 580:3c14cb9b87c5 101 }
mbed_official 580:3c14cb9b87c5 102 } else {
mbed_official 580:3c14cb9b87c5 103 printf("Warning: SMSC9220 MAC CSR is busy. No data written.\n");
mbed_official 580:3c14cb9b87c5 104 }
mbed_official 580:3c14cb9b87c5 105 return error;
mbed_official 580:3c14cb9b87c5 106 }
mbed_official 580:3c14cb9b87c5 107
mbed_official 580:3c14cb9b87c5 108 unsigned int smsc9220_phy_regread(unsigned char regoffset, unsigned short *data)
mbed_official 580:3c14cb9b87c5 109 {
mbed_official 580:3c14cb9b87c5 110 unsigned int val, phycmd; int error;
mbed_official 580:3c14cb9b87c5 111 int timedout;
mbed_official 580:3c14cb9b87c5 112
mbed_official 580:3c14cb9b87c5 113 error = 0;
mbed_official 580:3c14cb9b87c5 114
mbed_official 580:3c14cb9b87c5 115 smsc9220_mac_regread(SMSC9220_MAC_MII_ACC, &val);
mbed_official 580:3c14cb9b87c5 116
mbed_official 580:3c14cb9b87c5 117 if(!(val & 1)) { // Not busy
mbed_official 580:3c14cb9b87c5 118 phycmd = 0;
mbed_official 580:3c14cb9b87c5 119 phycmd |= (1 << 11); // 1 to [15:11]
mbed_official 580:3c14cb9b87c5 120 phycmd |= ((regoffset & 0x1F) << 6); // Put regoffset to [10:6]
mbed_official 580:3c14cb9b87c5 121 phycmd &= ~(1 << 1); // Clear [1] indicates read.
mbed_official 580:3c14cb9b87c5 122 phycmd |= (1 << 0); // Set [0] indicates operation start
mbed_official 580:3c14cb9b87c5 123
mbed_official 580:3c14cb9b87c5 124 smsc9220_mac_regwrite(SMSC9220_MAC_MII_ACC, phycmd);
mbed_official 580:3c14cb9b87c5 125
mbed_official 580:3c14cb9b87c5 126 val = 0;
mbed_official 580:3c14cb9b87c5 127 timedout = 50;
mbed_official 580:3c14cb9b87c5 128 do {
mbed_official 580:3c14cb9b87c5 129 Sleepms(1);
mbed_official 580:3c14cb9b87c5 130 timedout--;
mbed_official 580:3c14cb9b87c5 131 smsc9220_mac_regread(SMSC9220_MAC_MII_ACC,&val);
mbed_official 580:3c14cb9b87c5 132 } while(timedout && (val & ((unsigned int)1 << 0)));
mbed_official 580:3c14cb9b87c5 133
mbed_official 580:3c14cb9b87c5 134 if(!timedout) {
mbed_official 580:3c14cb9b87c5 135 error = 1;
mbed_official 580:3c14cb9b87c5 136 }
mbed_official 580:3c14cb9b87c5 137 else
mbed_official 580:3c14cb9b87c5 138 smsc9220_mac_regread(SMSC9220_MAC_MII_DATA, (unsigned int *)data);
mbed_official 580:3c14cb9b87c5 139
mbed_official 580:3c14cb9b87c5 140 } else {
mbed_official 580:3c14cb9b87c5 141 *data = 0;
mbed_official 580:3c14cb9b87c5 142 }
mbed_official 580:3c14cb9b87c5 143 return error;
mbed_official 580:3c14cb9b87c5 144 }
mbed_official 580:3c14cb9b87c5 145
mbed_official 580:3c14cb9b87c5 146 unsigned int smsc9220_phy_regwrite(unsigned char regoffset, unsigned short data)
mbed_official 580:3c14cb9b87c5 147 {
mbed_official 580:3c14cb9b87c5 148 unsigned int val, phycmd; int error;
mbed_official 580:3c14cb9b87c5 149 int timedout;
mbed_official 580:3c14cb9b87c5 150
mbed_official 580:3c14cb9b87c5 151 error = 0;
mbed_official 580:3c14cb9b87c5 152
mbed_official 580:3c14cb9b87c5 153 smsc9220_mac_regread(SMSC9220_MAC_MII_ACC, &val);
mbed_official 580:3c14cb9b87c5 154
mbed_official 580:3c14cb9b87c5 155 if(!(val & 1)) { // Not busy
mbed_official 580:3c14cb9b87c5 156 smsc9220_mac_regwrite(SMSC9220_MAC_MII_DATA, (data & 0xFFFF)); // Load the data
mbed_official 580:3c14cb9b87c5 157 phycmd = 0;
mbed_official 580:3c14cb9b87c5 158 phycmd |= (1 << 11); // 1 to [15:11]
mbed_official 580:3c14cb9b87c5 159 phycmd |= ((regoffset & 0x1F) << 6); // Put regoffset to [10:6]
mbed_official 580:3c14cb9b87c5 160 phycmd |= (1 << 1); // Set [1] indicates write.
mbed_official 580:3c14cb9b87c5 161 phycmd |= (1 << 0); // Set [0] indicates operation start
mbed_official 580:3c14cb9b87c5 162 smsc9220_mac_regwrite(SMSC9220_MAC_MII_ACC, phycmd); // Start operation
mbed_official 580:3c14cb9b87c5 163
mbed_official 580:3c14cb9b87c5 164 phycmd = 0;
mbed_official 580:3c14cb9b87c5 165 timedout = 50;
mbed_official 580:3c14cb9b87c5 166
mbed_official 580:3c14cb9b87c5 167 do {
mbed_official 580:3c14cb9b87c5 168
mbed_official 580:3c14cb9b87c5 169 Sleepms(1);
mbed_official 580:3c14cb9b87c5 170 timedout--;
mbed_official 580:3c14cb9b87c5 171 smsc9220_mac_regread(SMSC9220_MAC_MII_ACC, &phycmd);
mbed_official 580:3c14cb9b87c5 172 } while(timedout && (phycmd & (1 << 0)));
mbed_official 580:3c14cb9b87c5 173
mbed_official 580:3c14cb9b87c5 174 if(!timedout) {
mbed_official 580:3c14cb9b87c5 175 error = 1;
mbed_official 580:3c14cb9b87c5 176 }
mbed_official 580:3c14cb9b87c5 177
mbed_official 580:3c14cb9b87c5 178 } else {
mbed_official 580:3c14cb9b87c5 179 printf("Warning: SMSC9220 MAC MII is busy. No data written.\n");
mbed_official 580:3c14cb9b87c5 180 }
mbed_official 580:3c14cb9b87c5 181 return error;
mbed_official 580:3c14cb9b87c5 182 }
mbed_official 580:3c14cb9b87c5 183
mbed_official 580:3c14cb9b87c5 184 // Returns smsc9220 id.
mbed_official 580:3c14cb9b87c5 185 unsigned int smsc9220_read_id(void)
mbed_official 580:3c14cb9b87c5 186 {
mbed_official 580:3c14cb9b87c5 187 return SMSC9220->ID_REV;
mbed_official 580:3c14cb9b87c5 188 }
mbed_official 580:3c14cb9b87c5 189
mbed_official 580:3c14cb9b87c5 190 // Initiates a soft reset, returns failure or success.
mbed_official 580:3c14cb9b87c5 191 unsigned int smsc9220_soft_reset(void)
mbed_official 580:3c14cb9b87c5 192 {
mbed_official 580:3c14cb9b87c5 193 int timedout;
mbed_official 580:3c14cb9b87c5 194
mbed_official 580:3c14cb9b87c5 195 timedout = 10;
mbed_official 580:3c14cb9b87c5 196 // Soft reset
mbed_official 580:3c14cb9b87c5 197 SMSC9220->HW_CFG |= 1;
mbed_official 580:3c14cb9b87c5 198
mbed_official 580:3c14cb9b87c5 199 do {
mbed_official 580:3c14cb9b87c5 200 Sleepms(1);
mbed_official 580:3c14cb9b87c5 201 timedout--;
mbed_official 580:3c14cb9b87c5 202 } while(timedout && (SMSC9220->HW_CFG & 1));
mbed_official 580:3c14cb9b87c5 203
mbed_official 580:3c14cb9b87c5 204 if(!timedout)
mbed_official 580:3c14cb9b87c5 205 return 1;
mbed_official 580:3c14cb9b87c5 206
mbed_official 580:3c14cb9b87c5 207 return 0;
mbed_official 580:3c14cb9b87c5 208 }
mbed_official 580:3c14cb9b87c5 209
mbed_official 580:3c14cb9b87c5 210 void smsc9220_set_txfifo(unsigned int val)
mbed_official 580:3c14cb9b87c5 211 {
mbed_official 580:3c14cb9b87c5 212 // 2kb minimum, 14kb maximum
mbed_official 580:3c14cb9b87c5 213 if(val < 2 || val > 14)
mbed_official 580:3c14cb9b87c5 214 return;
mbed_official 580:3c14cb9b87c5 215
mbed_official 580:3c14cb9b87c5 216 SMSC9220->HW_CFG = val << 16;
mbed_official 580:3c14cb9b87c5 217 }
mbed_official 580:3c14cb9b87c5 218
mbed_official 580:3c14cb9b87c5 219
mbed_official 580:3c14cb9b87c5 220 unsigned int smsc9220_wait_eeprom(void)
mbed_official 580:3c14cb9b87c5 221 {
mbed_official 580:3c14cb9b87c5 222 int timedout;
mbed_official 580:3c14cb9b87c5 223
mbed_official 580:3c14cb9b87c5 224 timedout = 50;
mbed_official 580:3c14cb9b87c5 225
mbed_official 580:3c14cb9b87c5 226 do {
mbed_official 580:3c14cb9b87c5 227 Sleepms(1);
mbed_official 580:3c14cb9b87c5 228 timedout--;
mbed_official 580:3c14cb9b87c5 229
mbed_official 580:3c14cb9b87c5 230 } while(timedout && (SMSC9220->E2P_CMD & ((unsigned int) 1 << 31)));
mbed_official 580:3c14cb9b87c5 231
mbed_official 580:3c14cb9b87c5 232 if(!timedout)
mbed_official 580:3c14cb9b87c5 233 return 1;
mbed_official 580:3c14cb9b87c5 234
mbed_official 580:3c14cb9b87c5 235 return 0;
mbed_official 580:3c14cb9b87c5 236 }
mbed_official 580:3c14cb9b87c5 237
mbed_official 580:3c14cb9b87c5 238 /* initialise irqs */
mbed_official 580:3c14cb9b87c5 239 void smsc9220_init_irqs(void)
mbed_official 580:3c14cb9b87c5 240 {
mbed_official 580:3c14cb9b87c5 241 SMSC9220->INT_EN = 0x0;
mbed_official 580:3c14cb9b87c5 242 SMSC9220->INT_STS = 0xFFFFFFFF; // clear all interrupts
mbed_official 580:3c14cb9b87c5 243 SMSC9220->IRQ_CFG = 0x22000100; // irq deassertion at 220 usecs and master IRQ enable.
mbed_official 580:3c14cb9b87c5 244 }
mbed_official 580:3c14cb9b87c5 245
mbed_official 580:3c14cb9b87c5 246 unsigned int smsc9220_check_phy(void)
mbed_official 580:3c14cb9b87c5 247 {
mbed_official 580:3c14cb9b87c5 248 unsigned short phyid1, phyid2;
mbed_official 580:3c14cb9b87c5 249
mbed_official 580:3c14cb9b87c5 250 smsc9220_phy_regread(SMSC9220_PHY_ID1,&phyid1);
mbed_official 580:3c14cb9b87c5 251 smsc9220_phy_regread(SMSC9220_PHY_ID2,&phyid2);
mbed_official 580:3c14cb9b87c5 252 return ((phyid1 == 0xFFFF && phyid2 == 0xFFFF) ||
mbed_official 580:3c14cb9b87c5 253 (phyid1 == 0x0 && phyid2 == 0x0));
mbed_official 580:3c14cb9b87c5 254 }
mbed_official 580:3c14cb9b87c5 255
mbed_official 580:3c14cb9b87c5 256 unsigned int smsc9220_reset_phy(void)
mbed_official 580:3c14cb9b87c5 257 {
mbed_official 580:3c14cb9b87c5 258 unsigned short read;
mbed_official 580:3c14cb9b87c5 259 int error;
mbed_official 580:3c14cb9b87c5 260
mbed_official 580:3c14cb9b87c5 261 error = 0;
mbed_official 580:3c14cb9b87c5 262 if(smsc9220_phy_regread(SMSC9220_PHY_BCONTROL, &read)) {
mbed_official 580:3c14cb9b87c5 263 error = 1;
mbed_official 580:3c14cb9b87c5 264 return error;
mbed_official 580:3c14cb9b87c5 265 }
mbed_official 580:3c14cb9b87c5 266
mbed_official 580:3c14cb9b87c5 267 read |= (1 << 15);
mbed_official 580:3c14cb9b87c5 268 if(smsc9220_phy_regwrite(SMSC9220_PHY_BCONTROL, read)) {
mbed_official 580:3c14cb9b87c5 269 error = 1;
mbed_official 580:3c14cb9b87c5 270 return error;
mbed_official 580:3c14cb9b87c5 271 }
mbed_official 580:3c14cb9b87c5 272 return 0;
mbed_official 580:3c14cb9b87c5 273 }
mbed_official 580:3c14cb9b87c5 274
mbed_official 580:3c14cb9b87c5 275 /* Advertise all speeds and pause capabilities */
mbed_official 580:3c14cb9b87c5 276 void smsc9220_advertise_cap(void)
mbed_official 580:3c14cb9b87c5 277 {
mbed_official 580:3c14cb9b87c5 278 unsigned short aneg_adv;
mbed_official 580:3c14cb9b87c5 279 aneg_adv = 0;
mbed_official 580:3c14cb9b87c5 280
mbed_official 580:3c14cb9b87c5 281
mbed_official 580:3c14cb9b87c5 282 smsc9220_phy_regread(SMSC9220_PHY_ANEG_ADV, &aneg_adv);
mbed_official 580:3c14cb9b87c5 283 aneg_adv |= 0xDE0;
mbed_official 580:3c14cb9b87c5 284
mbed_official 580:3c14cb9b87c5 285 smsc9220_phy_regwrite(SMSC9220_PHY_ANEG_ADV, aneg_adv);
mbed_official 580:3c14cb9b87c5 286 smsc9220_phy_regread(SMSC9220_PHY_ANEG_ADV, &aneg_adv);
mbed_official 580:3c14cb9b87c5 287 return;
mbed_official 580:3c14cb9b87c5 288 }
mbed_official 580:3c14cb9b87c5 289
mbed_official 580:3c14cb9b87c5 290 void smsc9220_establish_link(void)
mbed_official 580:3c14cb9b87c5 291 {
mbed_official 580:3c14cb9b87c5 292 unsigned short bcr;
mbed_official 580:3c14cb9b87c5 293
mbed_official 580:3c14cb9b87c5 294 smsc9220_phy_regread(SMSC9220_PHY_BCONTROL, &bcr);
mbed_official 580:3c14cb9b87c5 295 bcr |= (1 << 12) | (1 << 9);
mbed_official 580:3c14cb9b87c5 296 smsc9220_phy_regwrite(SMSC9220_PHY_BCONTROL, bcr);
mbed_official 580:3c14cb9b87c5 297 smsc9220_phy_regread(SMSC9220_PHY_BCONTROL, &bcr);
mbed_official 580:3c14cb9b87c5 298
mbed_official 580:3c14cb9b87c5 299 {
mbed_official 580:3c14cb9b87c5 300 unsigned int hw_cfg;
mbed_official 580:3c14cb9b87c5 301
mbed_official 580:3c14cb9b87c5 302 hw_cfg = 0;
mbed_official 580:3c14cb9b87c5 303 hw_cfg = SMSC9220->HW_CFG;
mbed_official 580:3c14cb9b87c5 304
mbed_official 580:3c14cb9b87c5 305 hw_cfg &= 0xF0000;
mbed_official 580:3c14cb9b87c5 306 hw_cfg |= (1 << 20);
mbed_official 580:3c14cb9b87c5 307 SMSC9220->HW_CFG = hw_cfg;
mbed_official 580:3c14cb9b87c5 308 }
mbed_official 580:3c14cb9b87c5 309
mbed_official 580:3c14cb9b87c5 310 return;
mbed_official 580:3c14cb9b87c5 311 }
mbed_official 580:3c14cb9b87c5 312
mbed_official 580:3c14cb9b87c5 313 void smsc9220_enable_xmit(void)
mbed_official 580:3c14cb9b87c5 314 {
mbed_official 580:3c14cb9b87c5 315 SMSC9220->TX_CFG = 0x2; // Enable trasmission
mbed_official 580:3c14cb9b87c5 316 return;
mbed_official 580:3c14cb9b87c5 317 }
mbed_official 580:3c14cb9b87c5 318
mbed_official 580:3c14cb9b87c5 319 void smsc9220_enable_mac_xmit(void)
mbed_official 580:3c14cb9b87c5 320 {
mbed_official 580:3c14cb9b87c5 321 unsigned int mac_cr;
mbed_official 580:3c14cb9b87c5 322
mbed_official 580:3c14cb9b87c5 323 mac_cr = 0;
mbed_official 580:3c14cb9b87c5 324 smsc9220_mac_regread(SMSC9220_MAC_CR, &mac_cr);
mbed_official 580:3c14cb9b87c5 325
mbed_official 580:3c14cb9b87c5 326 mac_cr |= (1 << 3); // xmit enable
mbed_official 580:3c14cb9b87c5 327 mac_cr |= (1 << 28); // Heartbeat disable
mbed_official 580:3c14cb9b87c5 328
mbed_official 580:3c14cb9b87c5 329 smsc9220_mac_regwrite(SMSC9220_MAC_CR, mac_cr);
mbed_official 580:3c14cb9b87c5 330 return;
mbed_official 580:3c14cb9b87c5 331 }
mbed_official 580:3c14cb9b87c5 332
mbed_official 580:3c14cb9b87c5 333 void smsc9220_enable_mac_recv(void)
mbed_official 580:3c14cb9b87c5 334 {
mbed_official 580:3c14cb9b87c5 335 unsigned int mac_cr;
mbed_official 580:3c14cb9b87c5 336
mbed_official 580:3c14cb9b87c5 337 mac_cr = 0;
mbed_official 580:3c14cb9b87c5 338 smsc9220_mac_regread(SMSC9220_MAC_CR, &mac_cr);
mbed_official 580:3c14cb9b87c5 339 mac_cr |= (1 << 2); // Recv enable
mbed_official 580:3c14cb9b87c5 340 smsc9220_mac_regwrite(SMSC9220_MAC_CR, mac_cr);
mbed_official 580:3c14cb9b87c5 341
mbed_official 580:3c14cb9b87c5 342 return;
mbed_official 580:3c14cb9b87c5 343 }
mbed_official 580:3c14cb9b87c5 344
mbed_official 580:3c14cb9b87c5 345
mbed_official 580:3c14cb9b87c5 346 unsigned int smsc9220_check_ready(void)
mbed_official 580:3c14cb9b87c5 347 {
mbed_official 580:3c14cb9b87c5 348 return !(SMSC9220->PMT_CTRL & 1);
mbed_official 580:3c14cb9b87c5 349 }
mbed_official 580:3c14cb9b87c5 350
mbed_official 580:3c14cb9b87c5 351 /* Generate a soft irq */
mbed_official 580:3c14cb9b87c5 352 void smsc9220_set_soft_int(void)
mbed_official 580:3c14cb9b87c5 353 {
mbed_official 580:3c14cb9b87c5 354 SMSC9220->INT_EN |= 0x80000000;
mbed_official 580:3c14cb9b87c5 355 }
mbed_official 580:3c14cb9b87c5 356
mbed_official 580:3c14cb9b87c5 357 /* clear soft irq */
mbed_official 580:3c14cb9b87c5 358 void smsc9220_clear_soft_int(void)
mbed_official 580:3c14cb9b87c5 359 {
mbed_official 580:3c14cb9b87c5 360 SMSC9220->INT_STS |= 0x80000000;
mbed_official 580:3c14cb9b87c5 361 }
mbed_official 580:3c14cb9b87c5 362
mbed_official 580:3c14cb9b87c5 363
mbed_official 580:3c14cb9b87c5 364 unsigned int smsc9220_recv_packet(unsigned int *recvbuf, unsigned int *index)
mbed_official 580:3c14cb9b87c5 365 {
mbed_official 580:3c14cb9b87c5 366 unsigned int rxfifo_inf; // Tells us the status of rx payload and status fifos.
mbed_official 580:3c14cb9b87c5 367 unsigned int rxfifo_stat;
mbed_official 580:3c14cb9b87c5 368
mbed_official 580:3c14cb9b87c5 369 unsigned int pktsize;
mbed_official 580:3c14cb9b87c5 370 unsigned int dwords_to_read;
mbed_official 580:3c14cb9b87c5 371
mbed_official 580:3c14cb9b87c5 372 rxfifo_inf = SMSC9220->RX_FIFO_INF;
mbed_official 580:3c14cb9b87c5 373
mbed_official 580:3c14cb9b87c5 374 if(rxfifo_inf & 0xFFFF) { // If there's data
mbed_official 580:3c14cb9b87c5 375 rxfifo_stat = SMSC9220->RX_STAT_PORT;
mbed_official 580:3c14cb9b87c5 376 if(rxfifo_stat != 0) { // Fetch status of this packet
mbed_official 580:3c14cb9b87c5 377 pktsize = ((rxfifo_stat >> 16) & 0x3FFF);
mbed_official 580:3c14cb9b87c5 378 if(rxfifo_stat & (1 << 15)) {
mbed_official 580:3c14cb9b87c5 379 printf("Error occured during receiving of packets on the bus.\n");
mbed_official 580:3c14cb9b87c5 380 return 1;
mbed_official 580:3c14cb9b87c5 381 } else {
mbed_official 580:3c14cb9b87c5 382 /* Below formula (recommended by SMSC9220 code)
mbed_official 580:3c14cb9b87c5 383 * gives 1 more than required. This is perhaps because
mbed_official 580:3c14cb9b87c5 384 * a last word is needed for not word aligned packets.
mbed_official 580:3c14cb9b87c5 385 */
mbed_official 580:3c14cb9b87c5 386 dwords_to_read = (pktsize + 3) >> 2;
mbed_official 580:3c14cb9b87c5 387 // PIO copy of data received:
mbed_official 580:3c14cb9b87c5 388 while(dwords_to_read > 0) {
mbed_official 580:3c14cb9b87c5 389 recvbuf[*index] = SMSC9220->RX_DATA_PORT;
mbed_official 580:3c14cb9b87c5 390 (*index)++;
mbed_official 580:3c14cb9b87c5 391 dwords_to_read--;
mbed_official 580:3c14cb9b87c5 392 }
mbed_official 580:3c14cb9b87c5 393 }
mbed_official 580:3c14cb9b87c5 394 } else {
mbed_official 580:3c14cb9b87c5 395 return 1;
mbed_official 580:3c14cb9b87c5 396 }
mbed_official 580:3c14cb9b87c5 397 } else {
mbed_official 580:3c14cb9b87c5 398 return 1;
mbed_official 580:3c14cb9b87c5 399 }
mbed_official 580:3c14cb9b87c5 400
mbed_official 580:3c14cb9b87c5 401 rxfifo_stat = SMSC9220->RX_STAT_PORT;
mbed_official 580:3c14cb9b87c5 402 rxfifo_inf = SMSC9220->RX_FIFO_INF;
mbed_official 580:3c14cb9b87c5 403
mbed_official 580:3c14cb9b87c5 404 return 0;
mbed_official 580:3c14cb9b87c5 405 }
mbed_official 580:3c14cb9b87c5 406
mbed_official 580:3c14cb9b87c5 407
mbed_official 580:3c14cb9b87c5 408 // Does the actual transfer of data to FIFO, note it does no
mbed_official 580:3c14cb9b87c5 409 // fifo availability checking. This should be done by caller.
mbed_official 580:3c14cb9b87c5 410 // Assumes the whole frame is transferred at once as a single segment
mbed_official 580:3c14cb9b87c5 411 void smsc9220_xmit_packet(unsigned char * pkt, unsigned int length)
mbed_official 580:3c14cb9b87c5 412 {
mbed_official 580:3c14cb9b87c5 413 unsigned int txcmd_a, txcmd_b;
mbed_official 580:3c14cb9b87c5 414 unsigned int dwords_to_write;
mbed_official 580:3c14cb9b87c5 415 volatile unsigned int dwritten;
mbed_official 580:3c14cb9b87c5 416 unsigned int *pktptr;
mbed_official 580:3c14cb9b87c5 417 volatile unsigned int xmit_stat, xmit_stat2, xmit_inf;
mbed_official 580:3c14cb9b87c5 418 int i;
mbed_official 580:3c14cb9b87c5 419
mbed_official 580:3c14cb9b87c5 420 pktptr = (unsigned int *) pkt;
mbed_official 580:3c14cb9b87c5 421 txcmd_a = 0;
mbed_official 580:3c14cb9b87c5 422 txcmd_b = 0;
mbed_official 580:3c14cb9b87c5 423
mbed_official 580:3c14cb9b87c5 424 txcmd_a |= (1 << 12) | (1 << 13); // First and last segments
mbed_official 580:3c14cb9b87c5 425 txcmd_a |= length & 0x7FF; // [10:0] contains length
mbed_official 580:3c14cb9b87c5 426
mbed_official 580:3c14cb9b87c5 427 txcmd_b |= ((length & 0xFFFF) << 16); // [31:16] contains length
mbed_official 580:3c14cb9b87c5 428 txcmd_b |= length & 0x7FF; // [10:0] also contains length
mbed_official 580:3c14cb9b87c5 429
mbed_official 580:3c14cb9b87c5 430
mbed_official 580:3c14cb9b87c5 431 SMSC9220->TX_DATA_PORT = txcmd_a;
mbed_official 580:3c14cb9b87c5 432 SMSC9220->TX_DATA_PORT = txcmd_b;
mbed_official 580:3c14cb9b87c5 433 dwritten = dwords_to_write = (length + 3) >> 2;
mbed_official 580:3c14cb9b87c5 434
mbed_official 580:3c14cb9b87c5 435 // PIO Copy to FIFO. Could replace this with DMA.
mbed_official 580:3c14cb9b87c5 436 while(dwords_to_write > 0) {
mbed_official 580:3c14cb9b87c5 437 SMSC9220->TX_DATA_PORT = *pktptr;
mbed_official 580:3c14cb9b87c5 438 pktptr++;
mbed_official 580:3c14cb9b87c5 439 dwords_to_write--;
mbed_official 580:3c14cb9b87c5 440 }
mbed_official 580:3c14cb9b87c5 441
mbed_official 580:3c14cb9b87c5 442 xmit_stat = SMSC9220->TX_STAT_PORT;
mbed_official 580:3c14cb9b87c5 443 xmit_stat2 = SMSC9220->TX_STAT_PORT;
mbed_official 580:3c14cb9b87c5 444 xmit_inf = SMSC9220->TX_FIFO_INF;
mbed_official 580:3c14cb9b87c5 445
mbed_official 580:3c14cb9b87c5 446 if(xmit_stat2 != 0 ) {
mbed_official 580:3c14cb9b87c5 447 for(i = 0; i < 6; i++) {
mbed_official 580:3c14cb9b87c5 448 xmit_stat2 = SMSC9220->TX_STAT_PORT;
mbed_official 580:3c14cb9b87c5 449 }
mbed_official 580:3c14cb9b87c5 450 }
mbed_official 580:3c14cb9b87c5 451 }