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mbed library sources

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Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

targets/hal/TARGET_WIZNET/TARGET_W7500x/W7500x_Peripheral_Library/W7500x_crg.h@619:034e698bc035, 2015-09-04 (annotated)

Committer:
mbed_official
Date:
Fri Sep 04 09:30:10 2015 +0100
Revision:
619:034e698bc035
Parent:
targets/cmsis/TARGET_WIZNET/TARGET_W7500x/W7500x_crg.h@558:0880f51c4036 
Synchronized with git revision 92d1bfad30082571776c810a56fd471d30514ccf



Full URL: https://github.com/mbedmicro/mbed/commit/92d1bfad30082571776c810a56fd471d30514ccf/



Change directory structure and move files.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 558:0880f51c4036 1 /**
mbed_official 558:0880f51c4036 2 ******************************************************************************
mbed_official 558:0880f51c4036 3 * @file
mbed_official 558:0880f51c4036 4 * @author
mbed_official 558:0880f51c4036 5 * @version
mbed_official 558:0880f51c4036 6 * @date
mbed_official 558:0880f51c4036 7 * @brief This file contains all the functions prototypes for the Clock Reset Generator
mbed_official 558:0880f51c4036 8 * firmware library.
mbed_official 558:0880f51c4036 9 ******************************************************************************
mbed_official 558:0880f51c4036 10 *
mbed_official 558:0880f51c4036 11 ******************************************************************************
mbed_official 558:0880f51c4036 12 */
mbed_official 558:0880f51c4036 13
mbed_official 558:0880f51c4036 14 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 558:0880f51c4036 15 #ifndef __W7500X_CRG_H
mbed_official 558:0880f51c4036 16 #define __W7500X_CRG_H
mbed_official 558:0880f51c4036 17
mbed_official 558:0880f51c4036 18 #ifdef __cplusplus
mbed_official 558:0880f51c4036 19 extern "C" {
mbed_official 558:0880f51c4036 20 #endif
mbed_official 558:0880f51c4036 21
mbed_official 558:0880f51c4036 22 /* Includes ------------------------------------------------------------------*/
mbed_official 558:0880f51c4036 23 #include "W7500x.h"
mbed_official 558:0880f51c4036 24
mbed_official 558:0880f51c4036 25 // It will be in W7500x_crg.h
mbed_official 558:0880f51c4036 26 typedef enum { CRG_CLK_DIS = 0, CRG_MCLK, CRG_RCLK, CRG_OCLK } CRG_CLK_SOURCE;
mbed_official 558:0880f51c4036 27 typedef enum { CRG_CLK_HIGH = 0, CRG_CLK_LOW } CRG_CLK_LOW_SOURCE;
mbed_official 558:0880f51c4036 28 typedef enum { CRG_PREDIV1 = 0, CRG_PREDIV2, CRG_PREDIV4, CRG_PREDIV8, CRG_PREDIV16, \
mbed_official 558:0880f51c4036 29 CRG_PREDIV32, CRG_PREDIV64, CRG_PREDIV128 } CRG_PREDIV;
mbed_official 558:0880f51c4036 30 typedef enum { CRG_TIMER0 = 0, CRG_TIMER1 } CRG_TIMER;
mbed_official 558:0880f51c4036 31 typedef enum { CRG_PWM0 = 0, CRG_PWM1, CRG_PWM2, CRG_PWM3, CRG_PWM4, CRG_PWM5, CRG_PWM6, CRG_PWM7 } CRG_PWM;
mbed_official 558:0880f51c4036 32
mbed_official 558:0880f51c4036 33
mbed_official 558:0880f51c4036 34
mbed_official 558:0880f51c4036 35 #define IS_CRG_PLL_SRC(SRC) (((SRC) == CRG_RCLK) || ((SRC) == CRG_OCLK))
mbed_official 558:0880f51c4036 36 #define IS_CRG_FCLK_SRC(SRC) (((SRC) == CRG_MCLK) || ((SRC) == CRG_RCLK) || ((SRC) == CRG_OCLK))
mbed_official 558:0880f51c4036 37
mbed_official 558:0880f51c4036 38 #define CRG_CLK_SRC_DEFAULT(SRC) (((SRC) == CRG_CLK_DIS) || ((SRC) == CRG_MCLK) || \
mbed_official 558:0880f51c4036 39 ((SRC) == CRG_RCLK) || ((SRC) == CRG_OCLK))
mbed_official 558:0880f51c4036 40 #define CRG_CLK_SRC_LOW(SRC) (((SRC) == CRG_CLK_HIGH) || ((SRC) == CRG_CLK_LOW))
mbed_official 558:0880f51c4036 41
mbed_official 558:0880f51c4036 42 #define CRG_CLK_PREDIV_DEFAULT(DIV) (((DIV) == CRG_PREDIV1) || ((DIV) == CRG_PREDIV2) || \
mbed_official 558:0880f51c4036 43 ((DIV) == CRG_PREDIV4) || ((DIV) == CRG_PREDIV8))
mbed_official 558:0880f51c4036 44 #define CRG_CLK_PREDIV_ADVANCE(DIV) (((DIV) == CRG_PREDIV1) || ((DIV) == CRG_PREDIV2) || \
mbed_official 558:0880f51c4036 45 ((DIV) == CRG_PREDIV4) || ((DIV) == CRG_PREDIV8) || \
mbed_official 558:0880f51c4036 46 ((DIV) == CRG_PREDIV16) || ((DIV) == CRG_PREDIV32) || \
mbed_official 558:0880f51c4036 47 ((DIV) == CRG_PREDIV64) || ((DIV) == CRG_PREDIV128))
mbed_official 558:0880f51c4036 48
mbed_official 558:0880f51c4036 49
mbed_official 558:0880f51c4036 50 #define IS_CRG_FCLK_PREDIV(DIV) CRG_CLK_PREDIV_DEFAULT(DIV)
mbed_official 558:0880f51c4036 51
mbed_official 558:0880f51c4036 52 #define IS_CRG_SSPCLK_SRC(SRC) CRG_CLK_SRC_DEFAULT(SRC)
mbed_official 558:0880f51c4036 53 #define IS_CRG_SSPCLK_PREDIV(DIV) CRG_CLK_PREDIV_DEFAULT(DIV)
mbed_official 558:0880f51c4036 54
mbed_official 558:0880f51c4036 55 #define IS_CRG_ADCCLK_PREDIV(DIV) CRG_CLK_PREDIV_DEFAULT(DIV)
mbed_official 558:0880f51c4036 56 #define IS_CRG_ADCCLK_SRC(SRC) CRG_CLK_SRC_DEFAULT(SRC)
mbed_official 558:0880f51c4036 57
mbed_official 558:0880f51c4036 58
mbed_official 558:0880f51c4036 59
mbed_official 558:0880f51c4036 60
mbed_official 558:0880f51c4036 61
mbed_official 558:0880f51c4036 62 #define IS_CRG_TIMERCLK_NUM(NUM) (((NUM) == CRG_TIMER0) || ((NUM) == CRG_TIMER1))
mbed_official 558:0880f51c4036 63 #define IS_CRG_TIMERCLK_SRC(SRC) CRG_CLK_SRC_DEFAULT(SRC)
mbed_official 558:0880f51c4036 64 #define IS_CRG_TIMERCLK_PREDIV(DIV) CRG_CLK_PREDIV_ADVANCE(DIV)
mbed_official 558:0880f51c4036 65
mbed_official 558:0880f51c4036 66 #define CRG_SET_TIMERCLK_SSR(NUM,VALUE) \
mbed_official 558:0880f51c4036 67 (*((volatile uint32_t *)(CRG->TIMER0CLK_SSR) + (0x10ul * NUM)) = VALUE)
mbed_official 558:0880f51c4036 68 #define CRG_SET_TIMERCLK_PREDIV(NUM,VALUE) \
mbed_official 558:0880f51c4036 69 (*((volatile uint32_t *)(CRG->TIMER0CLK_PVSR) + (0x10ul * NUM)) = VALUE)
mbed_official 558:0880f51c4036 70 //#define CRG_SET_TIMERCLK_SSR(num,value) CRG->TIMER##num##CLK_SSR = value
mbed_official 558:0880f51c4036 71 //#define CRG_SET_TIMERCLK_PREDIV(num,value) CRG->TIMER##num##CLK_PVSR = value
mbed_official 558:0880f51c4036 72
mbed_official 558:0880f51c4036 73
mbed_official 558:0880f51c4036 74 #define IS_CRG_PWMCLK_NUM(NUM) (((NUM) == CRG_PWM0) || ((NUM) == CRG_PWM1) || \
mbed_official 558:0880f51c4036 75 ((NUM) == CRG_PWM2) || ((NUM) == CRG_PWM3) || \
mbed_official 558:0880f51c4036 76 ((NUM) == CRG_PWM4) || ((NUM) == CRG_PWM5) || \
mbed_official 558:0880f51c4036 77 ((NUM) == CRG_PWM6) || ((NUM) == CRG_PWM7) )
mbed_official 558:0880f51c4036 78 #define IS_CRG_PWMCLK_SRC(SRC) CRG_CLK_SRC_DEFAULT(SRC)
mbed_official 558:0880f51c4036 79 #define IS_CRG_PWMCLK_PREDIV(DIV) CRG_CLK_PREDIV_ADVANCE(DIV)
mbed_official 558:0880f51c4036 80
mbed_official 558:0880f51c4036 81 #define CRG_SET_PWMCLK_SSR(NUM,VALUE) \
mbed_official 558:0880f51c4036 82 (*((volatile uint32_t *)(CRG->PWM0CLK_SSR) + (0x10ul * NUM)) = VALUE)
mbed_official 558:0880f51c4036 83 #define CRG_SET_PWMCLK_PREDIV(NUM,VALUE) \
mbed_official 558:0880f51c4036 84 (*((volatile uint32_t *)(CRG->PWM0CLK_PVSR) + (0x10ul * NUM)) = VALUE)
mbed_official 558:0880f51c4036 85 //#define CRG_SET_PWMCLK_SSR(num,value) CRG->PWM##num##CLK_SSR = value
mbed_official 558:0880f51c4036 86 //#define CRG_SET_PWMCLK_PREDIV(num,value) CRG->PWM##num##CLK_PVSR = value
mbed_official 558:0880f51c4036 87
mbed_official 558:0880f51c4036 88 #define IS_CRG_RTC_HS_SRC(SRC) CRG_CLK_SRC_DEFAULT(SRC)
mbed_official 558:0880f51c4036 89 #define IS_CRG_RTC_HS_PREDIV(DIV) CRG_CLK_PREDIV_ADVANCE(DIV)
mbed_official 558:0880f51c4036 90 #define IS_CRG_RTC_LOW_SRC(SRC) CRG_CLK_SRC_LOW(SRC)
mbed_official 558:0880f51c4036 91
mbed_official 558:0880f51c4036 92 #define IS_CRG_WDOGCLK_HS_SRC(SRC) CRG_CLK_SRC_DEFAULT(SRC)
mbed_official 558:0880f51c4036 93 #define IS_CRG_WDOGCLK_HS_PREDIV(DIV) CRG_CLK_PREDIV_ADVANCE(DIV)
mbed_official 558:0880f51c4036 94 #define IS_CRG_WDOGCLK_LOW_SRC(SRC) CRG_CLK_SRC_LOW(SRC)
mbed_official 558:0880f51c4036 95
mbed_official 558:0880f51c4036 96 #define IS_CRG_UARTCLK_SRC(SRC) CRG_CLK_SRC_DEFAULT(SRC)
mbed_official 558:0880f51c4036 97 #define IS_CRG_UARTCLK_PREDIV(DIV) CRG_CLK_PREDIV_DEFAULT(DIV)
mbed_official 558:0880f51c4036 98
mbed_official 558:0880f51c4036 99 #define IS_CRG_MONCLK_SSR(value) (((value) >= 0x00ul) || ((value) <= 0x13ul))
mbed_official 558:0880f51c4036 100
mbed_official 558:0880f51c4036 101 void CRG_DeInit(void);
mbed_official 558:0880f51c4036 102 void CRG_OSC_PowerDownEnable (FunctionalState NewState);
mbed_official 558:0880f51c4036 103 void CRG_PLL_PowerDownEnable (FunctionalState NewState);
mbed_official 558:0880f51c4036 104 void CRG_PLL_OutputEnable (FunctionalState NewState);
mbed_official 558:0880f51c4036 105 void CRG_PLL_BypassEnable (FunctionalState NewState);
mbed_official 558:0880f51c4036 106 void CRG_PLL_InputFrequencySelect (CRG_CLK_SOURCE src);
mbed_official 558:0880f51c4036 107
mbed_official 558:0880f51c4036 108 void CRG_FCLK_SourceSelect (CRG_CLK_SOURCE src);
mbed_official 558:0880f51c4036 109 void CRG_FCLK_SetPrescale (CRG_PREDIV prediv);
mbed_official 558:0880f51c4036 110
mbed_official 558:0880f51c4036 111 void CRG_SSPCLK_SourceSelect (CRG_CLK_SOURCE src);
mbed_official 558:0880f51c4036 112 void CRG_SSPCLK_SetPrescale (CRG_PREDIV prediv);
mbed_official 558:0880f51c4036 113
mbed_official 558:0880f51c4036 114 void CRG_ADCCLK_SourceSelect (CRG_CLK_SOURCE src);
mbed_official 558:0880f51c4036 115 void CRG_ADCCLK_SetPrescale (CRG_PREDIV prediv);
mbed_official 558:0880f51c4036 116
mbed_official 558:0880f51c4036 117 void CRG_TIMERCLK_SourceSelect (CRG_TIMER num, CRG_CLK_SOURCE src);
mbed_official 558:0880f51c4036 118 void CRG_TIMERCLK_SetPrescale (CRG_TIMER num, CRG_PREDIV prediv);
mbed_official 558:0880f51c4036 119
mbed_official 558:0880f51c4036 120 void CRG_PWMCLK_SourceSelect (CRG_PWM num, CRG_CLK_SOURCE src);
mbed_official 558:0880f51c4036 121 void CRG_PWMCLK_SetPrescale (CRG_PWM num, CRG_PREDIV prediv);
mbed_official 558:0880f51c4036 122
mbed_official 558:0880f51c4036 123 void CRG_RTC_HS_SourceSelect (CRG_CLK_SOURCE src);
mbed_official 558:0880f51c4036 124 void CRG_RTC_HS_SetPrescale (CRG_PREDIV prediv);
mbed_official 558:0880f51c4036 125 void CRG_RTC_SourceSelect (CRG_CLK_LOW_SOURCE src);
mbed_official 558:0880f51c4036 126
mbed_official 558:0880f51c4036 127 void CRG_WDOGCLK_HS_SourceSelect (CRG_CLK_SOURCE src);
mbed_official 558:0880f51c4036 128 void CRG_WDOGCLK_HS_SetPrescale (CRG_PREDIV prediv);
mbed_official 558:0880f51c4036 129 void CRG_WDOGCLK_SourceSelect (CRG_CLK_LOW_SOURCE src);
mbed_official 558:0880f51c4036 130
mbed_official 558:0880f51c4036 131 void CRG_UARTCLK_SourceSelect (CRG_CLK_SOURCE src);
mbed_official 558:0880f51c4036 132 void CRG_UARTCLK_SetPrescale (CRG_PREDIV prediv);
mbed_official 558:0880f51c4036 133
mbed_official 558:0880f51c4036 134 void CRG_MII_Enable (FunctionalState rx_clk, FunctionalState tx_clk);
mbed_official 558:0880f51c4036 135
mbed_official 558:0880f51c4036 136 void CRG_SetMonitoringClock (uint32_t value);
mbed_official 558:0880f51c4036 137 uint32_t CRG_GetMonitoringClock (void);
mbed_official 558:0880f51c4036 138
mbed_official 558:0880f51c4036 139
mbed_official 558:0880f51c4036 140 #ifdef __cplusplus
mbed_official 558:0880f51c4036 141 }
mbed_official 558:0880f51c4036 142 #endif
mbed_official 558:0880f51c4036 143
mbed_official 558:0880f51c4036 144 #endif
mbed_official 558:0880f51c4036 145