mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

hal/mbed_itm_api.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
187:0387e8f68319 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 184:08ed48f1de7f 1 /* mbed Microcontroller Library
AnnaBridge 184:08ed48f1de7f 2 * Copyright (c) 2017 ARM Limited
AnnaBridge 189:f392fc9709a3 3 * SPDX-License-Identifier: Apache-2.0
AnnaBridge 184:08ed48f1de7f 4 *
AnnaBridge 184:08ed48f1de7f 5 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 184:08ed48f1de7f 6 * you may not use this file except in compliance with the License.
AnnaBridge 184:08ed48f1de7f 7 * You may obtain a copy of the License at
AnnaBridge 184:08ed48f1de7f 8 *
AnnaBridge 184:08ed48f1de7f 9 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 184:08ed48f1de7f 10 *
AnnaBridge 184:08ed48f1de7f 11 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 184:08ed48f1de7f 12 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 184:08ed48f1de7f 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 184:08ed48f1de7f 14 * See the License for the specific language governing permissions and
AnnaBridge 184:08ed48f1de7f 15 * limitations under the License.
AnnaBridge 184:08ed48f1de7f 16 */
AnnaBridge 184:08ed48f1de7f 17
AnnaBridge 189:f392fc9709a3 18 #if DEVICE_ITM
AnnaBridge 184:08ed48f1de7f 19
AnnaBridge 184:08ed48f1de7f 20 #include "hal/itm_api.h"
AnnaBridge 184:08ed48f1de7f 21 #include "cmsis.h"
AnnaBridge 184:08ed48f1de7f 22
AnnaBridge 184:08ed48f1de7f 23 #include <stdbool.h>
AnnaBridge 184:08ed48f1de7f 24
AnnaBridge 187:0387e8f68319 25 #ifndef ITM_STIM_FIFOREADY_Msk
AnnaBridge 187:0387e8f68319 26 #define ITM_STIM_FIFOREADY_Msk 1
AnnaBridge 187:0387e8f68319 27 #endif
AnnaBridge 187:0387e8f68319 28
AnnaBridge 187:0387e8f68319 29 #define ITM_ENABLE_WRITE 0xC5ACCE55
AnnaBridge 184:08ed48f1de7f 30
AnnaBridge 184:08ed48f1de7f 31 #define SWO_NRZ 0x02
AnnaBridge 184:08ed48f1de7f 32 #define SWO_STIMULUS_PORT 0x01
AnnaBridge 184:08ed48f1de7f 33
AnnaBridge 184:08ed48f1de7f 34 void mbed_itm_init(void)
AnnaBridge 184:08ed48f1de7f 35 {
AnnaBridge 184:08ed48f1de7f 36 static bool do_init = true;
AnnaBridge 184:08ed48f1de7f 37
AnnaBridge 184:08ed48f1de7f 38 if (do_init) {
AnnaBridge 184:08ed48f1de7f 39 do_init = false;
AnnaBridge 184:08ed48f1de7f 40
AnnaBridge 184:08ed48f1de7f 41 itm_init();
AnnaBridge 184:08ed48f1de7f 42
AnnaBridge 184:08ed48f1de7f 43 /* Enable write access to ITM registers. */
AnnaBridge 184:08ed48f1de7f 44 ITM->LAR = ITM_ENABLE_WRITE;
AnnaBridge 184:08ed48f1de7f 45
AnnaBridge 184:08ed48f1de7f 46 /* Trace Port Interface Selected Pin Protocol Register. */
AnnaBridge 184:08ed48f1de7f 47 TPI->SPPR = (SWO_NRZ << TPI_SPPR_TXMODE_Pos);
AnnaBridge 184:08ed48f1de7f 48
AnnaBridge 184:08ed48f1de7f 49 /* Trace Port Interface Formatter and Flush Control Register */
AnnaBridge 184:08ed48f1de7f 50 TPI->FFCR = (1 << TPI_FFCR_TrigIn_Pos);
AnnaBridge 184:08ed48f1de7f 51
AnnaBridge 184:08ed48f1de7f 52 /* Data Watchpoint and Trace Control Register */
AnnaBridge 184:08ed48f1de7f 53 DWT->CTRL = (1 << DWT_CTRL_CYCTAP_Pos) |
AnnaBridge 184:08ed48f1de7f 54 (0xF << DWT_CTRL_POSTINIT_Pos) |
AnnaBridge 184:08ed48f1de7f 55 (0xF << DWT_CTRL_POSTPRESET_Pos) |
AnnaBridge 184:08ed48f1de7f 56 (1 << DWT_CTRL_CYCCNTENA_Pos);
AnnaBridge 184:08ed48f1de7f 57
AnnaBridge 184:08ed48f1de7f 58 /* Trace Privilege Register.
AnnaBridge 184:08ed48f1de7f 59 * Disable access to trace channel configuration from non-privileged mode.
AnnaBridge 184:08ed48f1de7f 60 */
AnnaBridge 184:08ed48f1de7f 61 ITM->TPR = 0x0;
AnnaBridge 184:08ed48f1de7f 62
AnnaBridge 184:08ed48f1de7f 63 /* Trace Control Register */
AnnaBridge 187:0387e8f68319 64 ITM->TCR = (1 << ITM_TCR_TraceBusID_Pos) |
AnnaBridge 187:0387e8f68319 65 (1 << ITM_TCR_DWTENA_Pos) |
AnnaBridge 184:08ed48f1de7f 66 (1 << ITM_TCR_SYNCENA_Pos) |
AnnaBridge 184:08ed48f1de7f 67 (1 << ITM_TCR_ITMENA_Pos);
AnnaBridge 184:08ed48f1de7f 68
AnnaBridge 184:08ed48f1de7f 69 /* Trace Enable Register */
AnnaBridge 187:0387e8f68319 70 ITM->TER = SWO_STIMULUS_PORT;
AnnaBridge 187:0387e8f68319 71 }
AnnaBridge 187:0387e8f68319 72 }
AnnaBridge 187:0387e8f68319 73
AnnaBridge 187:0387e8f68319 74 static void itm_out8(uint32_t port, uint8_t data)
AnnaBridge 187:0387e8f68319 75 {
AnnaBridge 187:0387e8f68319 76 /* Wait until port is available */
AnnaBridge 187:0387e8f68319 77 while ((ITM->PORT[port].u32 & ITM_STIM_FIFOREADY_Msk) == 0) {
AnnaBridge 187:0387e8f68319 78 __NOP();
AnnaBridge 184:08ed48f1de7f 79 }
AnnaBridge 187:0387e8f68319 80
AnnaBridge 187:0387e8f68319 81 /* write data to port */
AnnaBridge 187:0387e8f68319 82 ITM->PORT[port].u8 = data;
AnnaBridge 187:0387e8f68319 83 }
AnnaBridge 187:0387e8f68319 84
AnnaBridge 187:0387e8f68319 85 static void itm_out32(uint32_t port, uint32_t data)
AnnaBridge 187:0387e8f68319 86 {
AnnaBridge 187:0387e8f68319 87 /* Wait until port is available */
AnnaBridge 187:0387e8f68319 88 while ((ITM->PORT[port].u32 & ITM_STIM_FIFOREADY_Msk) == 0) {
AnnaBridge 187:0387e8f68319 89 __NOP();
AnnaBridge 187:0387e8f68319 90 }
AnnaBridge 187:0387e8f68319 91
AnnaBridge 187:0387e8f68319 92 /* write data to port */
AnnaBridge 187:0387e8f68319 93 ITM->PORT[port].u32 = data;
AnnaBridge 184:08ed48f1de7f 94 }
AnnaBridge 184:08ed48f1de7f 95
AnnaBridge 184:08ed48f1de7f 96 uint32_t mbed_itm_send(uint32_t port, uint32_t data)
AnnaBridge 184:08ed48f1de7f 97 {
AnnaBridge 184:08ed48f1de7f 98 /* Check if ITM and port is enabled */
AnnaBridge 184:08ed48f1de7f 99 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
AnnaBridge 187:0387e8f68319 100 ((ITM->TER & (1UL << port)) != 0UL)) { /* ITM Port enabled */
AnnaBridge 187:0387e8f68319 101 itm_out32(port, data);
AnnaBridge 184:08ed48f1de7f 102 }
AnnaBridge 184:08ed48f1de7f 103
AnnaBridge 184:08ed48f1de7f 104 return data;
AnnaBridge 184:08ed48f1de7f 105 }
AnnaBridge 184:08ed48f1de7f 106
AnnaBridge 187:0387e8f68319 107 void mbed_itm_send_block(uint32_t port, const void *data, size_t len)
AnnaBridge 187:0387e8f68319 108 {
AnnaBridge 187:0387e8f68319 109 const char *ptr = data;
AnnaBridge 187:0387e8f68319 110
AnnaBridge 187:0387e8f68319 111 /* Check if ITM and port is enabled */
AnnaBridge 187:0387e8f68319 112 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
AnnaBridge 187:0387e8f68319 113 ((ITM->TER & (1UL << port)) != 0UL)) { /* ITM Port enabled */
AnnaBridge 187:0387e8f68319 114 /* Output single byte at a time until data is aligned */
AnnaBridge 187:0387e8f68319 115 while ((((uintptr_t) ptr) & 3) && len != 0) {
AnnaBridge 187:0387e8f68319 116 itm_out8(port, *ptr++);
AnnaBridge 187:0387e8f68319 117 len--;
AnnaBridge 187:0387e8f68319 118 }
AnnaBridge 187:0387e8f68319 119
AnnaBridge 187:0387e8f68319 120 /* Output bulk of data one word at a time */
AnnaBridge 187:0387e8f68319 121 while (len >= 4) {
AnnaBridge 187:0387e8f68319 122 itm_out32(port, *(const uint32_t *) ptr);
AnnaBridge 187:0387e8f68319 123 ptr += 4;
AnnaBridge 187:0387e8f68319 124 len -= 4;
AnnaBridge 187:0387e8f68319 125 }
AnnaBridge 187:0387e8f68319 126
AnnaBridge 187:0387e8f68319 127 /* Output any trailing bytes */
AnnaBridge 187:0387e8f68319 128 while (len != 0) {
AnnaBridge 187:0387e8f68319 129 itm_out8(port, *ptr++);
AnnaBridge 187:0387e8f68319 130 len--;
AnnaBridge 187:0387e8f68319 131 }
AnnaBridge 187:0387e8f68319 132 }
AnnaBridge 187:0387e8f68319 133 }
AnnaBridge 189:f392fc9709a3 134 #endif // DEVICE_ITM