Communication program for the chrobotics UM6 9-DOF IMU AHRS.

Dependencies:   MODSERIAL mbed

Committer:
lhiggs
Date:
Fri Sep 28 00:40:29 2012 +0000
Revision:
0:03c649c76388
A UM6 IMU AHRS INTERFACE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lhiggs 0:03c649c76388 1 /*
lhiggs 0:03c649c76388 2 Copyright (c) 2010 Andy Kirkham
lhiggs 0:03c649c76388 3
lhiggs 0:03c649c76388 4 Permission is hereby granted, free of charge, to any person obtaining a copy
lhiggs 0:03c649c76388 5 of this software and associated documentation files (the "Software"), to deal
lhiggs 0:03c649c76388 6 in the Software without restriction, including without limitation the rights
lhiggs 0:03c649c76388 7 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
lhiggs 0:03c649c76388 8 copies of the Software, and to permit persons to whom the Software is
lhiggs 0:03c649c76388 9 furnished to do so, subject to the following conditions:
lhiggs 0:03c649c76388 10
lhiggs 0:03c649c76388 11 The above copyright notice and this permission notice shall be included in
lhiggs 0:03c649c76388 12 all copies or substantial portions of the Software.
lhiggs 0:03c649c76388 13
lhiggs 0:03c649c76388 14 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
lhiggs 0:03c649c76388 15 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
lhiggs 0:03c649c76388 16 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
lhiggs 0:03c649c76388 17 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
lhiggs 0:03c649c76388 18 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
lhiggs 0:03c649c76388 19 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
lhiggs 0:03c649c76388 20 THE SOFTWARE.
lhiggs 0:03c649c76388 21 */
lhiggs 0:03c649c76388 22
lhiggs 0:03c649c76388 23 #include "MODSERIAL.h"
lhiggs 0:03c649c76388 24 #include "MACROS.h"
lhiggs 0:03c649c76388 25
lhiggs 0:03c649c76388 26 namespace AjK {
lhiggs 0:03c649c76388 27
lhiggs 0:03c649c76388 28 void
lhiggs 0:03c649c76388 29 MODSERIAL::init( int txSize, int rxSize )
lhiggs 0:03c649c76388 30 {
lhiggs 0:03c649c76388 31 disableIrq();
lhiggs 0:03c649c76388 32
lhiggs 0:03c649c76388 33 callbackInfo.setSerial(this);
lhiggs 0:03c649c76388 34
lhiggs 0:03c649c76388 35 #ifdef __LPC11UXX_H__
lhiggs 0:03c649c76388 36
lhiggs 0:03c649c76388 37 _base = LPC_USART;
lhiggs 0:03c649c76388 38
lhiggs 0:03c649c76388 39 #else
lhiggs 0:03c649c76388 40 switch(_uidx) {
lhiggs 0:03c649c76388 41 case 0: _base = LPC_UART0; break;
lhiggs 0:03c649c76388 42 case 1: _base = LPC_UART1; break;
lhiggs 0:03c649c76388 43 case 2: _base = LPC_UART2; break;
lhiggs 0:03c649c76388 44 case 3: _base = LPC_UART3; break;
lhiggs 0:03c649c76388 45 default : _base = NULL; break;
lhiggs 0:03c649c76388 46 }
lhiggs 0:03c649c76388 47 #endif
lhiggs 0:03c649c76388 48
lhiggs 0:03c649c76388 49 dmaSendChannel = -1;
lhiggs 0:03c649c76388 50 moddma_p = (void *)NULL;
lhiggs 0:03c649c76388 51
lhiggs 0:03c649c76388 52 if (_base != NULL) {
lhiggs 0:03c649c76388 53 buffer_size[RxIrq] = rxSize;
lhiggs 0:03c649c76388 54 buffer[RxIrq] = rxSize > 0 ? (char *)malloc(buffer_size[RxIrq]) : (char *)NULL;
lhiggs 0:03c649c76388 55 buffer_in[RxIrq] = 0;
lhiggs 0:03c649c76388 56 buffer_out[RxIrq] = 0;
lhiggs 0:03c649c76388 57 buffer_count[RxIrq] = 0;
lhiggs 0:03c649c76388 58 buffer_overflow[RxIrq] = 0;
lhiggs 0:03c649c76388 59 Serial::attach(this, &MODSERIAL::isr_rx, Serial::RxIrq);
lhiggs 0:03c649c76388 60
lhiggs 0:03c649c76388 61 buffer_size[TxIrq] = txSize;
lhiggs 0:03c649c76388 62 buffer[TxIrq] = txSize > 0 ? (char *)malloc(buffer_size[TxIrq]) : (char *)NULL;
lhiggs 0:03c649c76388 63 buffer_in[TxIrq] = 0;
lhiggs 0:03c649c76388 64 buffer_out[TxIrq] = 0;
lhiggs 0:03c649c76388 65 buffer_count[TxIrq] = 0;
lhiggs 0:03c649c76388 66 buffer_overflow[TxIrq] = 0;
lhiggs 0:03c649c76388 67 Serial::attach(this, &MODSERIAL::isr_tx, Serial::TxIrq);
lhiggs 0:03c649c76388 68 }
lhiggs 0:03c649c76388 69 else {
lhiggs 0:03c649c76388 70 error("MODSERIAL must have a defined UART to function.");
lhiggs 0:03c649c76388 71 }
lhiggs 0:03c649c76388 72
lhiggs 0:03c649c76388 73 _FCR = MODSERIAL_FIFO_ENABLE | MODSERIAL_FIFO_RX_RESET | MODSERIAL_FIFO_TX_RESET;
lhiggs 0:03c649c76388 74
lhiggs 0:03c649c76388 75 auto_detect_char = 0;
lhiggs 0:03c649c76388 76
lhiggs 0:03c649c76388 77 enableIrq();
lhiggs 0:03c649c76388 78 }
lhiggs 0:03c649c76388 79
lhiggs 0:03c649c76388 80 }; // namespace AjK ends