Jasper Sikken / Mbed 2 deprecated HeartRate

This program displays heart rate and time between heart beats on LCD, prints it to a USB serial port, print it to a bluetooth serial port and store it on a USB mass storage device. The program has two interrupt routines: 1.Every 1ms a counter is increased with one, 2. On every heart beat the counter is value copied. In the main loop the beats per minute are calculated. Ext.Modules:- Polar RMCM-01 heart rate module connected to pin8. - 2x16 LCD - a RF-BT0417CB bluetooth serial device connected to p27 and p28 - an USB mass storage device

Dependencies:   TextLCD mbed

USBHostLite/usbhost_lpc17xx.c@2:e660e68a91fa, 2011-01-04 (annotated)

Committer:
jrsikken
Date:
Tue Jan 04 21:33:59 2011 +0000
Revision:
2:e660e68a91fa
Parent:
1:8b001f936bb0 
Now the heart rate is also send over a serial port to a bluetooth device.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jrsikken 1:8b001f936bb0 1 /*
jrsikken 1:8b001f936bb0 2 **************************************************************************************************************
jrsikken 1:8b001f936bb0 3 * NXP USB Host Stack
jrsikken 1:8b001f936bb0 4 *
jrsikken 1:8b001f936bb0 5 * (c) Copyright 2008, NXP SemiConductors
jrsikken 1:8b001f936bb0 6 * (c) Copyright 2008, OnChip Technologies LLC
jrsikken 1:8b001f936bb0 7 * All Rights Reserved
jrsikken 1:8b001f936bb0 8 *
jrsikken 1:8b001f936bb0 9 * www.nxp.com
jrsikken 1:8b001f936bb0 10 * www.onchiptech.com
jrsikken 1:8b001f936bb0 11 *
jrsikken 1:8b001f936bb0 12 * File : usbhost_lpc17xx.c
jrsikken 1:8b001f936bb0 13 * Programmer(s) : Ravikanth.P
jrsikken 1:8b001f936bb0 14 * Version :
jrsikken 1:8b001f936bb0 15 *
jrsikken 1:8b001f936bb0 16 **************************************************************************************************************
jrsikken 1:8b001f936bb0 17 */
jrsikken 1:8b001f936bb0 18
jrsikken 1:8b001f936bb0 19 /*
jrsikken 1:8b001f936bb0 20 **************************************************************************************************************
jrsikken 1:8b001f936bb0 21 * INCLUDE HEADER FILES
jrsikken 1:8b001f936bb0 22 **************************************************************************************************************
jrsikken 1:8b001f936bb0 23 */
jrsikken 1:8b001f936bb0 24
jrsikken 1:8b001f936bb0 25 #include "usbhost_lpc17xx.h"
jrsikken 1:8b001f936bb0 26
jrsikken 1:8b001f936bb0 27 /*
jrsikken 1:8b001f936bb0 28 **************************************************************************************************************
jrsikken 1:8b001f936bb0 29 * GLOBAL VARIABLES
jrsikken 1:8b001f936bb0 30 **************************************************************************************************************
jrsikken 1:8b001f936bb0 31 */
jrsikken 1:8b001f936bb0 32 int gUSBConnected;
jrsikken 1:8b001f936bb0 33
jrsikken 1:8b001f936bb0 34 volatile USB_INT32U HOST_RhscIntr = 0; /* Root Hub Status Change interrupt */
jrsikken 1:8b001f936bb0 35 volatile USB_INT32U HOST_WdhIntr = 0; /* Semaphore to wait until the TD is submitted */
jrsikken 1:8b001f936bb0 36 volatile USB_INT08U HOST_TDControlStatus = 0;
jrsikken 1:8b001f936bb0 37 volatile HCED *EDCtrl; /* Control endpoint descriptor structure */
jrsikken 1:8b001f936bb0 38 volatile HCED *EDBulkIn; /* BulkIn endpoint descriptor structure */
jrsikken 1:8b001f936bb0 39 volatile HCED *EDBulkOut; /* BulkOut endpoint descriptor structure */
jrsikken 1:8b001f936bb0 40 volatile HCTD *TDHead; /* Head transfer descriptor structure */
jrsikken 1:8b001f936bb0 41 volatile HCTD *TDTail; /* Tail transfer descriptor structure */
jrsikken 1:8b001f936bb0 42 volatile HCCA *Hcca; /* Host Controller Communications Area structure */
jrsikken 1:8b001f936bb0 43 USB_INT16U *TDBufNonVol; /* Identical to TDBuffer just to reduce compiler warnings */
jrsikken 1:8b001f936bb0 44 volatile USB_INT08U *TDBuffer; /* Current Buffer Pointer of transfer descriptor */
jrsikken 1:8b001f936bb0 45
jrsikken 1:8b001f936bb0 46 // USB host structures
jrsikken 1:8b001f936bb0 47 // AHB SRAM block 1
jrsikken 1:8b001f936bb0 48 #define HOSTBASEADDR 0x2007C000
jrsikken 1:8b001f936bb0 49 // reserve memory for the linker
jrsikken 1:8b001f936bb0 50 static USB_INT08U HostBuf[0x200] __attribute__((at(HOSTBASEADDR)));
jrsikken 1:8b001f936bb0 51 /*
jrsikken 1:8b001f936bb0 52 **************************************************************************************************************
jrsikken 1:8b001f936bb0 53 * DELAY IN MILLI SECONDS
jrsikken 1:8b001f936bb0 54 *
jrsikken 1:8b001f936bb0 55 * Description: This function provides a delay in milli seconds
jrsikken 1:8b001f936bb0 56 *
jrsikken 1:8b001f936bb0 57 * Arguments : delay The delay required
jrsikken 1:8b001f936bb0 58 *
jrsikken 1:8b001f936bb0 59 * Returns : None
jrsikken 1:8b001f936bb0 60 *
jrsikken 1:8b001f936bb0 61 **************************************************************************************************************
jrsikken 1:8b001f936bb0 62 */
jrsikken 1:8b001f936bb0 63
jrsikken 1:8b001f936bb0 64 void Host_DelayMS (USB_INT32U delay)
jrsikken 1:8b001f936bb0 65 {
jrsikken 1:8b001f936bb0 66 volatile USB_INT32U i;
jrsikken 1:8b001f936bb0 67
jrsikken 1:8b001f936bb0 68
jrsikken 1:8b001f936bb0 69 for (i = 0; i < delay; i++) {
jrsikken 1:8b001f936bb0 70 Host_DelayUS(1000);
jrsikken 1:8b001f936bb0 71 }
jrsikken 1:8b001f936bb0 72 }
jrsikken 1:8b001f936bb0 73
jrsikken 1:8b001f936bb0 74 /*
jrsikken 1:8b001f936bb0 75 **************************************************************************************************************
jrsikken 1:8b001f936bb0 76 * DELAY IN MICRO SECONDS
jrsikken 1:8b001f936bb0 77 *
jrsikken 1:8b001f936bb0 78 * Description: This function provides a delay in micro seconds
jrsikken 1:8b001f936bb0 79 *
jrsikken 1:8b001f936bb0 80 * Arguments : delay The delay required
jrsikken 1:8b001f936bb0 81 *
jrsikken 1:8b001f936bb0 82 * Returns : None
jrsikken 1:8b001f936bb0 83 *
jrsikken 1:8b001f936bb0 84 **************************************************************************************************************
jrsikken 1:8b001f936bb0 85 */
jrsikken 1:8b001f936bb0 86
jrsikken 1:8b001f936bb0 87 void Host_DelayUS (USB_INT32U delay)
jrsikken 1:8b001f936bb0 88 {
jrsikken 1:8b001f936bb0 89 volatile USB_INT32U i;
jrsikken 1:8b001f936bb0 90
jrsikken 1:8b001f936bb0 91
jrsikken 1:8b001f936bb0 92 for (i = 0; i < (4 * delay); i++) { /* This logic was tested. It gives app. 1 micro sec delay */
jrsikken 1:8b001f936bb0 93 ;
jrsikken 1:8b001f936bb0 94 }
jrsikken 1:8b001f936bb0 95 }
jrsikken 1:8b001f936bb0 96
jrsikken 1:8b001f936bb0 97 // bits of the USB/OTG clock control register
jrsikken 1:8b001f936bb0 98 #define HOST_CLK_EN (1<<0)
jrsikken 1:8b001f936bb0 99 #define DEV_CLK_EN (1<<1)
jrsikken 1:8b001f936bb0 100 #define PORTSEL_CLK_EN (1<<3)
jrsikken 1:8b001f936bb0 101 #define AHB_CLK_EN (1<<4)
jrsikken 1:8b001f936bb0 102
jrsikken 1:8b001f936bb0 103 // bits of the USB/OTG clock status register
jrsikken 1:8b001f936bb0 104 #define HOST_CLK_ON (1<<0)
jrsikken 1:8b001f936bb0 105 #define DEV_CLK_ON (1<<1)
jrsikken 1:8b001f936bb0 106 #define PORTSEL_CLK_ON (1<<3)
jrsikken 1:8b001f936bb0 107 #define AHB_CLK_ON (1<<4)
jrsikken 1:8b001f936bb0 108
jrsikken 1:8b001f936bb0 109 // we need host clock, OTG/portsel clock and AHB clock
jrsikken 1:8b001f936bb0 110 #define CLOCK_MASK (HOST_CLK_EN | PORTSEL_CLK_EN | AHB_CLK_EN)
jrsikken 1:8b001f936bb0 111
jrsikken 1:8b001f936bb0 112 /*
jrsikken 1:8b001f936bb0 113 **************************************************************************************************************
jrsikken 1:8b001f936bb0 114 * INITIALIZE THE HOST CONTROLLER
jrsikken 1:8b001f936bb0 115 *
jrsikken 1:8b001f936bb0 116 * Description: This function initializes lpc17xx host controller
jrsikken 1:8b001f936bb0 117 *
jrsikken 1:8b001f936bb0 118 * Arguments : None
jrsikken 1:8b001f936bb0 119 *
jrsikken 1:8b001f936bb0 120 * Returns :
jrsikken 1:8b001f936bb0 121 *
jrsikken 1:8b001f936bb0 122 **************************************************************************************************************
jrsikken 1:8b001f936bb0 123 */
jrsikken 1:8b001f936bb0 124 void Host_Init (void)
jrsikken 1:8b001f936bb0 125 {
jrsikken 1:8b001f936bb0 126 PRINT_Log("In Host_Init\n");
jrsikken 1:8b001f936bb0 127 NVIC_DisableIRQ(USB_IRQn); /* Disable the USB interrupt source */
jrsikken 1:8b001f936bb0 128
jrsikken 1:8b001f936bb0 129 // turn on power for USB
jrsikken 1:8b001f936bb0 130 LPC_SC->PCONP |= (1UL<<31);
jrsikken 1:8b001f936bb0 131 // Enable USB host clock, port selection and AHB clock
jrsikken 1:8b001f936bb0 132 LPC_USB->USBClkCtrl |= CLOCK_MASK;
jrsikken 1:8b001f936bb0 133 // Wait for clocks to become available
jrsikken 1:8b001f936bb0 134 while ((LPC_USB->USBClkSt & CLOCK_MASK) != CLOCK_MASK)
jrsikken 1:8b001f936bb0 135 ;
jrsikken 1:8b001f936bb0 136
jrsikken 1:8b001f936bb0 137 // it seems the bits[0:1] mean the following
jrsikken 1:8b001f936bb0 138 // 0: U1=device, U2=host
jrsikken 1:8b001f936bb0 139 // 1: U1=host, U2=host
jrsikken 1:8b001f936bb0 140 // 2: reserved
jrsikken 1:8b001f936bb0 141 // 3: U1=host, U2=device
jrsikken 1:8b001f936bb0 142 // NB: this register is only available if OTG clock (aka "port select") is enabled!!
jrsikken 1:8b001f936bb0 143 // since we don't care about port 2, set just bit 0 to 1 (U1=host)
jrsikken 1:8b001f936bb0 144 LPC_USB->OTGStCtrl |= 1;
jrsikken 1:8b001f936bb0 145
jrsikken 1:8b001f936bb0 146 // now that we've configured the ports, we can turn off the portsel clock
jrsikken 1:8b001f936bb0 147 LPC_USB->USBClkCtrl &= ~PORTSEL_CLK_EN;
jrsikken 1:8b001f936bb0 148
jrsikken 1:8b001f936bb0 149 // power pins are not connected on mbed, so we can skip them
jrsikken 1:8b001f936bb0 150 /* P1[18] = USB_UP_LED, 01 */
jrsikken 1:8b001f936bb0 151 /* P1[19] = /USB_PPWR, 10 */
jrsikken 1:8b001f936bb0 152 /* P1[22] = USB_PWRD, 10 */
jrsikken 1:8b001f936bb0 153 /* P1[27] = /USB_OVRCR, 10 */
jrsikken 1:8b001f936bb0 154 /*LPC_PINCON->PINSEL3 &= ~((3<<4) | (3<<6) | (3<<12) | (3<<22));
jrsikken 1:8b001f936bb0 155 LPC_PINCON->PINSEL3 |= ((1<<4)|(2<<6) | (2<<12) | (2<<22)); // 0x00802080
jrsikken 1:8b001f936bb0 156 */
jrsikken 1:8b001f936bb0 157
jrsikken 1:8b001f936bb0 158 // configure USB D+/D- pins
jrsikken 1:8b001f936bb0 159 /* P0[29] = USB_D+, 01 */
jrsikken 1:8b001f936bb0 160 /* P0[30] = USB_D-, 01 */
jrsikken 1:8b001f936bb0 161 LPC_PINCON->PINSEL1 &= ~((3<<26) | (3<<28));
jrsikken 1:8b001f936bb0 162 LPC_PINCON->PINSEL1 |= ((1<<26)|(1<<28)); // 0x14000000
jrsikken 1:8b001f936bb0 163
jrsikken 1:8b001f936bb0 164 PRINT_Log("Initializing Host Stack\n");
jrsikken 1:8b001f936bb0 165
jrsikken 1:8b001f936bb0 166 Hcca = (volatile HCCA *)(HostBuf+0x000);
jrsikken 1:8b001f936bb0 167 TDHead = (volatile HCTD *)(HostBuf+0x100);
jrsikken 1:8b001f936bb0 168 TDTail = (volatile HCTD *)(HostBuf+0x110);
jrsikken 1:8b001f936bb0 169 EDCtrl = (volatile HCED *)(HostBuf+0x120);
jrsikken 1:8b001f936bb0 170 EDBulkIn = (volatile HCED *)(HostBuf+0x130);
jrsikken 1:8b001f936bb0 171 EDBulkOut = (volatile HCED *)(HostBuf+0x140);
jrsikken 1:8b001f936bb0 172 TDBuffer = (volatile USB_INT08U *)(HostBuf+0x150);
jrsikken 1:8b001f936bb0 173
jrsikken 1:8b001f936bb0 174 /* Initialize all the TDs, EDs and HCCA to 0 */
jrsikken 1:8b001f936bb0 175 Host_EDInit(EDCtrl);
jrsikken 1:8b001f936bb0 176 Host_EDInit(EDBulkIn);
jrsikken 1:8b001f936bb0 177 Host_EDInit(EDBulkOut);
jrsikken 1:8b001f936bb0 178 Host_TDInit(TDHead);
jrsikken 1:8b001f936bb0 179 Host_TDInit(TDTail);
jrsikken 1:8b001f936bb0 180 Host_HCCAInit(Hcca);
jrsikken 1:8b001f936bb0 181
jrsikken 1:8b001f936bb0 182 Host_DelayMS(50); /* Wait 50 ms before apply reset */
jrsikken 1:8b001f936bb0 183 LPC_USB->HcControl = 0; /* HARDWARE RESET */
jrsikken 1:8b001f936bb0 184 LPC_USB->HcControlHeadED = 0; /* Initialize Control list head to Zero */
jrsikken 1:8b001f936bb0 185 LPC_USB->HcBulkHeadED = 0; /* Initialize Bulk list head to Zero */
jrsikken 1:8b001f936bb0 186
jrsikken 1:8b001f936bb0 187 /* SOFTWARE RESET */
jrsikken 1:8b001f936bb0 188 LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR;
jrsikken 1:8b001f936bb0 189 LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL; /* Write Fm Interval and Largest Data Packet Counter */
jrsikken 1:8b001f936bb0 190
jrsikken 1:8b001f936bb0 191 /* Put HC in operational state */
jrsikken 1:8b001f936bb0 192 LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER;
jrsikken 1:8b001f936bb0 193 LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC; /* Set Global Power */
jrsikken 1:8b001f936bb0 194
jrsikken 1:8b001f936bb0 195 LPC_USB->HcHCCA = (USB_INT32U)Hcca;
jrsikken 1:8b001f936bb0 196 LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus; /* Clear Interrrupt Status */
jrsikken 1:8b001f936bb0 197
jrsikken 1:8b001f936bb0 198
jrsikken 1:8b001f936bb0 199 LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE |
jrsikken 1:8b001f936bb0 200 OR_INTR_ENABLE_WDH |
jrsikken 1:8b001f936bb0 201 OR_INTR_ENABLE_RHSC;
jrsikken 1:8b001f936bb0 202
jrsikken 1:8b001f936bb0 203 NVIC_SetPriority(USB_IRQn, 0); /* highest priority */
jrsikken 1:8b001f936bb0 204 /* Enable the USB Interrupt */
jrsikken 1:8b001f936bb0 205 NVIC_EnableIRQ(USB_IRQn);
jrsikken 1:8b001f936bb0 206 PRINT_Log("Host Initialized\n");
jrsikken 1:8b001f936bb0 207 }
jrsikken 1:8b001f936bb0 208
jrsikken 1:8b001f936bb0 209 /*
jrsikken 1:8b001f936bb0 210 **************************************************************************************************************
jrsikken 1:8b001f936bb0 211 * INTERRUPT SERVICE ROUTINE
jrsikken 1:8b001f936bb0 212 *
jrsikken 1:8b001f936bb0 213 * Description: This function services the interrupt caused by host controller
jrsikken 1:8b001f936bb0 214 *
jrsikken 1:8b001f936bb0 215 * Arguments : None
jrsikken 1:8b001f936bb0 216 *
jrsikken 1:8b001f936bb0 217 * Returns : None
jrsikken 1:8b001f936bb0 218 *
jrsikken 1:8b001f936bb0 219 **************************************************************************************************************
jrsikken 1:8b001f936bb0 220 */
jrsikken 1:8b001f936bb0 221
jrsikken 1:8b001f936bb0 222 void USB_IRQHandler (void) __irq
jrsikken 1:8b001f936bb0 223 {
jrsikken 1:8b001f936bb0 224 USB_INT32U int_status;
jrsikken 1:8b001f936bb0 225 USB_INT32U ie_status;
jrsikken 1:8b001f936bb0 226
jrsikken 1:8b001f936bb0 227 int_status = LPC_USB->HcInterruptStatus; /* Read Interrupt Status */
jrsikken 1:8b001f936bb0 228 ie_status = LPC_USB->HcInterruptEnable; /* Read Interrupt enable status */
jrsikken 1:8b001f936bb0 229
jrsikken 1:8b001f936bb0 230 if (!(int_status & ie_status)) {
jrsikken 1:8b001f936bb0 231 return;
jrsikken 1:8b001f936bb0 232 } else {
jrsikken 1:8b001f936bb0 233
jrsikken 1:8b001f936bb0 234 int_status = int_status & ie_status;
jrsikken 1:8b001f936bb0 235 if (int_status & OR_INTR_STATUS_RHSC) { /* Root hub status change interrupt */
jrsikken 1:8b001f936bb0 236 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CSC) {
jrsikken 1:8b001f936bb0 237 if (LPC_USB->HcRhStatus & OR_RH_STATUS_DRWE) {
jrsikken 1:8b001f936bb0 238 /*
jrsikken 1:8b001f936bb0 239 * When DRWE is on, Connect Status Change
jrsikken 1:8b001f936bb0 240 * means a remote wakeup event.
jrsikken 1:8b001f936bb0 241 */
jrsikken 1:8b001f936bb0 242 HOST_RhscIntr = 1;// JUST SOMETHING FOR A BREAKPOINT
jrsikken 1:8b001f936bb0 243 }
jrsikken 1:8b001f936bb0 244 else {
jrsikken 1:8b001f936bb0 245 /*
jrsikken 1:8b001f936bb0 246 * When DRWE is off, Connect Status Change
jrsikken 1:8b001f936bb0 247 * is NOT a remote wakeup event
jrsikken 1:8b001f936bb0 248 */
jrsikken 1:8b001f936bb0 249 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) {
jrsikken 1:8b001f936bb0 250 if (!gUSBConnected) {
jrsikken 1:8b001f936bb0 251 HOST_TDControlStatus = 0;
jrsikken 1:8b001f936bb0 252 HOST_WdhIntr = 0;
jrsikken 1:8b001f936bb0 253 HOST_RhscIntr = 1;
jrsikken 1:8b001f936bb0 254 gUSBConnected = 1;
jrsikken 1:8b001f936bb0 255 }
jrsikken 1:8b001f936bb0 256 else
jrsikken 1:8b001f936bb0 257 PRINT_Log("Spurious status change (connected)?\n");
jrsikken 1:8b001f936bb0 258 } else {
jrsikken 1:8b001f936bb0 259 if (gUSBConnected) {
jrsikken 1:8b001f936bb0 260 LPC_USB->HcInterruptEnable = 0; // why do we get multiple disc. rupts???
jrsikken 1:8b001f936bb0 261 HOST_RhscIntr = 0;
jrsikken 1:8b001f936bb0 262 gUSBConnected = 0;
jrsikken 1:8b001f936bb0 263 }
jrsikken 1:8b001f936bb0 264 else
jrsikken 1:8b001f936bb0 265 PRINT_Log("Spurious status change (disconnected)?\n");
jrsikken 1:8b001f936bb0 266 }
jrsikken 1:8b001f936bb0 267 }
jrsikken 1:8b001f936bb0 268 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
jrsikken 1:8b001f936bb0 269 }
jrsikken 1:8b001f936bb0 270 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRSC) {
jrsikken 1:8b001f936bb0 271 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
jrsikken 1:8b001f936bb0 272 }
jrsikken 1:8b001f936bb0 273 }
jrsikken 1:8b001f936bb0 274 if (int_status & OR_INTR_STATUS_WDH) { /* Writeback Done Head interrupt */
jrsikken 1:8b001f936bb0 275 HOST_WdhIntr = 1;
jrsikken 1:8b001f936bb0 276 HOST_TDControlStatus = (TDHead->Control >> 28) & 0xf;
jrsikken 1:8b001f936bb0 277 }
jrsikken 1:8b001f936bb0 278 LPC_USB->HcInterruptStatus = int_status; /* Clear interrupt status register */
jrsikken 1:8b001f936bb0 279 }
jrsikken 1:8b001f936bb0 280 return;
jrsikken 1:8b001f936bb0 281 }
jrsikken 1:8b001f936bb0 282
jrsikken 1:8b001f936bb0 283 /*
jrsikken 1:8b001f936bb0 284 **************************************************************************************************************
jrsikken 1:8b001f936bb0 285 * PROCESS TRANSFER DESCRIPTOR
jrsikken 1:8b001f936bb0 286 *
jrsikken 1:8b001f936bb0 287 * Description: This function processes the transfer descriptor
jrsikken 1:8b001f936bb0 288 *
jrsikken 1:8b001f936bb0 289 * Arguments : ed Endpoint descriptor that contains this transfer descriptor
jrsikken 1:8b001f936bb0 290 * token SETUP, IN, OUT
jrsikken 1:8b001f936bb0 291 * buffer Current Buffer Pointer of the transfer descriptor
jrsikken 1:8b001f936bb0 292 * buffer_len Length of the buffer
jrsikken 1:8b001f936bb0 293 *
jrsikken 1:8b001f936bb0 294 * Returns : OK if TD submission is successful
jrsikken 1:8b001f936bb0 295 * ERROR if TD submission fails
jrsikken 1:8b001f936bb0 296 *
jrsikken 1:8b001f936bb0 297 **************************************************************************************************************
jrsikken 1:8b001f936bb0 298 */
jrsikken 1:8b001f936bb0 299
jrsikken 1:8b001f936bb0 300 USB_INT32S Host_ProcessTD (volatile HCED *ed,
jrsikken 1:8b001f936bb0 301 volatile USB_INT32U token,
jrsikken 1:8b001f936bb0 302 volatile USB_INT08U *buffer,
jrsikken 1:8b001f936bb0 303 USB_INT32U buffer_len)
jrsikken 1:8b001f936bb0 304 {
jrsikken 1:8b001f936bb0 305 volatile USB_INT32U td_toggle;
jrsikken 1:8b001f936bb0 306
jrsikken 1:8b001f936bb0 307
jrsikken 1:8b001f936bb0 308 if (ed == EDCtrl) {
jrsikken 1:8b001f936bb0 309 if (token == TD_SETUP) {
jrsikken 1:8b001f936bb0 310 td_toggle = TD_TOGGLE_0;
jrsikken 1:8b001f936bb0 311 } else {
jrsikken 1:8b001f936bb0 312 td_toggle = TD_TOGGLE_1;
jrsikken 1:8b001f936bb0 313 }
jrsikken 1:8b001f936bb0 314 } else {
jrsikken 1:8b001f936bb0 315 td_toggle = 0;
jrsikken 1:8b001f936bb0 316 }
jrsikken 1:8b001f936bb0 317 TDHead->Control = (TD_ROUNDING |
jrsikken 1:8b001f936bb0 318 token |
jrsikken 1:8b001f936bb0 319 TD_DELAY_INT(0) |
jrsikken 1:8b001f936bb0 320 td_toggle |
jrsikken 1:8b001f936bb0 321 TD_CC);
jrsikken 1:8b001f936bb0 322 TDTail->Control = 0;
jrsikken 1:8b001f936bb0 323 TDHead->CurrBufPtr = (USB_INT32U) buffer;
jrsikken 1:8b001f936bb0 324 TDTail->CurrBufPtr = 0;
jrsikken 1:8b001f936bb0 325 TDHead->Next = (USB_INT32U) TDTail;
jrsikken 1:8b001f936bb0 326 TDTail->Next = 0;
jrsikken 1:8b001f936bb0 327 TDHead->BufEnd = (USB_INT32U)(buffer + (buffer_len - 1));
jrsikken 1:8b001f936bb0 328 TDTail->BufEnd = 0;
jrsikken 1:8b001f936bb0 329
jrsikken 1:8b001f936bb0 330 ed->HeadTd = (USB_INT32U)TDHead | ((ed->HeadTd) & 0x00000002);
jrsikken 1:8b001f936bb0 331 ed->TailTd = (USB_INT32U)TDTail;
jrsikken 1:8b001f936bb0 332 ed->Next = 0;
jrsikken 1:8b001f936bb0 333
jrsikken 1:8b001f936bb0 334 if (ed == EDCtrl) {
jrsikken 1:8b001f936bb0 335 LPC_USB->HcControlHeadED = (USB_INT32U)ed;
jrsikken 1:8b001f936bb0 336 LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_CLF;
jrsikken 1:8b001f936bb0 337 LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_CLE;
jrsikken 1:8b001f936bb0 338 } else {
jrsikken 1:8b001f936bb0 339 LPC_USB->HcBulkHeadED = (USB_INT32U)ed;
jrsikken 1:8b001f936bb0 340 LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_BLF;
jrsikken 1:8b001f936bb0 341 LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_BLE;
jrsikken 1:8b001f936bb0 342 }
jrsikken 1:8b001f936bb0 343
jrsikken 1:8b001f936bb0 344 Host_WDHWait();
jrsikken 1:8b001f936bb0 345
jrsikken 1:8b001f936bb0 346 // if (!(TDHead->Control & 0xF0000000)) {
jrsikken 1:8b001f936bb0 347 if (!HOST_TDControlStatus) {
jrsikken 1:8b001f936bb0 348 return (OK);
jrsikken 1:8b001f936bb0 349 } else {
jrsikken 1:8b001f936bb0 350 return (ERR_TD_FAIL);
jrsikken 1:8b001f936bb0 351 }
jrsikken 1:8b001f936bb0 352 }
jrsikken 1:8b001f936bb0 353
jrsikken 1:8b001f936bb0 354 /*
jrsikken 1:8b001f936bb0 355 **************************************************************************************************************
jrsikken 1:8b001f936bb0 356 * ENUMERATE THE DEVICE
jrsikken 1:8b001f936bb0 357 *
jrsikken 1:8b001f936bb0 358 * Description: This function is used to enumerate the device connected
jrsikken 1:8b001f936bb0 359 *
jrsikken 1:8b001f936bb0 360 * Arguments : None
jrsikken 1:8b001f936bb0 361 *
jrsikken 1:8b001f936bb0 362 * Returns : None
jrsikken 1:8b001f936bb0 363 *
jrsikken 1:8b001f936bb0 364 **************************************************************************************************************
jrsikken 1:8b001f936bb0 365 */
jrsikken 1:8b001f936bb0 366
jrsikken 1:8b001f936bb0 367 USB_INT32S Host_EnumDev (void)
jrsikken 1:8b001f936bb0 368 {
jrsikken 1:8b001f936bb0 369 USB_INT32S rc;
jrsikken 1:8b001f936bb0 370
jrsikken 1:8b001f936bb0 371 PRINT_Log("Connect a Mass Storage device\n");
jrsikken 1:8b001f936bb0 372 while (!HOST_RhscIntr)
jrsikken 1:8b001f936bb0 373 __WFI();
jrsikken 1:8b001f936bb0 374 Host_DelayMS(100); /* USB 2.0 spec says atleast 50ms delay beore port reset */
jrsikken 1:8b001f936bb0 375 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRS; // Initiate port reset
jrsikken 1:8b001f936bb0 376 while (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRS)
jrsikken 1:8b001f936bb0 377 __WFI(); // Wait for port reset to complete...
jrsikken 1:8b001f936bb0 378 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; // ...and clear port reset signal
jrsikken 1:8b001f936bb0 379 Host_DelayMS(200); /* Wait for 100 MS after port reset */
jrsikken 1:8b001f936bb0 380
jrsikken 1:8b001f936bb0 381 EDCtrl->Control = 8 << 16; /* Put max pkt size = 8 */
jrsikken 1:8b001f936bb0 382 /* Read first 8 bytes of device desc */
jrsikken 1:8b001f936bb0 383 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_DEVICE, 0, TDBuffer, 8);
jrsikken 1:8b001f936bb0 384 if (rc != OK) {
jrsikken 1:8b001f936bb0 385 PRINT_Err(rc);
jrsikken 1:8b001f936bb0 386 return (rc);
jrsikken 1:8b001f936bb0 387 }
jrsikken 1:8b001f936bb0 388 EDCtrl->Control = TDBuffer[7] << 16; /* Get max pkt size of endpoint 0 */
jrsikken 1:8b001f936bb0 389 rc = HOST_SET_ADDRESS(1); /* Set the device address to 1 */
jrsikken 1:8b001f936bb0 390 if (rc != OK) {
jrsikken 1:8b001f936bb0 391 PRINT_Err(rc);
jrsikken 1:8b001f936bb0 392 return (rc);
jrsikken 1:8b001f936bb0 393 }
jrsikken 1:8b001f936bb0 394 Host_DelayMS(2);
jrsikken 1:8b001f936bb0 395 EDCtrl->Control = (EDCtrl->Control) | 1; /* Modify control pipe with address 1 */
jrsikken 1:8b001f936bb0 396 /* Get the configuration descriptor */
jrsikken 1:8b001f936bb0 397 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, 9);
jrsikken 1:8b001f936bb0 398 if (rc != OK) {
jrsikken 1:8b001f936bb0 399 PRINT_Err(rc);
jrsikken 1:8b001f936bb0 400 return (rc);
jrsikken 1:8b001f936bb0 401 }
jrsikken 1:8b001f936bb0 402 /* Get the first configuration data */
jrsikken 1:8b001f936bb0 403 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, ReadLE16U(&TDBuffer[2]));
jrsikken 1:8b001f936bb0 404 if (rc != OK) {
jrsikken 1:8b001f936bb0 405 PRINT_Err(rc);
jrsikken 1:8b001f936bb0 406 return (rc);
jrsikken 1:8b001f936bb0 407 }
jrsikken 1:8b001f936bb0 408 rc = MS_ParseConfiguration(); /* Parse the configuration */
jrsikken 1:8b001f936bb0 409 if (rc != OK) {
jrsikken 1:8b001f936bb0 410 PRINT_Err(rc);
jrsikken 1:8b001f936bb0 411 return (rc);
jrsikken 1:8b001f936bb0 412 }
jrsikken 1:8b001f936bb0 413 rc = USBH_SET_CONFIGURATION(1); /* Select device configuration 1 */
jrsikken 1:8b001f936bb0 414 if (rc != OK) {
jrsikken 1:8b001f936bb0 415 PRINT_Err(rc);
jrsikken 1:8b001f936bb0 416 }
jrsikken 1:8b001f936bb0 417 Host_DelayMS(100); /* Some devices may require this delay */
jrsikken 1:8b001f936bb0 418 return (rc);
jrsikken 1:8b001f936bb0 419 }
jrsikken 1:8b001f936bb0 420
jrsikken 1:8b001f936bb0 421 /*
jrsikken 1:8b001f936bb0 422 **************************************************************************************************************
jrsikken 1:8b001f936bb0 423 * RECEIVE THE CONTROL INFORMATION
jrsikken 1:8b001f936bb0 424 *
jrsikken 1:8b001f936bb0 425 * Description: This function is used to receive the control information
jrsikken 1:8b001f936bb0 426 *
jrsikken 1:8b001f936bb0 427 * Arguments : bm_request_type
jrsikken 1:8b001f936bb0 428 * b_request
jrsikken 1:8b001f936bb0 429 * w_value
jrsikken 1:8b001f936bb0 430 * w_index
jrsikken 1:8b001f936bb0 431 * w_length
jrsikken 1:8b001f936bb0 432 * buffer
jrsikken 1:8b001f936bb0 433 *
jrsikken 1:8b001f936bb0 434 * Returns : OK if Success
jrsikken 1:8b001f936bb0 435 * ERROR if Failed
jrsikken 1:8b001f936bb0 436 *
jrsikken 1:8b001f936bb0 437 **************************************************************************************************************
jrsikken 1:8b001f936bb0 438 */
jrsikken 1:8b001f936bb0 439
jrsikken 1:8b001f936bb0 440 USB_INT32S Host_CtrlRecv ( USB_INT08U bm_request_type,
jrsikken 1:8b001f936bb0 441 USB_INT08U b_request,
jrsikken 1:8b001f936bb0 442 USB_INT16U w_value,
jrsikken 1:8b001f936bb0 443 USB_INT16U w_index,
jrsikken 1:8b001f936bb0 444 USB_INT16U w_length,
jrsikken 1:8b001f936bb0 445 volatile USB_INT08U *buffer)
jrsikken 1:8b001f936bb0 446 {
jrsikken 1:8b001f936bb0 447 USB_INT32S rc;
jrsikken 1:8b001f936bb0 448
jrsikken 1:8b001f936bb0 449
jrsikken 1:8b001f936bb0 450 Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
jrsikken 1:8b001f936bb0 451 rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
jrsikken 1:8b001f936bb0 452 if (rc == OK) {
jrsikken 1:8b001f936bb0 453 if (w_length) {
jrsikken 1:8b001f936bb0 454 rc = Host_ProcessTD(EDCtrl, TD_IN, TDBuffer, w_length);
jrsikken 1:8b001f936bb0 455 }
jrsikken 1:8b001f936bb0 456 if (rc == OK) {
jrsikken 1:8b001f936bb0 457 rc = Host_ProcessTD(EDCtrl, TD_OUT, NULL, 0);
jrsikken 1:8b001f936bb0 458 }
jrsikken 1:8b001f936bb0 459 }
jrsikken 1:8b001f936bb0 460 return (rc);
jrsikken 1:8b001f936bb0 461 }
jrsikken 1:8b001f936bb0 462
jrsikken 1:8b001f936bb0 463 /*
jrsikken 1:8b001f936bb0 464 **************************************************************************************************************
jrsikken 1:8b001f936bb0 465 * SEND THE CONTROL INFORMATION
jrsikken 1:8b001f936bb0 466 *
jrsikken 1:8b001f936bb0 467 * Description: This function is used to send the control information
jrsikken 1:8b001f936bb0 468 *
jrsikken 1:8b001f936bb0 469 * Arguments : None
jrsikken 1:8b001f936bb0 470 *
jrsikken 1:8b001f936bb0 471 * Returns : OK if Success
jrsikken 1:8b001f936bb0 472 * ERR_INVALID_BOOTSIG if Failed
jrsikken 1:8b001f936bb0 473 *
jrsikken 1:8b001f936bb0 474 **************************************************************************************************************
jrsikken 1:8b001f936bb0 475 */
jrsikken 1:8b001f936bb0 476
jrsikken 1:8b001f936bb0 477 USB_INT32S Host_CtrlSend ( USB_INT08U bm_request_type,
jrsikken 1:8b001f936bb0 478 USB_INT08U b_request,
jrsikken 1:8b001f936bb0 479 USB_INT16U w_value,
jrsikken 1:8b001f936bb0 480 USB_INT16U w_index,
jrsikken 1:8b001f936bb0 481 USB_INT16U w_length,
jrsikken 1:8b001f936bb0 482 volatile USB_INT08U *buffer)
jrsikken 1:8b001f936bb0 483 {
jrsikken 1:8b001f936bb0 484 USB_INT32S rc;
jrsikken 1:8b001f936bb0 485
jrsikken 1:8b001f936bb0 486
jrsikken 1:8b001f936bb0 487 Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
jrsikken 1:8b001f936bb0 488
jrsikken 1:8b001f936bb0 489 rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
jrsikken 1:8b001f936bb0 490 if (rc == OK) {
jrsikken 1:8b001f936bb0 491 if (w_length) {
jrsikken 1:8b001f936bb0 492 rc = Host_ProcessTD(EDCtrl, TD_OUT, TDBuffer, w_length);
jrsikken 1:8b001f936bb0 493 }
jrsikken 1:8b001f936bb0 494 if (rc == OK) {
jrsikken 1:8b001f936bb0 495 rc = Host_ProcessTD(EDCtrl, TD_IN, NULL, 0);
jrsikken 1:8b001f936bb0 496 }
jrsikken 1:8b001f936bb0 497 }
jrsikken 1:8b001f936bb0 498 return (rc);
jrsikken 1:8b001f936bb0 499 }
jrsikken 1:8b001f936bb0 500
jrsikken 1:8b001f936bb0 501 /*
jrsikken 1:8b001f936bb0 502 **************************************************************************************************************
jrsikken 1:8b001f936bb0 503 * FILL SETUP PACKET
jrsikken 1:8b001f936bb0 504 *
jrsikken 1:8b001f936bb0 505 * Description: This function is used to fill the setup packet
jrsikken 1:8b001f936bb0 506 *
jrsikken 1:8b001f936bb0 507 * Arguments : None
jrsikken 1:8b001f936bb0 508 *
jrsikken 1:8b001f936bb0 509 * Returns : OK if Success
jrsikken 1:8b001f936bb0 510 * ERR_INVALID_BOOTSIG if Failed
jrsikken 1:8b001f936bb0 511 *
jrsikken 1:8b001f936bb0 512 **************************************************************************************************************
jrsikken 1:8b001f936bb0 513 */
jrsikken 1:8b001f936bb0 514
jrsikken 1:8b001f936bb0 515 void Host_FillSetup (USB_INT08U bm_request_type,
jrsikken 1:8b001f936bb0 516 USB_INT08U b_request,
jrsikken 1:8b001f936bb0 517 USB_INT16U w_value,
jrsikken 1:8b001f936bb0 518 USB_INT16U w_index,
jrsikken 1:8b001f936bb0 519 USB_INT16U w_length)
jrsikken 1:8b001f936bb0 520 {
jrsikken 1:8b001f936bb0 521 int i;
jrsikken 1:8b001f936bb0 522 for (i=0;i<w_length;i++)
jrsikken 1:8b001f936bb0 523 TDBuffer[i] = 0;
jrsikken 1:8b001f936bb0 524
jrsikken 1:8b001f936bb0 525 TDBuffer[0] = bm_request_type;
jrsikken 1:8b001f936bb0 526 TDBuffer[1] = b_request;
jrsikken 1:8b001f936bb0 527 WriteLE16U(&TDBuffer[2], w_value);
jrsikken 1:8b001f936bb0 528 WriteLE16U(&TDBuffer[4], w_index);
jrsikken 1:8b001f936bb0 529 WriteLE16U(&TDBuffer[6], w_length);
jrsikken 1:8b001f936bb0 530 }
jrsikken 1:8b001f936bb0 531
jrsikken 1:8b001f936bb0 532
jrsikken 1:8b001f936bb0 533
jrsikken 1:8b001f936bb0 534 /*
jrsikken 1:8b001f936bb0 535 **************************************************************************************************************
jrsikken 1:8b001f936bb0 536 * INITIALIZE THE TRANSFER DESCRIPTOR
jrsikken 1:8b001f936bb0 537 *
jrsikken 1:8b001f936bb0 538 * Description: This function initializes transfer descriptor
jrsikken 1:8b001f936bb0 539 *
jrsikken 1:8b001f936bb0 540 * Arguments : Pointer to TD structure
jrsikken 1:8b001f936bb0 541 *
jrsikken 1:8b001f936bb0 542 * Returns : None
jrsikken 1:8b001f936bb0 543 *
jrsikken 1:8b001f936bb0 544 **************************************************************************************************************
jrsikken 1:8b001f936bb0 545 */
jrsikken 1:8b001f936bb0 546
jrsikken 1:8b001f936bb0 547 void Host_TDInit (volatile HCTD *td)
jrsikken 1:8b001f936bb0 548 {
jrsikken 1:8b001f936bb0 549
jrsikken 1:8b001f936bb0 550 td->Control = 0;
jrsikken 1:8b001f936bb0 551 td->CurrBufPtr = 0;
jrsikken 1:8b001f936bb0 552 td->Next = 0;
jrsikken 1:8b001f936bb0 553 td->BufEnd = 0;
jrsikken 1:8b001f936bb0 554 }
jrsikken 1:8b001f936bb0 555
jrsikken 1:8b001f936bb0 556 /*
jrsikken 1:8b001f936bb0 557 **************************************************************************************************************
jrsikken 1:8b001f936bb0 558 * INITIALIZE THE ENDPOINT DESCRIPTOR
jrsikken 1:8b001f936bb0 559 *
jrsikken 1:8b001f936bb0 560 * Description: This function initializes endpoint descriptor
jrsikken 1:8b001f936bb0 561 *
jrsikken 1:8b001f936bb0 562 * Arguments : Pointer to ED strcuture
jrsikken 1:8b001f936bb0 563 *
jrsikken 1:8b001f936bb0 564 * Returns : None
jrsikken 1:8b001f936bb0 565 *
jrsikken 1:8b001f936bb0 566 **************************************************************************************************************
jrsikken 1:8b001f936bb0 567 */
jrsikken 1:8b001f936bb0 568
jrsikken 1:8b001f936bb0 569 void Host_EDInit (volatile HCED *ed)
jrsikken 1:8b001f936bb0 570 {
jrsikken 1:8b001f936bb0 571
jrsikken 1:8b001f936bb0 572 ed->Control = 0;
jrsikken 1:8b001f936bb0 573 ed->TailTd = 0;
jrsikken 1:8b001f936bb0 574 ed->HeadTd = 0;
jrsikken 1:8b001f936bb0 575 ed->Next = 0;
jrsikken 1:8b001f936bb0 576 }
jrsikken 1:8b001f936bb0 577
jrsikken 1:8b001f936bb0 578 /*
jrsikken 1:8b001f936bb0 579 **************************************************************************************************************
jrsikken 1:8b001f936bb0 580 * INITIALIZE HOST CONTROLLER COMMUNICATIONS AREA
jrsikken 1:8b001f936bb0 581 *
jrsikken 1:8b001f936bb0 582 * Description: This function initializes host controller communications area
jrsikken 1:8b001f936bb0 583 *
jrsikken 1:8b001f936bb0 584 * Arguments : Pointer to HCCA
jrsikken 1:8b001f936bb0 585 *
jrsikken 1:8b001f936bb0 586 * Returns :
jrsikken 1:8b001f936bb0 587 *
jrsikken 1:8b001f936bb0 588 **************************************************************************************************************
jrsikken 1:8b001f936bb0 589 */
jrsikken 1:8b001f936bb0 590
jrsikken 1:8b001f936bb0 591 void Host_HCCAInit (volatile HCCA *hcca)
jrsikken 1:8b001f936bb0 592 {
jrsikken 1:8b001f936bb0 593 USB_INT32U i;
jrsikken 1:8b001f936bb0 594
jrsikken 1:8b001f936bb0 595
jrsikken 1:8b001f936bb0 596 for (i = 0; i < 32; i++) {
jrsikken 1:8b001f936bb0 597
jrsikken 1:8b001f936bb0 598 hcca->IntTable[i] = 0;
jrsikken 1:8b001f936bb0 599 hcca->FrameNumber = 0;
jrsikken 1:8b001f936bb0 600 hcca->DoneHead = 0;
jrsikken 1:8b001f936bb0 601 }
jrsikken 1:8b001f936bb0 602
jrsikken 1:8b001f936bb0 603 }
jrsikken 1:8b001f936bb0 604
jrsikken 1:8b001f936bb0 605 /*
jrsikken 1:8b001f936bb0 606 **************************************************************************************************************
jrsikken 1:8b001f936bb0 607 * WAIT FOR WDH INTERRUPT
jrsikken 1:8b001f936bb0 608 *
jrsikken 1:8b001f936bb0 609 * Description: This function is infinite loop which breaks when ever a WDH interrupt rises
jrsikken 1:8b001f936bb0 610 *
jrsikken 1:8b001f936bb0 611 * Arguments : None
jrsikken 1:8b001f936bb0 612 *
jrsikken 1:8b001f936bb0 613 * Returns : None
jrsikken 1:8b001f936bb0 614 *
jrsikken 1:8b001f936bb0 615 **************************************************************************************************************
jrsikken 1:8b001f936bb0 616 */
jrsikken 1:8b001f936bb0 617
jrsikken 1:8b001f936bb0 618 void Host_WDHWait (void)
jrsikken 1:8b001f936bb0 619 {
jrsikken 1:8b001f936bb0 620 while (!HOST_WdhIntr)
jrsikken 1:8b001f936bb0 621 __WFI();
jrsikken 1:8b001f936bb0 622
jrsikken 1:8b001f936bb0 623 HOST_WdhIntr = 0;
jrsikken 1:8b001f936bb0 624 }
jrsikken 1:8b001f936bb0 625
jrsikken 1:8b001f936bb0 626 /*
jrsikken 1:8b001f936bb0 627 **************************************************************************************************************
jrsikken 1:8b001f936bb0 628 * READ LE 32U
jrsikken 1:8b001f936bb0 629 *
jrsikken 1:8b001f936bb0 630 * Description: This function is used to read an unsigned integer from a character buffer in the platform
jrsikken 1:8b001f936bb0 631 * containing little endian processor
jrsikken 1:8b001f936bb0 632 *
jrsikken 1:8b001f936bb0 633 * Arguments : pmem Pointer to the character buffer
jrsikken 1:8b001f936bb0 634 *
jrsikken 1:8b001f936bb0 635 * Returns : val Unsigned integer
jrsikken 1:8b001f936bb0 636 *
jrsikken 1:8b001f936bb0 637 **************************************************************************************************************
jrsikken 1:8b001f936bb0 638 */
jrsikken 1:8b001f936bb0 639
jrsikken 1:8b001f936bb0 640 USB_INT32U ReadLE32U (volatile USB_INT08U *pmem)
jrsikken 1:8b001f936bb0 641 {
jrsikken 1:8b001f936bb0 642 USB_INT32U val = *(USB_INT32U*)pmem;
jrsikken 1:8b001f936bb0 643 #ifdef __BIG_ENDIAN
jrsikken 1:8b001f936bb0 644 return __REV(val);
jrsikken 1:8b001f936bb0 645 #else
jrsikken 1:8b001f936bb0 646 return val;
jrsikken 1:8b001f936bb0 647 #endif
jrsikken 1:8b001f936bb0 648 }
jrsikken 1:8b001f936bb0 649
jrsikken 1:8b001f936bb0 650 /*
jrsikken 1:8b001f936bb0 651 **************************************************************************************************************
jrsikken 1:8b001f936bb0 652 * WRITE LE 32U
jrsikken 1:8b001f936bb0 653 *
jrsikken 1:8b001f936bb0 654 * Description: This function is used to write an unsigned integer into a charecter buffer in the platform
jrsikken 1:8b001f936bb0 655 * containing little endian processor.
jrsikken 1:8b001f936bb0 656 *
jrsikken 1:8b001f936bb0 657 * Arguments : pmem Pointer to the charecter buffer
jrsikken 1:8b001f936bb0 658 * val Integer value to be placed in the charecter buffer
jrsikken 1:8b001f936bb0 659 *
jrsikken 1:8b001f936bb0 660 * Returns : None
jrsikken 1:8b001f936bb0 661 *
jrsikken 1:8b001f936bb0 662 **************************************************************************************************************
jrsikken 1:8b001f936bb0 663 */
jrsikken 1:8b001f936bb0 664
jrsikken 1:8b001f936bb0 665 void WriteLE32U (volatile USB_INT08U *pmem,
jrsikken 1:8b001f936bb0 666 USB_INT32U val)
jrsikken 1:8b001f936bb0 667 {
jrsikken 1:8b001f936bb0 668 #ifdef __BIG_ENDIAN
jrsikken 1:8b001f936bb0 669 *(USB_INT32U*)pmem = __REV(val);
jrsikken 1:8b001f936bb0 670 #else
jrsikken 1:8b001f936bb0 671 *(USB_INT32U*)pmem = val;
jrsikken 1:8b001f936bb0 672 #endif
jrsikken 1:8b001f936bb0 673 }
jrsikken 1:8b001f936bb0 674
jrsikken 1:8b001f936bb0 675 /*
jrsikken 1:8b001f936bb0 676 **************************************************************************************************************
jrsikken 1:8b001f936bb0 677 * READ LE 16U
jrsikken 1:8b001f936bb0 678 *
jrsikken 1:8b001f936bb0 679 * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
jrsikken 1:8b001f936bb0 680 * containing little endian processor
jrsikken 1:8b001f936bb0 681 *
jrsikken 1:8b001f936bb0 682 * Arguments : pmem Pointer to the charecter buffer
jrsikken 1:8b001f936bb0 683 *
jrsikken 1:8b001f936bb0 684 * Returns : val Unsigned short integer
jrsikken 1:8b001f936bb0 685 *
jrsikken 1:8b001f936bb0 686 **************************************************************************************************************
jrsikken 1:8b001f936bb0 687 */
jrsikken 1:8b001f936bb0 688
jrsikken 1:8b001f936bb0 689 USB_INT16U ReadLE16U (volatile USB_INT08U *pmem)
jrsikken 1:8b001f936bb0 690 {
jrsikken 1:8b001f936bb0 691 USB_INT16U val = *(USB_INT16U*)pmem;
jrsikken 1:8b001f936bb0 692 #ifdef __BIG_ENDIAN
jrsikken 1:8b001f936bb0 693 return __REV16(val);
jrsikken 1:8b001f936bb0 694 #else
jrsikken 1:8b001f936bb0 695 return val;
jrsikken 1:8b001f936bb0 696 #endif
jrsikken 1:8b001f936bb0 697 }
jrsikken 1:8b001f936bb0 698
jrsikken 1:8b001f936bb0 699 /*
jrsikken 1:8b001f936bb0 700 **************************************************************************************************************
jrsikken 1:8b001f936bb0 701 * WRITE LE 16U
jrsikken 1:8b001f936bb0 702 *
jrsikken 1:8b001f936bb0 703 * Description: This function is used to write an unsigned short integer into a charecter buffer in the
jrsikken 1:8b001f936bb0 704 * platform containing little endian processor
jrsikken 1:8b001f936bb0 705 *
jrsikken 1:8b001f936bb0 706 * Arguments : pmem Pointer to the charecter buffer
jrsikken 1:8b001f936bb0 707 * val Value to be placed in the charecter buffer
jrsikken 1:8b001f936bb0 708 *
jrsikken 1:8b001f936bb0 709 * Returns : None
jrsikken 1:8b001f936bb0 710 *
jrsikken 1:8b001f936bb0 711 **************************************************************************************************************
jrsikken 1:8b001f936bb0 712 */
jrsikken 1:8b001f936bb0 713
jrsikken 1:8b001f936bb0 714 void WriteLE16U (volatile USB_INT08U *pmem,
jrsikken 1:8b001f936bb0 715 USB_INT16U val)
jrsikken 1:8b001f936bb0 716 {
jrsikken 1:8b001f936bb0 717 #ifdef __BIG_ENDIAN
jrsikken 1:8b001f936bb0 718 *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF);
jrsikken 1:8b001f936bb0 719 #else
jrsikken 1:8b001f936bb0 720 *(USB_INT16U*)pmem = val;
jrsikken 1:8b001f936bb0 721 #endif
jrsikken 1:8b001f936bb0 722 }
jrsikken 1:8b001f936bb0 723
jrsikken 1:8b001f936bb0 724 /*
jrsikken 1:8b001f936bb0 725 **************************************************************************************************************
jrsikken 1:8b001f936bb0 726 * READ BE 32U
jrsikken 1:8b001f936bb0 727 *
jrsikken 1:8b001f936bb0 728 * Description: This function is used to read an unsigned integer from a charecter buffer in the platform
jrsikken 1:8b001f936bb0 729 * containing big endian processor
jrsikken 1:8b001f936bb0 730 *
jrsikken 1:8b001f936bb0 731 * Arguments : pmem Pointer to the charecter buffer
jrsikken 1:8b001f936bb0 732 *
jrsikken 1:8b001f936bb0 733 * Returns : val Unsigned integer
jrsikken 1:8b001f936bb0 734 *
jrsikken 1:8b001f936bb0 735 **************************************************************************************************************
jrsikken 1:8b001f936bb0 736 */
jrsikken 1:8b001f936bb0 737
jrsikken 1:8b001f936bb0 738 USB_INT32U ReadBE32U (volatile USB_INT08U *pmem)
jrsikken 1:8b001f936bb0 739 {
jrsikken 1:8b001f936bb0 740 USB_INT32U val = *(USB_INT32U*)pmem;
jrsikken 1:8b001f936bb0 741 #ifdef __BIG_ENDIAN
jrsikken 1:8b001f936bb0 742 return val;
jrsikken 1:8b001f936bb0 743 #else
jrsikken 1:8b001f936bb0 744 return __REV(val);
jrsikken 1:8b001f936bb0 745 #endif
jrsikken 1:8b001f936bb0 746 }
jrsikken 1:8b001f936bb0 747
jrsikken 1:8b001f936bb0 748 /*
jrsikken 1:8b001f936bb0 749 **************************************************************************************************************
jrsikken 1:8b001f936bb0 750 * WRITE BE 32U
jrsikken 1:8b001f936bb0 751 *
jrsikken 1:8b001f936bb0 752 * Description: This function is used to write an unsigned integer into a charecter buffer in the platform
jrsikken 1:8b001f936bb0 753 * containing big endian processor
jrsikken 1:8b001f936bb0 754 *
jrsikken 1:8b001f936bb0 755 * Arguments : pmem Pointer to the charecter buffer
jrsikken 1:8b001f936bb0 756 * val Value to be placed in the charecter buffer
jrsikken 1:8b001f936bb0 757 *
jrsikken 1:8b001f936bb0 758 * Returns : None
jrsikken 1:8b001f936bb0 759 *
jrsikken 1:8b001f936bb0 760 **************************************************************************************************************
jrsikken 1:8b001f936bb0 761 */
jrsikken 1:8b001f936bb0 762
jrsikken 1:8b001f936bb0 763 void WriteBE32U (volatile USB_INT08U *pmem,
jrsikken 1:8b001f936bb0 764 USB_INT32U val)
jrsikken 1:8b001f936bb0 765 {
jrsikken 1:8b001f936bb0 766 #ifdef __BIG_ENDIAN
jrsikken 1:8b001f936bb0 767 *(USB_INT32U*)pmem = val;
jrsikken 1:8b001f936bb0 768 #else
jrsikken 1:8b001f936bb0 769 *(USB_INT32U*)pmem = __REV(val);
jrsikken 1:8b001f936bb0 770 #endif
jrsikken 1:8b001f936bb0 771 }
jrsikken 1:8b001f936bb0 772
jrsikken 1:8b001f936bb0 773 /*
jrsikken 1:8b001f936bb0 774 **************************************************************************************************************
jrsikken 1:8b001f936bb0 775 * READ BE 16U
jrsikken 1:8b001f936bb0 776 *
jrsikken 1:8b001f936bb0 777 * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
jrsikken 1:8b001f936bb0 778 * containing big endian processor
jrsikken 1:8b001f936bb0 779 *
jrsikken 1:8b001f936bb0 780 * Arguments : pmem Pointer to the charecter buffer
jrsikken 1:8b001f936bb0 781 *
jrsikken 1:8b001f936bb0 782 * Returns : val Unsigned short integer
jrsikken 1:8b001f936bb0 783 *
jrsikken 1:8b001f936bb0 784 **************************************************************************************************************
jrsikken 1:8b001f936bb0 785 */
jrsikken 1:8b001f936bb0 786
jrsikken 1:8b001f936bb0 787 USB_INT16U ReadBE16U (volatile USB_INT08U *pmem)
jrsikken 1:8b001f936bb0 788 {
jrsikken 1:8b001f936bb0 789 USB_INT16U val = *(USB_INT16U*)pmem;
jrsikken 1:8b001f936bb0 790 #ifdef __BIG_ENDIAN
jrsikken 1:8b001f936bb0 791 return val;
jrsikken 1:8b001f936bb0 792 #else
jrsikken 1:8b001f936bb0 793 return __REV16(val);
jrsikken 1:8b001f936bb0 794 #endif
jrsikken 1:8b001f936bb0 795 }
jrsikken 1:8b001f936bb0 796
jrsikken 1:8b001f936bb0 797 /*
jrsikken 1:8b001f936bb0 798 **************************************************************************************************************
jrsikken 1:8b001f936bb0 799 * WRITE BE 16U
jrsikken 1:8b001f936bb0 800 *
jrsikken 1:8b001f936bb0 801 * Description: This function is used to write an unsigned short integer into the charecter buffer in the
jrsikken 1:8b001f936bb0 802 * platform containing big endian processor
jrsikken 1:8b001f936bb0 803 *
jrsikken 1:8b001f936bb0 804 * Arguments : pmem Pointer to the charecter buffer
jrsikken 1:8b001f936bb0 805 * val Value to be placed in the charecter buffer
jrsikken 1:8b001f936bb0 806 *
jrsikken 1:8b001f936bb0 807 * Returns : None
jrsikken 1:8b001f936bb0 808 *
jrsikken 1:8b001f936bb0 809 **************************************************************************************************************
jrsikken 1:8b001f936bb0 810 */
jrsikken 1:8b001f936bb0 811
jrsikken 1:8b001f936bb0 812 void WriteBE16U (volatile USB_INT08U *pmem,
jrsikken 1:8b001f936bb0 813 USB_INT16U val)
jrsikken 1:8b001f936bb0 814 {
jrsikken 1:8b001f936bb0 815 #ifdef __BIG_ENDIAN
jrsikken 1:8b001f936bb0 816 *(USB_INT16U*)pmem = val;
jrsikken 1:8b001f936bb0 817 #else
jrsikken 1:8b001f936bb0 818 *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF);
jrsikken 1:8b001f936bb0 819 #endif
jrsikken 1:8b001f936bb0 820 }