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targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_rcc_ex.c@610:813dcc80987e, 2015-08-14 (annotated)

Committer:
mbed_official
Date:
Fri Aug 14 13:15:17 2015 +0100
Revision:
610:813dcc80987e
Parent:
573:ad23fe03a082 
Synchronized with git revision 6d84db41c6833e0b9b024741eb0616a5f62d5599



Full URL: https://github.com/mbedmicro/mbed/commit/6d84db41c6833e0b9b024741eb0616a5f62d5599/



DISCO_F746NG - Improvements

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 573:ad23fe03a082 1 /**
mbed_official 573:ad23fe03a082 2 ******************************************************************************
mbed_official 573:ad23fe03a082 3 * @file stm32f7xx_hal_rcc_ex.c
mbed_official 573:ad23fe03a082 4 * @author MCD Application Team
mbed_official 610:813dcc80987e 5 * @version V1.0.1
mbed_official 610:813dcc80987e 6 * @date 25-June-2015
mbed_official 573:ad23fe03a082 7 * @brief Extension RCC HAL module driver.
mbed_official 573:ad23fe03a082 8 * This file provides firmware functions to manage the following
mbed_official 573:ad23fe03a082 9 * functionalities RCC extension peripheral:
mbed_official 573:ad23fe03a082 10 * + Extended Peripheral Control functions
mbed_official 573:ad23fe03a082 11 *
mbed_official 573:ad23fe03a082 12 ******************************************************************************
mbed_official 573:ad23fe03a082 13 * @attention
mbed_official 573:ad23fe03a082 14 *
mbed_official 573:ad23fe03a082 15 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 573:ad23fe03a082 16 *
mbed_official 573:ad23fe03a082 17 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 573:ad23fe03a082 18 * are permitted provided that the following conditions are met:
mbed_official 573:ad23fe03a082 19 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 573:ad23fe03a082 20 * this list of conditions and the following disclaimer.
mbed_official 573:ad23fe03a082 21 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 573:ad23fe03a082 22 * this list of conditions and the following disclaimer in the documentation
mbed_official 573:ad23fe03a082 23 * and/or other materials provided with the distribution.
mbed_official 573:ad23fe03a082 24 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 573:ad23fe03a082 25 * may be used to endorse or promote products derived from this software
mbed_official 573:ad23fe03a082 26 * without specific prior written permission.
mbed_official 573:ad23fe03a082 27 *
mbed_official 573:ad23fe03a082 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 573:ad23fe03a082 29 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 573:ad23fe03a082 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 573:ad23fe03a082 31 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 573:ad23fe03a082 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 573:ad23fe03a082 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 573:ad23fe03a082 34 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 573:ad23fe03a082 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 573:ad23fe03a082 36 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 573:ad23fe03a082 37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 573:ad23fe03a082 38 *
mbed_official 573:ad23fe03a082 39 ******************************************************************************
mbed_official 573:ad23fe03a082 40 */
mbed_official 573:ad23fe03a082 41
mbed_official 573:ad23fe03a082 42 /* Includes ------------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 43 #include "stm32f7xx_hal.h"
mbed_official 573:ad23fe03a082 44
mbed_official 573:ad23fe03a082 45 /** @addtogroup STM32F7xx_HAL_Driver
mbed_official 573:ad23fe03a082 46 * @{
mbed_official 573:ad23fe03a082 47 */
mbed_official 573:ad23fe03a082 48
mbed_official 573:ad23fe03a082 49 /** @defgroup RCCEx RCCEx
mbed_official 573:ad23fe03a082 50 * @brief RCCEx HAL module driver
mbed_official 573:ad23fe03a082 51 * @{
mbed_official 573:ad23fe03a082 52 */
mbed_official 573:ad23fe03a082 53
mbed_official 573:ad23fe03a082 54 #ifdef HAL_RCC_MODULE_ENABLED
mbed_official 573:ad23fe03a082 55
mbed_official 573:ad23fe03a082 56 /* Private typedef -----------------------------------------------------------*/
mbed_official 573:ad23fe03a082 57 /* Private define ------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 58 /** @defgroup RCCEx_Private_Defines RCCEx Private Defines
mbed_official 573:ad23fe03a082 59 * @{
mbed_official 573:ad23fe03a082 60 */
mbed_official 573:ad23fe03a082 61
mbed_official 573:ad23fe03a082 62 #define PLLI2S_TIMEOUT_VALUE 100 /* Timeout value fixed to 100 ms */
mbed_official 573:ad23fe03a082 63 #define PLLSAI_TIMEOUT_VALUE 100 /* Timeout value fixed to 100 ms */
mbed_official 573:ad23fe03a082 64
mbed_official 573:ad23fe03a082 65 /**
mbed_official 573:ad23fe03a082 66 * @}
mbed_official 573:ad23fe03a082 67 */
mbed_official 573:ad23fe03a082 68 /* Private macro -------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 69 /** @defgroup RCCEx_Private_Macros RCCEx Private Macros
mbed_official 573:ad23fe03a082 70 * @{
mbed_official 573:ad23fe03a082 71 */
mbed_official 573:ad23fe03a082 72 /**
mbed_official 573:ad23fe03a082 73 * @}
mbed_official 573:ad23fe03a082 74 */
mbed_official 573:ad23fe03a082 75
mbed_official 573:ad23fe03a082 76 /** @defgroup RCCEx_Private_Macros RCCEx Private Macros
mbed_official 573:ad23fe03a082 77 * @{
mbed_official 573:ad23fe03a082 78 */
mbed_official 573:ad23fe03a082 79
mbed_official 573:ad23fe03a082 80 /**
mbed_official 573:ad23fe03a082 81 * @}
mbed_official 573:ad23fe03a082 82 */
mbed_official 573:ad23fe03a082 83
mbed_official 573:ad23fe03a082 84
mbed_official 573:ad23fe03a082 85 /* Private variables ---------------------------------------------------------*/
mbed_official 573:ad23fe03a082 86 /* Private function prototypes -----------------------------------------------*/
mbed_official 573:ad23fe03a082 87 /* Private functions ---------------------------------------------------------*/
mbed_official 573:ad23fe03a082 88
mbed_official 573:ad23fe03a082 89 /** @defgroup RCCEx_Exported_Functions RCCEx Exported Functions
mbed_official 573:ad23fe03a082 90 * @{
mbed_official 573:ad23fe03a082 91 */
mbed_official 573:ad23fe03a082 92
mbed_official 573:ad23fe03a082 93 /** @defgroup RCCEx_Exported_Functions_Group1 Extended Peripheral Control functions
mbed_official 573:ad23fe03a082 94 * @brief Extended Peripheral Control functions
mbed_official 573:ad23fe03a082 95 *
mbed_official 573:ad23fe03a082 96 @verbatim
mbed_official 573:ad23fe03a082 97 ===============================================================================
mbed_official 573:ad23fe03a082 98 ##### Extended Peripheral Control functions #####
mbed_official 573:ad23fe03a082 99 ===============================================================================
mbed_official 573:ad23fe03a082 100 [..]
mbed_official 573:ad23fe03a082 101 This subsection provides a set of functions allowing to control the RCC Clocks
mbed_official 573:ad23fe03a082 102 frequencies.
mbed_official 573:ad23fe03a082 103 [..]
mbed_official 573:ad23fe03a082 104 (@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to
mbed_official 573:ad23fe03a082 105 select the RTC clock source; in this case the Backup domain will be reset in
mbed_official 573:ad23fe03a082 106 order to modify the RTC Clock source, as consequence RTC registers (including
mbed_official 573:ad23fe03a082 107 the backup registers) and RCC_BDCR register will be set to their reset values.
mbed_official 573:ad23fe03a082 108
mbed_official 573:ad23fe03a082 109 @endverbatim
mbed_official 573:ad23fe03a082 110 * @{
mbed_official 573:ad23fe03a082 111 */
mbed_official 573:ad23fe03a082 112 /**
mbed_official 573:ad23fe03a082 113 * @brief Initializes the RCC extended peripherals clocks according to the specified
mbed_official 573:ad23fe03a082 114 * parameters in the RCC_PeriphCLKInitTypeDef.
mbed_official 573:ad23fe03a082 115 * @param PeriphClkInit: pointer to an RCC_PeriphCLKInitTypeDef structure that
mbed_official 573:ad23fe03a082 116 * contains the configuration information for the Extended Peripherals
mbed_official 573:ad23fe03a082 117 * clocks(I2S, SAI, LTDC RTC, TIM, UARTs, USARTs, LTPIM, SDMMC...).
mbed_official 573:ad23fe03a082 118 *
mbed_official 573:ad23fe03a082 119 * @note Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to select
mbed_official 573:ad23fe03a082 120 * the RTC clock source; in this case the Backup domain will be reset in
mbed_official 573:ad23fe03a082 121 * order to modify the RTC Clock source, as consequence RTC registers (including
mbed_official 573:ad23fe03a082 122 * the backup registers) and RCC_BDCR register are set to their reset values.
mbed_official 573:ad23fe03a082 123 *
mbed_official 573:ad23fe03a082 124 * @retval HAL status
mbed_official 573:ad23fe03a082 125 */
mbed_official 573:ad23fe03a082 126 HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
mbed_official 573:ad23fe03a082 127 {
mbed_official 573:ad23fe03a082 128 uint32_t tickstart = 0;
mbed_official 573:ad23fe03a082 129 uint32_t tmpreg0 = 0;
mbed_official 573:ad23fe03a082 130 uint32_t tmpreg1 = 0;
mbed_official 573:ad23fe03a082 131 uint32_t plli2sused = 0;
mbed_official 573:ad23fe03a082 132 uint32_t pllsaiused = 0;
mbed_official 573:ad23fe03a082 133
mbed_official 573:ad23fe03a082 134 /* Check the parameters */
mbed_official 573:ad23fe03a082 135 assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
mbed_official 573:ad23fe03a082 136
mbed_official 573:ad23fe03a082 137 /*----------------------------------- I2S configuration ----------------------------------*/
mbed_official 573:ad23fe03a082 138 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == (RCC_PERIPHCLK_I2S))
mbed_official 573:ad23fe03a082 139 {
mbed_official 573:ad23fe03a082 140 /* Check the parameters */
mbed_official 573:ad23fe03a082 141 assert_param(IS_RCC_I2SCLKSOURCE(PeriphClkInit->I2sClockSelection));
mbed_official 573:ad23fe03a082 142
mbed_official 573:ad23fe03a082 143 /* Configure I2S Clock source */
mbed_official 573:ad23fe03a082 144 __HAL_RCC_I2S_CONFIG(PeriphClkInit->I2sClockSelection);
mbed_official 573:ad23fe03a082 145
mbed_official 573:ad23fe03a082 146 /* Enable the PLLI2S when it's used as clock source for I2S */
mbed_official 573:ad23fe03a082 147 if(PeriphClkInit->I2sClockSelection == RCC_I2SCLKSOURCE_PLLI2S)
mbed_official 573:ad23fe03a082 148 {
mbed_official 573:ad23fe03a082 149 plli2sused = 1;
mbed_official 573:ad23fe03a082 150 }
mbed_official 573:ad23fe03a082 151 }
mbed_official 573:ad23fe03a082 152
mbed_official 573:ad23fe03a082 153 /*------------------------------------ SAI1 configuration --------------------------------------*/
mbed_official 573:ad23fe03a082 154 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == (RCC_PERIPHCLK_SAI1))
mbed_official 573:ad23fe03a082 155 {
mbed_official 573:ad23fe03a082 156 /* Check the parameters */
mbed_official 573:ad23fe03a082 157 assert_param(IS_RCC_SAI1CLKSOURCE(PeriphClkInit->Sai1ClockSelection));
mbed_official 573:ad23fe03a082 158
mbed_official 573:ad23fe03a082 159 /* Configure SAI1 Clock source */
mbed_official 573:ad23fe03a082 160 __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection);
mbed_official 573:ad23fe03a082 161 /* Enable the PLLI2S when it's used as clock source for SAI */
mbed_official 573:ad23fe03a082 162 if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)
mbed_official 573:ad23fe03a082 163 {
mbed_official 573:ad23fe03a082 164 plli2sused = 1;
mbed_official 573:ad23fe03a082 165 }
mbed_official 573:ad23fe03a082 166 /* Enable the PLLSAI when it's used as clock source for SAI */
mbed_official 573:ad23fe03a082 167 if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)
mbed_official 573:ad23fe03a082 168 {
mbed_official 573:ad23fe03a082 169 pllsaiused = 1;
mbed_official 573:ad23fe03a082 170 }
mbed_official 573:ad23fe03a082 171 }
mbed_official 573:ad23fe03a082 172
mbed_official 573:ad23fe03a082 173 /*------------------------------------ SAI2 configuration --------------------------------------*/
mbed_official 573:ad23fe03a082 174 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == (RCC_PERIPHCLK_SAI2))
mbed_official 573:ad23fe03a082 175 {
mbed_official 573:ad23fe03a082 176 /* Check the parameters */
mbed_official 573:ad23fe03a082 177 assert_param(IS_RCC_SAI2CLKSOURCE(PeriphClkInit->Sai2ClockSelection));
mbed_official 573:ad23fe03a082 178
mbed_official 573:ad23fe03a082 179 /* Configure SAI2 Clock source */
mbed_official 573:ad23fe03a082 180 __HAL_RCC_SAI2_CONFIG(PeriphClkInit->Sai2ClockSelection);
mbed_official 573:ad23fe03a082 181
mbed_official 573:ad23fe03a082 182 /* Enable the PLLI2S when it's used as clock source for SAI */
mbed_official 573:ad23fe03a082 183 if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)
mbed_official 573:ad23fe03a082 184 {
mbed_official 573:ad23fe03a082 185 plli2sused = 1;
mbed_official 573:ad23fe03a082 186 }
mbed_official 573:ad23fe03a082 187 /* Enable the PLLSAI when it's used as clock source for SAI */
mbed_official 573:ad23fe03a082 188 if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)
mbed_official 573:ad23fe03a082 189 {
mbed_official 573:ad23fe03a082 190 pllsaiused = 1;
mbed_official 573:ad23fe03a082 191 }
mbed_official 573:ad23fe03a082 192 }
mbed_official 573:ad23fe03a082 193
mbed_official 573:ad23fe03a082 194 /*-------------------------------------- SPDIF-RX Configuration -----------------------------------*/
mbed_official 573:ad23fe03a082 195 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
mbed_official 573:ad23fe03a082 196 {
mbed_official 573:ad23fe03a082 197 plli2sused = 1;
mbed_official 573:ad23fe03a082 198 }
mbed_official 573:ad23fe03a082 199
mbed_official 573:ad23fe03a082 200 /*------------------------------------ RTC configuration --------------------------------------*/
mbed_official 573:ad23fe03a082 201 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
mbed_official 573:ad23fe03a082 202 {
mbed_official 573:ad23fe03a082 203 /* Reset the Backup domain only if the RTC Clock source selection is modified */
mbed_official 573:ad23fe03a082 204 if((RCC->BDCR & RCC_BDCR_RTCSEL) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))
mbed_official 573:ad23fe03a082 205 {
mbed_official 610:813dcc80987e 206 /* Enable Power Clock*/
mbed_official 610:813dcc80987e 207 __HAL_RCC_PWR_CLK_ENABLE();
mbed_official 610:813dcc80987e 208
mbed_official 610:813dcc80987e 209 /* Enable write access to Backup domain */
mbed_official 610:813dcc80987e 210 PWR->CR1 |= PWR_CR1_DBP;
mbed_official 610:813dcc80987e 211
mbed_official 610:813dcc80987e 212 /* Get Start Tick*/
mbed_official 610:813dcc80987e 213 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 214
mbed_official 610:813dcc80987e 215 /* Wait for Backup domain Write protection disable */
mbed_official 610:813dcc80987e 216 while((PWR->CR1 & PWR_CR1_DBP) == RESET)
mbed_official 610:813dcc80987e 217 {
mbed_official 610:813dcc80987e 218 if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
mbed_official 610:813dcc80987e 219 {
mbed_official 610:813dcc80987e 220 return HAL_TIMEOUT;
mbed_official 610:813dcc80987e 221 }
mbed_official 610:813dcc80987e 222 }
mbed_official 610:813dcc80987e 223
mbed_official 573:ad23fe03a082 224 /* Store the content of BDCR register before the reset of Backup Domain */
mbed_official 573:ad23fe03a082 225 tmpreg0 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
mbed_official 573:ad23fe03a082 226
mbed_official 573:ad23fe03a082 227 /* RTC Clock selection can be changed only if the Backup Domain is reset */
mbed_official 573:ad23fe03a082 228 __HAL_RCC_BACKUPRESET_FORCE();
mbed_official 573:ad23fe03a082 229 __HAL_RCC_BACKUPRESET_RELEASE();
mbed_official 573:ad23fe03a082 230
mbed_official 573:ad23fe03a082 231 /* Restore the Content of BDCR register */
mbed_official 573:ad23fe03a082 232 RCC->BDCR = tmpreg0;
mbed_official 610:813dcc80987e 233
mbed_official 610:813dcc80987e 234 /* If LSE is selected as RTC clock source, wait for LSE reactivation */
mbed_official 610:813dcc80987e 235 if (HAL_IS_BIT_SET(tmpreg0, RCC_BDCR_LSERDY))
mbed_official 610:813dcc80987e 236 {
mbed_official 610:813dcc80987e 237 /* Get Start Tick*/
mbed_official 610:813dcc80987e 238 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 239
mbed_official 610:813dcc80987e 240 /* Wait till LSE is ready */
mbed_official 610:813dcc80987e 241 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
mbed_official 610:813dcc80987e 242 {
mbed_official 610:813dcc80987e 243 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
mbed_official 610:813dcc80987e 244 {
mbed_official 610:813dcc80987e 245 return HAL_TIMEOUT;
mbed_official 610:813dcc80987e 246 }
mbed_official 610:813dcc80987e 247 }
mbed_official 610:813dcc80987e 248 }
mbed_official 610:813dcc80987e 249 __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
mbed_official 573:ad23fe03a082 250 }
mbed_official 573:ad23fe03a082 251 }
mbed_official 610:813dcc80987e 252
mbed_official 573:ad23fe03a082 253 /*------------------------------------ TIM configuration --------------------------------------*/
mbed_official 573:ad23fe03a082 254 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM))
mbed_official 573:ad23fe03a082 255 {
mbed_official 573:ad23fe03a082 256 /* Check the parameters */
mbed_official 573:ad23fe03a082 257 assert_param(IS_RCC_TIMPRES(PeriphClkInit->TIMPresSelection));
mbed_official 573:ad23fe03a082 258
mbed_official 573:ad23fe03a082 259 /* Configure Timer Prescaler */
mbed_official 573:ad23fe03a082 260 __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
mbed_official 573:ad23fe03a082 261 }
mbed_official 573:ad23fe03a082 262
mbed_official 573:ad23fe03a082 263 /*-------------------------------------- I2C1 Configuration -----------------------------------*/
mbed_official 573:ad23fe03a082 264 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1)
mbed_official 573:ad23fe03a082 265 {
mbed_official 573:ad23fe03a082 266 /* Check the parameters */
mbed_official 573:ad23fe03a082 267 assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection));
mbed_official 573:ad23fe03a082 268
mbed_official 573:ad23fe03a082 269 /* Configure the I2C1 clock source */
mbed_official 573:ad23fe03a082 270 __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection);
mbed_official 573:ad23fe03a082 271 }
mbed_official 573:ad23fe03a082 272
mbed_official 573:ad23fe03a082 273 /*-------------------------------------- I2C2 Configuration -----------------------------------*/
mbed_official 573:ad23fe03a082 274 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2)
mbed_official 573:ad23fe03a082 275 {
mbed_official 573:ad23fe03a082 276 /* Check the parameters */
mbed_official 573:ad23fe03a082 277 assert_param(IS_RCC_I2C2CLKSOURCE(PeriphClkInit->I2c2ClockSelection));
mbed_official 573:ad23fe03a082 278
mbed_official 573:ad23fe03a082 279 /* Configure the I2C2 clock source */
mbed_official 573:ad23fe03a082 280 __HAL_RCC_I2C2_CONFIG(PeriphClkInit->I2c2ClockSelection);
mbed_official 573:ad23fe03a082 281 }
mbed_official 573:ad23fe03a082 282
mbed_official 573:ad23fe03a082 283 /*-------------------------------------- I2C3 Configuration -----------------------------------*/
mbed_official 573:ad23fe03a082 284 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3)
mbed_official 573:ad23fe03a082 285 {
mbed_official 573:ad23fe03a082 286 /* Check the parameters */
mbed_official 573:ad23fe03a082 287 assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection));
mbed_official 573:ad23fe03a082 288
mbed_official 573:ad23fe03a082 289 /* Configure the I2C3 clock source */
mbed_official 573:ad23fe03a082 290 __HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection);
mbed_official 573:ad23fe03a082 291 }
mbed_official 573:ad23fe03a082 292
mbed_official 573:ad23fe03a082 293 /*-------------------------------------- I2C4 Configuration -----------------------------------*/
mbed_official 573:ad23fe03a082 294 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4)
mbed_official 573:ad23fe03a082 295 {
mbed_official 573:ad23fe03a082 296 /* Check the parameters */
mbed_official 573:ad23fe03a082 297 assert_param(IS_RCC_I2C4CLKSOURCE(PeriphClkInit->I2c4ClockSelection));
mbed_official 573:ad23fe03a082 298
mbed_official 573:ad23fe03a082 299 /* Configure the I2C4 clock source */
mbed_official 573:ad23fe03a082 300 __HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection);
mbed_official 573:ad23fe03a082 301 }
mbed_official 573:ad23fe03a082 302
mbed_official 573:ad23fe03a082 303 /*-------------------------------------- USART1 Configuration -----------------------------------*/
mbed_official 573:ad23fe03a082 304 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1)
mbed_official 573:ad23fe03a082 305 {
mbed_official 573:ad23fe03a082 306 /* Check the parameters */
mbed_official 573:ad23fe03a082 307 assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection));
mbed_official 573:ad23fe03a082 308
mbed_official 573:ad23fe03a082 309 /* Configure the USART1 clock source */
mbed_official 573:ad23fe03a082 310 __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection);
mbed_official 573:ad23fe03a082 311 }
mbed_official 573:ad23fe03a082 312
mbed_official 573:ad23fe03a082 313 /*-------------------------------------- USART2 Configuration -----------------------------------*/
mbed_official 573:ad23fe03a082 314 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2)
mbed_official 573:ad23fe03a082 315 {
mbed_official 573:ad23fe03a082 316 /* Check the parameters */
mbed_official 573:ad23fe03a082 317 assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection));
mbed_official 573:ad23fe03a082 318
mbed_official 573:ad23fe03a082 319 /* Configure the USART2 clock source */
mbed_official 573:ad23fe03a082 320 __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection);
mbed_official 573:ad23fe03a082 321 }
mbed_official 573:ad23fe03a082 322
mbed_official 573:ad23fe03a082 323 /*-------------------------------------- USART3 Configuration -----------------------------------*/
mbed_official 573:ad23fe03a082 324 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3)
mbed_official 573:ad23fe03a082 325 {
mbed_official 573:ad23fe03a082 326 /* Check the parameters */
mbed_official 573:ad23fe03a082 327 assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection));
mbed_official 573:ad23fe03a082 328
mbed_official 573:ad23fe03a082 329 /* Configure the USART3 clock source */
mbed_official 573:ad23fe03a082 330 __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection);
mbed_official 573:ad23fe03a082 331 }
mbed_official 573:ad23fe03a082 332
mbed_official 573:ad23fe03a082 333 /*-------------------------------------- UART4 Configuration -----------------------------------*/
mbed_official 573:ad23fe03a082 334 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4)
mbed_official 573:ad23fe03a082 335 {
mbed_official 573:ad23fe03a082 336 /* Check the parameters */
mbed_official 573:ad23fe03a082 337 assert_param(IS_RCC_UART4CLKSOURCE(PeriphClkInit->Uart4ClockSelection));
mbed_official 573:ad23fe03a082 338
mbed_official 573:ad23fe03a082 339 /* Configure the UART4 clock source */
mbed_official 573:ad23fe03a082 340 __HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection);
mbed_official 573:ad23fe03a082 341 }
mbed_official 573:ad23fe03a082 342
mbed_official 573:ad23fe03a082 343 /*-------------------------------------- UART5 Configuration -----------------------------------*/
mbed_official 573:ad23fe03a082 344 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5)
mbed_official 573:ad23fe03a082 345 {
mbed_official 573:ad23fe03a082 346 /* Check the parameters */
mbed_official 573:ad23fe03a082 347 assert_param(IS_RCC_UART5CLKSOURCE(PeriphClkInit->Uart5ClockSelection));
mbed_official 573:ad23fe03a082 348
mbed_official 573:ad23fe03a082 349 /* Configure the UART5 clock source */
mbed_official 573:ad23fe03a082 350 __HAL_RCC_UART5_CONFIG(PeriphClkInit->Uart5ClockSelection);
mbed_official 573:ad23fe03a082 351 }
mbed_official 573:ad23fe03a082 352
mbed_official 573:ad23fe03a082 353 /*-------------------------------------- USART6 Configuration -----------------------------------*/
mbed_official 573:ad23fe03a082 354 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART6) == RCC_PERIPHCLK_USART6)
mbed_official 573:ad23fe03a082 355 {
mbed_official 573:ad23fe03a082 356 /* Check the parameters */
mbed_official 573:ad23fe03a082 357 assert_param(IS_RCC_USART6CLKSOURCE(PeriphClkInit->Usart6ClockSelection));
mbed_official 573:ad23fe03a082 358
mbed_official 573:ad23fe03a082 359 /* Configure the USART6 clock source */
mbed_official 573:ad23fe03a082 360 __HAL_RCC_USART6_CONFIG(PeriphClkInit->Usart6ClockSelection);
mbed_official 573:ad23fe03a082 361 }
mbed_official 573:ad23fe03a082 362
mbed_official 573:ad23fe03a082 363 /*-------------------------------------- UART7 Configuration -----------------------------------*/
mbed_official 573:ad23fe03a082 364 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART7) == RCC_PERIPHCLK_UART7)
mbed_official 573:ad23fe03a082 365 {
mbed_official 573:ad23fe03a082 366 /* Check the parameters */
mbed_official 573:ad23fe03a082 367 assert_param(IS_RCC_UART7CLKSOURCE(PeriphClkInit->Uart7ClockSelection));
mbed_official 573:ad23fe03a082 368
mbed_official 573:ad23fe03a082 369 /* Configure the UART7 clock source */
mbed_official 573:ad23fe03a082 370 __HAL_RCC_UART7_CONFIG(PeriphClkInit->Uart7ClockSelection);
mbed_official 573:ad23fe03a082 371 }
mbed_official 573:ad23fe03a082 372
mbed_official 573:ad23fe03a082 373 /*-------------------------------------- UART8 Configuration -----------------------------------*/
mbed_official 573:ad23fe03a082 374 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART8) == RCC_PERIPHCLK_UART8)
mbed_official 573:ad23fe03a082 375 {
mbed_official 573:ad23fe03a082 376 /* Check the parameters */
mbed_official 573:ad23fe03a082 377 assert_param(IS_RCC_UART8CLKSOURCE(PeriphClkInit->Uart8ClockSelection));
mbed_official 573:ad23fe03a082 378
mbed_official 573:ad23fe03a082 379 /* Configure the UART8 clock source */
mbed_official 573:ad23fe03a082 380 __HAL_RCC_UART8_CONFIG(PeriphClkInit->Uart8ClockSelection);
mbed_official 573:ad23fe03a082 381 }
mbed_official 573:ad23fe03a082 382
mbed_official 573:ad23fe03a082 383 /*--------------------------------------- CEC Configuration -----------------------------------*/
mbed_official 573:ad23fe03a082 384 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC)
mbed_official 573:ad23fe03a082 385 {
mbed_official 573:ad23fe03a082 386 /* Check the parameters */
mbed_official 573:ad23fe03a082 387 assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection));
mbed_official 573:ad23fe03a082 388
mbed_official 573:ad23fe03a082 389 /* Configure the CEC clock source */
mbed_official 573:ad23fe03a082 390 __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection);
mbed_official 573:ad23fe03a082 391 }
mbed_official 573:ad23fe03a082 392
mbed_official 573:ad23fe03a082 393 /*-------------------------------------- CK48 Configuration -----------------------------------*/
mbed_official 573:ad23fe03a082 394 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48)
mbed_official 573:ad23fe03a082 395 {
mbed_official 573:ad23fe03a082 396 /* Check the parameters */
mbed_official 573:ad23fe03a082 397 assert_param(IS_RCC_CLK48SOURCE(PeriphClkInit->Clk48ClockSelection));
mbed_official 573:ad23fe03a082 398
mbed_official 573:ad23fe03a082 399 /* Configure the CLK48 source */
mbed_official 573:ad23fe03a082 400 __HAL_RCC_CLK48_CONFIG(PeriphClkInit->Clk48ClockSelection);
mbed_official 573:ad23fe03a082 401
mbed_official 573:ad23fe03a082 402 /* Enable the PLLSAI when it's used as clock source for CK48 */
mbed_official 573:ad23fe03a082 403 if(PeriphClkInit->Clk48ClockSelection == RCC_CLK48SOURCE_PLLSAIP)
mbed_official 573:ad23fe03a082 404 {
mbed_official 573:ad23fe03a082 405 pllsaiused = 1;
mbed_official 573:ad23fe03a082 406 }
mbed_official 573:ad23fe03a082 407 }
mbed_official 573:ad23fe03a082 408
mbed_official 573:ad23fe03a082 409 /*-------------------------------------- LTDC Configuration -----------------------------------*/
mbed_official 573:ad23fe03a082 410 #if defined(STM32F756xx) || defined(STM32F746xx)
mbed_official 573:ad23fe03a082 411 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == RCC_PERIPHCLK_LTDC)
mbed_official 573:ad23fe03a082 412 {
mbed_official 573:ad23fe03a082 413 pllsaiused = 1;
mbed_official 573:ad23fe03a082 414 }
mbed_official 573:ad23fe03a082 415 #endif /* STM32F756xx || STM32F746xx */
mbed_official 573:ad23fe03a082 416 /*-------------------------------------- LPTIM1 Configuration -----------------------------------*/
mbed_official 573:ad23fe03a082 417 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1)
mbed_official 573:ad23fe03a082 418 {
mbed_official 573:ad23fe03a082 419 /* Check the parameters */
mbed_official 573:ad23fe03a082 420 assert_param(IS_RCC_LPTIM1CLK(PeriphClkInit->Lptim1ClockSelection));
mbed_official 573:ad23fe03a082 421
mbed_official 573:ad23fe03a082 422 /* Configure the LTPIM1 clock source */
mbed_official 573:ad23fe03a082 423 __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection);
mbed_official 573:ad23fe03a082 424 }
mbed_official 573:ad23fe03a082 425
mbed_official 573:ad23fe03a082 426 /*------------------------------------- SDMMC Configuration ------------------------------------*/
mbed_official 573:ad23fe03a082 427 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1)
mbed_official 573:ad23fe03a082 428 {
mbed_official 573:ad23fe03a082 429 /* Check the parameters */
mbed_official 573:ad23fe03a082 430 assert_param(IS_RCC_SDMMC1CLKSOURCE(PeriphClkInit->Sdmmc1ClockSelection));
mbed_official 573:ad23fe03a082 431
mbed_official 573:ad23fe03a082 432 /* Configure the SDMMC1 clock source */
mbed_official 573:ad23fe03a082 433 __HAL_RCC_SDMMC1_CONFIG(PeriphClkInit->Sdmmc1ClockSelection);
mbed_official 573:ad23fe03a082 434 }
mbed_official 573:ad23fe03a082 435
mbed_official 573:ad23fe03a082 436 /*-------------------------------------- PLLI2S Configuration ---------------------------------*/
mbed_official 573:ad23fe03a082 437 /* PLLI2S is configured when a peripheral will use it as source clock : SAI1, SAI2, I2S or SPDIF-RX */
mbed_official 573:ad23fe03a082 438 if((plli2sused == 1) || (PeriphClkInit->PeriphClockSelection == RCC_PERIPHCLK_PLLI2S))
mbed_official 573:ad23fe03a082 439 {
mbed_official 573:ad23fe03a082 440 /* Disable the PLLI2S */
mbed_official 573:ad23fe03a082 441 __HAL_RCC_PLLI2S_DISABLE();
mbed_official 573:ad23fe03a082 442
mbed_official 573:ad23fe03a082 443 /* Get Start Tick*/
mbed_official 573:ad23fe03a082 444 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 445
mbed_official 573:ad23fe03a082 446 /* Wait till PLLI2S is disabled */
mbed_official 573:ad23fe03a082 447 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
mbed_official 573:ad23fe03a082 448 {
mbed_official 573:ad23fe03a082 449 if((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 450 {
mbed_official 573:ad23fe03a082 451 /* return in case of Timeout detected */
mbed_official 573:ad23fe03a082 452 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 453 }
mbed_official 573:ad23fe03a082 454 }
mbed_official 573:ad23fe03a082 455
mbed_official 573:ad23fe03a082 456 /* check for common PLLI2S Parameters */
mbed_official 573:ad23fe03a082 457 assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN));
mbed_official 573:ad23fe03a082 458
mbed_official 573:ad23fe03a082 459 /*----------------- In Case of PLLI2S is selected as source clock for I2S -------------------*/
mbed_official 573:ad23fe03a082 460 if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) && (PeriphClkInit->I2sClockSelection == RCC_I2SCLKSOURCE_PLLI2S)))
mbed_official 573:ad23fe03a082 461 {
mbed_official 573:ad23fe03a082 462 /* check for Parameters */
mbed_official 573:ad23fe03a082 463 assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
mbed_official 573:ad23fe03a082 464
mbed_official 573:ad23fe03a082 465 /* Read PLLI2SP and PLLI2SQ value from PLLI2SCFGR register (this value is not needed for I2S configuration) */
mbed_official 573:ad23fe03a082 466 tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> POSITION_VAL(RCC_PLLI2SCFGR_PLLI2SP));
mbed_official 573:ad23fe03a082 467 tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> POSITION_VAL(RCC_PLLI2SCFGR_PLLI2SQ));
mbed_official 573:ad23fe03a082 468 /* Configure the PLLI2S division factors */
mbed_official 610:813dcc80987e 469 /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLM) */
mbed_official 573:ad23fe03a082 470 /* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */
mbed_official 573:ad23fe03a082 471 __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , tmpreg0, tmpreg1, PeriphClkInit->PLLI2S.PLLI2SR);
mbed_official 573:ad23fe03a082 472 }
mbed_official 573:ad23fe03a082 473
mbed_official 573:ad23fe03a082 474 /*----------------- In Case of PLLI2S is selected as source clock for SAI -------------------*/
mbed_official 573:ad23fe03a082 475 if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) ||
mbed_official 573:ad23fe03a082 476 ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)))
mbed_official 573:ad23fe03a082 477 {
mbed_official 573:ad23fe03a082 478 /* Check for PLLI2S Parameters */
mbed_official 573:ad23fe03a082 479 assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
mbed_official 573:ad23fe03a082 480 /* Check for PLLI2S/DIVQ parameters */
mbed_official 573:ad23fe03a082 481 assert_param(IS_RCC_PLLI2S_DIVQ_VALUE(PeriphClkInit->PLLI2SDivQ));
mbed_official 573:ad23fe03a082 482
mbed_official 573:ad23fe03a082 483 /* Read PLLI2SP and PLLI2SR values from PLLI2SCFGR register (this value is not needed for SAI configuration) */
mbed_official 573:ad23fe03a082 484 tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> POSITION_VAL(RCC_PLLI2SCFGR_PLLI2SP));
mbed_official 573:ad23fe03a082 485 tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> POSITION_VAL(RCC_PLLI2SCFGR_PLLI2SR));
mbed_official 573:ad23fe03a082 486 /* Configure the PLLI2S division factors */
mbed_official 573:ad23fe03a082 487 /* PLLI2S_VCO Input = PLL_SOURCE/PLLM */
mbed_official 573:ad23fe03a082 488 /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
mbed_official 573:ad23fe03a082 489 /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */
mbed_official 573:ad23fe03a082 490 __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN, tmpreg0, PeriphClkInit->PLLI2S.PLLI2SQ, tmpreg1);
mbed_official 573:ad23fe03a082 491
mbed_official 573:ad23fe03a082 492 /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */
mbed_official 573:ad23fe03a082 493 __HAL_RCC_PLLI2S_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLI2SDivQ);
mbed_official 573:ad23fe03a082 494 }
mbed_official 573:ad23fe03a082 495
mbed_official 573:ad23fe03a082 496 /*----------------- In Case of PLLI2S is selected as source clock for SPDIF-RX -------------------*/
mbed_official 573:ad23fe03a082 497 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
mbed_official 573:ad23fe03a082 498 {
mbed_official 573:ad23fe03a082 499 /* check for Parameters */
mbed_official 573:ad23fe03a082 500 assert_param(IS_RCC_PLLI2SP_VALUE(PeriphClkInit->PLLI2S.PLLI2SP));
mbed_official 573:ad23fe03a082 501
mbed_official 573:ad23fe03a082 502 /* Read PLLI2SR value from PLLI2SCFGR register (this value is not needed for SPDIF-RX configuration) */
mbed_official 573:ad23fe03a082 503 tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> POSITION_VAL(RCC_PLLI2SCFGR_PLLI2SQ));
mbed_official 573:ad23fe03a082 504 tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> POSITION_VAL(RCC_PLLI2SCFGR_PLLI2SR));
mbed_official 573:ad23fe03a082 505 /* Configure the PLLI2S division factors */
mbed_official 610:813dcc80987e 506 /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLM) */
mbed_official 573:ad23fe03a082 507 /* SPDIFCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */
mbed_official 573:ad23fe03a082 508 __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, tmpreg0, tmpreg1);
mbed_official 573:ad23fe03a082 509 }
mbed_official 573:ad23fe03a082 510
mbed_official 573:ad23fe03a082 511 /*----------------- In Case of PLLI2S is just selected -----------------*/
mbed_official 573:ad23fe03a082 512 if((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S)
mbed_official 573:ad23fe03a082 513 {
mbed_official 573:ad23fe03a082 514 /* Check for Parameters */
mbed_official 573:ad23fe03a082 515 assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN));
mbed_official 573:ad23fe03a082 516 assert_param(IS_RCC_PLLI2SP_VALUE(PeriphClkInit->PLLI2S.PLLI2SP));
mbed_official 573:ad23fe03a082 517 assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
mbed_official 573:ad23fe03a082 518 assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
mbed_official 573:ad23fe03a082 519
mbed_official 573:ad23fe03a082 520 /* Configure the PLLI2S division factors */
mbed_official 610:813dcc80987e 521 /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLI2SM) */
mbed_official 573:ad23fe03a082 522 /* SPDIFRXCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */
mbed_official 573:ad23fe03a082 523 __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
mbed_official 573:ad23fe03a082 524 }
mbed_official 573:ad23fe03a082 525
mbed_official 573:ad23fe03a082 526 /* Enable the PLLI2S */
mbed_official 573:ad23fe03a082 527 __HAL_RCC_PLLI2S_ENABLE();
mbed_official 573:ad23fe03a082 528
mbed_official 573:ad23fe03a082 529 /* Get Start Tick*/
mbed_official 573:ad23fe03a082 530 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 531
mbed_official 573:ad23fe03a082 532 /* Wait till PLLI2S is ready */
mbed_official 573:ad23fe03a082 533 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
mbed_official 573:ad23fe03a082 534 {
mbed_official 573:ad23fe03a082 535 if((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 536 {
mbed_official 573:ad23fe03a082 537 /* return in case of Timeout detected */
mbed_official 573:ad23fe03a082 538 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 539 }
mbed_official 573:ad23fe03a082 540 }
mbed_official 573:ad23fe03a082 541 }
mbed_official 573:ad23fe03a082 542
mbed_official 573:ad23fe03a082 543 /*-------------------------------------- PLLSAI Configuration ---------------------------------*/
mbed_official 573:ad23fe03a082 544 /* PLLSAI is configured when a peripheral will use it as source clock : SAI1, SAI2, LTDC or CK48 */
mbed_official 573:ad23fe03a082 545 if(pllsaiused == 1)
mbed_official 573:ad23fe03a082 546 {
mbed_official 573:ad23fe03a082 547 /* Disable PLLSAI Clock */
mbed_official 573:ad23fe03a082 548 __HAL_RCC_PLLSAI_DISABLE();
mbed_official 573:ad23fe03a082 549
mbed_official 573:ad23fe03a082 550 /* Get Start Tick*/
mbed_official 573:ad23fe03a082 551 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 552
mbed_official 573:ad23fe03a082 553 /* Wait till PLLSAI is disabled */
mbed_official 573:ad23fe03a082 554 while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
mbed_official 573:ad23fe03a082 555 {
mbed_official 573:ad23fe03a082 556 if((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 557 {
mbed_official 573:ad23fe03a082 558 /* return in case of Timeout detected */
mbed_official 573:ad23fe03a082 559 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 560 }
mbed_official 573:ad23fe03a082 561 }
mbed_official 573:ad23fe03a082 562
mbed_official 573:ad23fe03a082 563 /* Check the PLLSAI division factors */
mbed_official 573:ad23fe03a082 564 assert_param(IS_RCC_PLLSAIN_VALUE(PeriphClkInit->PLLSAI.PLLSAIN));
mbed_official 573:ad23fe03a082 565
mbed_official 573:ad23fe03a082 566 /*----------------- In Case of PLLSAI is selected as source clock for SAI -------------------*/
mbed_official 573:ad23fe03a082 567 if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) ||
mbed_official 573:ad23fe03a082 568 ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)))
mbed_official 573:ad23fe03a082 569 {
mbed_official 573:ad23fe03a082 570 /* check for PLLSAIQ Parameter */
mbed_official 573:ad23fe03a082 571 assert_param(IS_RCC_PLLSAIQ_VALUE(PeriphClkInit->PLLSAI.PLLSAIQ));
mbed_official 573:ad23fe03a082 572 /* check for PLLSAI/DIVQ Parameter */
mbed_official 573:ad23fe03a082 573 assert_param(IS_RCC_PLLSAI_DIVQ_VALUE(PeriphClkInit->PLLSAIDivQ));
mbed_official 573:ad23fe03a082 574
mbed_official 573:ad23fe03a082 575 /* Read PLLSAIP value from PLLSAICFGR register (this value is not needed for SAI configuration) */
mbed_official 573:ad23fe03a082 576 tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> POSITION_VAL(RCC_PLLSAICFGR_PLLSAIP));
mbed_official 573:ad23fe03a082 577 tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLI2SCFGR_PLLI2SR) >> POSITION_VAL(RCC_PLLSAICFGR_PLLSAIR));
mbed_official 573:ad23fe03a082 578 /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
mbed_official 573:ad23fe03a082 579 /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
mbed_official 573:ad23fe03a082 580 /* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */
mbed_official 573:ad23fe03a082 581 __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , tmpreg0, PeriphClkInit->PLLSAI.PLLSAIQ, tmpreg1);
mbed_official 573:ad23fe03a082 582
mbed_official 573:ad23fe03a082 583 /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */
mbed_official 573:ad23fe03a082 584 __HAL_RCC_PLLSAI_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLSAIDivQ);
mbed_official 573:ad23fe03a082 585 }
mbed_official 573:ad23fe03a082 586
mbed_official 573:ad23fe03a082 587 /*----------------- In Case of PLLSAI is selected as source clock for CLK48 -------------------*/
mbed_official 573:ad23fe03a082 588 /* In Case of PLLI2S is selected as source clock for CK48 */
mbed_official 573:ad23fe03a082 589 if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) && (PeriphClkInit->Clk48ClockSelection == RCC_CLK48SOURCE_PLLSAIP))
mbed_official 573:ad23fe03a082 590 {
mbed_official 573:ad23fe03a082 591 /* check for Parameters */
mbed_official 573:ad23fe03a082 592 assert_param(IS_RCC_PLLSAIP_VALUE(PeriphClkInit->PLLSAI.PLLSAIP));
mbed_official 573:ad23fe03a082 593 /* Read PLLSAIQ and PLLSAIR value from PLLSAICFGR register (this value is not needed for CK48 configuration) */
mbed_official 573:ad23fe03a082 594 tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> POSITION_VAL(RCC_PLLSAICFGR_PLLSAIQ));
mbed_official 573:ad23fe03a082 595 tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIR) >> POSITION_VAL(RCC_PLLSAICFGR_PLLSAIR));
mbed_official 573:ad23fe03a082 596
mbed_official 573:ad23fe03a082 597 /* Configure the PLLSAI division factors */
mbed_official 610:813dcc80987e 598 /* PLLSAI_VCO = f(VCO clock) = f(PLLSAI clock input) x (PLLI2SN/PLLM) */
mbed_official 573:ad23fe03a082 599 /* 48CLK = f(PLLSAI clock output) = f(VCO clock) / PLLSAIP */
mbed_official 573:ad23fe03a082 600 __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , PeriphClkInit->PLLSAI.PLLSAIP, tmpreg0, tmpreg1);
mbed_official 573:ad23fe03a082 601 }
mbed_official 573:ad23fe03a082 602
mbed_official 573:ad23fe03a082 603 #if defined(STM32F756xx) || defined(STM32F746xx)
mbed_official 573:ad23fe03a082 604 /*---------------------------- LTDC configuration -------------------------------*/
mbed_official 573:ad23fe03a082 605 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == (RCC_PERIPHCLK_LTDC))
mbed_official 573:ad23fe03a082 606 {
mbed_official 573:ad23fe03a082 607 assert_param(IS_RCC_PLLSAIR_VALUE(PeriphClkInit->PLLSAI.PLLSAIR));
mbed_official 573:ad23fe03a082 608 assert_param(IS_RCC_PLLSAI_DIVR_VALUE(PeriphClkInit->PLLSAIDivR));
mbed_official 573:ad23fe03a082 609
mbed_official 573:ad23fe03a082 610 /* Read PLLSAIP and PLLSAIQ value from PLLSAICFGR register (these value are not needed for LTDC configuration) */
mbed_official 573:ad23fe03a082 611 tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> POSITION_VAL(RCC_PLLSAICFGR_PLLSAIQ));
mbed_official 573:ad23fe03a082 612 tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> POSITION_VAL(RCC_PLLSAICFGR_PLLSAIP));
mbed_official 573:ad23fe03a082 613
mbed_official 573:ad23fe03a082 614 /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
mbed_official 573:ad23fe03a082 615 /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
mbed_official 573:ad23fe03a082 616 /* LTDC_CLK(first level) = PLLSAI_VCO Output/PLLSAIR */
mbed_official 573:ad23fe03a082 617 __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , tmpreg1, tmpreg0, PeriphClkInit->PLLSAI.PLLSAIR);
mbed_official 573:ad23fe03a082 618
mbed_official 573:ad23fe03a082 619 /* LTDC_CLK = LTDC_CLK(first level)/PLLSAIDIVR */
mbed_official 573:ad23fe03a082 620 __HAL_RCC_PLLSAI_PLLSAICLKDIVR_CONFIG(PeriphClkInit->PLLSAIDivR);
mbed_official 573:ad23fe03a082 621 }
mbed_official 573:ad23fe03a082 622 #endif /* STM32F756xx || STM32F746xx */
mbed_official 573:ad23fe03a082 623
mbed_official 573:ad23fe03a082 624 /* Enable PLLSAI Clock */
mbed_official 573:ad23fe03a082 625 __HAL_RCC_PLLSAI_ENABLE();
mbed_official 573:ad23fe03a082 626
mbed_official 573:ad23fe03a082 627 /* Get Start Tick*/
mbed_official 573:ad23fe03a082 628 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 629
mbed_official 573:ad23fe03a082 630 /* Wait till PLLSAI is ready */
mbed_official 573:ad23fe03a082 631 while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET)
mbed_official 573:ad23fe03a082 632 {
mbed_official 573:ad23fe03a082 633 if((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 634 {
mbed_official 573:ad23fe03a082 635 /* return in case of Timeout detected */
mbed_official 573:ad23fe03a082 636 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 637 }
mbed_official 573:ad23fe03a082 638 }
mbed_official 573:ad23fe03a082 639 }
mbed_official 573:ad23fe03a082 640 return HAL_OK;
mbed_official 573:ad23fe03a082 641 }
mbed_official 573:ad23fe03a082 642
mbed_official 573:ad23fe03a082 643 /**
mbed_official 573:ad23fe03a082 644 * @brief Get the RCC_PeriphCLKInitTypeDef according to the internal
mbed_official 573:ad23fe03a082 645 * RCC configuration registers.
mbed_official 573:ad23fe03a082 646 * @param PeriphClkInit: pointer to the configured RCC_PeriphCLKInitTypeDef structure
mbed_official 573:ad23fe03a082 647 * @retval None
mbed_official 573:ad23fe03a082 648 */
mbed_official 573:ad23fe03a082 649 void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
mbed_official 573:ad23fe03a082 650 {
mbed_official 573:ad23fe03a082 651 uint32_t tempreg = 0;
mbed_official 573:ad23fe03a082 652
mbed_official 573:ad23fe03a082 653 /* Set all possible values for the extended clock type parameter------------*/
mbed_official 573:ad23fe03a082 654 PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_I2S | RCC_PERIPHCLK_LPTIM1 |\
mbed_official 573:ad23fe03a082 655 RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_SAI2 |\
mbed_official 573:ad23fe03a082 656 RCC_PERIPHCLK_TIM | RCC_PERIPHCLK_RTC |\
mbed_official 573:ad23fe03a082 657 RCC_PERIPHCLK_CEC | RCC_PERIPHCLK_I2C4 |\
mbed_official 573:ad23fe03a082 658 RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 |\
mbed_official 573:ad23fe03a082 659 RCC_PERIPHCLK_I2C3 | RCC_PERIPHCLK_USART1 |\
mbed_official 573:ad23fe03a082 660 RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 |\
mbed_official 573:ad23fe03a082 661 RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_UART5 |\
mbed_official 573:ad23fe03a082 662 RCC_PERIPHCLK_USART6 | RCC_PERIPHCLK_UART7 |\
mbed_official 573:ad23fe03a082 663 RCC_PERIPHCLK_UART8 | RCC_PERIPHCLK_SDMMC1 |\
mbed_official 573:ad23fe03a082 664 RCC_PERIPHCLK_CLK48;
mbed_official 573:ad23fe03a082 665
mbed_official 573:ad23fe03a082 666 /* Get the PLLI2S Clock configuration -----------------------------------------------*/
mbed_official 573:ad23fe03a082 667 PeriphClkInit->PLLI2S.PLLI2SN = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> POSITION_VAL(RCC_PLLI2SCFGR_PLLI2SN));
mbed_official 573:ad23fe03a082 668 PeriphClkInit->PLLI2S.PLLI2SP = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> POSITION_VAL(RCC_PLLI2SCFGR_PLLI2SP));
mbed_official 573:ad23fe03a082 669 PeriphClkInit->PLLI2S.PLLI2SQ = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> POSITION_VAL(RCC_PLLI2SCFGR_PLLI2SQ));
mbed_official 573:ad23fe03a082 670 PeriphClkInit->PLLI2S.PLLI2SR = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> POSITION_VAL(RCC_PLLI2SCFGR_PLLI2SR));
mbed_official 573:ad23fe03a082 671
mbed_official 573:ad23fe03a082 672 /* Get the PLLSAI Clock configuration -----------------------------------------------*/
mbed_official 573:ad23fe03a082 673 PeriphClkInit->PLLSAI.PLLSAIN = (uint32_t)((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIN) >> POSITION_VAL(RCC_PLLSAICFGR_PLLSAIN));
mbed_official 573:ad23fe03a082 674 PeriphClkInit->PLLSAI.PLLSAIP = (uint32_t)((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> POSITION_VAL(RCC_PLLSAICFGR_PLLSAIP));
mbed_official 573:ad23fe03a082 675 PeriphClkInit->PLLSAI.PLLSAIQ = (uint32_t)((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> POSITION_VAL(RCC_PLLSAICFGR_PLLSAIQ));
mbed_official 573:ad23fe03a082 676 PeriphClkInit->PLLSAI.PLLSAIR = (uint32_t)((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIR) >> POSITION_VAL(RCC_PLLSAICFGR_PLLSAIR));
mbed_official 573:ad23fe03a082 677
mbed_official 573:ad23fe03a082 678 /* Get the PLLSAI/PLLI2S division factors -------------------------------------------*/
mbed_official 573:ad23fe03a082 679 PeriphClkInit->PLLI2SDivQ = (uint32_t)((RCC->DCKCFGR1 & RCC_DCKCFGR1_PLLI2SDIVQ) >> POSITION_VAL(RCC_DCKCFGR1_PLLI2SDIVQ));
mbed_official 573:ad23fe03a082 680 PeriphClkInit->PLLSAIDivQ = (uint32_t)((RCC->DCKCFGR1 & RCC_DCKCFGR1_PLLSAIDIVQ) >> POSITION_VAL(RCC_DCKCFGR1_PLLSAIDIVQ));
mbed_official 573:ad23fe03a082 681 PeriphClkInit->PLLSAIDivR = (uint32_t)((RCC->DCKCFGR1 & RCC_DCKCFGR1_PLLSAIDIVR) >> POSITION_VAL(RCC_DCKCFGR1_PLLSAIDIVR));
mbed_official 573:ad23fe03a082 682
mbed_official 573:ad23fe03a082 683 /* Get the SAI1 clock configuration ----------------------------------------------*/
mbed_official 573:ad23fe03a082 684 PeriphClkInit->Sai1ClockSelection = __HAL_RCC_GET_SAI1_SOURCE();
mbed_official 573:ad23fe03a082 685
mbed_official 573:ad23fe03a082 686 /* Get the SAI2 clock configuration ----------------------------------------------*/
mbed_official 573:ad23fe03a082 687 PeriphClkInit->Sai2ClockSelection = __HAL_RCC_GET_SAI2_SOURCE();
mbed_official 573:ad23fe03a082 688
mbed_official 573:ad23fe03a082 689 /* Get the I2S clock configuration ------------------------------------------*/
mbed_official 573:ad23fe03a082 690 PeriphClkInit->I2sClockSelection = __HAL_RCC_GET_I2SCLKSOURCE();
mbed_official 573:ad23fe03a082 691
mbed_official 573:ad23fe03a082 692 /* Get the I2C1 clock configuration ------------------------------------------*/
mbed_official 573:ad23fe03a082 693 PeriphClkInit->I2c1ClockSelection = __HAL_RCC_GET_I2C1_SOURCE();
mbed_official 573:ad23fe03a082 694
mbed_official 573:ad23fe03a082 695 /* Get the I2C2 clock configuration ------------------------------------------*/
mbed_official 573:ad23fe03a082 696 PeriphClkInit->I2c2ClockSelection = __HAL_RCC_GET_I2C2_SOURCE();
mbed_official 573:ad23fe03a082 697
mbed_official 573:ad23fe03a082 698 /* Get the I2C3 clock configuration ------------------------------------------*/
mbed_official 573:ad23fe03a082 699 PeriphClkInit->I2c3ClockSelection = __HAL_RCC_GET_I2C3_SOURCE();
mbed_official 573:ad23fe03a082 700
mbed_official 573:ad23fe03a082 701 /* Get the I2C4 clock configuration ------------------------------------------*/
mbed_official 573:ad23fe03a082 702 PeriphClkInit->I2c4ClockSelection = __HAL_RCC_GET_I2C4_SOURCE();
mbed_official 573:ad23fe03a082 703
mbed_official 573:ad23fe03a082 704 /* Get the USART1 clock configuration ------------------------------------------*/
mbed_official 573:ad23fe03a082 705 PeriphClkInit->Usart1ClockSelection = __HAL_RCC_GET_USART1_SOURCE();
mbed_official 573:ad23fe03a082 706
mbed_official 573:ad23fe03a082 707 /* Get the USART2 clock configuration ------------------------------------------*/
mbed_official 573:ad23fe03a082 708 PeriphClkInit->Usart2ClockSelection = __HAL_RCC_GET_USART2_SOURCE();
mbed_official 573:ad23fe03a082 709
mbed_official 573:ad23fe03a082 710 /* Get the USART3 clock configuration ------------------------------------------*/
mbed_official 573:ad23fe03a082 711 PeriphClkInit->Usart3ClockSelection = __HAL_RCC_GET_USART3_SOURCE();
mbed_official 573:ad23fe03a082 712
mbed_official 573:ad23fe03a082 713 /* Get the UART4 clock configuration ------------------------------------------*/
mbed_official 573:ad23fe03a082 714 PeriphClkInit->Uart4ClockSelection = __HAL_RCC_GET_UART4_SOURCE();
mbed_official 573:ad23fe03a082 715
mbed_official 573:ad23fe03a082 716 /* Get the UART5 clock configuration ------------------------------------------*/
mbed_official 573:ad23fe03a082 717 PeriphClkInit->Uart5ClockSelection = __HAL_RCC_GET_UART5_SOURCE();
mbed_official 573:ad23fe03a082 718
mbed_official 573:ad23fe03a082 719 /* Get the USART6 clock configuration ------------------------------------------*/
mbed_official 573:ad23fe03a082 720 PeriphClkInit->Usart6ClockSelection = __HAL_RCC_GET_USART6_SOURCE();
mbed_official 573:ad23fe03a082 721
mbed_official 573:ad23fe03a082 722 /* Get the UART7 clock configuration ------------------------------------------*/
mbed_official 573:ad23fe03a082 723 PeriphClkInit->Uart7ClockSelection = __HAL_RCC_GET_UART7_SOURCE();
mbed_official 573:ad23fe03a082 724
mbed_official 573:ad23fe03a082 725 /* Get the UART8 clock configuration ------------------------------------------*/
mbed_official 573:ad23fe03a082 726 PeriphClkInit->Uart8ClockSelection = __HAL_RCC_GET_UART8_SOURCE();
mbed_official 573:ad23fe03a082 727
mbed_official 573:ad23fe03a082 728 /* Get the LPTIM1 clock configuration ------------------------------------------*/
mbed_official 573:ad23fe03a082 729 PeriphClkInit->Lptim1ClockSelection = __HAL_RCC_GET_LPTIM1_SOURCE();
mbed_official 573:ad23fe03a082 730
mbed_official 573:ad23fe03a082 731 /* Get the CEC clock configuration -----------------------------------------------*/
mbed_official 573:ad23fe03a082 732 PeriphClkInit->CecClockSelection = __HAL_RCC_GET_CEC_SOURCE();
mbed_official 573:ad23fe03a082 733
mbed_official 573:ad23fe03a082 734 /* Get the CK48 clock configuration -----------------------------------------------*/
mbed_official 573:ad23fe03a082 735 PeriphClkInit->Clk48ClockSelection = __HAL_RCC_GET_CLK48_SOURCE();
mbed_official 573:ad23fe03a082 736
mbed_official 573:ad23fe03a082 737 /* Get the SDMMC clock configuration -----------------------------------------------*/
mbed_official 573:ad23fe03a082 738 PeriphClkInit->Sdmmc1ClockSelection = __HAL_RCC_GET_SDMMC1_SOURCE();
mbed_official 573:ad23fe03a082 739
mbed_official 573:ad23fe03a082 740 /* Get the RTC Clock configuration -----------------------------------------------*/
mbed_official 573:ad23fe03a082 741 tempreg = (RCC->CFGR & RCC_CFGR_RTCPRE);
mbed_official 573:ad23fe03a082 742 PeriphClkInit->RTCClockSelection = (uint32_t)((tempreg) | (RCC->BDCR & RCC_BDCR_RTCSEL));
mbed_official 573:ad23fe03a082 743
mbed_official 573:ad23fe03a082 744 /* Get the TIM Prescaler configuration --------------------------------------------*/
mbed_official 573:ad23fe03a082 745 if ((RCC->DCKCFGR1 & RCC_DCKCFGR1_TIMPRE) == RESET)
mbed_official 573:ad23fe03a082 746 {
mbed_official 573:ad23fe03a082 747 PeriphClkInit->TIMPresSelection = RCC_TIMPRES_DESACTIVATED;
mbed_official 573:ad23fe03a082 748 }
mbed_official 573:ad23fe03a082 749 else
mbed_official 573:ad23fe03a082 750 {
mbed_official 573:ad23fe03a082 751 PeriphClkInit->TIMPresSelection = RCC_TIMPRES_ACTIVATED;
mbed_official 573:ad23fe03a082 752 }
mbed_official 573:ad23fe03a082 753 }
mbed_official 573:ad23fe03a082 754
mbed_official 573:ad23fe03a082 755 /**
mbed_official 573:ad23fe03a082 756 * @brief Return the peripheral clock frequency for a given peripheral(SAI..)
mbed_official 573:ad23fe03a082 757 * @note Return 0 if peripheral clock identifier not managed by this API
mbed_official 573:ad23fe03a082 758 * @param PeriphClk: Peripheral clock identifier
mbed_official 573:ad23fe03a082 759 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 760 * @arg RCC_PERIPHCLK_SAI1: SAI1 peripheral clock
mbed_official 573:ad23fe03a082 761 * @arg RCC_PERIPHCLK_SAI2: SAI2 peripheral clock
mbed_official 573:ad23fe03a082 762 * @retval Frequency in KHz
mbed_official 573:ad23fe03a082 763 */
mbed_official 573:ad23fe03a082 764 uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
mbed_official 573:ad23fe03a082 765 {
mbed_official 573:ad23fe03a082 766 uint32_t tmpreg = 0;
mbed_official 573:ad23fe03a082 767 /* This variable used to store the SAI clock frequency (value in Hz) */
mbed_official 573:ad23fe03a082 768 uint32_t frequency = 0;
mbed_official 573:ad23fe03a082 769 /* This variable used to store the VCO Input (value in Hz) */
mbed_official 573:ad23fe03a082 770 uint32_t vcoinput = 0;
mbed_official 573:ad23fe03a082 771 /* This variable used to store the SAI clock source */
mbed_official 573:ad23fe03a082 772 uint32_t saiclocksource = 0;
mbed_official 573:ad23fe03a082 773 if ((PeriphClk == RCC_PERIPHCLK_SAI1) || (PeriphClk == RCC_PERIPHCLK_SAI2))
mbed_official 573:ad23fe03a082 774 {
mbed_official 573:ad23fe03a082 775 saiclocksource = RCC->DCKCFGR1;
mbed_official 573:ad23fe03a082 776 saiclocksource &= (RCC_DCKCFGR1_SAI1SEL | RCC_DCKCFGR1_SAI2SEL);
mbed_official 573:ad23fe03a082 777 switch (saiclocksource)
mbed_official 573:ad23fe03a082 778 {
mbed_official 573:ad23fe03a082 779 case 0: /* PLLSAI is the clock source for SAI*/
mbed_official 573:ad23fe03a082 780 {
mbed_official 573:ad23fe03a082 781 /* Configure the PLLSAI division factor */
mbed_official 573:ad23fe03a082 782 /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
mbed_official 573:ad23fe03a082 783 if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSI)
mbed_official 573:ad23fe03a082 784 {
mbed_official 573:ad23fe03a082 785 /* In Case the PLL Source is HSI (Internal Clock) */
mbed_official 573:ad23fe03a082 786 vcoinput = (HSI_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
mbed_official 573:ad23fe03a082 787 }
mbed_official 573:ad23fe03a082 788 else
mbed_official 573:ad23fe03a082 789 {
mbed_official 573:ad23fe03a082 790 /* In Case the PLL Source is HSE (External Clock) */
mbed_official 573:ad23fe03a082 791 vcoinput = ((HSE_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM)));
mbed_official 573:ad23fe03a082 792 }
mbed_official 573:ad23fe03a082 793 /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
mbed_official 573:ad23fe03a082 794 /* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */
mbed_official 573:ad23fe03a082 795 tmpreg = (RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> 24;
mbed_official 573:ad23fe03a082 796 frequency = (vcoinput * ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIN) >> 6))/(tmpreg);
mbed_official 573:ad23fe03a082 797
mbed_official 573:ad23fe03a082 798 /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */
mbed_official 573:ad23fe03a082 799 tmpreg = (((RCC->DCKCFGR1 & RCC_DCKCFGR1_PLLSAIDIVQ) >> 8) + 1);
mbed_official 573:ad23fe03a082 800 frequency = frequency/(tmpreg);
mbed_official 573:ad23fe03a082 801 break;
mbed_official 573:ad23fe03a082 802 }
mbed_official 573:ad23fe03a082 803 case RCC_DCKCFGR1_SAI1SEL_0: /* PLLI2S is the clock source for SAI*/
mbed_official 573:ad23fe03a082 804 case RCC_DCKCFGR1_SAI2SEL_0: /* PLLI2S is the clock source for SAI*/
mbed_official 573:ad23fe03a082 805 {
mbed_official 573:ad23fe03a082 806 /* Configure the PLLI2S division factor */
mbed_official 573:ad23fe03a082 807 /* PLLI2S_VCO Input = PLL_SOURCE/PLLM */
mbed_official 573:ad23fe03a082 808 if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSI)
mbed_official 573:ad23fe03a082 809 {
mbed_official 573:ad23fe03a082 810 /* In Case the PLL Source is HSI (Internal Clock) */
mbed_official 573:ad23fe03a082 811 vcoinput = (HSI_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
mbed_official 573:ad23fe03a082 812 }
mbed_official 573:ad23fe03a082 813 else
mbed_official 573:ad23fe03a082 814 {
mbed_official 573:ad23fe03a082 815 /* In Case the PLL Source is HSE (External Clock) */
mbed_official 573:ad23fe03a082 816 vcoinput = ((HSE_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM)));
mbed_official 573:ad23fe03a082 817 }
mbed_official 573:ad23fe03a082 818
mbed_official 573:ad23fe03a082 819 /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
mbed_official 573:ad23fe03a082 820 /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */
mbed_official 573:ad23fe03a082 821 tmpreg = (RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> 24;
mbed_official 573:ad23fe03a082 822 frequency = (vcoinput * ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6))/(tmpreg);
mbed_official 573:ad23fe03a082 823
mbed_official 573:ad23fe03a082 824 /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */
mbed_official 573:ad23fe03a082 825 tmpreg = ((RCC->DCKCFGR1 & RCC_DCKCFGR1_PLLI2SDIVQ) + 1);
mbed_official 573:ad23fe03a082 826 frequency = frequency/(tmpreg);
mbed_official 573:ad23fe03a082 827 break;
mbed_official 573:ad23fe03a082 828 }
mbed_official 573:ad23fe03a082 829 case RCC_DCKCFGR1_SAI1SEL_1: /* External clock is the clock source for SAI*/
mbed_official 573:ad23fe03a082 830 case RCC_DCKCFGR1_SAI2SEL_1: /* External clock is the clock source for SAI*/
mbed_official 573:ad23fe03a082 831 {
mbed_official 573:ad23fe03a082 832 frequency = EXTERNAL_CLOCK_VALUE;
mbed_official 573:ad23fe03a082 833 break;
mbed_official 573:ad23fe03a082 834 }
mbed_official 573:ad23fe03a082 835 default :
mbed_official 573:ad23fe03a082 836 {
mbed_official 573:ad23fe03a082 837 break;
mbed_official 573:ad23fe03a082 838 }
mbed_official 573:ad23fe03a082 839 }
mbed_official 573:ad23fe03a082 840 }
mbed_official 573:ad23fe03a082 841 return frequency;
mbed_official 573:ad23fe03a082 842 }
mbed_official 573:ad23fe03a082 843
mbed_official 573:ad23fe03a082 844 /**
mbed_official 573:ad23fe03a082 845 * @}
mbed_official 573:ad23fe03a082 846 */
mbed_official 573:ad23fe03a082 847
mbed_official 573:ad23fe03a082 848 /**
mbed_official 573:ad23fe03a082 849 * @}
mbed_official 573:ad23fe03a082 850 */
mbed_official 573:ad23fe03a082 851
mbed_official 573:ad23fe03a082 852 #endif /* HAL_RCC_MODULE_ENABLED */
mbed_official 573:ad23fe03a082 853 /**
mbed_official 573:ad23fe03a082 854 * @}
mbed_official 573:ad23fe03a082 855 */
mbed_official 573:ad23fe03a082 856
mbed_official 573:ad23fe03a082 857 /**
mbed_official 573:ad23fe03a082 858 * @}
mbed_official 573:ad23fe03a082 859 */
mbed_official 573:ad23fe03a082 860
mbed_official 573:ad23fe03a082 861 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/