DriverLibrary - NXP's driver library for LPC17xx, ported to mbed'…

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Igor Skochinsky / Mbed 2 deprecated DriverLibrary

NXP's driver library for LPC17xx, ported to mbed's online compiler. Not tested! I had to fix a lot of warings and found a couple of pretty obvious bugs, so the chances are there are more. Original: http://ics.nxp.com/support/documents/microcontrollers/zip/lpc17xx.cmsis.driver.library.zip

Dependencies: mbed

source/lpc17xx_clkpwr.c@0:1063a091a062, 2010-02-17 (annotated)

Committer:: igorsk
Date:: Wed Feb 17 16:22:39 2010 +0000
Revision:: 0:1063a091a062

Who changed what in which revision?

User	Revision	Line number	New contents of line
igorsk	0:1063a091a062	1	/**
igorsk	0:1063a091a062	2	* @file : lpc17xx_clkpwr.c
igorsk	0:1063a091a062	3	* @brief : Contains all functions support for Clock and Power Control
igorsk	0:1063a091a062	4	* firmware library on LPC17xx
igorsk	0:1063a091a062	5	* @version : 1.0
igorsk	0:1063a091a062	6	* @date : 18. Mar. 2009
igorsk	0:1063a091a062	7	* @author : HieuNguyen
igorsk	0:1063a091a062	8	**************************************************************************
igorsk	0:1063a091a062	9	* Software that is described herein is for illustrative purposes only
igorsk	0:1063a091a062	10	* which provides customers with programming information regarding the
igorsk	0:1063a091a062	11	* products. This software is supplied "AS IS" without any warranties.
igorsk	0:1063a091a062	12	* NXP Semiconductors assumes no responsibility or liability for the
igorsk	0:1063a091a062	13	* use of the software, conveys no license or title under any patent,
igorsk	0:1063a091a062	14	* copyright, or mask work right to the product. NXP Semiconductors
igorsk	0:1063a091a062	15	* reserves the right to make changes in the software without
igorsk	0:1063a091a062	16	* notification. NXP Semiconductors also make no representation or
igorsk	0:1063a091a062	17	* warranty that such application will be suitable for the specified
igorsk	0:1063a091a062	18	* use without further testing or modification.
igorsk	0:1063a091a062	19	**********************************************************************/
igorsk	0:1063a091a062	20
igorsk	0:1063a091a062	21	/* Peripheral group ----------------------------------------------------------- */
igorsk	0:1063a091a062	22	/** @addtogroup CLKPWR
igorsk	0:1063a091a062	23	* @{
igorsk	0:1063a091a062	24	*/
igorsk	0:1063a091a062	25
igorsk	0:1063a091a062	26	/* Includes ------------------------------------------------------------------- */
igorsk	0:1063a091a062	27	#include "lpc17xx_clkpwr.h"
igorsk	0:1063a091a062	28
igorsk	0:1063a091a062	29
igorsk	0:1063a091a062	30	/* Public Functions ----------------------------------------------------------- */
igorsk	0:1063a091a062	31	/** @addtogroup CLKPWR_Public_Functions
igorsk	0:1063a091a062	32	* @{
igorsk	0:1063a091a062	33	*/
igorsk	0:1063a091a062	34
igorsk	0:1063a091a062	35	/*******************************************************************//
igorsk	0:1063a091a062	36	* @brief Set value of each Peripheral Clock Selection
igorsk	0:1063a091a062	37	* @param[in] ClkType Peripheral Clock Selection of each type,
igorsk	0:1063a091a062	38	* should be one of the following:
igorsk	0:1063a091a062	39	* - CLKPWR_PCLKSEL_WDT : WDT
igorsk	0:1063a091a062	40	- CLKPWR_PCLKSEL_TIMER0 : Timer 0
igorsk	0:1063a091a062	41	- CLKPWR_PCLKSEL_TIMER1 : Timer 1
igorsk	0:1063a091a062	42	- CLKPWR_PCLKSEL_UART0 : UART 0
igorsk	0:1063a091a062	43	- CLKPWR_PCLKSEL_UART1 : UART 1
igorsk	0:1063a091a062	44	- CLKPWR_PCLKSEL_PWM1 : PWM 1
igorsk	0:1063a091a062	45	- CLKPWR_PCLKSEL_I2C0 : I2C 0
igorsk	0:1063a091a062	46	- CLKPWR_PCLKSEL_SPI : SPI
igorsk	0:1063a091a062	47	- CLKPWR_PCLKSEL_SSP1 : SSP 1
igorsk	0:1063a091a062	48	- CLKPWR_PCLKSEL_DAC : DAC
igorsk	0:1063a091a062	49	- CLKPWR_PCLKSEL_ADC : ADC
igorsk	0:1063a091a062	50	- CLKPWR_PCLKSEL_CAN1 : CAN 1
igorsk	0:1063a091a062	51	- CLKPWR_PCLKSEL_CAN2 : CAN 2
igorsk	0:1063a091a062	52	- CLKPWR_PCLKSEL_ACF : ACF
igorsk	0:1063a091a062	53	- CLKPWR_PCLKSEL_QEI : QEI
igorsk	0:1063a091a062	54	- CLKPWR_PCLKSEL_PCB : PCB
igorsk	0:1063a091a062	55	- CLKPWR_PCLKSEL_I2C1 : I2C 1
igorsk	0:1063a091a062	56	- CLKPWR_PCLKSEL_SSP0 : SSP 0
igorsk	0:1063a091a062	57	- CLKPWR_PCLKSEL_TIMER2 : Timer 2
igorsk	0:1063a091a062	58	- CLKPWR_PCLKSEL_TIMER3 : Timer 3
igorsk	0:1063a091a062	59	- CLKPWR_PCLKSEL_UART2 : UART 2
igorsk	0:1063a091a062	60	- CLKPWR_PCLKSEL_UART3 : UART 3
igorsk	0:1063a091a062	61	- CLKPWR_PCLKSEL_I2C2 : I2C 2
igorsk	0:1063a091a062	62	- CLKPWR_PCLKSEL_I2S : I2S
igorsk	0:1063a091a062	63	- CLKPWR_PCLKSEL_RIT : RIT
igorsk	0:1063a091a062	64	- CLKPWR_PCLKSEL_SYSCON : SYSCON
igorsk	0:1063a091a062	65	- CLKPWR_PCLKSEL_MC : MC
igorsk	0:1063a091a062	66
igorsk	0:1063a091a062	67	* @param[in] DivVal Value of divider, should be:
igorsk	0:1063a091a062	68	* - CLKPWR_PCLKSEL_CCLK_DIV_4 : PCLK_peripheral = CCLK/4
igorsk	0:1063a091a062	69	* - CLKPWR_PCLKSEL_CCLK_DIV_1 : PCLK_peripheral = CCLK/1
igorsk	0:1063a091a062	70	* - CLKPWR_PCLKSEL_CCLK_DIV_2 : PCLK_peripheral = CCLK/2
igorsk	0:1063a091a062	71	*
igorsk	0:1063a091a062	72	* @return none
igorsk	0:1063a091a062	73	**********************************************************************/
igorsk	0:1063a091a062	74	void CLKPWR_SetPCLKDiv (uint32_t ClkType, uint32_t DivVal)
igorsk	0:1063a091a062	75	{
igorsk	0:1063a091a062	76	uint32_t bitpos;
igorsk	0:1063a091a062	77
igorsk	0:1063a091a062	78	bitpos = (ClkType < 32) ? (ClkType) : (ClkType - 32);
igorsk	0:1063a091a062	79
igorsk	0:1063a091a062	80	/* PCLKSEL0 selected */
igorsk	0:1063a091a062	81	if (ClkType < 32)
igorsk	0:1063a091a062	82	{
igorsk	0:1063a091a062	83	/* Clear two bit at bit position */
igorsk	0:1063a091a062	84	LPC_SC->PCLKSEL0 &= (~(CLKPWR_PCLKSEL_BITMASK(bitpos)));
igorsk	0:1063a091a062	85
igorsk	0:1063a091a062	86	/* Set two selected bit */
igorsk	0:1063a091a062	87	LPC_SC->PCLKSEL0 \|= (CLKPWR_PCLKSEL_SET(bitpos, DivVal));
igorsk	0:1063a091a062	88	}
igorsk	0:1063a091a062	89	/* PCLKSEL1 selected */
igorsk	0:1063a091a062	90	else
igorsk	0:1063a091a062	91	{
igorsk	0:1063a091a062	92	/* Clear two bit at bit position */
igorsk	0:1063a091a062	93	LPC_SC->PCLKSEL1 &= ~(CLKPWR_PCLKSEL_BITMASK(bitpos));
igorsk	0:1063a091a062	94
igorsk	0:1063a091a062	95	/* Set two selected bit */
igorsk	0:1063a091a062	96	LPC_SC->PCLKSEL1 \|= (CLKPWR_PCLKSEL_SET(bitpos, DivVal));
igorsk	0:1063a091a062	97	}
igorsk	0:1063a091a062	98	}
igorsk	0:1063a091a062	99
igorsk	0:1063a091a062	100
igorsk	0:1063a091a062	101	/*******************************************************************//
igorsk	0:1063a091a062	102	* @brief Get current value of each Peripheral Clock Selection
igorsk	0:1063a091a062	103	* @param[in] ClkType Peripheral Clock Selection of each type,
igorsk	0:1063a091a062	104	* should be one of the following:
igorsk	0:1063a091a062	105	* - CLKPWR_PCLKSEL_WDT : WDT
igorsk	0:1063a091a062	106	- CLKPWR_PCLKSEL_TIMER0 : Timer 0
igorsk	0:1063a091a062	107	- CLKPWR_PCLKSEL_TIMER1 : Timer 1
igorsk	0:1063a091a062	108	- CLKPWR_PCLKSEL_UART0 : UART 0
igorsk	0:1063a091a062	109	- CLKPWR_PCLKSEL_UART1 : UART 1
igorsk	0:1063a091a062	110	- CLKPWR_PCLKSEL_PWM1 : PWM 1
igorsk	0:1063a091a062	111	- CLKPWR_PCLKSEL_I2C0 : I2C 0
igorsk	0:1063a091a062	112	- CLKPWR_PCLKSEL_SPI : SPI
igorsk	0:1063a091a062	113	- CLKPWR_PCLKSEL_SSP1 : SSP 1
igorsk	0:1063a091a062	114	- CLKPWR_PCLKSEL_DAC : DAC
igorsk	0:1063a091a062	115	- CLKPWR_PCLKSEL_ADC : ADC
igorsk	0:1063a091a062	116	- CLKPWR_PCLKSEL_CAN1 : CAN 1
igorsk	0:1063a091a062	117	- CLKPWR_PCLKSEL_CAN2 : CAN 2
igorsk	0:1063a091a062	118	- CLKPWR_PCLKSEL_ACF : ACF
igorsk	0:1063a091a062	119	- CLKPWR_PCLKSEL_QEI : QEI
igorsk	0:1063a091a062	120	- CLKPWR_PCLKSEL_PCB : PCB
igorsk	0:1063a091a062	121	- CLKPWR_PCLKSEL_I2C1 : I2C 1
igorsk	0:1063a091a062	122	- CLKPWR_PCLKSEL_SSP0 : SSP 0
igorsk	0:1063a091a062	123	- CLKPWR_PCLKSEL_TIMER2 : Timer 2
igorsk	0:1063a091a062	124	- CLKPWR_PCLKSEL_TIMER3 : Timer 3
igorsk	0:1063a091a062	125	- CLKPWR_PCLKSEL_UART2 : UART 2
igorsk	0:1063a091a062	126	- CLKPWR_PCLKSEL_UART3 : UART 3
igorsk	0:1063a091a062	127	- CLKPWR_PCLKSEL_I2C2 : I2C 2
igorsk	0:1063a091a062	128	- CLKPWR_PCLKSEL_I2S : I2S
igorsk	0:1063a091a062	129	- CLKPWR_PCLKSEL_RIT : RIT
igorsk	0:1063a091a062	130	- CLKPWR_PCLKSEL_SYSCON : SYSCON
igorsk	0:1063a091a062	131	- CLKPWR_PCLKSEL_MC : MC
igorsk	0:1063a091a062	132
igorsk	0:1063a091a062	133	* @return Value of Selected Peripheral Clock Selection
igorsk	0:1063a091a062	134	**********************************************************************/
igorsk	0:1063a091a062	135	uint32_t CLKPWR_GetPCLKSEL (uint32_t ClkType)
igorsk	0:1063a091a062	136	{
igorsk	0:1063a091a062	137	uint32_t bitpos, retval;
igorsk	0:1063a091a062	138
igorsk	0:1063a091a062	139	if (ClkType < 32)
igorsk	0:1063a091a062	140	{
igorsk	0:1063a091a062	141	bitpos = ClkType;
igorsk	0:1063a091a062	142	retval = LPC_SC->PCLKSEL0;
igorsk	0:1063a091a062	143	}
igorsk	0:1063a091a062	144	else
igorsk	0:1063a091a062	145	{
igorsk	0:1063a091a062	146	bitpos = ClkType - 32;
igorsk	0:1063a091a062	147	retval = LPC_SC->PCLKSEL1;
igorsk	0:1063a091a062	148	}
igorsk	0:1063a091a062	149
igorsk	0:1063a091a062	150	retval = CLKPWR_PCLKSEL_GET(bitpos, retval);
igorsk	0:1063a091a062	151	return retval;
igorsk	0:1063a091a062	152	}
igorsk	0:1063a091a062	153
igorsk	0:1063a091a062	154
igorsk	0:1063a091a062	155
igorsk	0:1063a091a062	156	/*******************************************************************//
igorsk	0:1063a091a062	157	* @brief Get current value of each Peripheral Clock
igorsk	0:1063a091a062	158	* @param[in] ClkType Peripheral Clock Selection of each type,
igorsk	0:1063a091a062	159	* should be one of the following:
igorsk	0:1063a091a062	160	* - CLKPWR_PCLKSEL_WDT : WDT
igorsk	0:1063a091a062	161	- CLKPWR_PCLKSEL_TIMER0 : Timer 0
igorsk	0:1063a091a062	162	- CLKPWR_PCLKSEL_TIMER1 : Timer 1
igorsk	0:1063a091a062	163	- CLKPWR_PCLKSEL_UART0 : UART 0
igorsk	0:1063a091a062	164	- CLKPWR_PCLKSEL_UART1 : UART 1
igorsk	0:1063a091a062	165	- CLKPWR_PCLKSEL_PWM1 : PWM 1
igorsk	0:1063a091a062	166	- CLKPWR_PCLKSEL_I2C0 : I2C 0
igorsk	0:1063a091a062	167	- CLKPWR_PCLKSEL_SPI : SPI
igorsk	0:1063a091a062	168	- CLKPWR_PCLKSEL_SSP1 : SSP 1
igorsk	0:1063a091a062	169	- CLKPWR_PCLKSEL_DAC : DAC
igorsk	0:1063a091a062	170	- CLKPWR_PCLKSEL_ADC : ADC
igorsk	0:1063a091a062	171	- CLKPWR_PCLKSEL_CAN1 : CAN 1
igorsk	0:1063a091a062	172	- CLKPWR_PCLKSEL_CAN2 : CAN 2
igorsk	0:1063a091a062	173	- CLKPWR_PCLKSEL_ACF : ACF
igorsk	0:1063a091a062	174	- CLKPWR_PCLKSEL_QEI : QEI
igorsk	0:1063a091a062	175	- CLKPWR_PCLKSEL_PCB : PCB
igorsk	0:1063a091a062	176	- CLKPWR_PCLKSEL_I2C1 : I2C 1
igorsk	0:1063a091a062	177	- CLKPWR_PCLKSEL_SSP0 : SSP 0
igorsk	0:1063a091a062	178	- CLKPWR_PCLKSEL_TIMER2 : Timer 2
igorsk	0:1063a091a062	179	- CLKPWR_PCLKSEL_TIMER3 : Timer 3
igorsk	0:1063a091a062	180	- CLKPWR_PCLKSEL_UART2 : UART 2
igorsk	0:1063a091a062	181	- CLKPWR_PCLKSEL_UART3 : UART 3
igorsk	0:1063a091a062	182	- CLKPWR_PCLKSEL_I2C2 : I2C 2
igorsk	0:1063a091a062	183	- CLKPWR_PCLKSEL_I2S : I2S
igorsk	0:1063a091a062	184	- CLKPWR_PCLKSEL_RIT : RIT
igorsk	0:1063a091a062	185	- CLKPWR_PCLKSEL_SYSCON : SYSCON
igorsk	0:1063a091a062	186	- CLKPWR_PCLKSEL_MC : MC
igorsk	0:1063a091a062	187
igorsk	0:1063a091a062	188	* @return Value of Selected Peripheral Clock
igorsk	0:1063a091a062	189	**********************************************************************/
igorsk	0:1063a091a062	190	uint32_t CLKPWR_GetPCLK (uint32_t ClkType)
igorsk	0:1063a091a062	191	{
igorsk	0:1063a091a062	192	uint32_t retval, div;
igorsk	0:1063a091a062	193
igorsk	0:1063a091a062	194	retval = SystemCoreClock;
igorsk	0:1063a091a062	195	div = CLKPWR_GetPCLKSEL(ClkType);
igorsk	0:1063a091a062	196
igorsk	0:1063a091a062	197	switch (div)
igorsk	0:1063a091a062	198	{
igorsk	0:1063a091a062	199	case 0:
igorsk	0:1063a091a062	200	div = 4;
igorsk	0:1063a091a062	201	break;
igorsk	0:1063a091a062	202
igorsk	0:1063a091a062	203	case 1:
igorsk	0:1063a091a062	204	div = 1;
igorsk	0:1063a091a062	205	break;
igorsk	0:1063a091a062	206
igorsk	0:1063a091a062	207	case 2:
igorsk	0:1063a091a062	208	div = 2;
igorsk	0:1063a091a062	209	break;
igorsk	0:1063a091a062	210
igorsk	0:1063a091a062	211	case 3:
igorsk	0:1063a091a062	212	div = 8;
igorsk	0:1063a091a062	213	break;
igorsk	0:1063a091a062	214	}
igorsk	0:1063a091a062	215	retval /= div;
igorsk	0:1063a091a062	216
igorsk	0:1063a091a062	217	return retval;
igorsk	0:1063a091a062	218	}
igorsk	0:1063a091a062	219
igorsk	0:1063a091a062	220
igorsk	0:1063a091a062	221
igorsk	0:1063a091a062	222	/*******************************************************************//
igorsk	0:1063a091a062	223	* @brief Configure power supply for each peripheral according to NewState
igorsk	0:1063a091a062	224	* @param[in] PPType Type of peripheral used to enable power,
igorsk	0:1063a091a062	225	* should be one of the following:
igorsk	0:1063a091a062	226	* - CLKPWR_PCONP_PCTIM0 : Timer 0
igorsk	0:1063a091a062	227	- CLKPWR_PCONP_PCTIM1 : Timer 1
igorsk	0:1063a091a062	228	- CLKPWR_PCONP_PCUART0 : UART 0
igorsk	0:1063a091a062	229	- CLKPWR_PCONP_PCUART1 : UART 1
igorsk	0:1063a091a062	230	- CLKPWR_PCONP_PCPWM1 : PWM 1
igorsk	0:1063a091a062	231	- CLKPWR_PCONP_PCI2C0 : I2C 0
igorsk	0:1063a091a062	232	- CLKPWR_PCONP_PCSPI : SPI
igorsk	0:1063a091a062	233	- CLKPWR_PCONP_PCRTC : RTC
igorsk	0:1063a091a062	234	- CLKPWR_PCONP_PCSSP1 : SSP 1
igorsk	0:1063a091a062	235	- CLKPWR_PCONP_PCAD : ADC
igorsk	0:1063a091a062	236	- CLKPWR_PCONP_PCAN1 : CAN 1
igorsk	0:1063a091a062	237	- CLKPWR_PCONP_PCAN2 : CAN 2
igorsk	0:1063a091a062	238	- CLKPWR_PCONP_PCGPIO : GPIO
igorsk	0:1063a091a062	239	- CLKPWR_PCONP_PCRIT : RIT
igorsk	0:1063a091a062	240	- CLKPWR_PCONP_PCMC : MC
igorsk	0:1063a091a062	241	- CLKPWR_PCONP_PCQEI : QEI
igorsk	0:1063a091a062	242	- CLKPWR_PCONP_PCI2C1 : I2C 1
igorsk	0:1063a091a062	243	- CLKPWR_PCONP_PCSSP0 : SSP 0
igorsk	0:1063a091a062	244	- CLKPWR_PCONP_PCTIM2 : Timer 2
igorsk	0:1063a091a062	245	- CLKPWR_PCONP_PCTIM3 : Timer 3
igorsk	0:1063a091a062	246	- CLKPWR_PCONP_PCUART2 : UART 2
igorsk	0:1063a091a062	247	- CLKPWR_PCONP_PCUART3 : UART 3
igorsk	0:1063a091a062	248	- CLKPWR_PCONP_PCI2C2 : I2C 2
igorsk	0:1063a091a062	249	- CLKPWR_PCONP_PCI2S : I2S
igorsk	0:1063a091a062	250	- CLKPWR_PCONP_PCGPDMA : GPDMA
igorsk	0:1063a091a062	251	- CLKPWR_PCONP_PCENET : Ethernet
igorsk	0:1063a091a062	252	- CLKPWR_PCONP_PCUSB : USB
igorsk	0:1063a091a062	253	*
igorsk	0:1063a091a062	254	* @param[in] NewState New state of Peripheral Power, should be:
igorsk	0:1063a091a062	255	* - ENABLE : Enable power for this peripheral
igorsk	0:1063a091a062	256	* - DISABLE : Disable power for this peripheral
igorsk	0:1063a091a062	257	*
igorsk	0:1063a091a062	258	* @return none
igorsk	0:1063a091a062	259	**********************************************************************/
igorsk	0:1063a091a062	260	void CLKPWR_ConfigPPWR (uint32_t PPType, FunctionalState NewState)
igorsk	0:1063a091a062	261	{
igorsk	0:1063a091a062	262	if (NewState == ENABLE)
igorsk	0:1063a091a062	263	{
igorsk	0:1063a091a062	264	LPC_SC->PCONP \|= PPType & CLKPWR_PCONP_BITMASK;
igorsk	0:1063a091a062	265	}
igorsk	0:1063a091a062	266	else if (NewState == DISABLE)
igorsk	0:1063a091a062	267	{
igorsk	0:1063a091a062	268	LPC_SC->PCONP &= (~PPType) & CLKPWR_PCONP_BITMASK;
igorsk	0:1063a091a062	269	}
igorsk	0:1063a091a062	270	}
igorsk	0:1063a091a062	271
igorsk	0:1063a091a062	272
igorsk	0:1063a091a062	273	/**
igorsk	0:1063a091a062	274	* @brief Enter Sleep mode with co-operated instruction by the Cortex-M3.
igorsk	0:1063a091a062	275	* @param[in] None
igorsk	0:1063a091a062	276	* @return None
igorsk	0:1063a091a062	277	*/
igorsk	0:1063a091a062	278	void CLKPWR_Sleep(void)
igorsk	0:1063a091a062	279	{
igorsk	0:1063a091a062	280	LPC_SC->PCON = 0x00;
igorsk	0:1063a091a062	281	/* Sleep Mode*/
igorsk	0:1063a091a062	282	__WFI();
igorsk	0:1063a091a062	283	}
igorsk	0:1063a091a062	284
igorsk	0:1063a091a062	285
igorsk	0:1063a091a062	286	/**
igorsk	0:1063a091a062	287	* @brief Enter Deep Sleep mode with co-operated instruction by the Cortex-M3.
igorsk	0:1063a091a062	288	* @param[in] None
igorsk	0:1063a091a062	289	* @return None
igorsk	0:1063a091a062	290	*/
igorsk	0:1063a091a062	291	void CLKPWR_DeepSleep(void)
igorsk	0:1063a091a062	292	{
igorsk	0:1063a091a062	293	/* Deep-Sleep Mode, set SLEEPDEEP bit */
igorsk	0:1063a091a062	294	SCB->SCR = 0x4;
igorsk	0:1063a091a062	295	LPC_SC->PCON = 0x00;
igorsk	0:1063a091a062	296	/* Sleep Mode*/
igorsk	0:1063a091a062	297	__WFI();
igorsk	0:1063a091a062	298	}
igorsk	0:1063a091a062	299
igorsk	0:1063a091a062	300
igorsk	0:1063a091a062	301	/**
igorsk	0:1063a091a062	302	* @brief Enter Power Down mode with co-operated instruction by the Cortex-M3.
igorsk	0:1063a091a062	303	* @param[in] None
igorsk	0:1063a091a062	304	* @return None
igorsk	0:1063a091a062	305	*/
igorsk	0:1063a091a062	306	void CLKPWR_PowerDown(void)
igorsk	0:1063a091a062	307	{
igorsk	0:1063a091a062	308	/* Deep-Sleep Mode, set SLEEPDEEP bit */
igorsk	0:1063a091a062	309	SCB->SCR = 0x4;
igorsk	0:1063a091a062	310	LPC_SC->PCON = 0x01;
igorsk	0:1063a091a062	311	/* Sleep Mode*/
igorsk	0:1063a091a062	312	__WFI();
igorsk	0:1063a091a062	313	}
igorsk	0:1063a091a062	314
igorsk	0:1063a091a062	315
igorsk	0:1063a091a062	316	/**
igorsk	0:1063a091a062	317	* @brief Enter Deep Power Down mode with co-operated instruction by the Cortex-M3.
igorsk	0:1063a091a062	318	* @param[in] None
igorsk	0:1063a091a062	319	* @return None
igorsk	0:1063a091a062	320	*/
igorsk	0:1063a091a062	321	void CLKPWR_DeepPowerDown(void)
igorsk	0:1063a091a062	322	{
igorsk	0:1063a091a062	323	/* Deep-Sleep Mode, set SLEEPDEEP bit */
igorsk	0:1063a091a062	324	SCB->SCR = 0x4;
igorsk	0:1063a091a062	325	LPC_SC->PCON = 0x03;
igorsk	0:1063a091a062	326	/* Sleep Mode*/
igorsk	0:1063a091a062	327	__WFI();
igorsk	0:1063a091a062	328	}
igorsk	0:1063a091a062	329
igorsk	0:1063a091a062	330
igorsk	0:1063a091a062	331	/**
igorsk	0:1063a091a062	332	* @brief Configure Brown-Out function in
igorsk	0:1063a091a062	333	*/
igorsk	0:1063a091a062	334
igorsk	0:1063a091a062	335
igorsk	0:1063a091a062	336	/**
igorsk	0:1063a091a062	337	* @}
igorsk	0:1063a091a062	338	*/
igorsk	0:1063a091a062	339
igorsk	0:1063a091a062	340	/**
igorsk	0:1063a091a062	341	* @}
igorsk	0:1063a091a062	342	*/
igorsk	0:1063a091a062	343
igorsk	0:1063a091a062	344	/* --------------------------------- End Of File ------------------------------ */

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Type:	Program
Mbed OS support:	Mbed 2 deprecated
Created:	17 Feb 2010
Imports:	121
Forks:	0
Commits:	1
Dependents:	0
Dependencies:	1
Followers:	5

source/lpc17xx_clkpwr.c@0:1063a091a062, 2010-02-17 (annotated)

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