Frank 26080115
Date: March 20, 2011 This library is created from "LPC17xx CMSIS-Compliant Standard Peripheral Firmware Driver Library (GNU, Keil, IAR) (Jan 28, 2011)", available from NXP's website, under "All microcontrollers support documents" [[http://ics.nxp.com/support/documents/microcontrollers/?type=software]] You will need to follow [[/projects/libraries/svn/mbed/trunk/LPC1768/LPC17xx.h]] while using this library Examples provided here [[/users/frank26080115/programs/LPC1700CMSIS_Examples/]] The beautiful thing is that NXP does not place copyright protection on any of the files in here Only a few modifications are made to make it compile with the mbed online compiler, I fixed some warnings as well. This is untested as of March 20, 2011 Forum post about this library: [[/forum/mbed/topic/2030/]]
lpc17xx_gpdma.c@0:84d7747641aa, 2011-03-20 (annotated)
- Committer:
- frank26080115
- Date:
- Sun Mar 20 18:45:15 2011 +0000
- Revision:
- 0:84d7747641aa
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| frank26080115 | 0:84d7747641aa | 1 | /** |
| frank26080115 | 0:84d7747641aa | 2 | * @file : lpc17xx_gpdma.c |
| frank26080115 | 0:84d7747641aa | 3 | * @brief : Contains all functions support for GPDMA firmware library on LPC17xx |
| frank26080115 | 0:84d7747641aa | 4 | * @version : 1.0 |
| frank26080115 | 0:84d7747641aa | 5 | * @date : 20. Apr. 2009 |
| frank26080115 | 0:84d7747641aa | 6 | * @author : HieuNguyen |
| frank26080115 | 0:84d7747641aa | 7 | ************************************************************************** |
| frank26080115 | 0:84d7747641aa | 8 | * Software that is described herein is for illustrative purposes only |
| frank26080115 | 0:84d7747641aa | 9 | * which provides customers with programming information regarding the |
| frank26080115 | 0:84d7747641aa | 10 | * products. This software is supplied "AS IS" without any warranties. |
| frank26080115 | 0:84d7747641aa | 11 | * NXP Semiconductors assumes no responsibility or liability for the |
| frank26080115 | 0:84d7747641aa | 12 | * use of the software, conveys no license or title under any patent, |
| frank26080115 | 0:84d7747641aa | 13 | * copyright, or mask work right to the product. NXP Semiconductors |
| frank26080115 | 0:84d7747641aa | 14 | * reserves the right to make changes in the software without |
| frank26080115 | 0:84d7747641aa | 15 | * notification. NXP Semiconductors also make no representation or |
| frank26080115 | 0:84d7747641aa | 16 | * warranty that such application will be suitable for the specified |
| frank26080115 | 0:84d7747641aa | 17 | * use without further testing or modification. |
| frank26080115 | 0:84d7747641aa | 18 | **********************************************************************/ |
| frank26080115 | 0:84d7747641aa | 19 | |
| frank26080115 | 0:84d7747641aa | 20 | /* Peripheral group ----------------------------------------------------------- */ |
| frank26080115 | 0:84d7747641aa | 21 | /** @addtogroup GPDMA |
| frank26080115 | 0:84d7747641aa | 22 | * @{ |
| frank26080115 | 0:84d7747641aa | 23 | */ |
| frank26080115 | 0:84d7747641aa | 24 | |
| frank26080115 | 0:84d7747641aa | 25 | /* Includes ------------------------------------------------------------------- */ |
| frank26080115 | 0:84d7747641aa | 26 | #include "lpc17xx_gpdma.h" |
| frank26080115 | 0:84d7747641aa | 27 | #include "lpc17xx_clkpwr.h" |
| frank26080115 | 0:84d7747641aa | 28 | |
| frank26080115 | 0:84d7747641aa | 29 | /* If this source file built with example, the LPC17xx FW library configuration |
| frank26080115 | 0:84d7747641aa | 30 | * file in each example directory ("lpc17xx_libcfg.h") must be included, |
| frank26080115 | 0:84d7747641aa | 31 | * otherwise the default FW library configuration file must be included instead |
| frank26080115 | 0:84d7747641aa | 32 | */ |
| frank26080115 | 0:84d7747641aa | 33 | #ifdef __BUILD_WITH_EXAMPLE__ |
| frank26080115 | 0:84d7747641aa | 34 | #include "lpc17xx_libcfg.h" |
| frank26080115 | 0:84d7747641aa | 35 | #else |
| frank26080115 | 0:84d7747641aa | 36 | #include "lpc17xx_libcfg_default.h" |
| frank26080115 | 0:84d7747641aa | 37 | #endif /* __BUILD_WITH_EXAMPLE__ */ |
| frank26080115 | 0:84d7747641aa | 38 | |
| frank26080115 | 0:84d7747641aa | 39 | #ifdef _GPDMA |
| frank26080115 | 0:84d7747641aa | 40 | |
| frank26080115 | 0:84d7747641aa | 41 | |
| frank26080115 | 0:84d7747641aa | 42 | /* Private Variables ---------------------------------------------------------- */ |
| frank26080115 | 0:84d7747641aa | 43 | /** @defgroup GPDMA_Private_Variables |
| frank26080115 | 0:84d7747641aa | 44 | * @{ |
| frank26080115 | 0:84d7747641aa | 45 | */ |
| frank26080115 | 0:84d7747641aa | 46 | |
| frank26080115 | 0:84d7747641aa | 47 | /** |
| frank26080115 | 0:84d7747641aa | 48 | * @brief Lookup Table of Connection Type matched with |
| frank26080115 | 0:84d7747641aa | 49 | * Peripheral Data (FIFO) register base address |
| frank26080115 | 0:84d7747641aa | 50 | */ |
| frank26080115 | 0:84d7747641aa | 51 | #ifdef __IAR_SYSTEMS_ICC__ |
| frank26080115 | 0:84d7747641aa | 52 | volatile const void *GPDMA_LUTPerAddr[] = { |
| frank26080115 | 0:84d7747641aa | 53 | (&LPC_SSP0->DR), // SSP0 Tx |
| frank26080115 | 0:84d7747641aa | 54 | (&LPC_SSP0->DR), // SSP0 Rx |
| frank26080115 | 0:84d7747641aa | 55 | (&LPC_SSP1->DR), // SSP1 Tx |
| frank26080115 | 0:84d7747641aa | 56 | (&LPC_SSP1->DR), // SSP1 Rx |
| frank26080115 | 0:84d7747641aa | 57 | (&LPC_ADC->ADGDR), // ADC |
| frank26080115 | 0:84d7747641aa | 58 | (&LPC_I2S->I2STXFIFO), // I2S Tx |
| frank26080115 | 0:84d7747641aa | 59 | (&LPC_I2S->I2SRXFIFO), // I2S Rx |
| frank26080115 | 0:84d7747641aa | 60 | (&LPC_DAC->DACR), // DAC |
| frank26080115 | 0:84d7747641aa | 61 | (&LPC_UART0->/*RBTHDLR.*/THR), // UART0 Tx |
| frank26080115 | 0:84d7747641aa | 62 | (&LPC_UART0->/*RBTHDLR.*/RBR), // UART0 Rx |
| frank26080115 | 0:84d7747641aa | 63 | (&LPC_UART1->/*RBTHDLR.*/THR), // UART1 Tx |
| frank26080115 | 0:84d7747641aa | 64 | (&LPC_UART1->/*RBTHDLR.*/RBR), // UART1 Rx |
| frank26080115 | 0:84d7747641aa | 65 | (&LPC_UART2->/*RBTHDLR.*/THR), // UART2 Tx |
| frank26080115 | 0:84d7747641aa | 66 | (&LPC_UART2->/*RBTHDLR.*/RBR), // UART2 Rx |
| frank26080115 | 0:84d7747641aa | 67 | (&LPC_UART3->/*RBTHDLR.*/THR), // UART3 Tx |
| frank26080115 | 0:84d7747641aa | 68 | (&LPC_UART3->/*RBTHDLR.*/RBR), // UART3 Rx |
| frank26080115 | 0:84d7747641aa | 69 | (&LPC_TIM0->MR0), // MAT0.0 |
| frank26080115 | 0:84d7747641aa | 70 | (&LPC_TIM0->MR1), // MAT0.1 |
| frank26080115 | 0:84d7747641aa | 71 | (&LPC_TIM1->MR0), // MAT1.0 |
| frank26080115 | 0:84d7747641aa | 72 | (&LPC_TIM1->MR1), // MAT1.1 |
| frank26080115 | 0:84d7747641aa | 73 | (&LPC_TIM2->MR0), // MAT2.0 |
| frank26080115 | 0:84d7747641aa | 74 | (&LPC_TIM2->MR1), // MAT2.1 |
| frank26080115 | 0:84d7747641aa | 75 | (&LPC_TIM3->MR0), // MAT3.0 |
| frank26080115 | 0:84d7747641aa | 76 | (&LPC_TIM3->MR1), // MAT3.1 |
| frank26080115 | 0:84d7747641aa | 77 | }; |
| frank26080115 | 0:84d7747641aa | 78 | #else |
| frank26080115 | 0:84d7747641aa | 79 | const uint32_t GPDMA_LUTPerAddr[] = { |
| frank26080115 | 0:84d7747641aa | 80 | ((uint32_t)&LPC_SSP0->DR), // SSP0 Tx |
| frank26080115 | 0:84d7747641aa | 81 | ((uint32_t)&LPC_SSP0->DR), // SSP0 Rx |
| frank26080115 | 0:84d7747641aa | 82 | ((uint32_t)&LPC_SSP1->DR), // SSP1 Tx |
| frank26080115 | 0:84d7747641aa | 83 | ((uint32_t)&LPC_SSP1->DR), // SSP1 Rx |
| frank26080115 | 0:84d7747641aa | 84 | ((uint32_t)&LPC_ADC->ADGDR), // ADC |
| frank26080115 | 0:84d7747641aa | 85 | ((uint32_t)&LPC_I2S->I2STXFIFO), // I2S Tx |
| frank26080115 | 0:84d7747641aa | 86 | ((uint32_t)&LPC_I2S->I2SRXFIFO), // I2S Rx |
| frank26080115 | 0:84d7747641aa | 87 | ((uint32_t)&LPC_DAC->DACR), // DAC |
| frank26080115 | 0:84d7747641aa | 88 | ((uint32_t)&LPC_UART0->/*RBTHDLR.*/THR), // UART0 Tx |
| frank26080115 | 0:84d7747641aa | 89 | ((uint32_t)&LPC_UART0->/*RBTHDLR.*/RBR), // UART0 Rx |
| frank26080115 | 0:84d7747641aa | 90 | ((uint32_t)&LPC_UART1->/*RBTHDLR.*/THR), // UART1 Tx |
| frank26080115 | 0:84d7747641aa | 91 | ((uint32_t)&LPC_UART1->/*RBTHDLR.*/RBR), // UART1 Rx |
| frank26080115 | 0:84d7747641aa | 92 | ((uint32_t)&LPC_UART2->/*RBTHDLR.*/THR), // UART2 Tx |
| frank26080115 | 0:84d7747641aa | 93 | ((uint32_t)&LPC_UART2->/*RBTHDLR.*/RBR), // UART2 Rx |
| frank26080115 | 0:84d7747641aa | 94 | ((uint32_t)&LPC_UART3->/*RBTHDLR.*/THR), // UART3 Tx |
| frank26080115 | 0:84d7747641aa | 95 | ((uint32_t)&LPC_UART3->/*RBTHDLR.*/RBR), // UART3 Rx |
| frank26080115 | 0:84d7747641aa | 96 | ((uint32_t)&LPC_TIM0->MR0), // MAT0.0 |
| frank26080115 | 0:84d7747641aa | 97 | ((uint32_t)&LPC_TIM0->MR1), // MAT0.1 |
| frank26080115 | 0:84d7747641aa | 98 | ((uint32_t)&LPC_TIM1->MR0), // MAT1.0 |
| frank26080115 | 0:84d7747641aa | 99 | ((uint32_t)&LPC_TIM1->MR1), // MAT1.1 |
| frank26080115 | 0:84d7747641aa | 100 | ((uint32_t)&LPC_TIM2->MR0), // MAT2.0 |
| frank26080115 | 0:84d7747641aa | 101 | ((uint32_t)&LPC_TIM2->MR1), // MAT2.1 |
| frank26080115 | 0:84d7747641aa | 102 | ((uint32_t)&LPC_TIM3->MR0), // MAT3.0 |
| frank26080115 | 0:84d7747641aa | 103 | ((uint32_t)&LPC_TIM3->MR1), // MAT3.1 |
| frank26080115 | 0:84d7747641aa | 104 | }; |
| frank26080115 | 0:84d7747641aa | 105 | #endif |
| frank26080115 | 0:84d7747641aa | 106 | /** |
| frank26080115 | 0:84d7747641aa | 107 | * @brief Lookup Table of GPDMA Channel Number matched with |
| frank26080115 | 0:84d7747641aa | 108 | * GPDMA channel pointer |
| frank26080115 | 0:84d7747641aa | 109 | */ |
| frank26080115 | 0:84d7747641aa | 110 | const LPC_GPDMACH_TypeDef *pGPDMACh[8] = { |
| frank26080115 | 0:84d7747641aa | 111 | LPC_GPDMACH0, // GPDMA Channel 0 |
| frank26080115 | 0:84d7747641aa | 112 | LPC_GPDMACH1, // GPDMA Channel 1 |
| frank26080115 | 0:84d7747641aa | 113 | LPC_GPDMACH2, // GPDMA Channel 2 |
| frank26080115 | 0:84d7747641aa | 114 | LPC_GPDMACH3, // GPDMA Channel 3 |
| frank26080115 | 0:84d7747641aa | 115 | LPC_GPDMACH4, // GPDMA Channel 4 |
| frank26080115 | 0:84d7747641aa | 116 | LPC_GPDMACH5, // GPDMA Channel 5 |
| frank26080115 | 0:84d7747641aa | 117 | LPC_GPDMACH6, // GPDMA Channel 6 |
| frank26080115 | 0:84d7747641aa | 118 | LPC_GPDMACH7, // GPDMA Channel 7 |
| frank26080115 | 0:84d7747641aa | 119 | }; |
| frank26080115 | 0:84d7747641aa | 120 | /** |
| frank26080115 | 0:84d7747641aa | 121 | * @brief Optimized Peripheral Source and Destination burst size |
| frank26080115 | 0:84d7747641aa | 122 | */ |
| frank26080115 | 0:84d7747641aa | 123 | const uint8_t GPDMA_LUTPerBurst[] = { |
| frank26080115 | 0:84d7747641aa | 124 | GPDMA_BSIZE_4, // SSP0 Tx |
| frank26080115 | 0:84d7747641aa | 125 | GPDMA_BSIZE_4, // SSP0 Rx |
| frank26080115 | 0:84d7747641aa | 126 | GPDMA_BSIZE_4, // SSP1 Tx |
| frank26080115 | 0:84d7747641aa | 127 | GPDMA_BSIZE_4, // SSP1 Rx |
| frank26080115 | 0:84d7747641aa | 128 | GPDMA_BSIZE_4, // ADC |
| frank26080115 | 0:84d7747641aa | 129 | GPDMA_BSIZE_32, // I2S channel 0 |
| frank26080115 | 0:84d7747641aa | 130 | GPDMA_BSIZE_32, // I2S channel 1 |
| frank26080115 | 0:84d7747641aa | 131 | GPDMA_BSIZE_1, // DAC |
| frank26080115 | 0:84d7747641aa | 132 | GPDMA_BSIZE_1, // UART0 Tx |
| frank26080115 | 0:84d7747641aa | 133 | GPDMA_BSIZE_1, // UART0 Rx |
| frank26080115 | 0:84d7747641aa | 134 | GPDMA_BSIZE_1, // UART1 Tx |
| frank26080115 | 0:84d7747641aa | 135 | GPDMA_BSIZE_1, // UART1 Rx |
| frank26080115 | 0:84d7747641aa | 136 | GPDMA_BSIZE_1, // UART2 Tx |
| frank26080115 | 0:84d7747641aa | 137 | GPDMA_BSIZE_1, // UART2 Rx |
| frank26080115 | 0:84d7747641aa | 138 | GPDMA_BSIZE_1, // UART3 Tx |
| frank26080115 | 0:84d7747641aa | 139 | GPDMA_BSIZE_1, // UART3 Rx |
| frank26080115 | 0:84d7747641aa | 140 | GPDMA_BSIZE_1, // MAT0.0 |
| frank26080115 | 0:84d7747641aa | 141 | GPDMA_BSIZE_1, // MAT0.1 |
| frank26080115 | 0:84d7747641aa | 142 | GPDMA_BSIZE_1, // MAT1.0 |
| frank26080115 | 0:84d7747641aa | 143 | GPDMA_BSIZE_1, // MAT1.1 |
| frank26080115 | 0:84d7747641aa | 144 | GPDMA_BSIZE_1, // MAT2.0 |
| frank26080115 | 0:84d7747641aa | 145 | GPDMA_BSIZE_1, // MAT2.1 |
| frank26080115 | 0:84d7747641aa | 146 | GPDMA_BSIZE_1, // MAT3.0 |
| frank26080115 | 0:84d7747641aa | 147 | GPDMA_BSIZE_1, // MAT3.1 |
| frank26080115 | 0:84d7747641aa | 148 | }; |
| frank26080115 | 0:84d7747641aa | 149 | /** |
| frank26080115 | 0:84d7747641aa | 150 | * @brief Optimized Peripheral Source and Destination transfer width |
| frank26080115 | 0:84d7747641aa | 151 | */ |
| frank26080115 | 0:84d7747641aa | 152 | const uint8_t GPDMA_LUTPerWid[] = { |
| frank26080115 | 0:84d7747641aa | 153 | GPDMA_WIDTH_BYTE, // SSP0 Tx |
| frank26080115 | 0:84d7747641aa | 154 | GPDMA_WIDTH_BYTE, // SSP0 Rx |
| frank26080115 | 0:84d7747641aa | 155 | GPDMA_WIDTH_BYTE, // SSP1 Tx |
| frank26080115 | 0:84d7747641aa | 156 | GPDMA_WIDTH_BYTE, // SSP1 Rx |
| frank26080115 | 0:84d7747641aa | 157 | GPDMA_WIDTH_WORD, // ADC |
| frank26080115 | 0:84d7747641aa | 158 | GPDMA_WIDTH_WORD, // I2S channel 0 |
| frank26080115 | 0:84d7747641aa | 159 | GPDMA_WIDTH_WORD, // I2S channel 1 |
| frank26080115 | 0:84d7747641aa | 160 | GPDMA_WIDTH_BYTE, // DAC |
| frank26080115 | 0:84d7747641aa | 161 | GPDMA_WIDTH_BYTE, // UART0 Tx |
| frank26080115 | 0:84d7747641aa | 162 | GPDMA_WIDTH_BYTE, // UART0 Rx |
| frank26080115 | 0:84d7747641aa | 163 | GPDMA_WIDTH_BYTE, // UART1 Tx |
| frank26080115 | 0:84d7747641aa | 164 | GPDMA_WIDTH_BYTE, // UART1 Rx |
| frank26080115 | 0:84d7747641aa | 165 | GPDMA_WIDTH_BYTE, // UART2 Tx |
| frank26080115 | 0:84d7747641aa | 166 | GPDMA_WIDTH_BYTE, // UART2 Rx |
| frank26080115 | 0:84d7747641aa | 167 | GPDMA_WIDTH_BYTE, // UART3 Tx |
| frank26080115 | 0:84d7747641aa | 168 | GPDMA_WIDTH_BYTE, // UART3 Rx |
| frank26080115 | 0:84d7747641aa | 169 | GPDMA_WIDTH_WORD, // MAT0.0 |
| frank26080115 | 0:84d7747641aa | 170 | GPDMA_WIDTH_WORD, // MAT0.1 |
| frank26080115 | 0:84d7747641aa | 171 | GPDMA_WIDTH_WORD, // MAT1.0 |
| frank26080115 | 0:84d7747641aa | 172 | GPDMA_WIDTH_WORD, // MAT1.1 |
| frank26080115 | 0:84d7747641aa | 173 | GPDMA_WIDTH_WORD, // MAT2.0 |
| frank26080115 | 0:84d7747641aa | 174 | GPDMA_WIDTH_WORD, // MAT2.1 |
| frank26080115 | 0:84d7747641aa | 175 | GPDMA_WIDTH_WORD, // MAT3.0 |
| frank26080115 | 0:84d7747641aa | 176 | GPDMA_WIDTH_WORD, // MAT3.1 |
| frank26080115 | 0:84d7747641aa | 177 | }; |
| frank26080115 | 0:84d7747641aa | 178 | |
| frank26080115 | 0:84d7747641aa | 179 | /** Interrupt Call-back function pointer data for each GPDMA channel */ |
| frank26080115 | 0:84d7747641aa | 180 | static fnGPDMACbs_Type *_apfnGPDMACbs[8] = { |
| frank26080115 | 0:84d7747641aa | 181 | NULL, // GPDMA Call-back function pointer for Channel 0 |
| frank26080115 | 0:84d7747641aa | 182 | NULL, // GPDMA Call-back function pointer for Channel 1 |
| frank26080115 | 0:84d7747641aa | 183 | NULL, // GPDMA Call-back function pointer for Channel 2 |
| frank26080115 | 0:84d7747641aa | 184 | NULL, // GPDMA Call-back function pointer for Channel 3 |
| frank26080115 | 0:84d7747641aa | 185 | NULL, // GPDMA Call-back function pointer for Channel 4 |
| frank26080115 | 0:84d7747641aa | 186 | NULL, // GPDMA Call-back function pointer for Channel 5 |
| frank26080115 | 0:84d7747641aa | 187 | NULL, // GPDMA Call-back function pointer for Channel 6 |
| frank26080115 | 0:84d7747641aa | 188 | NULL, // GPDMA Call-back function pointer for Channel 7 |
| frank26080115 | 0:84d7747641aa | 189 | }; |
| frank26080115 | 0:84d7747641aa | 190 | |
| frank26080115 | 0:84d7747641aa | 191 | /** |
| frank26080115 | 0:84d7747641aa | 192 | * @} |
| frank26080115 | 0:84d7747641aa | 193 | */ |
| frank26080115 | 0:84d7747641aa | 194 | |
| frank26080115 | 0:84d7747641aa | 195 | /* Public Functions ----------------------------------------------------------- */ |
| frank26080115 | 0:84d7747641aa | 196 | /** @addtogroup GPDMA_Public_Functions |
| frank26080115 | 0:84d7747641aa | 197 | * @{ |
| frank26080115 | 0:84d7747641aa | 198 | */ |
| frank26080115 | 0:84d7747641aa | 199 | |
| frank26080115 | 0:84d7747641aa | 200 | /********************************************************************//** |
| frank26080115 | 0:84d7747641aa | 201 | * @brief Initialize GPDMA controller |
| frank26080115 | 0:84d7747641aa | 202 | * @param None |
| frank26080115 | 0:84d7747641aa | 203 | * @return None |
| frank26080115 | 0:84d7747641aa | 204 | *********************************************************************/ |
| frank26080115 | 0:84d7747641aa | 205 | void GPDMA_Init(void) |
| frank26080115 | 0:84d7747641aa | 206 | { |
| frank26080115 | 0:84d7747641aa | 207 | /* Enable GPDMA clock */ |
| frank26080115 | 0:84d7747641aa | 208 | CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCGPDMA, ENABLE); |
| frank26080115 | 0:84d7747641aa | 209 | |
| frank26080115 | 0:84d7747641aa | 210 | // Reset all channel configuration register |
| frank26080115 | 0:84d7747641aa | 211 | LPC_GPDMACH0->DMACCConfig = 0; |
| frank26080115 | 0:84d7747641aa | 212 | LPC_GPDMACH1->DMACCConfig = 0; |
| frank26080115 | 0:84d7747641aa | 213 | LPC_GPDMACH2->DMACCConfig = 0; |
| frank26080115 | 0:84d7747641aa | 214 | LPC_GPDMACH3->DMACCConfig = 0; |
| frank26080115 | 0:84d7747641aa | 215 | LPC_GPDMACH4->DMACCConfig = 0; |
| frank26080115 | 0:84d7747641aa | 216 | LPC_GPDMACH5->DMACCConfig = 0; |
| frank26080115 | 0:84d7747641aa | 217 | LPC_GPDMACH6->DMACCConfig = 0; |
| frank26080115 | 0:84d7747641aa | 218 | LPC_GPDMACH7->DMACCConfig = 0; |
| frank26080115 | 0:84d7747641aa | 219 | |
| frank26080115 | 0:84d7747641aa | 220 | /* Clear all DMA interrupt and error flag */ |
| frank26080115 | 0:84d7747641aa | 221 | LPC_GPDMA->DMACIntTCClear = 0xFF; |
| frank26080115 | 0:84d7747641aa | 222 | LPC_GPDMA->DMACIntErrClr = 0xFF; |
| frank26080115 | 0:84d7747641aa | 223 | } |
| frank26080115 | 0:84d7747641aa | 224 | |
| frank26080115 | 0:84d7747641aa | 225 | /********************************************************************//** |
| frank26080115 | 0:84d7747641aa | 226 | * @brief Setup GPDMA channel peripheral according to the specified |
| frank26080115 | 0:84d7747641aa | 227 | * parameters in the GPDMAChannelConfig. |
| frank26080115 | 0:84d7747641aa | 228 | * @param[in] GPDMAChannelConfig Pointer to a GPDMA_CH_CFG_Type |
| frank26080115 | 0:84d7747641aa | 229 | * structure that contains the configuration |
| frank26080115 | 0:84d7747641aa | 230 | * information for the specified GPDMA channel peripheral. |
| frank26080115 | 0:84d7747641aa | 231 | * @param[in] pfnGPDMACbs Pointer to a GPDMA interrupt call-back function |
| frank26080115 | 0:84d7747641aa | 232 | * @return ERROR if selected channel is enabled before |
| frank26080115 | 0:84d7747641aa | 233 | * or SUCCESS if channel is configured successfully |
| frank26080115 | 0:84d7747641aa | 234 | *********************************************************************/ |
| frank26080115 | 0:84d7747641aa | 235 | Status GPDMA_Setup(GPDMA_Channel_CFG_Type *GPDMAChannelConfig, fnGPDMACbs_Type *pfnGPDMACbs) |
| frank26080115 | 0:84d7747641aa | 236 | { |
| frank26080115 | 0:84d7747641aa | 237 | LPC_GPDMACH_TypeDef *pDMAch; |
| frank26080115 | 0:84d7747641aa | 238 | uint32_t tmp1, tmp2; |
| frank26080115 | 0:84d7747641aa | 239 | |
| frank26080115 | 0:84d7747641aa | 240 | if (LPC_GPDMA->DMACEnbldChns & (GPDMA_DMACEnbldChns_Ch(GPDMAChannelConfig->ChannelNum))) { |
| frank26080115 | 0:84d7747641aa | 241 | // This channel is enabled, return ERROR, need to release this channel first |
| frank26080115 | 0:84d7747641aa | 242 | return ERROR; |
| frank26080115 | 0:84d7747641aa | 243 | } |
| frank26080115 | 0:84d7747641aa | 244 | |
| frank26080115 | 0:84d7747641aa | 245 | // Get Channel pointer |
| frank26080115 | 0:84d7747641aa | 246 | pDMAch = (LPC_GPDMACH_TypeDef *) pGPDMACh[GPDMAChannelConfig->ChannelNum]; |
| frank26080115 | 0:84d7747641aa | 247 | |
| frank26080115 | 0:84d7747641aa | 248 | // Setup call back function for this channel |
| frank26080115 | 0:84d7747641aa | 249 | _apfnGPDMACbs[GPDMAChannelConfig->ChannelNum] = pfnGPDMACbs; |
| frank26080115 | 0:84d7747641aa | 250 | |
| frank26080115 | 0:84d7747641aa | 251 | // Reset the Interrupt status |
| frank26080115 | 0:84d7747641aa | 252 | LPC_GPDMA->DMACIntTCClear = GPDMA_DMACIntTCClear_Ch(GPDMAChannelConfig->ChannelNum); |
| frank26080115 | 0:84d7747641aa | 253 | LPC_GPDMA->DMACIntErrClr = GPDMA_DMACIntErrClr_Ch(GPDMAChannelConfig->ChannelNum); |
| frank26080115 | 0:84d7747641aa | 254 | |
| frank26080115 | 0:84d7747641aa | 255 | // Clear DMA configure |
| frank26080115 | 0:84d7747641aa | 256 | pDMAch->DMACCControl = 0x00; |
| frank26080115 | 0:84d7747641aa | 257 | pDMAch->DMACCConfig = 0x00; |
| frank26080115 | 0:84d7747641aa | 258 | |
| frank26080115 | 0:84d7747641aa | 259 | /* Assign Linker List Item value */ |
| frank26080115 | 0:84d7747641aa | 260 | pDMAch->DMACCLLI = GPDMAChannelConfig->DMALLI; |
| frank26080115 | 0:84d7747641aa | 261 | |
| frank26080115 | 0:84d7747641aa | 262 | /* Set value to Channel Control Registers */ |
| frank26080115 | 0:84d7747641aa | 263 | switch (GPDMAChannelConfig->TransferType) |
| frank26080115 | 0:84d7747641aa | 264 | { |
| frank26080115 | 0:84d7747641aa | 265 | // Memory to memory |
| frank26080115 | 0:84d7747641aa | 266 | case GPDMA_TRANSFERTYPE_M2M: |
| frank26080115 | 0:84d7747641aa | 267 | // Assign physical source and destination address |
| frank26080115 | 0:84d7747641aa | 268 | pDMAch->DMACCSrcAddr = GPDMAChannelConfig->SrcMemAddr; |
| frank26080115 | 0:84d7747641aa | 269 | pDMAch->DMACCDestAddr = GPDMAChannelConfig->DstMemAddr; |
| frank26080115 | 0:84d7747641aa | 270 | pDMAch->DMACCControl |
| frank26080115 | 0:84d7747641aa | 271 | = GPDMA_DMACCxControl_TransferSize(GPDMAChannelConfig->TransferSize) \ |
| frank26080115 | 0:84d7747641aa | 272 | | GPDMA_DMACCxControl_SBSize(GPDMA_BSIZE_32) \ |
| frank26080115 | 0:84d7747641aa | 273 | | GPDMA_DMACCxControl_DBSize(GPDMA_BSIZE_32) \ |
| frank26080115 | 0:84d7747641aa | 274 | | GPDMA_DMACCxControl_SWidth(GPDMAChannelConfig->TransferWidth) \ |
| frank26080115 | 0:84d7747641aa | 275 | | GPDMA_DMACCxControl_DWidth(GPDMAChannelConfig->TransferWidth) \ |
| frank26080115 | 0:84d7747641aa | 276 | | GPDMA_DMACCxControl_SI \ |
| frank26080115 | 0:84d7747641aa | 277 | | GPDMA_DMACCxControl_DI \ |
| frank26080115 | 0:84d7747641aa | 278 | | GPDMA_DMACCxControl_I; |
| frank26080115 | 0:84d7747641aa | 279 | break; |
| frank26080115 | 0:84d7747641aa | 280 | // Memory to peripheral |
| frank26080115 | 0:84d7747641aa | 281 | case GPDMA_TRANSFERTYPE_M2P: |
| frank26080115 | 0:84d7747641aa | 282 | // Assign physical source |
| frank26080115 | 0:84d7747641aa | 283 | pDMAch->DMACCSrcAddr = GPDMAChannelConfig->SrcMemAddr; |
| frank26080115 | 0:84d7747641aa | 284 | // Assign peripheral destination address |
| frank26080115 | 0:84d7747641aa | 285 | pDMAch->DMACCDestAddr = (uint32_t)GPDMA_LUTPerAddr[GPDMAChannelConfig->DstConn]; |
| frank26080115 | 0:84d7747641aa | 286 | pDMAch->DMACCControl |
| frank26080115 | 0:84d7747641aa | 287 | = GPDMA_DMACCxControl_TransferSize((uint32_t)GPDMAChannelConfig->TransferSize) \ |
| frank26080115 | 0:84d7747641aa | 288 | | GPDMA_DMACCxControl_SBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->DstConn]) \ |
| frank26080115 | 0:84d7747641aa | 289 | | GPDMA_DMACCxControl_DBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->DstConn]) \ |
| frank26080115 | 0:84d7747641aa | 290 | | GPDMA_DMACCxControl_SWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->DstConn]) \ |
| frank26080115 | 0:84d7747641aa | 291 | | GPDMA_DMACCxControl_DWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->DstConn]) \ |
| frank26080115 | 0:84d7747641aa | 292 | | GPDMA_DMACCxControl_SI \ |
| frank26080115 | 0:84d7747641aa | 293 | | GPDMA_DMACCxControl_I; |
| frank26080115 | 0:84d7747641aa | 294 | break; |
| frank26080115 | 0:84d7747641aa | 295 | // Peripheral to memory |
| frank26080115 | 0:84d7747641aa | 296 | case GPDMA_TRANSFERTYPE_P2M: |
| frank26080115 | 0:84d7747641aa | 297 | // Assign peripheral source address |
| frank26080115 | 0:84d7747641aa | 298 | pDMAch->DMACCSrcAddr = (uint32_t)GPDMA_LUTPerAddr[GPDMAChannelConfig->SrcConn]; |
| frank26080115 | 0:84d7747641aa | 299 | // Assign memory destination address |
| frank26080115 | 0:84d7747641aa | 300 | pDMAch->DMACCDestAddr = GPDMAChannelConfig->DstMemAddr; |
| frank26080115 | 0:84d7747641aa | 301 | pDMAch->DMACCControl |
| frank26080115 | 0:84d7747641aa | 302 | = GPDMA_DMACCxControl_TransferSize((uint32_t)GPDMAChannelConfig->TransferSize) \ |
| frank26080115 | 0:84d7747641aa | 303 | | GPDMA_DMACCxControl_SBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->SrcConn]) \ |
| frank26080115 | 0:84d7747641aa | 304 | | GPDMA_DMACCxControl_DBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->SrcConn]) \ |
| frank26080115 | 0:84d7747641aa | 305 | | GPDMA_DMACCxControl_SWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->SrcConn]) \ |
| frank26080115 | 0:84d7747641aa | 306 | | GPDMA_DMACCxControl_DWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->SrcConn]) \ |
| frank26080115 | 0:84d7747641aa | 307 | | GPDMA_DMACCxControl_DI \ |
| frank26080115 | 0:84d7747641aa | 308 | | GPDMA_DMACCxControl_I; |
| frank26080115 | 0:84d7747641aa | 309 | break; |
| frank26080115 | 0:84d7747641aa | 310 | // Peripheral to peripheral |
| frank26080115 | 0:84d7747641aa | 311 | case GPDMA_TRANSFERTYPE_P2P: |
| frank26080115 | 0:84d7747641aa | 312 | // Assign peripheral source address |
| frank26080115 | 0:84d7747641aa | 313 | pDMAch->DMACCSrcAddr = (uint32_t)GPDMA_LUTPerAddr[GPDMAChannelConfig->SrcConn]; |
| frank26080115 | 0:84d7747641aa | 314 | // Assign peripheral destination address |
| frank26080115 | 0:84d7747641aa | 315 | pDMAch->DMACCDestAddr = (uint32_t)GPDMA_LUTPerAddr[GPDMAChannelConfig->DstConn]; |
| frank26080115 | 0:84d7747641aa | 316 | pDMAch->DMACCControl |
| frank26080115 | 0:84d7747641aa | 317 | = GPDMA_DMACCxControl_TransferSize((uint32_t)GPDMAChannelConfig->TransferSize) \ |
| frank26080115 | 0:84d7747641aa | 318 | | GPDMA_DMACCxControl_SBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->SrcConn]) \ |
| frank26080115 | 0:84d7747641aa | 319 | | GPDMA_DMACCxControl_DBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->DstConn]) \ |
| frank26080115 | 0:84d7747641aa | 320 | | GPDMA_DMACCxControl_SWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->SrcConn]) \ |
| frank26080115 | 0:84d7747641aa | 321 | | GPDMA_DMACCxControl_DWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->DstConn]) \ |
| frank26080115 | 0:84d7747641aa | 322 | | GPDMA_DMACCxControl_I; |
| frank26080115 | 0:84d7747641aa | 323 | break; |
| frank26080115 | 0:84d7747641aa | 324 | // Do not support any more transfer type, return ERROR |
| frank26080115 | 0:84d7747641aa | 325 | default: |
| frank26080115 | 0:84d7747641aa | 326 | return ERROR; |
| frank26080115 | 0:84d7747641aa | 327 | } |
| frank26080115 | 0:84d7747641aa | 328 | |
| frank26080115 | 0:84d7747641aa | 329 | /* Re-Configure DMA Request Select for source peripheral */ |
| frank26080115 | 0:84d7747641aa | 330 | if (GPDMAChannelConfig->SrcConn > 15) |
| frank26080115 | 0:84d7747641aa | 331 | { |
| frank26080115 | 0:84d7747641aa | 332 | LPC_SC->RESERVED9 |= (1<<(GPDMAChannelConfig->SrcConn - 16)); |
| frank26080115 | 0:84d7747641aa | 333 | } else { |
| frank26080115 | 0:84d7747641aa | 334 | LPC_SC->RESERVED9 &= ~(1<<(GPDMAChannelConfig->SrcConn - 8)); |
| frank26080115 | 0:84d7747641aa | 335 | } |
| frank26080115 | 0:84d7747641aa | 336 | |
| frank26080115 | 0:84d7747641aa | 337 | /* Re-Configure DMA Request Select for Destination peripheral */ |
| frank26080115 | 0:84d7747641aa | 338 | if (GPDMAChannelConfig->DstConn > 15) |
| frank26080115 | 0:84d7747641aa | 339 | { |
| frank26080115 | 0:84d7747641aa | 340 | LPC_SC->RESERVED9 |= (1<<(GPDMAChannelConfig->DstConn - 16)); |
| frank26080115 | 0:84d7747641aa | 341 | } else { |
| frank26080115 | 0:84d7747641aa | 342 | LPC_SC->RESERVED9 &= ~(1<<(GPDMAChannelConfig->DstConn - 8)); |
| frank26080115 | 0:84d7747641aa | 343 | } |
| frank26080115 | 0:84d7747641aa | 344 | |
| frank26080115 | 0:84d7747641aa | 345 | /* Enable DMA channels, little endian */ |
| frank26080115 | 0:84d7747641aa | 346 | LPC_GPDMA->DMACConfig = GPDMA_DMACConfig_E; |
| frank26080115 | 0:84d7747641aa | 347 | while (!(LPC_GPDMA->DMACConfig & GPDMA_DMACConfig_E)); |
| frank26080115 | 0:84d7747641aa | 348 | |
| frank26080115 | 0:84d7747641aa | 349 | // Calculate absolute value for Connection number |
| frank26080115 | 0:84d7747641aa | 350 | tmp1 = GPDMAChannelConfig->SrcConn; |
| frank26080115 | 0:84d7747641aa | 351 | tmp1 = ((tmp1 > 15) ? (tmp1 - 8) : tmp1); |
| frank26080115 | 0:84d7747641aa | 352 | tmp2 = GPDMAChannelConfig->DstConn; |
| frank26080115 | 0:84d7747641aa | 353 | tmp2 = ((tmp2 > 15) ? (tmp2 - 8) : tmp2); |
| frank26080115 | 0:84d7747641aa | 354 | |
| frank26080115 | 0:84d7747641aa | 355 | // Configure DMA Channel, enable Error Counter and Terminate counter |
| frank26080115 | 0:84d7747641aa | 356 | pDMAch->DMACCConfig = GPDMA_DMACCxConfig_IE | GPDMA_DMACCxConfig_ITC /*| GPDMA_DMACCxConfig_E*/ \ |
| frank26080115 | 0:84d7747641aa | 357 | | GPDMA_DMACCxConfig_TransferType((uint32_t)GPDMAChannelConfig->TransferType) \ |
| frank26080115 | 0:84d7747641aa | 358 | | GPDMA_DMACCxConfig_SrcPeripheral(tmp1) \ |
| frank26080115 | 0:84d7747641aa | 359 | | GPDMA_DMACCxConfig_DestPeripheral(tmp2); |
| frank26080115 | 0:84d7747641aa | 360 | |
| frank26080115 | 0:84d7747641aa | 361 | return SUCCESS; |
| frank26080115 | 0:84d7747641aa | 362 | } |
| frank26080115 | 0:84d7747641aa | 363 | |
| frank26080115 | 0:84d7747641aa | 364 | |
| frank26080115 | 0:84d7747641aa | 365 | /*********************************************************************//** |
| frank26080115 | 0:84d7747641aa | 366 | * @brief Enable/Disable DMA channel |
| frank26080115 | 0:84d7747641aa | 367 | * @param[in] channelNum GPDMA channel, should be in range from 0 to 7 |
| frank26080115 | 0:84d7747641aa | 368 | * @param[in] NewState New State of this command, should be: |
| frank26080115 | 0:84d7747641aa | 369 | * - ENABLE. |
| frank26080115 | 0:84d7747641aa | 370 | * - DISABLE. |
| frank26080115 | 0:84d7747641aa | 371 | * @return None |
| frank26080115 | 0:84d7747641aa | 372 | **********************************************************************/ |
| frank26080115 | 0:84d7747641aa | 373 | void GPDMA_ChannelCmd(uint8_t channelNum, FunctionalState NewState) |
| frank26080115 | 0:84d7747641aa | 374 | { |
| frank26080115 | 0:84d7747641aa | 375 | LPC_GPDMACH_TypeDef *pDMAch; |
| frank26080115 | 0:84d7747641aa | 376 | |
| frank26080115 | 0:84d7747641aa | 377 | // Get Channel pointer |
| frank26080115 | 0:84d7747641aa | 378 | pDMAch = (LPC_GPDMACH_TypeDef *) pGPDMACh[channelNum]; |
| frank26080115 | 0:84d7747641aa | 379 | |
| frank26080115 | 0:84d7747641aa | 380 | if (NewState == ENABLE) { |
| frank26080115 | 0:84d7747641aa | 381 | pDMAch->DMACCConfig |= GPDMA_DMACCxConfig_E; |
| frank26080115 | 0:84d7747641aa | 382 | } else { |
| frank26080115 | 0:84d7747641aa | 383 | pDMAch->DMACCConfig &= ~GPDMA_DMACCxConfig_E; |
| frank26080115 | 0:84d7747641aa | 384 | } |
| frank26080115 | 0:84d7747641aa | 385 | } |
| frank26080115 | 0:84d7747641aa | 386 | |
| frank26080115 | 0:84d7747641aa | 387 | /*********************************************************************//** |
| frank26080115 | 0:84d7747641aa | 388 | * @brief Standard GPDMA interrupt handler, this function will check |
| frank26080115 | 0:84d7747641aa | 389 | * all interrupt status of GPDMA channels, then execute the call |
| frank26080115 | 0:84d7747641aa | 390 | * back function id they're already installed |
| frank26080115 | 0:84d7747641aa | 391 | * @param[in] None |
| frank26080115 | 0:84d7747641aa | 392 | * @return None |
| frank26080115 | 0:84d7747641aa | 393 | **********************************************************************/ |
| frank26080115 | 0:84d7747641aa | 394 | void GPDMA_IntHandler(void) |
| frank26080115 | 0:84d7747641aa | 395 | { |
| frank26080115 | 0:84d7747641aa | 396 | uint32_t tmp; |
| frank26080115 | 0:84d7747641aa | 397 | // Scan interrupt pending |
| frank26080115 | 0:84d7747641aa | 398 | for (tmp = 0; tmp <= 7; tmp++) { |
| frank26080115 | 0:84d7747641aa | 399 | if (LPC_GPDMA->DMACIntStat & GPDMA_DMACIntStat_Ch(tmp)) { |
| frank26080115 | 0:84d7747641aa | 400 | // Check counter terminal status |
| frank26080115 | 0:84d7747641aa | 401 | if (LPC_GPDMA->DMACIntTCStat & GPDMA_DMACIntTCStat_Ch(tmp)) { |
| frank26080115 | 0:84d7747641aa | 402 | // Clear terminate counter Interrupt pending |
| frank26080115 | 0:84d7747641aa | 403 | LPC_GPDMA->DMACIntTCClear = GPDMA_DMACIntTCClear_Ch(tmp); |
| frank26080115 | 0:84d7747641aa | 404 | // Execute call-back function if it is already installed |
| frank26080115 | 0:84d7747641aa | 405 | if(_apfnGPDMACbs[tmp] != NULL) { |
| frank26080115 | 0:84d7747641aa | 406 | _apfnGPDMACbs[tmp](GPDMA_STAT_INTTC); |
| frank26080115 | 0:84d7747641aa | 407 | } |
| frank26080115 | 0:84d7747641aa | 408 | } |
| frank26080115 | 0:84d7747641aa | 409 | // Check error terminal status |
| frank26080115 | 0:84d7747641aa | 410 | if (LPC_GPDMA->DMACIntErrStat & GPDMA_DMACIntErrStat_Ch(tmp)) { |
| frank26080115 | 0:84d7747641aa | 411 | // Clear error counter Interrupt pending |
| frank26080115 | 0:84d7747641aa | 412 | LPC_GPDMA->DMACIntErrClr = GPDMA_DMACIntErrClr_Ch(tmp); |
| frank26080115 | 0:84d7747641aa | 413 | // Execute call-back function if it is already installed |
| frank26080115 | 0:84d7747641aa | 414 | if(_apfnGPDMACbs[tmp] != NULL) { |
| frank26080115 | 0:84d7747641aa | 415 | _apfnGPDMACbs[tmp](GPDMA_STAT_INTERR); |
| frank26080115 | 0:84d7747641aa | 416 | } |
| frank26080115 | 0:84d7747641aa | 417 | } |
| frank26080115 | 0:84d7747641aa | 418 | } |
| frank26080115 | 0:84d7747641aa | 419 | } |
| frank26080115 | 0:84d7747641aa | 420 | } |
| frank26080115 | 0:84d7747641aa | 421 | |
| frank26080115 | 0:84d7747641aa | 422 | |
| frank26080115 | 0:84d7747641aa | 423 | /** |
| frank26080115 | 0:84d7747641aa | 424 | * @} |
| frank26080115 | 0:84d7747641aa | 425 | */ |
| frank26080115 | 0:84d7747641aa | 426 | |
| frank26080115 | 0:84d7747641aa | 427 | #endif /* _GPDMA */ |
| frank26080115 | 0:84d7747641aa | 428 | |
| frank26080115 | 0:84d7747641aa | 429 | /** |
| frank26080115 | 0:84d7747641aa | 430 | * @} |
| frank26080115 | 0:84d7747641aa | 431 | */ |
| frank26080115 | 0:84d7747641aa | 432 | |
| frank26080115 | 0:84d7747641aa | 433 | /* --------------------------------- End Of File ------------------------------ */ |