frederic blanc / mbed

/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h substitute line 894 extern } by }

Fork of mbed by mbed official

TARGET_NUCLEO_F302R8/stm32f30x_adc.h@82:6473597d706e, 2014-04-07 (annotated)

Committer:
bogdanm
Date:
Mon Apr 07 18:28:36 2014 +0100
Revision:
82:6473597d706e
Release 82 of the mbed library



Main changes:



- support for K64F

- Revisited Nordic code structure

- Test infrastructure improvements

- various bug fixes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 82:6473597d706e 1 /**
bogdanm 82:6473597d706e 2 ******************************************************************************
bogdanm 82:6473597d706e 3 * @file stm32f30x_adc.h
bogdanm 82:6473597d706e 4 * @author MCD Application Team
bogdanm 82:6473597d706e 5 * @version V1.1.0
bogdanm 82:6473597d706e 6 * @date 27-February-2014
bogdanm 82:6473597d706e 7 * @brief This file contains all the functions prototypes for the ADC firmware
bogdanm 82:6473597d706e 8 * library.
bogdanm 82:6473597d706e 9 ******************************************************************************
bogdanm 82:6473597d706e 10 * @attention
bogdanm 82:6473597d706e 11 *
bogdanm 82:6473597d706e 12 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 82:6473597d706e 13 *
bogdanm 82:6473597d706e 14 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 82:6473597d706e 15 * are permitted provided that the following conditions are met:
bogdanm 82:6473597d706e 16 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 82:6473597d706e 17 * this list of conditions and the following disclaimer.
bogdanm 82:6473597d706e 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 82:6473597d706e 19 * this list of conditions and the following disclaimer in the documentation
bogdanm 82:6473597d706e 20 * and/or other materials provided with the distribution.
bogdanm 82:6473597d706e 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 82:6473597d706e 22 * may be used to endorse or promote products derived from this software
bogdanm 82:6473597d706e 23 * without specific prior written permission.
bogdanm 82:6473597d706e 24 *
bogdanm 82:6473597d706e 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 82:6473597d706e 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 82:6473597d706e 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 82:6473597d706e 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 82:6473597d706e 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 82:6473597d706e 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 82:6473597d706e 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 82:6473597d706e 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 82:6473597d706e 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 82:6473597d706e 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 82:6473597d706e 35 *
bogdanm 82:6473597d706e 36 ******************************************************************************
bogdanm 82:6473597d706e 37 */
bogdanm 82:6473597d706e 38
bogdanm 82:6473597d706e 39 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 82:6473597d706e 40 #ifndef __STM32F30x_ADC_H
bogdanm 82:6473597d706e 41 #define __STM32F30x_ADC_H
bogdanm 82:6473597d706e 42
bogdanm 82:6473597d706e 43 #ifdef __cplusplus
bogdanm 82:6473597d706e 44 extern "C" {
bogdanm 82:6473597d706e 45 #endif
bogdanm 82:6473597d706e 46
bogdanm 82:6473597d706e 47 /* Includes ------------------------------------------------------------------*/
bogdanm 82:6473597d706e 48 #include "stm32f30x.h"
bogdanm 82:6473597d706e 49
bogdanm 82:6473597d706e 50 /** @addtogroup STM32F30x_StdPeriph_Driver
bogdanm 82:6473597d706e 51 * @{
bogdanm 82:6473597d706e 52 */
bogdanm 82:6473597d706e 53
bogdanm 82:6473597d706e 54 /** @addtogroup ADC
bogdanm 82:6473597d706e 55 * @{
bogdanm 82:6473597d706e 56 */
bogdanm 82:6473597d706e 57
bogdanm 82:6473597d706e 58 /* Exported types ------------------------------------------------------------*/
bogdanm 82:6473597d706e 59
bogdanm 82:6473597d706e 60 /**
bogdanm 82:6473597d706e 61 * @brief ADC Init structure definition
bogdanm 82:6473597d706e 62 */
bogdanm 82:6473597d706e 63 typedef struct
bogdanm 82:6473597d706e 64 {
bogdanm 82:6473597d706e 65
bogdanm 82:6473597d706e 66 uint32_t ADC_ContinuousConvMode; /*!< Specifies whether the conversion is performed in
bogdanm 82:6473597d706e 67 Continuous or Single mode.
bogdanm 82:6473597d706e 68 This parameter can be set to ENABLE or DISABLE. */
bogdanm 82:6473597d706e 69 uint32_t ADC_Resolution; /*!< Configures the ADC resolution.
bogdanm 82:6473597d706e 70 This parameter can be a value of @ref ADC_resolution */
bogdanm 82:6473597d706e 71 uint32_t ADC_ExternalTrigConvEvent; /*!< Defines the external trigger used to start the analog
bogdanm 82:6473597d706e 72 to digital conversion of regular channels. This parameter
bogdanm 82:6473597d706e 73 can be a value of @ref ADC_external_trigger_sources_for_regular_channels_conversion */
bogdanm 82:6473597d706e 74 uint32_t ADC_ExternalTrigEventEdge; /*!< Select the external trigger edge and enable the trigger of a regular group.
bogdanm 82:6473597d706e 75 This parameter can be a value of
bogdanm 82:6473597d706e 76 @ref ADC_external_trigger_edge_for_regular_channels_conversion */
bogdanm 82:6473597d706e 77 uint32_t ADC_DataAlign; /*!< Specifies whether the ADC data alignment is left or right.
bogdanm 82:6473597d706e 78 This parameter can be a value of @ref ADC_data_align */
bogdanm 82:6473597d706e 79 uint32_t ADC_OverrunMode; /*!< Specifies the way data overrun are managed.
bogdanm 82:6473597d706e 80 This parameter can be set to ENABLE or DISABLE. */
bogdanm 82:6473597d706e 81 uint32_t ADC_AutoInjMode; /*!< Enable/disable automatic injected group conversion after
bogdanm 82:6473597d706e 82 regular group conversion.
bogdanm 82:6473597d706e 83 This parameter can be set to ENABLE or DISABLE. */
bogdanm 82:6473597d706e 84 uint8_t ADC_NbrOfRegChannel; /*!< Specifies the number of ADC channels that will be converted
bogdanm 82:6473597d706e 85 using the sequencer for regular channel group.
bogdanm 82:6473597d706e 86 This parameter must range from 1 to 16. */
bogdanm 82:6473597d706e 87 }ADC_InitTypeDef;
bogdanm 82:6473597d706e 88
bogdanm 82:6473597d706e 89 /**
bogdanm 82:6473597d706e 90 * @}
bogdanm 82:6473597d706e 91 */
bogdanm 82:6473597d706e 92 /**
bogdanm 82:6473597d706e 93 * @brief ADC Init structure definition
bogdanm 82:6473597d706e 94 */
bogdanm 82:6473597d706e 95 typedef struct
bogdanm 82:6473597d706e 96 {
bogdanm 82:6473597d706e 97
bogdanm 82:6473597d706e 98 uint32_t ADC_ExternalTrigInjecConvEvent; /*!< Defines the external trigger used to start the analog
bogdanm 82:6473597d706e 99 to digital conversion of injected channels. This parameter
bogdanm 82:6473597d706e 100 can be a value of @ref ADC_external_trigger_sources_for_Injected_channels_conversion */
bogdanm 82:6473597d706e 101 uint32_t ADC_ExternalTrigInjecEventEdge; /*!< Select the external trigger edge and enable the trigger of an injected group.
bogdanm 82:6473597d706e 102 This parameter can be a value of
bogdanm 82:6473597d706e 103 @ref ADC_external_trigger_edge_for_Injected_channels_conversion */
bogdanm 82:6473597d706e 104 uint8_t ADC_NbrOfInjecChannel; /*!< Specifies the number of ADC channels that will be converted
bogdanm 82:6473597d706e 105 using the sequencer for injected channel group.
bogdanm 82:6473597d706e 106 This parameter must range from 1 to 4. */
bogdanm 82:6473597d706e 107 uint32_t ADC_InjecSequence1;
bogdanm 82:6473597d706e 108 uint32_t ADC_InjecSequence2;
bogdanm 82:6473597d706e 109 uint32_t ADC_InjecSequence3;
bogdanm 82:6473597d706e 110 uint32_t ADC_InjecSequence4;
bogdanm 82:6473597d706e 111 }ADC_InjectedInitTypeDef;
bogdanm 82:6473597d706e 112
bogdanm 82:6473597d706e 113 /**
bogdanm 82:6473597d706e 114 * @}
bogdanm 82:6473597d706e 115 */
bogdanm 82:6473597d706e 116 typedef struct
bogdanm 82:6473597d706e 117 {
bogdanm 82:6473597d706e 118 uint32_t ADC_Mode; /*!< Configures the ADC to operate in
bogdanm 82:6473597d706e 119 independent or multi mode.
bogdanm 82:6473597d706e 120 This parameter can be a value of @ref ADC_mode */
bogdanm 82:6473597d706e 121 uint32_t ADC_Clock; /*!< Select the clock of the ADC. The clock is common for both master
bogdanm 82:6473597d706e 122 and slave ADCs.
bogdanm 82:6473597d706e 123 This parameter can be a value of @ref ADC_Clock */
bogdanm 82:6473597d706e 124 uint32_t ADC_DMAAccessMode; /*!< Configures the Direct memory access mode for multi ADC mode.
bogdanm 82:6473597d706e 125 This parameter can be a value of
bogdanm 82:6473597d706e 126 @ref ADC_Direct_memory_access_mode_for_multi_mode */
bogdanm 82:6473597d706e 127 uint32_t ADC_DMAMode; /*!< Configures the DMA mode for ADC.
bogdanm 82:6473597d706e 128 This parameter can be a value of @ref ADC_DMA_Mode_definition */
bogdanm 82:6473597d706e 129 uint8_t ADC_TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases.
bogdanm 82:6473597d706e 130 This parameter can be a value between 0x0 and 0xF */
bogdanm 82:6473597d706e 131
bogdanm 82:6473597d706e 132 }ADC_CommonInitTypeDef;
bogdanm 82:6473597d706e 133
bogdanm 82:6473597d706e 134 /* Exported constants --------------------------------------------------------*/
bogdanm 82:6473597d706e 135
bogdanm 82:6473597d706e 136 /** @defgroup ADC_Exported_Constants
bogdanm 82:6473597d706e 137 * @{
bogdanm 82:6473597d706e 138 */
bogdanm 82:6473597d706e 139
bogdanm 82:6473597d706e 140 #define IS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
bogdanm 82:6473597d706e 141 ((PERIPH) == ADC2) || \
bogdanm 82:6473597d706e 142 ((PERIPH) == ADC3) || \
bogdanm 82:6473597d706e 143 ((PERIPH) == ADC4))
bogdanm 82:6473597d706e 144
bogdanm 82:6473597d706e 145 #define IS_ADC_DMA_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
bogdanm 82:6473597d706e 146 ((PERIPH) == ADC2) || \
bogdanm 82:6473597d706e 147 ((PERIPH) == ADC3) || \
bogdanm 82:6473597d706e 148 ((PERIPH) == ADC4))
bogdanm 82:6473597d706e 149
bogdanm 82:6473597d706e 150 /** @defgroup ADC_ContinuousConvMode
bogdanm 82:6473597d706e 151 * @{
bogdanm 82:6473597d706e 152 */
bogdanm 82:6473597d706e 153 #define ADC_ContinuousConvMode_Enable ((uint32_t)0x00002000) /*!< ADC continuous conversion mode enable */
bogdanm 82:6473597d706e 154 #define ADC_ContinuousConvMode_Disable ((uint32_t)0x00000000) /*!< ADC continuous conversion mode disable */
bogdanm 82:6473597d706e 155 #define IS_ADC_CONVMODE(MODE) (((MODE) == ADC_ContinuousConvMode_Enable) || \
bogdanm 82:6473597d706e 156 ((MODE) == ADC_ContinuousConvMode_Disable))
bogdanm 82:6473597d706e 157 /**
bogdanm 82:6473597d706e 158 * @}
bogdanm 82:6473597d706e 159 */
bogdanm 82:6473597d706e 160 /** @defgroup ADC_OverunMode
bogdanm 82:6473597d706e 161 * @{
bogdanm 82:6473597d706e 162 */
bogdanm 82:6473597d706e 163 #define ADC_OverrunMode_Enable ((uint32_t)0x00001000) /*!< ADC Overrun Mode enable */
bogdanm 82:6473597d706e 164 #define ADC_OverrunMode_Disable ((uint32_t)0x00000000) /*!< ADC Overrun Mode disable */
bogdanm 82:6473597d706e 165 #define IS_ADC_OVRUNMODE(MODE) (((MODE) == ADC_OverrunMode_Enable) || \
bogdanm 82:6473597d706e 166 ((MODE) == ADC_OverrunMode_Disable))
bogdanm 82:6473597d706e 167 /**
bogdanm 82:6473597d706e 168 * @}
bogdanm 82:6473597d706e 169 */
bogdanm 82:6473597d706e 170 /** @defgroup ADC_AutoInjecMode
bogdanm 82:6473597d706e 171 * @{
bogdanm 82:6473597d706e 172 */
bogdanm 82:6473597d706e 173 #define ADC_AutoInjec_Enable ((uint32_t)0x02000000) /*!< ADC Auto injected Mode enable */
bogdanm 82:6473597d706e 174 #define ADC_AutoInjec_Disable ((uint32_t)0x00000000) /*!< ADC Auto injected Mode disable */
bogdanm 82:6473597d706e 175 #define IS_ADC_AUTOINJECMODE(MODE) (((MODE) == ADC_AutoInjec_Enable) || \
bogdanm 82:6473597d706e 176 ((MODE) == ADC_AutoInjec_Disable))
bogdanm 82:6473597d706e 177 /**
bogdanm 82:6473597d706e 178 * @}
bogdanm 82:6473597d706e 179 */
bogdanm 82:6473597d706e 180 /** @defgroup ADC_resolution
bogdanm 82:6473597d706e 181 * @{
bogdanm 82:6473597d706e 182 */
bogdanm 82:6473597d706e 183 #define ADC_Resolution_12b ((uint32_t)0x00000000) /*!< ADC 12-bit resolution */
bogdanm 82:6473597d706e 184 #define ADC_Resolution_10b ((uint32_t)0x00000008) /*!< ADC 10-bit resolution */
bogdanm 82:6473597d706e 185 #define ADC_Resolution_8b ((uint32_t)0x00000010) /*!< ADC 8-bit resolution */
bogdanm 82:6473597d706e 186 #define ADC_Resolution_6b ((uint32_t)0x00000018) /*!< ADC 6-bit resolution */
bogdanm 82:6473597d706e 187 #define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_Resolution_12b) || \
bogdanm 82:6473597d706e 188 ((RESOLUTION) == ADC_Resolution_10b) || \
bogdanm 82:6473597d706e 189 ((RESOLUTION) == ADC_Resolution_8b) || \
bogdanm 82:6473597d706e 190 ((RESOLUTION) == ADC_Resolution_6b))
bogdanm 82:6473597d706e 191
bogdanm 82:6473597d706e 192 /**
bogdanm 82:6473597d706e 193 * @}
bogdanm 82:6473597d706e 194 */
bogdanm 82:6473597d706e 195
bogdanm 82:6473597d706e 196
bogdanm 82:6473597d706e 197 /** @defgroup ADC_external_trigger_edge_for_regular_channels_conversion
bogdanm 82:6473597d706e 198 * @{
bogdanm 82:6473597d706e 199 */
bogdanm 82:6473597d706e 200 #define ADC_ExternalTrigEventEdge_None ((uint16_t)0x0000) /*!< ADC No external trigger for regular conversion */
bogdanm 82:6473597d706e 201 #define ADC_ExternalTrigEventEdge_RisingEdge ((uint16_t)0x0400) /*!< ADC external trigger rising edge for regular conversion */
bogdanm 82:6473597d706e 202 #define ADC_ExternalTrigEventEdge_FallingEdge ((uint16_t)0x0800) /*!< ADC ADC external trigger falling edge for regular conversion */
bogdanm 82:6473597d706e 203 #define ADC_ExternalTrigEventEdge_BothEdge ((uint16_t)0x0C00) /*!< ADC ADC external trigger both edges for regular conversion */
bogdanm 82:6473597d706e 204
bogdanm 82:6473597d706e 205 #define IS_EXTERNALTRIG_EDGE(EDGE) (((EDGE) == ADC_ExternalTrigEventEdge_None) || \
bogdanm 82:6473597d706e 206 ((EDGE) == ADC_ExternalTrigEventEdge_RisingEdge) || \
bogdanm 82:6473597d706e 207 ((EDGE) == ADC_ExternalTrigEventEdge_FallingEdge) || \
bogdanm 82:6473597d706e 208 ((EDGE) == ADC_ExternalTrigEventEdge_BothEdge))
bogdanm 82:6473597d706e 209
bogdanm 82:6473597d706e 210 /**
bogdanm 82:6473597d706e 211 * @}
bogdanm 82:6473597d706e 212 */
bogdanm 82:6473597d706e 213
bogdanm 82:6473597d706e 214 /** @defgroup ADC_external_trigger_edge_for_Injected_channels_conversion
bogdanm 82:6473597d706e 215 * @{
bogdanm 82:6473597d706e 216 */
bogdanm 82:6473597d706e 217 #define ADC_ExternalTrigInjecEventEdge_None ((uint16_t)0x0000) /*!< ADC No external trigger for regular conversion */
bogdanm 82:6473597d706e 218 #define ADC_ExternalTrigInjecEventEdge_RisingEdge ((uint16_t)0x0040) /*!< ADC external trigger rising edge for injected conversion */
bogdanm 82:6473597d706e 219 #define ADC_ExternalTrigInjecEventEdge_FallingEdge ((uint16_t)0x0080) /*!< ADC external trigger falling edge for injected conversion */
bogdanm 82:6473597d706e 220 #define ADC_ExternalTrigInjecEventEdge_BothEdge ((uint16_t)0x00C0) /*!< ADC external trigger both edges for injected conversion */
bogdanm 82:6473597d706e 221
bogdanm 82:6473597d706e 222 #define IS_EXTERNALTRIGINJ_EDGE(EDGE) (((EDGE) == ADC_ExternalTrigInjecEventEdge_None) || \
bogdanm 82:6473597d706e 223 ((EDGE) == ADC_ExternalTrigInjecEventEdge_RisingEdge) || \
bogdanm 82:6473597d706e 224 ((EDGE) == ADC_ExternalTrigInjecEventEdge_FallingEdge) || \
bogdanm 82:6473597d706e 225 ((EDGE) == ADC_ExternalTrigInjecEventEdge_BothEdge))
bogdanm 82:6473597d706e 226
bogdanm 82:6473597d706e 227 /** @defgroup ADC_external_trigger_sources_for_regular_channels_conversion
bogdanm 82:6473597d706e 228 * @{
bogdanm 82:6473597d706e 229 */
bogdanm 82:6473597d706e 230 #define ADC_ExternalTrigConvEvent_0 ((uint16_t)0x0000) /*!< ADC external trigger event 0 */
bogdanm 82:6473597d706e 231 #define ADC_ExternalTrigConvEvent_1 ((uint16_t)0x0040) /*!< ADC external trigger event 1 */
bogdanm 82:6473597d706e 232 #define ADC_ExternalTrigConvEvent_2 ((uint16_t)0x0080) /*!< ADC external trigger event 2 */
bogdanm 82:6473597d706e 233 #define ADC_ExternalTrigConvEvent_3 ((uint16_t)0x00C0) /*!< ADC external trigger event 3 */
bogdanm 82:6473597d706e 234 #define ADC_ExternalTrigConvEvent_4 ((uint16_t)0x0100) /*!< ADC external trigger event 4 */
bogdanm 82:6473597d706e 235 #define ADC_ExternalTrigConvEvent_5 ((uint16_t)0x0140) /*!< ADC external trigger event 5 */
bogdanm 82:6473597d706e 236 #define ADC_ExternalTrigConvEvent_6 ((uint16_t)0x0180) /*!< ADC external trigger event 6 */
bogdanm 82:6473597d706e 237 #define ADC_ExternalTrigConvEvent_7 ((uint16_t)0x01C0) /*!< ADC external trigger event 7 */
bogdanm 82:6473597d706e 238 #define ADC_ExternalTrigConvEvent_8 ((uint16_t)0x0200) /*!< ADC external trigger event 8 */
bogdanm 82:6473597d706e 239 #define ADC_ExternalTrigConvEvent_9 ((uint16_t)0x0240) /*!< ADC external trigger event 9 */
bogdanm 82:6473597d706e 240 #define ADC_ExternalTrigConvEvent_10 ((uint16_t)0x0280) /*!< ADC external trigger event 10 */
bogdanm 82:6473597d706e 241 #define ADC_ExternalTrigConvEvent_11 ((uint16_t)0x02C0) /*!< ADC external trigger event 11 */
bogdanm 82:6473597d706e 242 #define ADC_ExternalTrigConvEvent_12 ((uint16_t)0x0300) /*!< ADC external trigger event 12 */
bogdanm 82:6473597d706e 243 #define ADC_ExternalTrigConvEvent_13 ((uint16_t)0x0340) /*!< ADC external trigger event 13 */
bogdanm 82:6473597d706e 244 #define ADC_ExternalTrigConvEvent_14 ((uint16_t)0x0380) /*!< ADC external trigger event 14 */
bogdanm 82:6473597d706e 245 #define ADC_ExternalTrigConvEvent_15 ((uint16_t)0x03C0) /*!< ADC external trigger event 15 */
bogdanm 82:6473597d706e 246
bogdanm 82:6473597d706e 247 #define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConvEvent_0) || \
bogdanm 82:6473597d706e 248 ((REGTRIG) == ADC_ExternalTrigConvEvent_1) || \
bogdanm 82:6473597d706e 249 ((REGTRIG) == ADC_ExternalTrigConvEvent_2) || \
bogdanm 82:6473597d706e 250 ((REGTRIG) == ADC_ExternalTrigConvEvent_3) || \
bogdanm 82:6473597d706e 251 ((REGTRIG) == ADC_ExternalTrigConvEvent_4) || \
bogdanm 82:6473597d706e 252 ((REGTRIG) == ADC_ExternalTrigConvEvent_5) || \
bogdanm 82:6473597d706e 253 ((REGTRIG) == ADC_ExternalTrigConvEvent_6) || \
bogdanm 82:6473597d706e 254 ((REGTRIG) == ADC_ExternalTrigConvEvent_7) || \
bogdanm 82:6473597d706e 255 ((REGTRIG) == ADC_ExternalTrigConvEvent_8) || \
bogdanm 82:6473597d706e 256 ((REGTRIG) == ADC_ExternalTrigConvEvent_9) || \
bogdanm 82:6473597d706e 257 ((REGTRIG) == ADC_ExternalTrigConvEvent_10) || \
bogdanm 82:6473597d706e 258 ((REGTRIG) == ADC_ExternalTrigConvEvent_11) || \
bogdanm 82:6473597d706e 259 ((REGTRIG) == ADC_ExternalTrigConvEvent_12) || \
bogdanm 82:6473597d706e 260 ((REGTRIG) == ADC_ExternalTrigConvEvent_13) || \
bogdanm 82:6473597d706e 261 ((REGTRIG) == ADC_ExternalTrigConvEvent_14) || \
bogdanm 82:6473597d706e 262 ((REGTRIG) == ADC_ExternalTrigConvEvent_15))
bogdanm 82:6473597d706e 263
bogdanm 82:6473597d706e 264 /**
bogdanm 82:6473597d706e 265 * @}
bogdanm 82:6473597d706e 266 */
bogdanm 82:6473597d706e 267
bogdanm 82:6473597d706e 268 /** @defgroup ADC_external_trigger_sources_for_Injected_channels_conversion
bogdanm 82:6473597d706e 269 * @{
bogdanm 82:6473597d706e 270 */
bogdanm 82:6473597d706e 271
bogdanm 82:6473597d706e 272 #define ADC_ExternalTrigInjecConvEvent_0 ((uint16_t)0x0000) /*!< ADC external trigger for injected conversion event 0 */
bogdanm 82:6473597d706e 273 #define ADC_ExternalTrigInjecConvEvent_1 ((uint16_t)0x0004) /*!< ADC external trigger for injected conversion event 1 */
bogdanm 82:6473597d706e 274 #define ADC_ExternalTrigInjecConvEvent_2 ((uint16_t)0x0008) /*!< ADC external trigger for injected conversion event 2 */
bogdanm 82:6473597d706e 275 #define ADC_ExternalTrigInjecConvEvent_3 ((uint16_t)0x000C) /*!< ADC external trigger for injected conversion event 3 */
bogdanm 82:6473597d706e 276 #define ADC_ExternalTrigInjecConvEvent_4 ((uint16_t)0x0010) /*!< ADC external trigger for injected conversion event 4 */
bogdanm 82:6473597d706e 277 #define ADC_ExternalTrigInjecConvEvent_5 ((uint16_t)0x0014) /*!< ADC external trigger for injected conversion event 5 */
bogdanm 82:6473597d706e 278 #define ADC_ExternalTrigInjecConvEvent_6 ((uint16_t)0x0018) /*!< ADC external trigger for injected conversion event 6 */
bogdanm 82:6473597d706e 279 #define ADC_ExternalTrigInjecConvEvent_7 ((uint16_t)0x001C) /*!< ADC external trigger for injected conversion event 7 */
bogdanm 82:6473597d706e 280 #define ADC_ExternalTrigInjecConvEvent_8 ((uint16_t)0x0020) /*!< ADC external trigger for injected conversion event 8 */
bogdanm 82:6473597d706e 281 #define ADC_ExternalTrigInjecConvEvent_9 ((uint16_t)0x0024) /*!< ADC external trigger for injected conversion event 9 */
bogdanm 82:6473597d706e 282 #define ADC_ExternalTrigInjecConvEvent_10 ((uint16_t)0x0028) /*!< ADC external trigger for injected conversion event 10 */
bogdanm 82:6473597d706e 283 #define ADC_ExternalTrigInjecConvEvent_11 ((uint16_t)0x002C) /*!< ADC external trigger for injected conversion event 11 */
bogdanm 82:6473597d706e 284 #define ADC_ExternalTrigInjecConvEvent_12 ((uint16_t)0x0030) /*!< ADC external trigger for injected conversion event 12 */
bogdanm 82:6473597d706e 285 #define ADC_ExternalTrigInjecConvEvent_13 ((uint16_t)0x0034) /*!< ADC external trigger for injected conversion event 13 */
bogdanm 82:6473597d706e 286 #define ADC_ExternalTrigInjecConvEvent_14 ((uint16_t)0x0038) /*!< ADC external trigger for injected conversion event 14 */
bogdanm 82:6473597d706e 287 #define ADC_ExternalTrigInjecConvEvent_15 ((uint16_t)0x003C) /*!< ADC external trigger for injected conversion event 15 */
bogdanm 82:6473597d706e 288
bogdanm 82:6473597d706e 289 #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConvEvent_0) || \
bogdanm 82:6473597d706e 290 ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_1) || \
bogdanm 82:6473597d706e 291 ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_2) || \
bogdanm 82:6473597d706e 292 ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_3) || \
bogdanm 82:6473597d706e 293 ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_4) || \
bogdanm 82:6473597d706e 294 ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_5) || \
bogdanm 82:6473597d706e 295 ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_6) || \
bogdanm 82:6473597d706e 296 ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_7) || \
bogdanm 82:6473597d706e 297 ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_8) || \
bogdanm 82:6473597d706e 298 ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_9) || \
bogdanm 82:6473597d706e 299 ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_10) || \
bogdanm 82:6473597d706e 300 ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_11) || \
bogdanm 82:6473597d706e 301 ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_12) || \
bogdanm 82:6473597d706e 302 ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_13) || \
bogdanm 82:6473597d706e 303 ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_14) || \
bogdanm 82:6473597d706e 304 ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_15))
bogdanm 82:6473597d706e 305 /**
bogdanm 82:6473597d706e 306 * @}
bogdanm 82:6473597d706e 307 */
bogdanm 82:6473597d706e 308 /** @defgroup ADC_data_align
bogdanm 82:6473597d706e 309 * @{
bogdanm 82:6473597d706e 310 */
bogdanm 82:6473597d706e 311
bogdanm 82:6473597d706e 312 #define ADC_DataAlign_Right ((uint32_t)0x00000000) /*!< ADC Data alignment right */
bogdanm 82:6473597d706e 313 #define ADC_DataAlign_Left ((uint32_t)0x00000020) /*!< ADC Data alignment left */
bogdanm 82:6473597d706e 314 #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
bogdanm 82:6473597d706e 315 ((ALIGN) == ADC_DataAlign_Left))
bogdanm 82:6473597d706e 316 /**
bogdanm 82:6473597d706e 317 * @}
bogdanm 82:6473597d706e 318 */
bogdanm 82:6473597d706e 319
bogdanm 82:6473597d706e 320 /** @defgroup ADC_channels
bogdanm 82:6473597d706e 321 * @{
bogdanm 82:6473597d706e 322 */
bogdanm 82:6473597d706e 323
bogdanm 82:6473597d706e 324 #define ADC_Channel_1 ((uint8_t)0x01) /*!< ADC Channel 1 */
bogdanm 82:6473597d706e 325 #define ADC_Channel_2 ((uint8_t)0x02) /*!< ADC Channel 2 */
bogdanm 82:6473597d706e 326 #define ADC_Channel_3 ((uint8_t)0x03) /*!< ADC Channel 3 */
bogdanm 82:6473597d706e 327 #define ADC_Channel_4 ((uint8_t)0x04) /*!< ADC Channel 4 */
bogdanm 82:6473597d706e 328 #define ADC_Channel_5 ((uint8_t)0x05) /*!< ADC Channel 5 */
bogdanm 82:6473597d706e 329 #define ADC_Channel_6 ((uint8_t)0x06) /*!< ADC Channel 6 */
bogdanm 82:6473597d706e 330 #define ADC_Channel_7 ((uint8_t)0x07) /*!< ADC Channel 7 */
bogdanm 82:6473597d706e 331 #define ADC_Channel_8 ((uint8_t)0x08) /*!< ADC Channel 8 */
bogdanm 82:6473597d706e 332 #define ADC_Channel_9 ((uint8_t)0x09) /*!< ADC Channel 9 */
bogdanm 82:6473597d706e 333 #define ADC_Channel_10 ((uint8_t)0x0A) /*!< ADC Channel 10 */
bogdanm 82:6473597d706e 334 #define ADC_Channel_11 ((uint8_t)0x0B) /*!< ADC Channel 11 */
bogdanm 82:6473597d706e 335 #define ADC_Channel_12 ((uint8_t)0x0C) /*!< ADC Channel 12 */
bogdanm 82:6473597d706e 336 #define ADC_Channel_13 ((uint8_t)0x0D) /*!< ADC Channel 13 */
bogdanm 82:6473597d706e 337 #define ADC_Channel_14 ((uint8_t)0x0E) /*!< ADC Channel 14 */
bogdanm 82:6473597d706e 338 #define ADC_Channel_15 ((uint8_t)0x0F) /*!< ADC Channel 15 */
bogdanm 82:6473597d706e 339 #define ADC_Channel_16 ((uint8_t)0x10) /*!< ADC Channel 16 */
bogdanm 82:6473597d706e 340 #define ADC_Channel_17 ((uint8_t)0x11) /*!< ADC Channel 17 */
bogdanm 82:6473597d706e 341 #define ADC_Channel_18 ((uint8_t)0x12) /*!< ADC Channel 18 */
bogdanm 82:6473597d706e 342
bogdanm 82:6473597d706e 343 #define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_16)
bogdanm 82:6473597d706e 344 #define ADC_Channel_Vrefint ((uint8_t)ADC_Channel_18)
bogdanm 82:6473597d706e 345 #define ADC_Channel_Vbat ((uint8_t)ADC_Channel_17)
bogdanm 82:6473597d706e 346
bogdanm 82:6473597d706e 347 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_1) || \
bogdanm 82:6473597d706e 348 ((CHANNEL) == ADC_Channel_2) || \
bogdanm 82:6473597d706e 349 ((CHANNEL) == ADC_Channel_3) || \
bogdanm 82:6473597d706e 350 ((CHANNEL) == ADC_Channel_4) || \
bogdanm 82:6473597d706e 351 ((CHANNEL) == ADC_Channel_5) || \
bogdanm 82:6473597d706e 352 ((CHANNEL) == ADC_Channel_6) || \
bogdanm 82:6473597d706e 353 ((CHANNEL) == ADC_Channel_7) || \
bogdanm 82:6473597d706e 354 ((CHANNEL) == ADC_Channel_8) || \
bogdanm 82:6473597d706e 355 ((CHANNEL) == ADC_Channel_9) || \
bogdanm 82:6473597d706e 356 ((CHANNEL) == ADC_Channel_10) || \
bogdanm 82:6473597d706e 357 ((CHANNEL) == ADC_Channel_11) || \
bogdanm 82:6473597d706e 358 ((CHANNEL) == ADC_Channel_12) || \
bogdanm 82:6473597d706e 359 ((CHANNEL) == ADC_Channel_13) || \
bogdanm 82:6473597d706e 360 ((CHANNEL) == ADC_Channel_14) || \
bogdanm 82:6473597d706e 361 ((CHANNEL) == ADC_Channel_15) || \
bogdanm 82:6473597d706e 362 ((CHANNEL) == ADC_Channel_16) || \
bogdanm 82:6473597d706e 363 ((CHANNEL) == ADC_Channel_17) || \
bogdanm 82:6473597d706e 364 ((CHANNEL) == ADC_Channel_18))
bogdanm 82:6473597d706e 365 #define IS_ADC_DIFFCHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_1) || \
bogdanm 82:6473597d706e 366 ((CHANNEL) == ADC_Channel_2) || \
bogdanm 82:6473597d706e 367 ((CHANNEL) == ADC_Channel_3) || \
bogdanm 82:6473597d706e 368 ((CHANNEL) == ADC_Channel_4) || \
bogdanm 82:6473597d706e 369 ((CHANNEL) == ADC_Channel_5) || \
bogdanm 82:6473597d706e 370 ((CHANNEL) == ADC_Channel_6) || \
bogdanm 82:6473597d706e 371 ((CHANNEL) == ADC_Channel_7) || \
bogdanm 82:6473597d706e 372 ((CHANNEL) == ADC_Channel_8) || \
bogdanm 82:6473597d706e 373 ((CHANNEL) == ADC_Channel_9) || \
bogdanm 82:6473597d706e 374 ((CHANNEL) == ADC_Channel_10) || \
bogdanm 82:6473597d706e 375 ((CHANNEL) == ADC_Channel_11) || \
bogdanm 82:6473597d706e 376 ((CHANNEL) == ADC_Channel_12) || \
bogdanm 82:6473597d706e 377 ((CHANNEL) == ADC_Channel_13) || \
bogdanm 82:6473597d706e 378 ((CHANNEL) == ADC_Channel_14))
bogdanm 82:6473597d706e 379 /**
bogdanm 82:6473597d706e 380 * @}
bogdanm 82:6473597d706e 381 */
bogdanm 82:6473597d706e 382
bogdanm 82:6473597d706e 383 /** @defgroup ADC_mode
bogdanm 82:6473597d706e 384 * @{
bogdanm 82:6473597d706e 385 */
bogdanm 82:6473597d706e 386 #define ADC_Mode_Independent ((uint32_t)0x00000000) /*!< ADC independent mode */
bogdanm 82:6473597d706e 387 #define ADC_Mode_CombRegSimulInjSimul ((uint32_t)0x00000001) /*!< ADC multi ADC mode: Combined Regular simultaneous injected simultaneous mode */
bogdanm 82:6473597d706e 388 #define ADC_Mode_CombRegSimulAltTrig ((uint32_t)0x00000002) /*!< ADC multi ADC mode: Combined Regular simultaneous Alternate trigger mode */
bogdanm 82:6473597d706e 389 #define ADC_Mode_InjSimul ((uint32_t)0x00000005) /*!< ADC multi ADC mode: Injected simultaneous mode */
bogdanm 82:6473597d706e 390 #define ADC_Mode_RegSimul ((uint32_t)0x00000006) /*!< ADC multi ADC mode: Regular simultaneous mode */
bogdanm 82:6473597d706e 391 #define ADC_Mode_Interleave ((uint32_t)0x00000007) /*!< ADC multi ADC mode: Interleave mode */
bogdanm 82:6473597d706e 392 #define ADC_Mode_AltTrig ((uint32_t)0x00000009) /*!< ADC multi ADC mode: Alternate Trigger mode */
bogdanm 82:6473597d706e 393
bogdanm 82:6473597d706e 394 #define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \
bogdanm 82:6473597d706e 395 ((MODE) == ADC_Mode_CombRegSimulInjSimul) || \
bogdanm 82:6473597d706e 396 ((MODE) == ADC_Mode_CombRegSimulAltTrig) || \
bogdanm 82:6473597d706e 397 ((MODE) == ADC_Mode_InjSimul) || \
bogdanm 82:6473597d706e 398 ((MODE) == ADC_Mode_RegSimul) || \
bogdanm 82:6473597d706e 399 ((MODE) == ADC_Mode_Interleave) || \
bogdanm 82:6473597d706e 400 ((MODE) == ADC_Mode_AltTrig))
bogdanm 82:6473597d706e 401
bogdanm 82:6473597d706e 402 /**
bogdanm 82:6473597d706e 403 * @}
bogdanm 82:6473597d706e 404 */
bogdanm 82:6473597d706e 405
bogdanm 82:6473597d706e 406 /** @defgroup ADC_Clock
bogdanm 82:6473597d706e 407 * @{
bogdanm 82:6473597d706e 408 */
bogdanm 82:6473597d706e 409 #define ADC_Clock_AsynClkMode ((uint32_t)0x00000000) /*!< ADC Asynchronous clock mode */
bogdanm 82:6473597d706e 410 #define ADC_Clock_SynClkModeDiv1 ((uint32_t)0x00010000) /*!< Synchronous clock mode divided by 1 */
bogdanm 82:6473597d706e 411 #define ADC_Clock_SynClkModeDiv2 ((uint32_t)0x00020000) /*!< Synchronous clock mode divided by 2 */
bogdanm 82:6473597d706e 412 #define ADC_Clock_SynClkModeDiv4 ((uint32_t)0x00030000) /*!< Synchronous clock mode divided by 4 */
bogdanm 82:6473597d706e 413 #define IS_ADC_CLOCKMODE(CLOCK) (((CLOCK) == ADC_Clock_AsynClkMode) ||\
bogdanm 82:6473597d706e 414 ((CLOCK) == ADC_Clock_SynClkModeDiv1) ||\
bogdanm 82:6473597d706e 415 ((CLOCK) == ADC_Clock_SynClkModeDiv2)||\
bogdanm 82:6473597d706e 416 ((CLOCK) == ADC_Clock_SynClkModeDiv4))
bogdanm 82:6473597d706e 417 /**
bogdanm 82:6473597d706e 418 * @}
bogdanm 82:6473597d706e 419 */
bogdanm 82:6473597d706e 420 /** @defgroup ADC_Direct_memory_access_mode_for_multi_mode
bogdanm 82:6473597d706e 421 * @{
bogdanm 82:6473597d706e 422 */
bogdanm 82:6473597d706e 423 #define ADC_DMAAccessMode_Disabled ((uint32_t)0x00000000) /*!< DMA mode disabled */
bogdanm 82:6473597d706e 424 #define ADC_DMAAccessMode_1 ((uint32_t)0x00008000) /*!< DMA mode enabled for 12 and 10-bit resolution (6 bit) */
bogdanm 82:6473597d706e 425 #define ADC_DMAAccessMode_2 ((uint32_t)0x0000C000) /*!< DMA mode enabled for 8 and 6-bit resolution (8bit) */
bogdanm 82:6473597d706e 426 #define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAAccessMode_Disabled) || \
bogdanm 82:6473597d706e 427 ((MODE) == ADC_DMAAccessMode_1) || \
bogdanm 82:6473597d706e 428 ((MODE) == ADC_DMAAccessMode_2))
bogdanm 82:6473597d706e 429
bogdanm 82:6473597d706e 430 /**
bogdanm 82:6473597d706e 431 * @}
bogdanm 82:6473597d706e 432 */
bogdanm 82:6473597d706e 433 /** @defgroup ADC_sampling_time
bogdanm 82:6473597d706e 434 * @{
bogdanm 82:6473597d706e 435 */
bogdanm 82:6473597d706e 436
bogdanm 82:6473597d706e 437 #define ADC_SampleTime_1Cycles5 ((uint8_t)0x00) /*!< ADC sampling time 1.5 cycle */
bogdanm 82:6473597d706e 438 #define ADC_SampleTime_2Cycles5 ((uint8_t)0x01) /*!< ADC sampling time 2.5 cycles */
bogdanm 82:6473597d706e 439 #define ADC_SampleTime_4Cycles5 ((uint8_t)0x02) /*!< ADC sampling time 4.5 cycles */
bogdanm 82:6473597d706e 440 #define ADC_SampleTime_7Cycles5 ((uint8_t)0x03) /*!< ADC sampling time 7.5 cycles */
bogdanm 82:6473597d706e 441 #define ADC_SampleTime_19Cycles5 ((uint8_t)0x04) /*!< ADC sampling time 19.5 cycles */
bogdanm 82:6473597d706e 442 #define ADC_SampleTime_61Cycles5 ((uint8_t)0x05) /*!< ADC sampling time 61.5 cycles */
bogdanm 82:6473597d706e 443 #define ADC_SampleTime_181Cycles5 ((uint8_t)0x06) /*!< ADC sampling time 181.5 cycles */
bogdanm 82:6473597d706e 444 #define ADC_SampleTime_601Cycles5 ((uint8_t)0x07) /*!< ADC sampling time 601.5 cycles */
bogdanm 82:6473597d706e 445 #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1Cycles5) || \
bogdanm 82:6473597d706e 446 ((TIME) == ADC_SampleTime_2Cycles5) || \
bogdanm 82:6473597d706e 447 ((TIME) == ADC_SampleTime_4Cycles5) || \
bogdanm 82:6473597d706e 448 ((TIME) == ADC_SampleTime_7Cycles5) || \
bogdanm 82:6473597d706e 449 ((TIME) == ADC_SampleTime_19Cycles5) || \
bogdanm 82:6473597d706e 450 ((TIME) == ADC_SampleTime_61Cycles5) || \
bogdanm 82:6473597d706e 451 ((TIME) == ADC_SampleTime_181Cycles5) || \
bogdanm 82:6473597d706e 452 ((TIME) == ADC_SampleTime_601Cycles5))
bogdanm 82:6473597d706e 453 /**
bogdanm 82:6473597d706e 454 * @}
bogdanm 82:6473597d706e 455 */
bogdanm 82:6473597d706e 456
bogdanm 82:6473597d706e 457 /** @defgroup ADC_injected_Channel_selection
bogdanm 82:6473597d706e 458 * @{
bogdanm 82:6473597d706e 459 */
bogdanm 82:6473597d706e 460
bogdanm 82:6473597d706e 461 #define ADC_InjectedChannel_1 ADC_Channel_1 /*!< ADC Injected channel 1 */
bogdanm 82:6473597d706e 462 #define ADC_InjectedChannel_2 ADC_Channel_2 /*!< ADC Injected channel 2 */
bogdanm 82:6473597d706e 463 #define ADC_InjectedChannel_3 ADC_Channel_3 /*!< ADC Injected channel 3 */
bogdanm 82:6473597d706e 464 #define ADC_InjectedChannel_4 ADC_Channel_4 /*!< ADC Injected channel 4 */
bogdanm 82:6473597d706e 465 #define ADC_InjectedChannel_5 ADC_Channel_5 /*!< ADC Injected channel 5 */
bogdanm 82:6473597d706e 466 #define ADC_InjectedChannel_6 ADC_Channel_6 /*!< ADC Injected channel 6 */
bogdanm 82:6473597d706e 467 #define ADC_InjectedChannel_7 ADC_Channel_7 /*!< ADC Injected channel 7 */
bogdanm 82:6473597d706e 468 #define ADC_InjectedChannel_8 ADC_Channel_8 /*!< ADC Injected channel 8 */
bogdanm 82:6473597d706e 469 #define ADC_InjectedChannel_9 ADC_Channel_9 /*!< ADC Injected channel 9 */
bogdanm 82:6473597d706e 470 #define ADC_InjectedChannel_10 ADC_Channel_10 /*!< ADC Injected channel 10 */
bogdanm 82:6473597d706e 471 #define ADC_InjectedChannel_11 ADC_Channel_11 /*!< ADC Injected channel 11 */
bogdanm 82:6473597d706e 472 #define ADC_InjectedChannel_12 ADC_Channel_12 /*!< ADC Injected channel 12 */
bogdanm 82:6473597d706e 473 #define ADC_InjectedChannel_13 ADC_Channel_13 /*!< ADC Injected channel 13 */
bogdanm 82:6473597d706e 474 #define ADC_InjectedChannel_14 ADC_Channel_14 /*!< ADC Injected channel 14 */
bogdanm 82:6473597d706e 475 #define ADC_InjectedChannel_15 ADC_Channel_15 /*!< ADC Injected channel 15 */
bogdanm 82:6473597d706e 476 #define ADC_InjectedChannel_16 ADC_Channel_16 /*!< ADC Injected channel 16 */
bogdanm 82:6473597d706e 477 #define ADC_InjectedChannel_17 ADC_Channel_17 /*!< ADC Injected channel 17 */
bogdanm 82:6473597d706e 478 #define ADC_InjectedChannel_18 ADC_Channel_18 /*!< ADC Injected channel 18 */
bogdanm 82:6473597d706e 479
bogdanm 82:6473597d706e 480 #define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \
bogdanm 82:6473597d706e 481 ((CHANNEL) == ADC_InjectedChannel_2) || \
bogdanm 82:6473597d706e 482 ((CHANNEL) == ADC_InjectedChannel_3) || \
bogdanm 82:6473597d706e 483 ((CHANNEL) == ADC_InjectedChannel_4) ||\
bogdanm 82:6473597d706e 484 ((CHANNEL) == ADC_InjectedChannel_5) ||\
bogdanm 82:6473597d706e 485 ((CHANNEL) == ADC_InjectedChannel_6) ||\
bogdanm 82:6473597d706e 486 ((CHANNEL) == ADC_InjectedChannel_7) ||\
bogdanm 82:6473597d706e 487 ((CHANNEL) == ADC_InjectedChannel_8) ||\
bogdanm 82:6473597d706e 488 ((CHANNEL) == ADC_InjectedChannel_9) ||\
bogdanm 82:6473597d706e 489 ((CHANNEL) == ADC_InjectedChannel_10) ||\
bogdanm 82:6473597d706e 490 ((CHANNEL) == ADC_InjectedChannel_11) ||\
bogdanm 82:6473597d706e 491 ((CHANNEL) == ADC_InjectedChannel_12) ||\
bogdanm 82:6473597d706e 492 ((CHANNEL) == ADC_InjectedChannel_13) ||\
bogdanm 82:6473597d706e 493 ((CHANNEL) == ADC_InjectedChannel_14) ||\
bogdanm 82:6473597d706e 494 ((CHANNEL) == ADC_InjectedChannel_15) ||\
bogdanm 82:6473597d706e 495 ((CHANNEL) == ADC_InjectedChannel_16) ||\
bogdanm 82:6473597d706e 496 ((CHANNEL) == ADC_InjectedChannel_17) ||\
bogdanm 82:6473597d706e 497 ((CHANNEL) == ADC_InjectedChannel_18))
bogdanm 82:6473597d706e 498 /**
bogdanm 82:6473597d706e 499 * @}
bogdanm 82:6473597d706e 500 */
bogdanm 82:6473597d706e 501
bogdanm 82:6473597d706e 502 /** @defgroup ADC_injected_Sequence_selection
bogdanm 82:6473597d706e 503 * @{
bogdanm 82:6473597d706e 504 */
bogdanm 82:6473597d706e 505
bogdanm 82:6473597d706e 506 #define ADC_InjectedSequence_1 ADC_Channel_1 /*!< ADC Injected sequence 1 */
bogdanm 82:6473597d706e 507 #define ADC_InjectedSequence_2 ADC_Channel_2 /*!< ADC Injected sequence 2 */
bogdanm 82:6473597d706e 508 #define ADC_InjectedSequence_3 ADC_Channel_3 /*!< ADC Injected sequence 3 */
bogdanm 82:6473597d706e 509 #define ADC_InjectedSequence_4 ADC_Channel_4 /*!< ADC Injected sequence 4 */
bogdanm 82:6473597d706e 510 #define IS_ADC_INJECTED_SEQUENCE(SEQUENCE) (((SEQUENCE) == ADC_InjectedSequence_1) || \
bogdanm 82:6473597d706e 511 ((SEQUENCE) == ADC_InjectedSequence_2) || \
bogdanm 82:6473597d706e 512 ((SEQUENCE) == ADC_InjectedSequence_3) || \
bogdanm 82:6473597d706e 513 ((SEQUENCE) == ADC_InjectedSequence_4))
bogdanm 82:6473597d706e 514 /**
bogdanm 82:6473597d706e 515 * @}
bogdanm 82:6473597d706e 516 */
bogdanm 82:6473597d706e 517
bogdanm 82:6473597d706e 518 /** @defgroup ADC_analog_watchdog_selection
bogdanm 82:6473597d706e 519 * @{
bogdanm 82:6473597d706e 520 */
bogdanm 82:6473597d706e 521
bogdanm 82:6473597d706e 522 #define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00C00000) /*!< ADC Analog watchdog single regular mode */
bogdanm 82:6473597d706e 523 #define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x01400000) /*!< ADC Analog watchdog single injected mode */
bogdanm 82:6473597d706e 524 #define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x01C00000) /*!< ADC Analog watchdog single regular or injected mode */
bogdanm 82:6473597d706e 525 #define ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000) /*!< ADC Analog watchdog all regular mode */
bogdanm 82:6473597d706e 526 #define ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x01000000) /*!< ADC Analog watchdog all injected mode */
bogdanm 82:6473597d706e 527 #define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x01800000) /*!< ADC Analog watchdog all regular and all injected mode */
bogdanm 82:6473597d706e 528 #define ADC_AnalogWatchdog_None ((uint32_t)0x00000000) /*!< ADC Analog watchdog off */
bogdanm 82:6473597d706e 529
bogdanm 82:6473597d706e 530 #define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \
bogdanm 82:6473597d706e 531 ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \
bogdanm 82:6473597d706e 532 ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \
bogdanm 82:6473597d706e 533 ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \
bogdanm 82:6473597d706e 534 ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \
bogdanm 82:6473597d706e 535 ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \
bogdanm 82:6473597d706e 536 ((WATCHDOG) == ADC_AnalogWatchdog_None))
bogdanm 82:6473597d706e 537 /**
bogdanm 82:6473597d706e 538 * @}
bogdanm 82:6473597d706e 539 */
bogdanm 82:6473597d706e 540
bogdanm 82:6473597d706e 541 /** @defgroup ADC_Calibration_Mode_definition
bogdanm 82:6473597d706e 542 * @{
bogdanm 82:6473597d706e 543 */
bogdanm 82:6473597d706e 544 #define ADC_CalibrationMode_Single ((uint32_t)0x00000000) /*!< ADC Calibration for single ended channel */
bogdanm 82:6473597d706e 545 #define ADC_CalibrationMode_Differential ((uint32_t)0x40000000) /*!< ADC Calibration for differential channel */
bogdanm 82:6473597d706e 546
bogdanm 82:6473597d706e 547 #define IS_ADC_CALIBRATION_MODE(MODE) (((MODE) == ADC_CalibrationMode_Single) ||((MODE) == ADC_CalibrationMode_Differential))
bogdanm 82:6473597d706e 548
bogdanm 82:6473597d706e 549 /**
bogdanm 82:6473597d706e 550 * @}
bogdanm 82:6473597d706e 551 */
bogdanm 82:6473597d706e 552
bogdanm 82:6473597d706e 553 /** @defgroup ADC_DMA_Mode_definition
bogdanm 82:6473597d706e 554 * @{
bogdanm 82:6473597d706e 555 */
bogdanm 82:6473597d706e 556 #define ADC_DMAMode_OneShot ((uint32_t)0x00000000) /*!< ADC DMA Oneshot mode */
bogdanm 82:6473597d706e 557 #define ADC_DMAMode_Circular ((uint32_t)0x00000002) /*!< ADC DMA circular mode */
bogdanm 82:6473597d706e 558
bogdanm 82:6473597d706e 559 #define IS_ADC_DMA_MODE(MODE) (((MODE) == ADC_DMAMode_OneShot) || ((MODE) == ADC_DMAMode_Circular))
bogdanm 82:6473597d706e 560 /**
bogdanm 82:6473597d706e 561 * @}
bogdanm 82:6473597d706e 562 */
bogdanm 82:6473597d706e 563
bogdanm 82:6473597d706e 564 /** @defgroup ADC_interrupts_definition
bogdanm 82:6473597d706e 565 * @{
bogdanm 82:6473597d706e 566 */
bogdanm 82:6473597d706e 567
bogdanm 82:6473597d706e 568 #define ADC_IT_RDY ((uint16_t)0x0001) /*!< ADC Ready (ADRDY) interrupt source */
bogdanm 82:6473597d706e 569 #define ADC_IT_EOSMP ((uint16_t)0x0002) /*!< ADC End of Sampling interrupt source */
bogdanm 82:6473597d706e 570 #define ADC_IT_EOC ((uint16_t)0x0004) /*!< ADC End of Regular Conversion interrupt source */
bogdanm 82:6473597d706e 571 #define ADC_IT_EOS ((uint16_t)0x0008) /*!< ADC End of Regular sequence of Conversions interrupt source */
bogdanm 82:6473597d706e 572 #define ADC_IT_OVR ((uint16_t)0x0010) /*!< ADC overrun interrupt source */
bogdanm 82:6473597d706e 573 #define ADC_IT_JEOC ((uint16_t)0x0020) /*!< ADC End of Injected Conversion interrupt source */
bogdanm 82:6473597d706e 574 #define ADC_IT_JEOS ((uint16_t)0x0040) /*!< ADC End of Injected sequence of Conversions interrupt source */
bogdanm 82:6473597d706e 575 #define ADC_IT_AWD1 ((uint16_t)0x0080) /*!< ADC Analog watchdog 1 interrupt source */
bogdanm 82:6473597d706e 576 #define ADC_IT_AWD2 ((uint16_t)0x0100) /*!< ADC Analog watchdog 2 interrupt source */
bogdanm 82:6473597d706e 577 #define ADC_IT_AWD3 ((uint16_t)0x0200) /*!< ADC Analog watchdog 3 interrupt source */
bogdanm 82:6473597d706e 578 #define ADC_IT_JQOVF ((uint16_t)0x0400) /*!< ADC Injected Context Queue Overflow interrupt source */
bogdanm 82:6473597d706e 579
bogdanm 82:6473597d706e 580
bogdanm 82:6473597d706e 581 #define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xF800) == 0x0000) && ((IT) != 0x0000))
bogdanm 82:6473597d706e 582
bogdanm 82:6473597d706e 583 #define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_RDY) || ((IT) == ADC_IT_EOSMP) || \
bogdanm 82:6473597d706e 584 ((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_EOS) || \
bogdanm 82:6473597d706e 585 ((IT) == ADC_IT_OVR) || ((IT) == ADC_IT_EOS) || \
bogdanm 82:6473597d706e 586 ((IT) == ADC_IT_JEOS) || ((IT) == ADC_IT_AWD1) || \
bogdanm 82:6473597d706e 587 ((IT) == ADC_IT_AWD2) || ((IT) == ADC_IT_AWD3) || \
bogdanm 82:6473597d706e 588 ((IT) == ADC_IT_JQOVF))
bogdanm 82:6473597d706e 589 /**
bogdanm 82:6473597d706e 590 * @}
bogdanm 82:6473597d706e 591 */
bogdanm 82:6473597d706e 592
bogdanm 82:6473597d706e 593 /** @defgroup ADC_flags_definition
bogdanm 82:6473597d706e 594 * @{
bogdanm 82:6473597d706e 595 */
bogdanm 82:6473597d706e 596
bogdanm 82:6473597d706e 597 #define ADC_FLAG_RDY ((uint16_t)0x0001) /*!< ADC Ready (ADRDY) flag */
bogdanm 82:6473597d706e 598 #define ADC_FLAG_EOSMP ((uint16_t)0x0002) /*!< ADC End of Sampling flag */
bogdanm 82:6473597d706e 599 #define ADC_FLAG_EOC ((uint16_t)0x0004) /*!< ADC End of Regular Conversion flag */
bogdanm 82:6473597d706e 600 #define ADC_FLAG_EOS ((uint16_t)0x0008) /*!< ADC End of Regular sequence of Conversions flag */
bogdanm 82:6473597d706e 601 #define ADC_FLAG_OVR ((uint16_t)0x0010) /*!< ADC overrun flag */
bogdanm 82:6473597d706e 602 #define ADC_FLAG_JEOC ((uint16_t)0x0020) /*!< ADC End of Injected Conversion flag */
bogdanm 82:6473597d706e 603 #define ADC_FLAG_JEOS ((uint16_t)0x0040) /*!< ADC End of Injected sequence of Conversions flag */
bogdanm 82:6473597d706e 604 #define ADC_FLAG_AWD1 ((uint16_t)0x0080) /*!< ADC Analog watchdog 1 flag */
bogdanm 82:6473597d706e 605 #define ADC_FLAG_AWD2 ((uint16_t)0x0100) /*!< ADC Analog watchdog 2 flag */
bogdanm 82:6473597d706e 606 #define ADC_FLAG_AWD3 ((uint16_t)0x0200) /*!< ADC Analog watchdog 3 flag */
bogdanm 82:6473597d706e 607 #define ADC_FLAG_JQOVF ((uint16_t)0x0400) /*!< ADC Injected Context Queue Overflow flag */
bogdanm 82:6473597d706e 608
bogdanm 82:6473597d706e 609 #define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xF800) == 0x0000) && ((FLAG) != 0x0000))
bogdanm 82:6473597d706e 610 #define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_RDY) || ((FLAG) == ADC_FLAG_EOSMP) || \
bogdanm 82:6473597d706e 611 ((FLAG) == ADC_FLAG_EOC) || ((FLAG) == ADC_FLAG_EOS) || \
bogdanm 82:6473597d706e 612 ((FLAG) == ADC_FLAG_OVR) || ((FLAG) == ADC_FLAG_JEOC) || \
bogdanm 82:6473597d706e 613 ((FLAG) == ADC_FLAG_JEOS) || ((FLAG) == ADC_FLAG_AWD1) || \
bogdanm 82:6473597d706e 614 ((FLAG) == ADC_FLAG_AWD2) || ((FLAG) == ADC_FLAG_AWD3) || \
bogdanm 82:6473597d706e 615 ((FLAG) == ADC_FLAG_JQOVF))
bogdanm 82:6473597d706e 616 /**
bogdanm 82:6473597d706e 617 * @}
bogdanm 82:6473597d706e 618 */
bogdanm 82:6473597d706e 619
bogdanm 82:6473597d706e 620 /** @defgroup ADC_Common_flags_definition
bogdanm 82:6473597d706e 621 * @{
bogdanm 82:6473597d706e 622 */
bogdanm 82:6473597d706e 623
bogdanm 82:6473597d706e 624 #define ADC_FLAG_MSTRDY ((uint32_t)0x00000001) /*!< ADC Master Ready (ADRDY) flag */
bogdanm 82:6473597d706e 625 #define ADC_FLAG_MSTEOSMP ((uint32_t)0x00000002) /*!< ADC Master End of Sampling flag */
bogdanm 82:6473597d706e 626 #define ADC_FLAG_MSTEOC ((uint32_t)0x00000004) /*!< ADC Master End of Regular Conversion flag */
bogdanm 82:6473597d706e 627 #define ADC_FLAG_MSTEOS ((uint32_t)0x00000008) /*!< ADC Master End of Regular sequence of Conversions flag */
bogdanm 82:6473597d706e 628 #define ADC_FLAG_MSTOVR ((uint32_t)0x00000010) /*!< ADC Master overrun flag */
bogdanm 82:6473597d706e 629 #define ADC_FLAG_MSTJEOC ((uint32_t)0x00000020) /*!< ADC Master End of Injected Conversion flag */
bogdanm 82:6473597d706e 630 #define ADC_FLAG_MSTJEOS ((uint32_t)0x00000040) /*!< ADC Master End of Injected sequence of Conversions flag */
bogdanm 82:6473597d706e 631 #define ADC_FLAG_MSTAWD1 ((uint32_t)0x00000080) /*!< ADC Master Analog watchdog 1 flag */
bogdanm 82:6473597d706e 632 #define ADC_FLAG_MSTAWD2 ((uint32_t)0x00000100) /*!< ADC Master Analog watchdog 2 flag */
bogdanm 82:6473597d706e 633 #define ADC_FLAG_MSTAWD3 ((uint32_t)0x00000200) /*!< ADC Master Analog watchdog 3 flag */
bogdanm 82:6473597d706e 634 #define ADC_FLAG_MSTJQOVF ((uint32_t)0x00000400) /*!< ADC Master Injected Context Queue Overflow flag */
bogdanm 82:6473597d706e 635
bogdanm 82:6473597d706e 636 #define ADC_FLAG_SLVRDY ((uint32_t)0x00010000) /*!< ADC Slave Ready (ADRDY) flag */
bogdanm 82:6473597d706e 637 #define ADC_FLAG_SLVEOSMP ((uint32_t)0x00020000) /*!< ADC Slave End of Sampling flag */
bogdanm 82:6473597d706e 638 #define ADC_FLAG_SLVEOC ((uint32_t)0x00040000) /*!< ADC Slave End of Regular Conversion flag */
bogdanm 82:6473597d706e 639 #define ADC_FLAG_SLVEOS ((uint32_t)0x00080000) /*!< ADC Slave End of Regular sequence of Conversions flag */
bogdanm 82:6473597d706e 640 #define ADC_FLAG_SLVOVR ((uint32_t)0x00100000) /*!< ADC Slave overrun flag */
bogdanm 82:6473597d706e 641 #define ADC_FLAG_SLVJEOC ((uint32_t)0x00200000) /*!< ADC Slave End of Injected Conversion flag */
bogdanm 82:6473597d706e 642 #define ADC_FLAG_SLVJEOS ((uint32_t)0x00400000) /*!< ADC Slave End of Injected sequence of Conversions flag */
bogdanm 82:6473597d706e 643 #define ADC_FLAG_SLVAWD1 ((uint32_t)0x00800000) /*!< ADC Slave Analog watchdog 1 flag */
bogdanm 82:6473597d706e 644 #define ADC_FLAG_SLVAWD2 ((uint32_t)0x01000000) /*!< ADC Slave Analog watchdog 2 flag */
bogdanm 82:6473597d706e 645 #define ADC_FLAG_SLVAWD3 ((uint32_t)0x02000000) /*!< ADC Slave Analog watchdog 3 flag */
bogdanm 82:6473597d706e 646 #define ADC_FLAG_SLVJQOVF ((uint32_t)0x04000000) /*!< ADC Slave Injected Context Queue Overflow flag */
bogdanm 82:6473597d706e 647
bogdanm 82:6473597d706e 648 #define IS_ADC_CLEAR_COMMONFLAG(FLAG) ((((FLAG) & (uint32_t)0xF800F800) == 0x0000) && ((FLAG) != 0x00000000))
bogdanm 82:6473597d706e 649 #define IS_ADC_GET_COMMONFLAG(FLAG) (((FLAG) == ADC_FLAG_MSTRDY) || ((FLAG) == ADC_FLAG_MSTEOSMP) || \
bogdanm 82:6473597d706e 650 ((FLAG) == ADC_FLAG_MSTEOC) || ((FLAG) == ADC_FLAG_MSTEOS) || \
bogdanm 82:6473597d706e 651 ((FLAG) == ADC_FLAG_MSTOVR) || ((FLAG) == ADC_FLAG_MSTEOS) || \
bogdanm 82:6473597d706e 652 ((FLAG) == ADC_FLAG_MSTJEOS) || ((FLAG) == ADC_FLAG_MSTAWD1) || \
bogdanm 82:6473597d706e 653 ((FLAG) == ADC_FLAG_MSTAWD2) || ((FLAG) == ADC_FLAG_MSTAWD3) || \
bogdanm 82:6473597d706e 654 ((FLAG) == ADC_FLAG_MSTJQOVF) || \
bogdanm 82:6473597d706e 655 ((FLAG) == ADC_FLAG_SLVRDY) || ((FLAG) == ADC_FLAG_SLVEOSMP) || \
bogdanm 82:6473597d706e 656 ((FLAG) == ADC_FLAG_SLVEOC) || ((FLAG) == ADC_FLAG_SLVEOS) || \
bogdanm 82:6473597d706e 657 ((FLAG) == ADC_FLAG_SLVOVR) || ((FLAG) == ADC_FLAG_SLVEOS) || \
bogdanm 82:6473597d706e 658 ((FLAG) == ADC_FLAG_SLVJEOS) || ((FLAG) == ADC_FLAG_SLVAWD1) || \
bogdanm 82:6473597d706e 659 ((FLAG) == ADC_FLAG_SLVAWD2) || ((FLAG) == ADC_FLAG_SLVAWD3) || \
bogdanm 82:6473597d706e 660 ((FLAG) == ADC_FLAG_SLVJQOVF))
bogdanm 82:6473597d706e 661 /**
bogdanm 82:6473597d706e 662 * @}
bogdanm 82:6473597d706e 663 */
bogdanm 82:6473597d706e 664
bogdanm 82:6473597d706e 665 /** @defgroup ADC_thresholds
bogdanm 82:6473597d706e 666 * @{
bogdanm 82:6473597d706e 667 */
bogdanm 82:6473597d706e 668
bogdanm 82:6473597d706e 669 #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF)
bogdanm 82:6473597d706e 670
bogdanm 82:6473597d706e 671 /**
bogdanm 82:6473597d706e 672 * @}
bogdanm 82:6473597d706e 673 */
bogdanm 82:6473597d706e 674
bogdanm 82:6473597d706e 675 /** @defgroup ADC_injected_offset
bogdanm 82:6473597d706e 676 * @{
bogdanm 82:6473597d706e 677 */
bogdanm 82:6473597d706e 678
bogdanm 82:6473597d706e 679 #define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF)
bogdanm 82:6473597d706e 680
bogdanm 82:6473597d706e 681 /**
bogdanm 82:6473597d706e 682 * @}
bogdanm 82:6473597d706e 683 */
bogdanm 82:6473597d706e 684
bogdanm 82:6473597d706e 685 /** @defgroup ADC_injected_length
bogdanm 82:6473597d706e 686 * @{
bogdanm 82:6473597d706e 687 */
bogdanm 82:6473597d706e 688
bogdanm 82:6473597d706e 689 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4))
bogdanm 82:6473597d706e 690
bogdanm 82:6473597d706e 691 /**
bogdanm 82:6473597d706e 692 * @}
bogdanm 82:6473597d706e 693 */
bogdanm 82:6473597d706e 694
bogdanm 82:6473597d706e 695
bogdanm 82:6473597d706e 696 /** @defgroup ADC_regular_length
bogdanm 82:6473597d706e 697 * @{
bogdanm 82:6473597d706e 698 */
bogdanm 82:6473597d706e 699
bogdanm 82:6473597d706e 700 #define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10))
bogdanm 82:6473597d706e 701 /**
bogdanm 82:6473597d706e 702 * @}
bogdanm 82:6473597d706e 703 */
bogdanm 82:6473597d706e 704
bogdanm 82:6473597d706e 705 /** @defgroup ADC_regular_discontinuous_mode_number
bogdanm 82:6473597d706e 706 * @{
bogdanm 82:6473597d706e 707 */
bogdanm 82:6473597d706e 708
bogdanm 82:6473597d706e 709 #define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8))
bogdanm 82:6473597d706e 710
bogdanm 82:6473597d706e 711 /**
bogdanm 82:6473597d706e 712 * @}
bogdanm 82:6473597d706e 713 */
bogdanm 82:6473597d706e 714
bogdanm 82:6473597d706e 715 /** @defgroup ADC_two_sampling_delay_number
bogdanm 82:6473597d706e 716 * @{
bogdanm 82:6473597d706e 717 */
bogdanm 82:6473597d706e 718 #define IS_ADC_TWOSAMPLING_DELAY(DELAY) (((DELAY) <= 0xF))
bogdanm 82:6473597d706e 719
bogdanm 82:6473597d706e 720 /**
bogdanm 82:6473597d706e 721 * @}
bogdanm 82:6473597d706e 722 */
bogdanm 82:6473597d706e 723 /**
bogdanm 82:6473597d706e 724 * @}
bogdanm 82:6473597d706e 725 */
bogdanm 82:6473597d706e 726
bogdanm 82:6473597d706e 727
bogdanm 82:6473597d706e 728 /* Exported macro ------------------------------------------------------------*/
bogdanm 82:6473597d706e 729 /* Exported functions ------------------------------------------------------- */
bogdanm 82:6473597d706e 730
bogdanm 82:6473597d706e 731 /* Function used to set the ADC configuration to the default reset state *****/
bogdanm 82:6473597d706e 732 void ADC_DeInit(ADC_TypeDef* ADCx);
bogdanm 82:6473597d706e 733
bogdanm 82:6473597d706e 734 /* Initialization and Configuration functions *********************************/
bogdanm 82:6473597d706e 735 void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct);
bogdanm 82:6473597d706e 736 void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct);
bogdanm 82:6473597d706e 737 void ADC_InjectedInit(ADC_TypeDef* ADCx, ADC_InjectedInitTypeDef* ADC_InjectedInitStruct);
bogdanm 82:6473597d706e 738 void ADC_InjectedStructInit(ADC_InjectedInitTypeDef* ADC_InjectedInitStruct);
bogdanm 82:6473597d706e 739 void ADC_CommonInit(ADC_TypeDef* ADCx, ADC_CommonInitTypeDef* ADC_CommonInitStruct);
bogdanm 82:6473597d706e 740 void ADC_CommonStructInit(ADC_CommonInitTypeDef* ADC_CommonInitStruct);
bogdanm 82:6473597d706e 741
bogdanm 82:6473597d706e 742 void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
bogdanm 82:6473597d706e 743 void ADC_StartCalibration(ADC_TypeDef* ADCx);
bogdanm 82:6473597d706e 744 uint32_t ADC_GetCalibrationValue(ADC_TypeDef* ADCx);
bogdanm 82:6473597d706e 745 void ADC_SetCalibrationValue(ADC_TypeDef* ADCx, uint32_t ADC_Calibration);
bogdanm 82:6473597d706e 746 void ADC_SelectCalibrationMode(ADC_TypeDef* ADCx, uint32_t ADC_CalibrationMode);
bogdanm 82:6473597d706e 747 FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx);
bogdanm 82:6473597d706e 748 void ADC_DisableCmd(ADC_TypeDef* ADCx);
bogdanm 82:6473597d706e 749 FlagStatus ADC_GetDisableCmdStatus(ADC_TypeDef* ADCx);
bogdanm 82:6473597d706e 750 void ADC_VoltageRegulatorCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
bogdanm 82:6473597d706e 751 void ADC_SelectDifferentialMode(ADC_TypeDef* ADCx, uint8_t ADC_Channel, FunctionalState NewState);
bogdanm 82:6473597d706e 752 void ADC_SelectQueueOfContextMode(ADC_TypeDef* ADCx, FunctionalState NewState);
bogdanm 82:6473597d706e 753 void ADC_AutoDelayCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
bogdanm 82:6473597d706e 754
bogdanm 82:6473597d706e 755 /* Analog Watchdog configuration functions ************************************/
bogdanm 82:6473597d706e 756 void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog);
bogdanm 82:6473597d706e 757 void ADC_AnalogWatchdog1ThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold);
bogdanm 82:6473597d706e 758 void ADC_AnalogWatchdog2ThresholdsConfig(ADC_TypeDef* ADCx, uint8_t HighThreshold, uint8_t LowThreshold);
bogdanm 82:6473597d706e 759 void ADC_AnalogWatchdog3ThresholdsConfig(ADC_TypeDef* ADCx, uint8_t HighThreshold, uint8_t LowThreshold);
bogdanm 82:6473597d706e 760 void ADC_AnalogWatchdog1SingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel);
bogdanm 82:6473597d706e 761 void ADC_AnalogWatchdog2SingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel);
bogdanm 82:6473597d706e 762 void ADC_AnalogWatchdog3SingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel);
bogdanm 82:6473597d706e 763
bogdanm 82:6473597d706e 764 /* Temperature Sensor, Vrefint and Vbat management function */
bogdanm 82:6473597d706e 765 void ADC_TempSensorCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
bogdanm 82:6473597d706e 766 void ADC_VrefintCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
bogdanm 82:6473597d706e 767 void ADC_VbatCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
bogdanm 82:6473597d706e 768
bogdanm 82:6473597d706e 769 /* Channels Configuration functions ***********************************/
bogdanm 82:6473597d706e 770 void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
bogdanm 82:6473597d706e 771 void ADC_RegularChannelSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t SequencerLength);
bogdanm 82:6473597d706e 772 void ADC_ExternalTriggerConfig(ADC_TypeDef* ADCx, uint16_t ADC_ExternalTrigConvEvent, uint16_t ADC_ExternalTrigEventEdge);
bogdanm 82:6473597d706e 773
bogdanm 82:6473597d706e 774 void ADC_StartConversion(ADC_TypeDef* ADCx);
bogdanm 82:6473597d706e 775 FlagStatus ADC_GetStartConversionStatus(ADC_TypeDef* ADCx);
bogdanm 82:6473597d706e 776 void ADC_StopConversion(ADC_TypeDef* ADCx);
bogdanm 82:6473597d706e 777 void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number);
bogdanm 82:6473597d706e 778 void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
bogdanm 82:6473597d706e 779 uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx);
bogdanm 82:6473597d706e 780 uint32_t ADC_GetDualModeConversionValue(ADC_TypeDef* ADCx);
bogdanm 82:6473597d706e 781
bogdanm 82:6473597d706e 782 void ADC_SetChannelOffset1(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset);
bogdanm 82:6473597d706e 783 void ADC_SetChannelOffset2(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset);
bogdanm 82:6473597d706e 784 void ADC_SetChannelOffset3(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset);
bogdanm 82:6473597d706e 785 void ADC_SetChannelOffset4(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset);
bogdanm 82:6473597d706e 786
bogdanm 82:6473597d706e 787 void ADC_ChannelOffset1Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
bogdanm 82:6473597d706e 788 void ADC_ChannelOffset2Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
bogdanm 82:6473597d706e 789 void ADC_ChannelOffset3Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
bogdanm 82:6473597d706e 790 void ADC_ChannelOffset4Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
bogdanm 82:6473597d706e 791
bogdanm 82:6473597d706e 792 /* Regular Channels DMA Configuration functions *******************************/
bogdanm 82:6473597d706e 793 void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState);
bogdanm 82:6473597d706e 794 void ADC_DMAConfig(ADC_TypeDef* ADCx, uint32_t ADC_DMAMode);
bogdanm 82:6473597d706e 795
bogdanm 82:6473597d706e 796 /* Injected channels Configuration functions **********************************/
bogdanm 82:6473597d706e 797 void ADC_InjectedChannelSampleTimeConfig(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint8_t ADC_SampleTime);
bogdanm 82:6473597d706e 798 void ADC_StartInjectedConversion(ADC_TypeDef* ADCx);
bogdanm 82:6473597d706e 799 FlagStatus ADC_GetStartInjectedConversionStatus(ADC_TypeDef* ADCx);
bogdanm 82:6473597d706e 800 void ADC_StopInjectedConversion(ADC_TypeDef* ADCx);
bogdanm 82:6473597d706e 801 void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
bogdanm 82:6473597d706e 802 void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
bogdanm 82:6473597d706e 803 uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel);
bogdanm 82:6473597d706e 804
bogdanm 82:6473597d706e 805 /* ADC Dual Modes Configuration functions *************************************/
bogdanm 82:6473597d706e 806 FlagStatus ADC_GetCommonFlagStatus(ADC_TypeDef* ADCx, uint32_t ADC_FLAG);
bogdanm 82:6473597d706e 807 void ADC_ClearCommonFlag(ADC_TypeDef* ADCx, uint32_t ADC_FLAG);
bogdanm 82:6473597d706e 808
bogdanm 82:6473597d706e 809 /* Interrupts and flags management functions **********************************/
bogdanm 82:6473597d706e 810 void ADC_ITConfig(ADC_TypeDef* ADCx, uint32_t ADC_IT, FunctionalState NewState);
bogdanm 82:6473597d706e 811 FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint32_t ADC_FLAG);
bogdanm 82:6473597d706e 812 void ADC_ClearFlag(ADC_TypeDef* ADCx, uint32_t ADC_FLAG);
bogdanm 82:6473597d706e 813 ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint32_t ADC_IT);
bogdanm 82:6473597d706e 814 void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint32_t ADC_IT);
bogdanm 82:6473597d706e 815
bogdanm 82:6473597d706e 816 #ifdef __cplusplus
bogdanm 82:6473597d706e 817 }
bogdanm 82:6473597d706e 818 #endif
bogdanm 82:6473597d706e 819
bogdanm 82:6473597d706e 820 #endif /*__STM32F30x_ADC_H */
bogdanm 82:6473597d706e 821
bogdanm 82:6473597d706e 822 /**
bogdanm 82:6473597d706e 823 * @}
bogdanm 82:6473597d706e 824 */
bogdanm 82:6473597d706e 825
bogdanm 82:6473597d706e 826 /**
bogdanm 82:6473597d706e 827 * @}
bogdanm 82:6473597d706e 828 */
bogdanm 82:6473597d706e 829
bogdanm 82:6473597d706e 830 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/