frederic blanc / mbed

/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h substitute line 894 extern } by }

Fork of mbed by mbed official

TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/i2c/fsl_i2c_features.h@82:6473597d706e, 2014-04-07 (annotated)

Committer:
bogdanm
Date:
Mon Apr 07 18:28:36 2014 +0100
Revision:
82:6473597d706e
Child:
90:cb3d968589d8
Release 82 of the mbed library



Main changes:



- support for K64F

- Revisited Nordic code structure

- Test infrastructure improvements

- various bug fixes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 82:6473597d706e 1 /*
bogdanm 82:6473597d706e 2 * Copyright (c) 2014, Freescale Semiconductor, Inc.
bogdanm 82:6473597d706e 3 * All rights reserved.
bogdanm 82:6473597d706e 4 *
bogdanm 82:6473597d706e 5 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 82:6473597d706e 6 * are permitted provided that the following conditions are met:
bogdanm 82:6473597d706e 7 *
bogdanm 82:6473597d706e 8 * o Redistributions of source code must retain the above copyright notice, this list
bogdanm 82:6473597d706e 9 * of conditions and the following disclaimer.
bogdanm 82:6473597d706e 10 *
bogdanm 82:6473597d706e 11 * o Redistributions in binary form must reproduce the above copyright notice, this
bogdanm 82:6473597d706e 12 * list of conditions and the following disclaimer in the documentation and/or
bogdanm 82:6473597d706e 13 * other materials provided with the distribution.
bogdanm 82:6473597d706e 14 *
bogdanm 82:6473597d706e 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
bogdanm 82:6473597d706e 16 * contributors may be used to endorse or promote products derived from this
bogdanm 82:6473597d706e 17 * software without specific prior written permission.
bogdanm 82:6473597d706e 18 *
bogdanm 82:6473597d706e 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
bogdanm 82:6473597d706e 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
bogdanm 82:6473597d706e 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 82:6473597d706e 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
bogdanm 82:6473597d706e 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
bogdanm 82:6473597d706e 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
bogdanm 82:6473597d706e 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
bogdanm 82:6473597d706e 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
bogdanm 82:6473597d706e 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
bogdanm 82:6473597d706e 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 82:6473597d706e 29 */
bogdanm 82:6473597d706e 30 #if !defined(__FSL_I2C_FEATURES_H__)
bogdanm 82:6473597d706e 31 #define __FSL_I2C_FEATURES_H__
bogdanm 82:6473597d706e 32
bogdanm 82:6473597d706e 33 #if defined(CPU_MK20DX128VMP5) || defined(CPU_MK20DN128VMP5) || defined(CPU_MK20DX64VMP5) || defined(CPU_MK20DN64VMP5) || \
bogdanm 82:6473597d706e 34 defined(CPU_MK20DX32VMP5) || defined(CPU_MK20DN32VMP5) || defined(CPU_MK20DX128VLH5) || defined(CPU_MK20DN128VLH5) || \
bogdanm 82:6473597d706e 35 defined(CPU_MK20DX64VLH5) || defined(CPU_MK20DN64VLH5) || defined(CPU_MK20DX32VLH5) || defined(CPU_MK20DN32VLH5) || \
bogdanm 82:6473597d706e 36 defined(CPU_MK20DX128VFM5) || defined(CPU_MK20DN128VFM5) || defined(CPU_MK20DX64VFM5) || defined(CPU_MK20DN64VFM5) || \
bogdanm 82:6473597d706e 37 defined(CPU_MK20DX32VFM5) || defined(CPU_MK20DN32VFM5) || defined(CPU_MK20DX128VFT5) || defined(CPU_MK20DN128VFT5) || \
bogdanm 82:6473597d706e 38 defined(CPU_MK20DX64VFT5) || defined(CPU_MK20DN64VFT5) || defined(CPU_MK20DX32VFT5) || defined(CPU_MK20DN32VFT5) || \
bogdanm 82:6473597d706e 39 defined(CPU_MK20DX128VLF5) || defined(CPU_MK20DN128VLF5) || defined(CPU_MK20DX64VLF5) || defined(CPU_MK20DN64VLF5) || \
bogdanm 82:6473597d706e 40 defined(CPU_MK20DX32VLF5) || defined(CPU_MK20DN32VLF5) || defined(CPU_MK70FN1M0VMF12) || defined(CPU_MK70FX512VMF12) || \
bogdanm 82:6473597d706e 41 defined(CPU_MK70FN1M0VMF15) || defined(CPU_MK70FX512VMF15) || defined(CPU_MK70FN1M0VMJ12) || defined(CPU_MK70FX512VMJ12) || \
bogdanm 82:6473597d706e 42 defined(CPU_MK70FN1M0VMJ15) || defined(CPU_MK70FX512VMJ15)
bogdanm 82:6473597d706e 43 /* @brief Has I2C bus stop detection (register bit FLT[STOPF]).*/
bogdanm 82:6473597d706e 44 #define FSL_FEATURE_I2C_HAS_STOP_DETECT (0)
bogdanm 82:6473597d706e 45 /* @brief Has System Management Bus support (registers SMB, A2, SLTL and SLTH).*/
bogdanm 82:6473597d706e 46 #define FSL_FEATURE_I2C_HAS_SMBUS (1)
bogdanm 82:6473597d706e 47 /* @brief Maximum supported baud rate in kilobit per second.*/
bogdanm 82:6473597d706e 48 #define FSL_FEATURE_I2C_MAX_BAUD_KBPS (400)
bogdanm 82:6473597d706e 49 /* @brief Is affected by errata with ID 6070 (repeat start cannot be generated if the F[MULT] bit field is set to a non-zero value).*/
bogdanm 82:6473597d706e 50 #define FSL_FEATURE_I2C_HAS_ERRATA_6070 (0)
bogdanm 82:6473597d706e 51 /* @brief Has DMA support (register bit C1[DMAEN]).*/
bogdanm 82:6473597d706e 52 #define FSL_FEATURE_I2C_HAS_DMA_SUPPORT (1)
bogdanm 82:6473597d706e 53 /* @brief Has I2C bus start detection (register bits FLT[STARTF] and FLT[SSIE]).*/
bogdanm 82:6473597d706e 54 #define FSL_FEATURE_I2C_HAS_START_DETECT (0)
bogdanm 82:6473597d706e 55 /* @brief Has I2C bus stop detection interrupt (register bit FLT[STOPIE]).*/
bogdanm 82:6473597d706e 56 #define FSL_FEATURE_I2C_HAS_STOP_DETECT_INTERRUPT (0)
bogdanm 82:6473597d706e 57 /* @brief Has I2C bus stop hold off (register bit FLT[SHEN]).*/
bogdanm 82:6473597d706e 58 #define FSL_FEATURE_I2C_HAS_STOP_HOLD_OFF (0)
bogdanm 82:6473597d706e 59 /* @brief Maximum width of the glitch filter in number of bus clocks.*/
bogdanm 82:6473597d706e 60 #define FSL_FEATURE_I2C_MAX_GLITCH_FILTER_WIDTH (31)
bogdanm 82:6473597d706e 61 /* @brief Has control of the drive capability of the I2C pins.*/
bogdanm 82:6473597d706e 62 #define FSL_FEATURE_I2C_HAS_HIGH_DRIVE_SELECTION (1)
bogdanm 82:6473597d706e 63 #elif defined(CPU_MK22FN256VDC12) || defined(CPU_MK22FN256VLH12) || defined(CPU_MK22FN256VLL12) || defined(CPU_MK22FN256VMP12) || \
bogdanm 82:6473597d706e 64 defined(CPU_MK22FN512VDC12) || defined(CPU_MK22FN512VLH12) || defined(CPU_MK22FN512VLL12) || defined(CPU_MK24FN1M0VDC12) || \
bogdanm 82:6473597d706e 65 defined(CPU_MK24FN1M0VLQ12) || defined(CPU_MK63FN1M0VLQ12) || defined(CPU_MK63FN1M0VMD12) || defined(CPU_MK64FN1M0VDC12) || \
bogdanm 82:6473597d706e 66 defined(CPU_MK64FN1M0VLL12) || defined(CPU_MK64FN1M0VLQ12) || defined(CPU_MK64FX512VLQ12) || defined(CPU_MK64FN1M0VMD12) || \
bogdanm 82:6473597d706e 67 defined(CPU_MK64FX512VMD12) || defined(CPU_MK65FN2M0CAC18) || defined(CPU_MK65FX1M0CAC18) || defined(CPU_MK65FN2M0VMI18) || \
bogdanm 82:6473597d706e 68 defined(CPU_MK65FX1M0VMI18) || defined(CPU_MK66FN2M0VLQ18) || defined(CPU_MK66FX1M0VLQ18) || defined(CPU_MK66FN2M0VMD18) || \
bogdanm 82:6473597d706e 69 defined(CPU_MK66FX1M0VMD18) || defined(CPU_MKV31F256VLH12) || defined(CPU_MKV31F256VLL12) || defined(CPU_MKV31FN512VLH12) || \
bogdanm 82:6473597d706e 70 defined(CPU_MKV31F512VLL12)
bogdanm 82:6473597d706e 71 /* @brief Has I2C bus stop detection (register bit FLT[STOPF]).*/
bogdanm 82:6473597d706e 72 #define FSL_FEATURE_I2C_HAS_STOP_DETECT (1)
bogdanm 82:6473597d706e 73 /* @brief Has System Management Bus support (registers SMB, A2, SLTL and SLTH).*/
bogdanm 82:6473597d706e 74 #define FSL_FEATURE_I2C_HAS_SMBUS (1)
bogdanm 82:6473597d706e 75 /* @brief Maximum supported baud rate in kilobit per second.*/
bogdanm 82:6473597d706e 76 #define FSL_FEATURE_I2C_MAX_BAUD_KBPS (400)
bogdanm 82:6473597d706e 77 /* @brief Is affected by errata with ID 6070 (repeat start cannot be generated if the F[MULT] bit field is set to a non-zero value).*/
bogdanm 82:6473597d706e 78 #define FSL_FEATURE_I2C_HAS_ERRATA_6070 (0)
bogdanm 82:6473597d706e 79 /* @brief Has DMA support (register bit C1[DMAEN]).*/
bogdanm 82:6473597d706e 80 #define FSL_FEATURE_I2C_HAS_DMA_SUPPORT (1)
bogdanm 82:6473597d706e 81 /* @brief Has I2C bus start detection (register bits FLT[STARTF] and FLT[SSIE]).*/
bogdanm 82:6473597d706e 82 #define FSL_FEATURE_I2C_HAS_START_DETECT (1)
bogdanm 82:6473597d706e 83 /* @brief Has I2C bus stop detection interrupt (register bit FLT[STOPIE]).*/
bogdanm 82:6473597d706e 84 #define FSL_FEATURE_I2C_HAS_STOP_DETECT_INTERRUPT (0)
bogdanm 82:6473597d706e 85 /* @brief Has I2C bus stop hold off (register bit FLT[SHEN]).*/
bogdanm 82:6473597d706e 86 #define FSL_FEATURE_I2C_HAS_STOP_HOLD_OFF (1)
bogdanm 82:6473597d706e 87 /* @brief Maximum width of the glitch filter in number of bus clocks.*/
bogdanm 82:6473597d706e 88 #define FSL_FEATURE_I2C_MAX_GLITCH_FILTER_WIDTH (15)
bogdanm 82:6473597d706e 89 /* @brief Has control of the drive capability of the I2C pins.*/
bogdanm 82:6473597d706e 90 #define FSL_FEATURE_I2C_HAS_HIGH_DRIVE_SELECTION (1)
bogdanm 82:6473597d706e 91 #elif defined(CPU_MKL05Z8VFK4) || defined(CPU_MKL05Z16VFK4) || defined(CPU_MKL05Z32VFK4) || defined(CPU_MKL05Z8VLC4) || \
bogdanm 82:6473597d706e 92 defined(CPU_MKL05Z16VLC4) || defined(CPU_MKL05Z32VLC4) || defined(CPU_MKL05Z8VFM4) || defined(CPU_MKL05Z16VFM4) || \
bogdanm 82:6473597d706e 93 defined(CPU_MKL05Z32VFM4) || defined(CPU_MKL05Z16VLF4) || defined(CPU_MKL05Z32VLF4) || defined(CPU_MKL25Z32VFM4) || \
bogdanm 82:6473597d706e 94 defined(CPU_MKL25Z64VFM4) || defined(CPU_MKL25Z128VFM4) || defined(CPU_MKL25Z32VFT4) || defined(CPU_MKL25Z64VFT4) || \
bogdanm 82:6473597d706e 95 defined(CPU_MKL25Z128VFT4) || defined(CPU_MKL25Z32VLH4) || defined(CPU_MKL25Z64VLH4) || defined(CPU_MKL25Z128VLH4) || \
bogdanm 82:6473597d706e 96 defined(CPU_MKL25Z32VLK4) || defined(CPU_MKL25Z64VLK4) || defined(CPU_MKL25Z128VLK4)
bogdanm 82:6473597d706e 97 /* @brief Has I2C bus stop detection (register bit FLT[STOPF]).*/
bogdanm 82:6473597d706e 98 #define FSL_FEATURE_I2C_HAS_STOP_DETECT (1)
bogdanm 82:6473597d706e 99 /* @brief Has System Management Bus support (registers SMB, A2, SLTL and SLTH).*/
bogdanm 82:6473597d706e 100 #define FSL_FEATURE_I2C_HAS_SMBUS (1)
bogdanm 82:6473597d706e 101 /* @brief Maximum supported baud rate in kilobit per second.*/
bogdanm 82:6473597d706e 102 #define FSL_FEATURE_I2C_MAX_BAUD_KBPS (400)
bogdanm 82:6473597d706e 103 /* @brief Is affected by errata with ID 6070 (repeat start cannot be generated if the F[MULT] bit field is set to a non-zero value).*/
bogdanm 82:6473597d706e 104 #define FSL_FEATURE_I2C_HAS_ERRATA_6070 (1)
bogdanm 82:6473597d706e 105 /* @brief Has DMA support (register bit C1[DMAEN]).*/
bogdanm 82:6473597d706e 106 #define FSL_FEATURE_I2C_HAS_DMA_SUPPORT (1)
bogdanm 82:6473597d706e 107 /* @brief Has I2C bus start detection (register bits FLT[STARTF] and FLT[SSIE]).*/
bogdanm 82:6473597d706e 108 #define FSL_FEATURE_I2C_HAS_START_DETECT (0)
bogdanm 82:6473597d706e 109 /* @brief Has I2C bus stop detection interrupt (register bit FLT[STOPIE]).*/
bogdanm 82:6473597d706e 110 #define FSL_FEATURE_I2C_HAS_STOP_DETECT_INTERRUPT (1)
bogdanm 82:6473597d706e 111 /* @brief Has I2C bus stop hold off (register bit FLT[SHEN]).*/
bogdanm 82:6473597d706e 112 #define FSL_FEATURE_I2C_HAS_STOP_HOLD_OFF (1)
bogdanm 82:6473597d706e 113 /* @brief Maximum width of the glitch filter in number of bus clocks.*/
bogdanm 82:6473597d706e 114 #define FSL_FEATURE_I2C_MAX_GLITCH_FILTER_WIDTH (31)
bogdanm 82:6473597d706e 115 /* @brief Has control of the drive capability of the I2C pins.*/
bogdanm 82:6473597d706e 116 #define FSL_FEATURE_I2C_HAS_HIGH_DRIVE_SELECTION (1)
bogdanm 82:6473597d706e 117 #elif defined(CPU_MKL46Z128VLH4) || defined(CPU_MKL46Z256VLH4) || defined(CPU_MKL46Z128VLL4) || defined(CPU_MKL46Z256VLL4) || \
bogdanm 82:6473597d706e 118 defined(CPU_MKL46Z128VMC4) || defined(CPU_MKL46Z256VMC4)
bogdanm 82:6473597d706e 119 /* @brief Has I2C bus stop detection (register bit FLT[STOPF]).*/
bogdanm 82:6473597d706e 120 #define FSL_FEATURE_I2C_HAS_STOP_DETECT (1)
bogdanm 82:6473597d706e 121 /* @brief Has System Management Bus support (registers SMB, A2, SLTL and SLTH).*/
bogdanm 82:6473597d706e 122 #define FSL_FEATURE_I2C_HAS_SMBUS (1)
bogdanm 82:6473597d706e 123 /* @brief Maximum supported baud rate in kilobit per second.*/
bogdanm 82:6473597d706e 124 #define FSL_FEATURE_I2C_MAX_BAUD_KBPS (100)
bogdanm 82:6473597d706e 125 /* @brief Is affected by errata with ID 6070 (repeat start cannot be generated if the F[MULT] bit field is set to a non-zero value).*/
bogdanm 82:6473597d706e 126 #define FSL_FEATURE_I2C_HAS_ERRATA_6070 (1)
bogdanm 82:6473597d706e 127 /* @brief Has DMA support (register bit C1[DMAEN]).*/
bogdanm 82:6473597d706e 128 #define FSL_FEATURE_I2C_HAS_DMA_SUPPORT (1)
bogdanm 82:6473597d706e 129 /* @brief Has I2C bus start detection (register bits FLT[STARTF] and FLT[SSIE]).*/
bogdanm 82:6473597d706e 130 #define FSL_FEATURE_I2C_HAS_START_DETECT (0)
bogdanm 82:6473597d706e 131 /* @brief Has I2C bus stop detection interrupt (register bit FLT[STOPIE]).*/
bogdanm 82:6473597d706e 132 #define FSL_FEATURE_I2C_HAS_STOP_DETECT_INTERRUPT (1)
bogdanm 82:6473597d706e 133 /* @brief Has I2C bus stop hold off (register bit FLT[SHEN]).*/
bogdanm 82:6473597d706e 134 #define FSL_FEATURE_I2C_HAS_STOP_HOLD_OFF (1)
bogdanm 82:6473597d706e 135 /* @brief Maximum width of the glitch filter in number of bus clocks.*/
bogdanm 82:6473597d706e 136 #define FSL_FEATURE_I2C_MAX_GLITCH_FILTER_WIDTH (31)
bogdanm 82:6473597d706e 137 /* @brief Has control of the drive capability of the I2C pins.*/
bogdanm 82:6473597d706e 138 #define FSL_FEATURE_I2C_HAS_HIGH_DRIVE_SELECTION (1)
bogdanm 82:6473597d706e 139 #else
bogdanm 82:6473597d706e 140 #error "No valid CPU defined!"
bogdanm 82:6473597d706e 141 #endif
bogdanm 82:6473597d706e 142
bogdanm 82:6473597d706e 143 #endif /* __FSL_I2C_FEATURES_H__*/
bogdanm 82:6473597d706e 144 /*******************************************************************************
bogdanm 82:6473597d706e 145 * EOF
bogdanm 82:6473597d706e 146 ******************************************************************************/
bogdanm 82:6473597d706e 147