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TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_K64F/device/MK64F12/MK64F12_usbdcd.h@82:6473597d706e, 2014-04-07 (annotated)

Committer:
bogdanm
Date:
Mon Apr 07 18:28:36 2014 +0100
Revision:
82:6473597d706e
Release 82 of the mbed library



Main changes:



- support for K64F

- Revisited Nordic code structure

- Test infrastructure improvements

- various bug fixes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 82:6473597d706e 1 /*
bogdanm 82:6473597d706e 2 * Copyright (c) 2014, Freescale Semiconductor, Inc.
bogdanm 82:6473597d706e 3 * All rights reserved.
bogdanm 82:6473597d706e 4 *
bogdanm 82:6473597d706e 5 * THIS SOFTWARE IS PROVIDED BY FREESCALE "AS IS" AND ANY EXPRESS OR IMPLIED
bogdanm 82:6473597d706e 6 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
bogdanm 82:6473597d706e 7 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
bogdanm 82:6473597d706e 8 * SHALL FREESCALE BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
bogdanm 82:6473597d706e 9 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
bogdanm 82:6473597d706e 10 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 82:6473597d706e 11 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 82:6473597d706e 12 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
bogdanm 82:6473597d706e 13 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
bogdanm 82:6473597d706e 14 * OF SUCH DAMAGE.
bogdanm 82:6473597d706e 15 */
bogdanm 82:6473597d706e 16 /*
bogdanm 82:6473597d706e 17 * WARNING! DO NOT EDIT THIS FILE DIRECTLY!
bogdanm 82:6473597d706e 18 *
bogdanm 82:6473597d706e 19 * This file was generated automatically and any changes may be lost.
bogdanm 82:6473597d706e 20 */
bogdanm 82:6473597d706e 21 #ifndef __HW_USBDCD_REGISTERS_H__
bogdanm 82:6473597d706e 22 #define __HW_USBDCD_REGISTERS_H__
bogdanm 82:6473597d706e 23
bogdanm 82:6473597d706e 24 #include "regs.h"
bogdanm 82:6473597d706e 25
bogdanm 82:6473597d706e 26 /*
bogdanm 82:6473597d706e 27 * MK64F12 USBDCD
bogdanm 82:6473597d706e 28 *
bogdanm 82:6473597d706e 29 * USB Device Charger Detection module
bogdanm 82:6473597d706e 30 *
bogdanm 82:6473597d706e 31 * Registers defined in this header file:
bogdanm 82:6473597d706e 32 * - HW_USBDCD_CONTROL - Control register
bogdanm 82:6473597d706e 33 * - HW_USBDCD_CLOCK - Clock register
bogdanm 82:6473597d706e 34 * - HW_USBDCD_STATUS - Status register
bogdanm 82:6473597d706e 35 * - HW_USBDCD_TIMER0 - TIMER0 register
bogdanm 82:6473597d706e 36 * - HW_USBDCD_TIMER1 - TIMER1 register
bogdanm 82:6473597d706e 37 * - HW_USBDCD_TIMER2_BC11 - TIMER2_BC11 register
bogdanm 82:6473597d706e 38 * - HW_USBDCD_TIMER2_BC12 - TIMER2_BC12 register
bogdanm 82:6473597d706e 39 *
bogdanm 82:6473597d706e 40 * - hw_usbdcd_t - Struct containing all module registers.
bogdanm 82:6473597d706e 41 */
bogdanm 82:6473597d706e 42
bogdanm 82:6473597d706e 43 //! @name Module base addresses
bogdanm 82:6473597d706e 44 //@{
bogdanm 82:6473597d706e 45 #ifndef REGS_USBDCD_BASE
bogdanm 82:6473597d706e 46 #define HW_USBDCD_INSTANCE_COUNT (1U) //!< Number of instances of the USBDCD module.
bogdanm 82:6473597d706e 47 #define HW_USBDCD0 (0U) //!< Instance number for USBDCD.
bogdanm 82:6473597d706e 48 #define REGS_USBDCD0_BASE (0x40035000U) //!< Base address for USBDCD.
bogdanm 82:6473597d706e 49
bogdanm 82:6473597d706e 50 //! @brief Table of base addresses for USBDCD instances.
bogdanm 82:6473597d706e 51 static const uint32_t __g_regs_USBDCD_base_addresses[] = {
bogdanm 82:6473597d706e 52 REGS_USBDCD0_BASE,
bogdanm 82:6473597d706e 53 };
bogdanm 82:6473597d706e 54
bogdanm 82:6473597d706e 55 //! @brief Get the base address of USBDCD by instance number.
bogdanm 82:6473597d706e 56 //! @param x USBDCD instance number, from 0 through 0.
bogdanm 82:6473597d706e 57 #define REGS_USBDCD_BASE(x) (__g_regs_USBDCD_base_addresses[(x)])
bogdanm 82:6473597d706e 58
bogdanm 82:6473597d706e 59 //! @brief Get the instance number given a base address.
bogdanm 82:6473597d706e 60 //! @param b Base address for an instance of USBDCD.
bogdanm 82:6473597d706e 61 #define REGS_USBDCD_INSTANCE(b) ((b) == REGS_USBDCD0_BASE ? HW_USBDCD0 : 0)
bogdanm 82:6473597d706e 62 #endif
bogdanm 82:6473597d706e 63 //@}
bogdanm 82:6473597d706e 64
bogdanm 82:6473597d706e 65 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 66 // HW_USBDCD_CONTROL - Control register
bogdanm 82:6473597d706e 67 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 68
bogdanm 82:6473597d706e 69 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 70 /*!
bogdanm 82:6473597d706e 71 * @brief HW_USBDCD_CONTROL - Control register (RW)
bogdanm 82:6473597d706e 72 *
bogdanm 82:6473597d706e 73 * Reset value: 0x00010000U
bogdanm 82:6473597d706e 74 *
bogdanm 82:6473597d706e 75 * Contains the control and interrupt bit fields.
bogdanm 82:6473597d706e 76 */
bogdanm 82:6473597d706e 77 typedef union _hw_usbdcd_control
bogdanm 82:6473597d706e 78 {
bogdanm 82:6473597d706e 79 uint32_t U;
bogdanm 82:6473597d706e 80 struct _hw_usbdcd_control_bitfields
bogdanm 82:6473597d706e 81 {
bogdanm 82:6473597d706e 82 uint32_t IACK : 1; //!< [0] Interrupt Acknowledge
bogdanm 82:6473597d706e 83 uint32_t RESERVED0 : 7; //!< [7:1]
bogdanm 82:6473597d706e 84 uint32_t IF : 1; //!< [8] Interrupt Flag
bogdanm 82:6473597d706e 85 uint32_t RESERVED1 : 7; //!< [15:9]
bogdanm 82:6473597d706e 86 uint32_t IE : 1; //!< [16] Interrupt Enable
bogdanm 82:6473597d706e 87 uint32_t BC12 : 1; //!< [17]
bogdanm 82:6473597d706e 88 uint32_t RESERVED2 : 6; //!< [23:18]
bogdanm 82:6473597d706e 89 uint32_t START : 1; //!< [24] Start Change Detection Sequence
bogdanm 82:6473597d706e 90 uint32_t SR : 1; //!< [25] Software Reset
bogdanm 82:6473597d706e 91 uint32_t RESERVED3 : 6; //!< [31:26]
bogdanm 82:6473597d706e 92 } B;
bogdanm 82:6473597d706e 93 } hw_usbdcd_control_t;
bogdanm 82:6473597d706e 94 #endif
bogdanm 82:6473597d706e 95
bogdanm 82:6473597d706e 96 /*!
bogdanm 82:6473597d706e 97 * @name Constants and macros for entire USBDCD_CONTROL register
bogdanm 82:6473597d706e 98 */
bogdanm 82:6473597d706e 99 //@{
bogdanm 82:6473597d706e 100 #define HW_USBDCD_CONTROL_ADDR(x) (REGS_USBDCD_BASE(x) + 0x0U)
bogdanm 82:6473597d706e 101
bogdanm 82:6473597d706e 102 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 103 #define HW_USBDCD_CONTROL(x) (*(__IO hw_usbdcd_control_t *) HW_USBDCD_CONTROL_ADDR(x))
bogdanm 82:6473597d706e 104 #define HW_USBDCD_CONTROL_RD(x) (HW_USBDCD_CONTROL(x).U)
bogdanm 82:6473597d706e 105 #define HW_USBDCD_CONTROL_WR(x, v) (HW_USBDCD_CONTROL(x).U = (v))
bogdanm 82:6473597d706e 106 #define HW_USBDCD_CONTROL_SET(x, v) (HW_USBDCD_CONTROL_WR(x, HW_USBDCD_CONTROL_RD(x) | (v)))
bogdanm 82:6473597d706e 107 #define HW_USBDCD_CONTROL_CLR(x, v) (HW_USBDCD_CONTROL_WR(x, HW_USBDCD_CONTROL_RD(x) & ~(v)))
bogdanm 82:6473597d706e 108 #define HW_USBDCD_CONTROL_TOG(x, v) (HW_USBDCD_CONTROL_WR(x, HW_USBDCD_CONTROL_RD(x) ^ (v)))
bogdanm 82:6473597d706e 109 #endif
bogdanm 82:6473597d706e 110 //@}
bogdanm 82:6473597d706e 111
bogdanm 82:6473597d706e 112 /*
bogdanm 82:6473597d706e 113 * Constants & macros for individual USBDCD_CONTROL bitfields
bogdanm 82:6473597d706e 114 */
bogdanm 82:6473597d706e 115
bogdanm 82:6473597d706e 116 /*!
bogdanm 82:6473597d706e 117 * @name Register USBDCD_CONTROL, field IACK[0] (WORZ)
bogdanm 82:6473597d706e 118 *
bogdanm 82:6473597d706e 119 * Determines whether the interrupt is cleared.
bogdanm 82:6473597d706e 120 *
bogdanm 82:6473597d706e 121 * Values:
bogdanm 82:6473597d706e 122 * - 0 - Do not clear the interrupt.
bogdanm 82:6473597d706e 123 * - 1 - Clear the IF bit (interrupt flag).
bogdanm 82:6473597d706e 124 */
bogdanm 82:6473597d706e 125 //@{
bogdanm 82:6473597d706e 126 #define BP_USBDCD_CONTROL_IACK (0U) //!< Bit position for USBDCD_CONTROL_IACK.
bogdanm 82:6473597d706e 127 #define BM_USBDCD_CONTROL_IACK (0x00000001U) //!< Bit mask for USBDCD_CONTROL_IACK.
bogdanm 82:6473597d706e 128 #define BS_USBDCD_CONTROL_IACK (1U) //!< Bit field size in bits for USBDCD_CONTROL_IACK.
bogdanm 82:6473597d706e 129
bogdanm 82:6473597d706e 130 //! @brief Format value for bitfield USBDCD_CONTROL_IACK.
bogdanm 82:6473597d706e 131 #define BF_USBDCD_CONTROL_IACK(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_USBDCD_CONTROL_IACK), uint32_t) & BM_USBDCD_CONTROL_IACK)
bogdanm 82:6473597d706e 132
bogdanm 82:6473597d706e 133 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 134 //! @brief Set the IACK field to a new value.
bogdanm 82:6473597d706e 135 #define BW_USBDCD_CONTROL_IACK(x, v) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IACK) = (v))
bogdanm 82:6473597d706e 136 #endif
bogdanm 82:6473597d706e 137 //@}
bogdanm 82:6473597d706e 138
bogdanm 82:6473597d706e 139 /*!
bogdanm 82:6473597d706e 140 * @name Register USBDCD_CONTROL, field IF[8] (RO)
bogdanm 82:6473597d706e 141 *
bogdanm 82:6473597d706e 142 * Determines whether an interrupt is pending.
bogdanm 82:6473597d706e 143 *
bogdanm 82:6473597d706e 144 * Values:
bogdanm 82:6473597d706e 145 * - 0 - No interrupt is pending.
bogdanm 82:6473597d706e 146 * - 1 - An interrupt is pending.
bogdanm 82:6473597d706e 147 */
bogdanm 82:6473597d706e 148 //@{
bogdanm 82:6473597d706e 149 #define BP_USBDCD_CONTROL_IF (8U) //!< Bit position for USBDCD_CONTROL_IF.
bogdanm 82:6473597d706e 150 #define BM_USBDCD_CONTROL_IF (0x00000100U) //!< Bit mask for USBDCD_CONTROL_IF.
bogdanm 82:6473597d706e 151 #define BS_USBDCD_CONTROL_IF (1U) //!< Bit field size in bits for USBDCD_CONTROL_IF.
bogdanm 82:6473597d706e 152
bogdanm 82:6473597d706e 153 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 154 //! @brief Read current value of the USBDCD_CONTROL_IF field.
bogdanm 82:6473597d706e 155 #define BR_USBDCD_CONTROL_IF(x) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IF))
bogdanm 82:6473597d706e 156 #endif
bogdanm 82:6473597d706e 157 //@}
bogdanm 82:6473597d706e 158
bogdanm 82:6473597d706e 159 /*!
bogdanm 82:6473597d706e 160 * @name Register USBDCD_CONTROL, field IE[16] (RW)
bogdanm 82:6473597d706e 161 *
bogdanm 82:6473597d706e 162 * Enables/disables interrupts to the system.
bogdanm 82:6473597d706e 163 *
bogdanm 82:6473597d706e 164 * Values:
bogdanm 82:6473597d706e 165 * - 0 - Disable interrupts to the system.
bogdanm 82:6473597d706e 166 * - 1 - Enable interrupts to the system.
bogdanm 82:6473597d706e 167 */
bogdanm 82:6473597d706e 168 //@{
bogdanm 82:6473597d706e 169 #define BP_USBDCD_CONTROL_IE (16U) //!< Bit position for USBDCD_CONTROL_IE.
bogdanm 82:6473597d706e 170 #define BM_USBDCD_CONTROL_IE (0x00010000U) //!< Bit mask for USBDCD_CONTROL_IE.
bogdanm 82:6473597d706e 171 #define BS_USBDCD_CONTROL_IE (1U) //!< Bit field size in bits for USBDCD_CONTROL_IE.
bogdanm 82:6473597d706e 172
bogdanm 82:6473597d706e 173 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 174 //! @brief Read current value of the USBDCD_CONTROL_IE field.
bogdanm 82:6473597d706e 175 #define BR_USBDCD_CONTROL_IE(x) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IE))
bogdanm 82:6473597d706e 176 #endif
bogdanm 82:6473597d706e 177
bogdanm 82:6473597d706e 178 //! @brief Format value for bitfield USBDCD_CONTROL_IE.
bogdanm 82:6473597d706e 179 #define BF_USBDCD_CONTROL_IE(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_USBDCD_CONTROL_IE), uint32_t) & BM_USBDCD_CONTROL_IE)
bogdanm 82:6473597d706e 180
bogdanm 82:6473597d706e 181 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 182 //! @brief Set the IE field to a new value.
bogdanm 82:6473597d706e 183 #define BW_USBDCD_CONTROL_IE(x, v) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IE) = (v))
bogdanm 82:6473597d706e 184 #endif
bogdanm 82:6473597d706e 185 //@}
bogdanm 82:6473597d706e 186
bogdanm 82:6473597d706e 187 /*!
bogdanm 82:6473597d706e 188 * @name Register USBDCD_CONTROL, field BC12[17] (RW)
bogdanm 82:6473597d706e 189 *
bogdanm 82:6473597d706e 190 * BC1.2 compatibility. This bit cannot be changed after start detection.
bogdanm 82:6473597d706e 191 *
bogdanm 82:6473597d706e 192 * Values:
bogdanm 82:6473597d706e 193 * - 0 - Compatible with BC1.1 (default)
bogdanm 82:6473597d706e 194 * - 1 - Compatible with BC1.2
bogdanm 82:6473597d706e 195 */
bogdanm 82:6473597d706e 196 //@{
bogdanm 82:6473597d706e 197 #define BP_USBDCD_CONTROL_BC12 (17U) //!< Bit position for USBDCD_CONTROL_BC12.
bogdanm 82:6473597d706e 198 #define BM_USBDCD_CONTROL_BC12 (0x00020000U) //!< Bit mask for USBDCD_CONTROL_BC12.
bogdanm 82:6473597d706e 199 #define BS_USBDCD_CONTROL_BC12 (1U) //!< Bit field size in bits for USBDCD_CONTROL_BC12.
bogdanm 82:6473597d706e 200
bogdanm 82:6473597d706e 201 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 202 //! @brief Read current value of the USBDCD_CONTROL_BC12 field.
bogdanm 82:6473597d706e 203 #define BR_USBDCD_CONTROL_BC12(x) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_BC12))
bogdanm 82:6473597d706e 204 #endif
bogdanm 82:6473597d706e 205
bogdanm 82:6473597d706e 206 //! @brief Format value for bitfield USBDCD_CONTROL_BC12.
bogdanm 82:6473597d706e 207 #define BF_USBDCD_CONTROL_BC12(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_USBDCD_CONTROL_BC12), uint32_t) & BM_USBDCD_CONTROL_BC12)
bogdanm 82:6473597d706e 208
bogdanm 82:6473597d706e 209 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 210 //! @brief Set the BC12 field to a new value.
bogdanm 82:6473597d706e 211 #define BW_USBDCD_CONTROL_BC12(x, v) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_BC12) = (v))
bogdanm 82:6473597d706e 212 #endif
bogdanm 82:6473597d706e 213 //@}
bogdanm 82:6473597d706e 214
bogdanm 82:6473597d706e 215 /*!
bogdanm 82:6473597d706e 216 * @name Register USBDCD_CONTROL, field START[24] (WORZ)
bogdanm 82:6473597d706e 217 *
bogdanm 82:6473597d706e 218 * Determines whether the charger detection sequence is initiated.
bogdanm 82:6473597d706e 219 *
bogdanm 82:6473597d706e 220 * Values:
bogdanm 82:6473597d706e 221 * - 0 - Do not start the sequence. Writes of this value have no effect.
bogdanm 82:6473597d706e 222 * - 1 - Initiate the charger detection sequence. If the sequence is already
bogdanm 82:6473597d706e 223 * running, writes of this value have no effect.
bogdanm 82:6473597d706e 224 */
bogdanm 82:6473597d706e 225 //@{
bogdanm 82:6473597d706e 226 #define BP_USBDCD_CONTROL_START (24U) //!< Bit position for USBDCD_CONTROL_START.
bogdanm 82:6473597d706e 227 #define BM_USBDCD_CONTROL_START (0x01000000U) //!< Bit mask for USBDCD_CONTROL_START.
bogdanm 82:6473597d706e 228 #define BS_USBDCD_CONTROL_START (1U) //!< Bit field size in bits for USBDCD_CONTROL_START.
bogdanm 82:6473597d706e 229
bogdanm 82:6473597d706e 230 //! @brief Format value for bitfield USBDCD_CONTROL_START.
bogdanm 82:6473597d706e 231 #define BF_USBDCD_CONTROL_START(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_USBDCD_CONTROL_START), uint32_t) & BM_USBDCD_CONTROL_START)
bogdanm 82:6473597d706e 232
bogdanm 82:6473597d706e 233 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 234 //! @brief Set the START field to a new value.
bogdanm 82:6473597d706e 235 #define BW_USBDCD_CONTROL_START(x, v) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_START) = (v))
bogdanm 82:6473597d706e 236 #endif
bogdanm 82:6473597d706e 237 //@}
bogdanm 82:6473597d706e 238
bogdanm 82:6473597d706e 239 /*!
bogdanm 82:6473597d706e 240 * @name Register USBDCD_CONTROL, field SR[25] (WORZ)
bogdanm 82:6473597d706e 241 *
bogdanm 82:6473597d706e 242 * Determines whether a software reset is performed.
bogdanm 82:6473597d706e 243 *
bogdanm 82:6473597d706e 244 * Values:
bogdanm 82:6473597d706e 245 * - 0 - Do not perform a software reset.
bogdanm 82:6473597d706e 246 * - 1 - Perform a software reset.
bogdanm 82:6473597d706e 247 */
bogdanm 82:6473597d706e 248 //@{
bogdanm 82:6473597d706e 249 #define BP_USBDCD_CONTROL_SR (25U) //!< Bit position for USBDCD_CONTROL_SR.
bogdanm 82:6473597d706e 250 #define BM_USBDCD_CONTROL_SR (0x02000000U) //!< Bit mask for USBDCD_CONTROL_SR.
bogdanm 82:6473597d706e 251 #define BS_USBDCD_CONTROL_SR (1U) //!< Bit field size in bits for USBDCD_CONTROL_SR.
bogdanm 82:6473597d706e 252
bogdanm 82:6473597d706e 253 //! @brief Format value for bitfield USBDCD_CONTROL_SR.
bogdanm 82:6473597d706e 254 #define BF_USBDCD_CONTROL_SR(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_USBDCD_CONTROL_SR), uint32_t) & BM_USBDCD_CONTROL_SR)
bogdanm 82:6473597d706e 255
bogdanm 82:6473597d706e 256 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 257 //! @brief Set the SR field to a new value.
bogdanm 82:6473597d706e 258 #define BW_USBDCD_CONTROL_SR(x, v) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_SR) = (v))
bogdanm 82:6473597d706e 259 #endif
bogdanm 82:6473597d706e 260 //@}
bogdanm 82:6473597d706e 261
bogdanm 82:6473597d706e 262 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 263 // HW_USBDCD_CLOCK - Clock register
bogdanm 82:6473597d706e 264 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 265
bogdanm 82:6473597d706e 266 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 267 /*!
bogdanm 82:6473597d706e 268 * @brief HW_USBDCD_CLOCK - Clock register (RW)
bogdanm 82:6473597d706e 269 *
bogdanm 82:6473597d706e 270 * Reset value: 0x000000C1U
bogdanm 82:6473597d706e 271 */
bogdanm 82:6473597d706e 272 typedef union _hw_usbdcd_clock
bogdanm 82:6473597d706e 273 {
bogdanm 82:6473597d706e 274 uint32_t U;
bogdanm 82:6473597d706e 275 struct _hw_usbdcd_clock_bitfields
bogdanm 82:6473597d706e 276 {
bogdanm 82:6473597d706e 277 uint32_t CLOCK_UNIT : 1; //!< [0] Unit of Measurement Encoding for
bogdanm 82:6473597d706e 278 //! Clock Speed
bogdanm 82:6473597d706e 279 uint32_t RESERVED0 : 1; //!< [1]
bogdanm 82:6473597d706e 280 uint32_t CLOCK_SPEED : 10; //!< [11:2] Numerical Value of Clock Speed
bogdanm 82:6473597d706e 281 //! in Binary
bogdanm 82:6473597d706e 282 uint32_t RESERVED1 : 20; //!< [31:12]
bogdanm 82:6473597d706e 283 } B;
bogdanm 82:6473597d706e 284 } hw_usbdcd_clock_t;
bogdanm 82:6473597d706e 285 #endif
bogdanm 82:6473597d706e 286
bogdanm 82:6473597d706e 287 /*!
bogdanm 82:6473597d706e 288 * @name Constants and macros for entire USBDCD_CLOCK register
bogdanm 82:6473597d706e 289 */
bogdanm 82:6473597d706e 290 //@{
bogdanm 82:6473597d706e 291 #define HW_USBDCD_CLOCK_ADDR(x) (REGS_USBDCD_BASE(x) + 0x4U)
bogdanm 82:6473597d706e 292
bogdanm 82:6473597d706e 293 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 294 #define HW_USBDCD_CLOCK(x) (*(__IO hw_usbdcd_clock_t *) HW_USBDCD_CLOCK_ADDR(x))
bogdanm 82:6473597d706e 295 #define HW_USBDCD_CLOCK_RD(x) (HW_USBDCD_CLOCK(x).U)
bogdanm 82:6473597d706e 296 #define HW_USBDCD_CLOCK_WR(x, v) (HW_USBDCD_CLOCK(x).U = (v))
bogdanm 82:6473597d706e 297 #define HW_USBDCD_CLOCK_SET(x, v) (HW_USBDCD_CLOCK_WR(x, HW_USBDCD_CLOCK_RD(x) | (v)))
bogdanm 82:6473597d706e 298 #define HW_USBDCD_CLOCK_CLR(x, v) (HW_USBDCD_CLOCK_WR(x, HW_USBDCD_CLOCK_RD(x) & ~(v)))
bogdanm 82:6473597d706e 299 #define HW_USBDCD_CLOCK_TOG(x, v) (HW_USBDCD_CLOCK_WR(x, HW_USBDCD_CLOCK_RD(x) ^ (v)))
bogdanm 82:6473597d706e 300 #endif
bogdanm 82:6473597d706e 301 //@}
bogdanm 82:6473597d706e 302
bogdanm 82:6473597d706e 303 /*
bogdanm 82:6473597d706e 304 * Constants & macros for individual USBDCD_CLOCK bitfields
bogdanm 82:6473597d706e 305 */
bogdanm 82:6473597d706e 306
bogdanm 82:6473597d706e 307 /*!
bogdanm 82:6473597d706e 308 * @name Register USBDCD_CLOCK, field CLOCK_UNIT[0] (RW)
bogdanm 82:6473597d706e 309 *
bogdanm 82:6473597d706e 310 * Specifies the unit of measure for the clock speed.
bogdanm 82:6473597d706e 311 *
bogdanm 82:6473597d706e 312 * Values:
bogdanm 82:6473597d706e 313 * - 0 - kHz Speed (between 1 kHz and 1023 kHz)
bogdanm 82:6473597d706e 314 * - 1 - MHz Speed (between 1 MHz and 1023 MHz)
bogdanm 82:6473597d706e 315 */
bogdanm 82:6473597d706e 316 //@{
bogdanm 82:6473597d706e 317 #define BP_USBDCD_CLOCK_CLOCK_UNIT (0U) //!< Bit position for USBDCD_CLOCK_CLOCK_UNIT.
bogdanm 82:6473597d706e 318 #define BM_USBDCD_CLOCK_CLOCK_UNIT (0x00000001U) //!< Bit mask for USBDCD_CLOCK_CLOCK_UNIT.
bogdanm 82:6473597d706e 319 #define BS_USBDCD_CLOCK_CLOCK_UNIT (1U) //!< Bit field size in bits for USBDCD_CLOCK_CLOCK_UNIT.
bogdanm 82:6473597d706e 320
bogdanm 82:6473597d706e 321 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 322 //! @brief Read current value of the USBDCD_CLOCK_CLOCK_UNIT field.
bogdanm 82:6473597d706e 323 #define BR_USBDCD_CLOCK_CLOCK_UNIT(x) (BITBAND_ACCESS32(HW_USBDCD_CLOCK_ADDR(x), BP_USBDCD_CLOCK_CLOCK_UNIT))
bogdanm 82:6473597d706e 324 #endif
bogdanm 82:6473597d706e 325
bogdanm 82:6473597d706e 326 //! @brief Format value for bitfield USBDCD_CLOCK_CLOCK_UNIT.
bogdanm 82:6473597d706e 327 #define BF_USBDCD_CLOCK_CLOCK_UNIT(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_USBDCD_CLOCK_CLOCK_UNIT), uint32_t) & BM_USBDCD_CLOCK_CLOCK_UNIT)
bogdanm 82:6473597d706e 328
bogdanm 82:6473597d706e 329 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 330 //! @brief Set the CLOCK_UNIT field to a new value.
bogdanm 82:6473597d706e 331 #define BW_USBDCD_CLOCK_CLOCK_UNIT(x, v) (BITBAND_ACCESS32(HW_USBDCD_CLOCK_ADDR(x), BP_USBDCD_CLOCK_CLOCK_UNIT) = (v))
bogdanm 82:6473597d706e 332 #endif
bogdanm 82:6473597d706e 333 //@}
bogdanm 82:6473597d706e 334
bogdanm 82:6473597d706e 335 /*!
bogdanm 82:6473597d706e 336 * @name Register USBDCD_CLOCK, field CLOCK_SPEED[11:2] (RW)
bogdanm 82:6473597d706e 337 *
bogdanm 82:6473597d706e 338 * The unit of measure is programmed in CLOCK_UNIT. The valid range is from 1 to
bogdanm 82:6473597d706e 339 * 1023 when clock unit is MHz and 4 to 1023 when clock unit is kHz. Examples
bogdanm 82:6473597d706e 340 * with CLOCK_UNIT = 1: For 48 MHz: 0b00_0011_0000 (48) (Default) For 24 MHz:
bogdanm 82:6473597d706e 341 * 0b00_0001_1000 (24) Examples with CLOCK_UNIT = 0: For 100 kHz: 0b00_0110_0100 (100)
bogdanm 82:6473597d706e 342 * For 500 kHz: 0b01_1111_0100 (500)
bogdanm 82:6473597d706e 343 */
bogdanm 82:6473597d706e 344 //@{
bogdanm 82:6473597d706e 345 #define BP_USBDCD_CLOCK_CLOCK_SPEED (2U) //!< Bit position for USBDCD_CLOCK_CLOCK_SPEED.
bogdanm 82:6473597d706e 346 #define BM_USBDCD_CLOCK_CLOCK_SPEED (0x00000FFCU) //!< Bit mask for USBDCD_CLOCK_CLOCK_SPEED.
bogdanm 82:6473597d706e 347 #define BS_USBDCD_CLOCK_CLOCK_SPEED (10U) //!< Bit field size in bits for USBDCD_CLOCK_CLOCK_SPEED.
bogdanm 82:6473597d706e 348
bogdanm 82:6473597d706e 349 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 350 //! @brief Read current value of the USBDCD_CLOCK_CLOCK_SPEED field.
bogdanm 82:6473597d706e 351 #define BR_USBDCD_CLOCK_CLOCK_SPEED(x) (HW_USBDCD_CLOCK(x).B.CLOCK_SPEED)
bogdanm 82:6473597d706e 352 #endif
bogdanm 82:6473597d706e 353
bogdanm 82:6473597d706e 354 //! @brief Format value for bitfield USBDCD_CLOCK_CLOCK_SPEED.
bogdanm 82:6473597d706e 355 #define BF_USBDCD_CLOCK_CLOCK_SPEED(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_USBDCD_CLOCK_CLOCK_SPEED), uint32_t) & BM_USBDCD_CLOCK_CLOCK_SPEED)
bogdanm 82:6473597d706e 356
bogdanm 82:6473597d706e 357 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 358 //! @brief Set the CLOCK_SPEED field to a new value.
bogdanm 82:6473597d706e 359 #define BW_USBDCD_CLOCK_CLOCK_SPEED(x, v) (HW_USBDCD_CLOCK_WR(x, (HW_USBDCD_CLOCK_RD(x) & ~BM_USBDCD_CLOCK_CLOCK_SPEED) | BF_USBDCD_CLOCK_CLOCK_SPEED(v)))
bogdanm 82:6473597d706e 360 #endif
bogdanm 82:6473597d706e 361 //@}
bogdanm 82:6473597d706e 362
bogdanm 82:6473597d706e 363 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 364 // HW_USBDCD_STATUS - Status register
bogdanm 82:6473597d706e 365 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 366
bogdanm 82:6473597d706e 367 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 368 /*!
bogdanm 82:6473597d706e 369 * @brief HW_USBDCD_STATUS - Status register (RO)
bogdanm 82:6473597d706e 370 *
bogdanm 82:6473597d706e 371 * Reset value: 0x00000000U
bogdanm 82:6473597d706e 372 *
bogdanm 82:6473597d706e 373 * Provides the current state of the module for system software monitoring.
bogdanm 82:6473597d706e 374 */
bogdanm 82:6473597d706e 375 typedef union _hw_usbdcd_status
bogdanm 82:6473597d706e 376 {
bogdanm 82:6473597d706e 377 uint32_t U;
bogdanm 82:6473597d706e 378 struct _hw_usbdcd_status_bitfields
bogdanm 82:6473597d706e 379 {
bogdanm 82:6473597d706e 380 uint32_t RESERVED0 : 16; //!< [15:0]
bogdanm 82:6473597d706e 381 uint32_t SEQ_RES : 2; //!< [17:16] Charger Detection Sequence Results
bogdanm 82:6473597d706e 382 uint32_t SEQ_STAT : 2; //!< [19:18] Charger Detection Sequence Status
bogdanm 82:6473597d706e 383 uint32_t ERR : 1; //!< [20] Error Flag
bogdanm 82:6473597d706e 384 uint32_t TO : 1; //!< [21] Timeout Flag
bogdanm 82:6473597d706e 385 uint32_t ACTIVE : 1; //!< [22] Active Status Indicator
bogdanm 82:6473597d706e 386 uint32_t RESERVED1 : 9; //!< [31:23]
bogdanm 82:6473597d706e 387 } B;
bogdanm 82:6473597d706e 388 } hw_usbdcd_status_t;
bogdanm 82:6473597d706e 389 #endif
bogdanm 82:6473597d706e 390
bogdanm 82:6473597d706e 391 /*!
bogdanm 82:6473597d706e 392 * @name Constants and macros for entire USBDCD_STATUS register
bogdanm 82:6473597d706e 393 */
bogdanm 82:6473597d706e 394 //@{
bogdanm 82:6473597d706e 395 #define HW_USBDCD_STATUS_ADDR(x) (REGS_USBDCD_BASE(x) + 0x8U)
bogdanm 82:6473597d706e 396
bogdanm 82:6473597d706e 397 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 398 #define HW_USBDCD_STATUS(x) (*(__I hw_usbdcd_status_t *) HW_USBDCD_STATUS_ADDR(x))
bogdanm 82:6473597d706e 399 #define HW_USBDCD_STATUS_RD(x) (HW_USBDCD_STATUS(x).U)
bogdanm 82:6473597d706e 400 #endif
bogdanm 82:6473597d706e 401 //@}
bogdanm 82:6473597d706e 402
bogdanm 82:6473597d706e 403 /*
bogdanm 82:6473597d706e 404 * Constants & macros for individual USBDCD_STATUS bitfields
bogdanm 82:6473597d706e 405 */
bogdanm 82:6473597d706e 406
bogdanm 82:6473597d706e 407 /*!
bogdanm 82:6473597d706e 408 * @name Register USBDCD_STATUS, field SEQ_RES[17:16] (RO)
bogdanm 82:6473597d706e 409 *
bogdanm 82:6473597d706e 410 * Reports how the charger detection is attached.
bogdanm 82:6473597d706e 411 *
bogdanm 82:6473597d706e 412 * Values:
bogdanm 82:6473597d706e 413 * - 00 - No results to report.
bogdanm 82:6473597d706e 414 * - 01 - Attached to a standard host. Must comply with USB 2.0 by drawing only
bogdanm 82:6473597d706e 415 * 2.5 mA (max) until connected.
bogdanm 82:6473597d706e 416 * - 10 - Attached to a charging port. The exact meaning depends on bit 18: 0:
bogdanm 82:6473597d706e 417 * Attached to either a charging host or a dedicated charger. The charger type
bogdanm 82:6473597d706e 418 * detection has not completed. 1: Attached to a charging host. The charger
bogdanm 82:6473597d706e 419 * type detection has completed.
bogdanm 82:6473597d706e 420 * - 11 - Attached to a dedicated charger.
bogdanm 82:6473597d706e 421 */
bogdanm 82:6473597d706e 422 //@{
bogdanm 82:6473597d706e 423 #define BP_USBDCD_STATUS_SEQ_RES (16U) //!< Bit position for USBDCD_STATUS_SEQ_RES.
bogdanm 82:6473597d706e 424 #define BM_USBDCD_STATUS_SEQ_RES (0x00030000U) //!< Bit mask for USBDCD_STATUS_SEQ_RES.
bogdanm 82:6473597d706e 425 #define BS_USBDCD_STATUS_SEQ_RES (2U) //!< Bit field size in bits for USBDCD_STATUS_SEQ_RES.
bogdanm 82:6473597d706e 426
bogdanm 82:6473597d706e 427 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 428 //! @brief Read current value of the USBDCD_STATUS_SEQ_RES field.
bogdanm 82:6473597d706e 429 #define BR_USBDCD_STATUS_SEQ_RES(x) (HW_USBDCD_STATUS(x).B.SEQ_RES)
bogdanm 82:6473597d706e 430 #endif
bogdanm 82:6473597d706e 431 //@}
bogdanm 82:6473597d706e 432
bogdanm 82:6473597d706e 433 /*!
bogdanm 82:6473597d706e 434 * @name Register USBDCD_STATUS, field SEQ_STAT[19:18] (RO)
bogdanm 82:6473597d706e 435 *
bogdanm 82:6473597d706e 436 * Indicates the status of the charger detection sequence.
bogdanm 82:6473597d706e 437 *
bogdanm 82:6473597d706e 438 * Values:
bogdanm 82:6473597d706e 439 * - 00 - The module is either not enabled, or the module is enabled but the
bogdanm 82:6473597d706e 440 * data pins have not yet been detected.
bogdanm 82:6473597d706e 441 * - 01 - Data pin contact detection is complete.
bogdanm 82:6473597d706e 442 * - 10 - Charging port detection is complete.
bogdanm 82:6473597d706e 443 * - 11 - Charger type detection is complete.
bogdanm 82:6473597d706e 444 */
bogdanm 82:6473597d706e 445 //@{
bogdanm 82:6473597d706e 446 #define BP_USBDCD_STATUS_SEQ_STAT (18U) //!< Bit position for USBDCD_STATUS_SEQ_STAT.
bogdanm 82:6473597d706e 447 #define BM_USBDCD_STATUS_SEQ_STAT (0x000C0000U) //!< Bit mask for USBDCD_STATUS_SEQ_STAT.
bogdanm 82:6473597d706e 448 #define BS_USBDCD_STATUS_SEQ_STAT (2U) //!< Bit field size in bits for USBDCD_STATUS_SEQ_STAT.
bogdanm 82:6473597d706e 449
bogdanm 82:6473597d706e 450 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 451 //! @brief Read current value of the USBDCD_STATUS_SEQ_STAT field.
bogdanm 82:6473597d706e 452 #define BR_USBDCD_STATUS_SEQ_STAT(x) (HW_USBDCD_STATUS(x).B.SEQ_STAT)
bogdanm 82:6473597d706e 453 #endif
bogdanm 82:6473597d706e 454 //@}
bogdanm 82:6473597d706e 455
bogdanm 82:6473597d706e 456 /*!
bogdanm 82:6473597d706e 457 * @name Register USBDCD_STATUS, field ERR[20] (RO)
bogdanm 82:6473597d706e 458 *
bogdanm 82:6473597d706e 459 * Indicates whether there is an error in the detection sequence.
bogdanm 82:6473597d706e 460 *
bogdanm 82:6473597d706e 461 * Values:
bogdanm 82:6473597d706e 462 * - 0 - No sequence errors.
bogdanm 82:6473597d706e 463 * - 1 - Error in the detection sequence. See the SEQ_STAT field to determine
bogdanm 82:6473597d706e 464 * the phase in which the error occurred.
bogdanm 82:6473597d706e 465 */
bogdanm 82:6473597d706e 466 //@{
bogdanm 82:6473597d706e 467 #define BP_USBDCD_STATUS_ERR (20U) //!< Bit position for USBDCD_STATUS_ERR.
bogdanm 82:6473597d706e 468 #define BM_USBDCD_STATUS_ERR (0x00100000U) //!< Bit mask for USBDCD_STATUS_ERR.
bogdanm 82:6473597d706e 469 #define BS_USBDCD_STATUS_ERR (1U) //!< Bit field size in bits for USBDCD_STATUS_ERR.
bogdanm 82:6473597d706e 470
bogdanm 82:6473597d706e 471 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 472 //! @brief Read current value of the USBDCD_STATUS_ERR field.
bogdanm 82:6473597d706e 473 #define BR_USBDCD_STATUS_ERR(x) (BITBAND_ACCESS32(HW_USBDCD_STATUS_ADDR(x), BP_USBDCD_STATUS_ERR))
bogdanm 82:6473597d706e 474 #endif
bogdanm 82:6473597d706e 475 //@}
bogdanm 82:6473597d706e 476
bogdanm 82:6473597d706e 477 /*!
bogdanm 82:6473597d706e 478 * @name Register USBDCD_STATUS, field TO[21] (RO)
bogdanm 82:6473597d706e 479 *
bogdanm 82:6473597d706e 480 * Indicates whether the detection sequence has passed the timeout threshhold.
bogdanm 82:6473597d706e 481 *
bogdanm 82:6473597d706e 482 * Values:
bogdanm 82:6473597d706e 483 * - 0 - The detection sequence has not been running for over 1 s.
bogdanm 82:6473597d706e 484 * - 1 - It has been over 1 s since the data pin contact was detected and
bogdanm 82:6473597d706e 485 * debounced.
bogdanm 82:6473597d706e 486 */
bogdanm 82:6473597d706e 487 //@{
bogdanm 82:6473597d706e 488 #define BP_USBDCD_STATUS_TO (21U) //!< Bit position for USBDCD_STATUS_TO.
bogdanm 82:6473597d706e 489 #define BM_USBDCD_STATUS_TO (0x00200000U) //!< Bit mask for USBDCD_STATUS_TO.
bogdanm 82:6473597d706e 490 #define BS_USBDCD_STATUS_TO (1U) //!< Bit field size in bits for USBDCD_STATUS_TO.
bogdanm 82:6473597d706e 491
bogdanm 82:6473597d706e 492 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 493 //! @brief Read current value of the USBDCD_STATUS_TO field.
bogdanm 82:6473597d706e 494 #define BR_USBDCD_STATUS_TO(x) (BITBAND_ACCESS32(HW_USBDCD_STATUS_ADDR(x), BP_USBDCD_STATUS_TO))
bogdanm 82:6473597d706e 495 #endif
bogdanm 82:6473597d706e 496 //@}
bogdanm 82:6473597d706e 497
bogdanm 82:6473597d706e 498 /*!
bogdanm 82:6473597d706e 499 * @name Register USBDCD_STATUS, field ACTIVE[22] (RO)
bogdanm 82:6473597d706e 500 *
bogdanm 82:6473597d706e 501 * Indicates whether the sequence is running.
bogdanm 82:6473597d706e 502 *
bogdanm 82:6473597d706e 503 * Values:
bogdanm 82:6473597d706e 504 * - 0 - The sequence is not running.
bogdanm 82:6473597d706e 505 * - 1 - The sequence is running.
bogdanm 82:6473597d706e 506 */
bogdanm 82:6473597d706e 507 //@{
bogdanm 82:6473597d706e 508 #define BP_USBDCD_STATUS_ACTIVE (22U) //!< Bit position for USBDCD_STATUS_ACTIVE.
bogdanm 82:6473597d706e 509 #define BM_USBDCD_STATUS_ACTIVE (0x00400000U) //!< Bit mask for USBDCD_STATUS_ACTIVE.
bogdanm 82:6473597d706e 510 #define BS_USBDCD_STATUS_ACTIVE (1U) //!< Bit field size in bits for USBDCD_STATUS_ACTIVE.
bogdanm 82:6473597d706e 511
bogdanm 82:6473597d706e 512 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 513 //! @brief Read current value of the USBDCD_STATUS_ACTIVE field.
bogdanm 82:6473597d706e 514 #define BR_USBDCD_STATUS_ACTIVE(x) (BITBAND_ACCESS32(HW_USBDCD_STATUS_ADDR(x), BP_USBDCD_STATUS_ACTIVE))
bogdanm 82:6473597d706e 515 #endif
bogdanm 82:6473597d706e 516 //@}
bogdanm 82:6473597d706e 517
bogdanm 82:6473597d706e 518 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 519 // HW_USBDCD_TIMER0 - TIMER0 register
bogdanm 82:6473597d706e 520 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 521
bogdanm 82:6473597d706e 522 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 523 /*!
bogdanm 82:6473597d706e 524 * @brief HW_USBDCD_TIMER0 - TIMER0 register (RW)
bogdanm 82:6473597d706e 525 *
bogdanm 82:6473597d706e 526 * Reset value: 0x00100000U
bogdanm 82:6473597d706e 527 *
bogdanm 82:6473597d706e 528 * TIMER0 has an TSEQ_INIT field that represents the system latency in ms.
bogdanm 82:6473597d706e 529 * Latency is measured from the time when VBUS goes active until the time system
bogdanm 82:6473597d706e 530 * software initiates charger detection sequence in USBDCD module. When software sets
bogdanm 82:6473597d706e 531 * the CONTROL[START] bit, the Unit Connection Timer (TUNITCON) is initialized
bogdanm 82:6473597d706e 532 * with the value of TSEQ_INIT. Valid values are 0-1023, however the USB Battery
bogdanm 82:6473597d706e 533 * Charging Specification requires the entire sequence, including TSEQ_INIT, to be
bogdanm 82:6473597d706e 534 * completed in 1s or less.
bogdanm 82:6473597d706e 535 */
bogdanm 82:6473597d706e 536 typedef union _hw_usbdcd_timer0
bogdanm 82:6473597d706e 537 {
bogdanm 82:6473597d706e 538 uint32_t U;
bogdanm 82:6473597d706e 539 struct _hw_usbdcd_timer0_bitfields
bogdanm 82:6473597d706e 540 {
bogdanm 82:6473597d706e 541 uint32_t TUNITCON : 12; //!< [11:0] Unit Connection Timer Elapse (in
bogdanm 82:6473597d706e 542 //! ms)
bogdanm 82:6473597d706e 543 uint32_t RESERVED0 : 4; //!< [15:12]
bogdanm 82:6473597d706e 544 uint32_t TSEQ_INIT : 10; //!< [25:16] Sequence Initiation Time
bogdanm 82:6473597d706e 545 uint32_t RESERVED1 : 6; //!< [31:26]
bogdanm 82:6473597d706e 546 } B;
bogdanm 82:6473597d706e 547 } hw_usbdcd_timer0_t;
bogdanm 82:6473597d706e 548 #endif
bogdanm 82:6473597d706e 549
bogdanm 82:6473597d706e 550 /*!
bogdanm 82:6473597d706e 551 * @name Constants and macros for entire USBDCD_TIMER0 register
bogdanm 82:6473597d706e 552 */
bogdanm 82:6473597d706e 553 //@{
bogdanm 82:6473597d706e 554 #define HW_USBDCD_TIMER0_ADDR(x) (REGS_USBDCD_BASE(x) + 0x10U)
bogdanm 82:6473597d706e 555
bogdanm 82:6473597d706e 556 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 557 #define HW_USBDCD_TIMER0(x) (*(__IO hw_usbdcd_timer0_t *) HW_USBDCD_TIMER0_ADDR(x))
bogdanm 82:6473597d706e 558 #define HW_USBDCD_TIMER0_RD(x) (HW_USBDCD_TIMER0(x).U)
bogdanm 82:6473597d706e 559 #define HW_USBDCD_TIMER0_WR(x, v) (HW_USBDCD_TIMER0(x).U = (v))
bogdanm 82:6473597d706e 560 #define HW_USBDCD_TIMER0_SET(x, v) (HW_USBDCD_TIMER0_WR(x, HW_USBDCD_TIMER0_RD(x) | (v)))
bogdanm 82:6473597d706e 561 #define HW_USBDCD_TIMER0_CLR(x, v) (HW_USBDCD_TIMER0_WR(x, HW_USBDCD_TIMER0_RD(x) & ~(v)))
bogdanm 82:6473597d706e 562 #define HW_USBDCD_TIMER0_TOG(x, v) (HW_USBDCD_TIMER0_WR(x, HW_USBDCD_TIMER0_RD(x) ^ (v)))
bogdanm 82:6473597d706e 563 #endif
bogdanm 82:6473597d706e 564 //@}
bogdanm 82:6473597d706e 565
bogdanm 82:6473597d706e 566 /*
bogdanm 82:6473597d706e 567 * Constants & macros for individual USBDCD_TIMER0 bitfields
bogdanm 82:6473597d706e 568 */
bogdanm 82:6473597d706e 569
bogdanm 82:6473597d706e 570 /*!
bogdanm 82:6473597d706e 571 * @name Register USBDCD_TIMER0, field TUNITCON[11:0] (RO)
bogdanm 82:6473597d706e 572 *
bogdanm 82:6473597d706e 573 * Displays the amount of elapsed time since the event of setting the START bit
bogdanm 82:6473597d706e 574 * plus the value of TSEQ_INIT. The timer is automatically initialized with the
bogdanm 82:6473597d706e 575 * value of TSEQ_INIT before starting to count. This timer enables compliance with
bogdanm 82:6473597d706e 576 * the maximum time allowed to connect T UNIT_CON under the USB Battery Charging
bogdanm 82:6473597d706e 577 * Specification. If the timer reaches the one second limit, the module triggers
bogdanm 82:6473597d706e 578 * an interrupt and sets the error flag STATUS[ERR]. The timer continues
bogdanm 82:6473597d706e 579 * counting throughout the charger detection sequence, even when control has been passed
bogdanm 82:6473597d706e 580 * to software. As long as the module is active, the timer continues to count
bogdanm 82:6473597d706e 581 * until it reaches the maximum value of 0xFFF (4095 ms). The timer does not
bogdanm 82:6473597d706e 582 * rollover to zero. A software reset clears the timer.
bogdanm 82:6473597d706e 583 */
bogdanm 82:6473597d706e 584 //@{
bogdanm 82:6473597d706e 585 #define BP_USBDCD_TIMER0_TUNITCON (0U) //!< Bit position for USBDCD_TIMER0_TUNITCON.
bogdanm 82:6473597d706e 586 #define BM_USBDCD_TIMER0_TUNITCON (0x00000FFFU) //!< Bit mask for USBDCD_TIMER0_TUNITCON.
bogdanm 82:6473597d706e 587 #define BS_USBDCD_TIMER0_TUNITCON (12U) //!< Bit field size in bits for USBDCD_TIMER0_TUNITCON.
bogdanm 82:6473597d706e 588
bogdanm 82:6473597d706e 589 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 590 //! @brief Read current value of the USBDCD_TIMER0_TUNITCON field.
bogdanm 82:6473597d706e 591 #define BR_USBDCD_TIMER0_TUNITCON(x) (HW_USBDCD_TIMER0(x).B.TUNITCON)
bogdanm 82:6473597d706e 592 #endif
bogdanm 82:6473597d706e 593 //@}
bogdanm 82:6473597d706e 594
bogdanm 82:6473597d706e 595 /*!
bogdanm 82:6473597d706e 596 * @name Register USBDCD_TIMER0, field TSEQ_INIT[25:16] (RW)
bogdanm 82:6473597d706e 597 *
bogdanm 82:6473597d706e 598 * TSEQ_INIT represents the system latency (in ms) measured from the time VBUS
bogdanm 82:6473597d706e 599 * goes active to the time system software initiates the charger detection
bogdanm 82:6473597d706e 600 * sequence in the USBDCD module. When software sets the CONTROL[START] bit, the Unit
bogdanm 82:6473597d706e 601 * Connection Timer (TUNITCON) is initialized with the value of TSEQ_INIT. Valid
bogdanm 82:6473597d706e 602 * values are 0-1023, but the USB Battery Charging Specification requires the
bogdanm 82:6473597d706e 603 * entire sequence, including TSEQ_INIT, to be completed in 1s or less.
bogdanm 82:6473597d706e 604 */
bogdanm 82:6473597d706e 605 //@{
bogdanm 82:6473597d706e 606 #define BP_USBDCD_TIMER0_TSEQ_INIT (16U) //!< Bit position for USBDCD_TIMER0_TSEQ_INIT.
bogdanm 82:6473597d706e 607 #define BM_USBDCD_TIMER0_TSEQ_INIT (0x03FF0000U) //!< Bit mask for USBDCD_TIMER0_TSEQ_INIT.
bogdanm 82:6473597d706e 608 #define BS_USBDCD_TIMER0_TSEQ_INIT (10U) //!< Bit field size in bits for USBDCD_TIMER0_TSEQ_INIT.
bogdanm 82:6473597d706e 609
bogdanm 82:6473597d706e 610 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 611 //! @brief Read current value of the USBDCD_TIMER0_TSEQ_INIT field.
bogdanm 82:6473597d706e 612 #define BR_USBDCD_TIMER0_TSEQ_INIT(x) (HW_USBDCD_TIMER0(x).B.TSEQ_INIT)
bogdanm 82:6473597d706e 613 #endif
bogdanm 82:6473597d706e 614
bogdanm 82:6473597d706e 615 //! @brief Format value for bitfield USBDCD_TIMER0_TSEQ_INIT.
bogdanm 82:6473597d706e 616 #define BF_USBDCD_TIMER0_TSEQ_INIT(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_USBDCD_TIMER0_TSEQ_INIT), uint32_t) & BM_USBDCD_TIMER0_TSEQ_INIT)
bogdanm 82:6473597d706e 617
bogdanm 82:6473597d706e 618 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 619 //! @brief Set the TSEQ_INIT field to a new value.
bogdanm 82:6473597d706e 620 #define BW_USBDCD_TIMER0_TSEQ_INIT(x, v) (HW_USBDCD_TIMER0_WR(x, (HW_USBDCD_TIMER0_RD(x) & ~BM_USBDCD_TIMER0_TSEQ_INIT) | BF_USBDCD_TIMER0_TSEQ_INIT(v)))
bogdanm 82:6473597d706e 621 #endif
bogdanm 82:6473597d706e 622 //@}
bogdanm 82:6473597d706e 623
bogdanm 82:6473597d706e 624 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 625 // HW_USBDCD_TIMER1 - TIMER1 register
bogdanm 82:6473597d706e 626 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 627
bogdanm 82:6473597d706e 628 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 629 /*!
bogdanm 82:6473597d706e 630 * @brief HW_USBDCD_TIMER1 - TIMER1 register (RW)
bogdanm 82:6473597d706e 631 *
bogdanm 82:6473597d706e 632 * Reset value: 0x000A0028U
bogdanm 82:6473597d706e 633 *
bogdanm 82:6473597d706e 634 * TIMER1 contains timing parameters. Note that register values can be written
bogdanm 82:6473597d706e 635 * that are not compliant with the USB Battery Charging Specification, so care
bogdanm 82:6473597d706e 636 * should be taken when overwriting the default values.
bogdanm 82:6473597d706e 637 */
bogdanm 82:6473597d706e 638 typedef union _hw_usbdcd_timer1
bogdanm 82:6473597d706e 639 {
bogdanm 82:6473597d706e 640 uint32_t U;
bogdanm 82:6473597d706e 641 struct _hw_usbdcd_timer1_bitfields
bogdanm 82:6473597d706e 642 {
bogdanm 82:6473597d706e 643 uint32_t TVDPSRC_ON : 10; //!< [9:0] Time Period Comparator Enabled
bogdanm 82:6473597d706e 644 uint32_t RESERVED0 : 6; //!< [15:10]
bogdanm 82:6473597d706e 645 uint32_t TDCD_DBNC : 10; //!< [25:16] Time Period to Debounce D+
bogdanm 82:6473597d706e 646 //! Signal
bogdanm 82:6473597d706e 647 uint32_t RESERVED1 : 6; //!< [31:26]
bogdanm 82:6473597d706e 648 } B;
bogdanm 82:6473597d706e 649 } hw_usbdcd_timer1_t;
bogdanm 82:6473597d706e 650 #endif
bogdanm 82:6473597d706e 651
bogdanm 82:6473597d706e 652 /*!
bogdanm 82:6473597d706e 653 * @name Constants and macros for entire USBDCD_TIMER1 register
bogdanm 82:6473597d706e 654 */
bogdanm 82:6473597d706e 655 //@{
bogdanm 82:6473597d706e 656 #define HW_USBDCD_TIMER1_ADDR(x) (REGS_USBDCD_BASE(x) + 0x14U)
bogdanm 82:6473597d706e 657
bogdanm 82:6473597d706e 658 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 659 #define HW_USBDCD_TIMER1(x) (*(__IO hw_usbdcd_timer1_t *) HW_USBDCD_TIMER1_ADDR(x))
bogdanm 82:6473597d706e 660 #define HW_USBDCD_TIMER1_RD(x) (HW_USBDCD_TIMER1(x).U)
bogdanm 82:6473597d706e 661 #define HW_USBDCD_TIMER1_WR(x, v) (HW_USBDCD_TIMER1(x).U = (v))
bogdanm 82:6473597d706e 662 #define HW_USBDCD_TIMER1_SET(x, v) (HW_USBDCD_TIMER1_WR(x, HW_USBDCD_TIMER1_RD(x) | (v)))
bogdanm 82:6473597d706e 663 #define HW_USBDCD_TIMER1_CLR(x, v) (HW_USBDCD_TIMER1_WR(x, HW_USBDCD_TIMER1_RD(x) & ~(v)))
bogdanm 82:6473597d706e 664 #define HW_USBDCD_TIMER1_TOG(x, v) (HW_USBDCD_TIMER1_WR(x, HW_USBDCD_TIMER1_RD(x) ^ (v)))
bogdanm 82:6473597d706e 665 #endif
bogdanm 82:6473597d706e 666 //@}
bogdanm 82:6473597d706e 667
bogdanm 82:6473597d706e 668 /*
bogdanm 82:6473597d706e 669 * Constants & macros for individual USBDCD_TIMER1 bitfields
bogdanm 82:6473597d706e 670 */
bogdanm 82:6473597d706e 671
bogdanm 82:6473597d706e 672 /*!
bogdanm 82:6473597d706e 673 * @name Register USBDCD_TIMER1, field TVDPSRC_ON[9:0] (RW)
bogdanm 82:6473597d706e 674 *
bogdanm 82:6473597d706e 675 * This timing parameter is used after detection of the data pin. See "Charging
bogdanm 82:6473597d706e 676 * Port Detection". Valid values are 1-1023, but the USB Battery Charging
bogdanm 82:6473597d706e 677 * Specification requires a minimum value of 40 ms.
bogdanm 82:6473597d706e 678 */
bogdanm 82:6473597d706e 679 //@{
bogdanm 82:6473597d706e 680 #define BP_USBDCD_TIMER1_TVDPSRC_ON (0U) //!< Bit position for USBDCD_TIMER1_TVDPSRC_ON.
bogdanm 82:6473597d706e 681 #define BM_USBDCD_TIMER1_TVDPSRC_ON (0x000003FFU) //!< Bit mask for USBDCD_TIMER1_TVDPSRC_ON.
bogdanm 82:6473597d706e 682 #define BS_USBDCD_TIMER1_TVDPSRC_ON (10U) //!< Bit field size in bits for USBDCD_TIMER1_TVDPSRC_ON.
bogdanm 82:6473597d706e 683
bogdanm 82:6473597d706e 684 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 685 //! @brief Read current value of the USBDCD_TIMER1_TVDPSRC_ON field.
bogdanm 82:6473597d706e 686 #define BR_USBDCD_TIMER1_TVDPSRC_ON(x) (HW_USBDCD_TIMER1(x).B.TVDPSRC_ON)
bogdanm 82:6473597d706e 687 #endif
bogdanm 82:6473597d706e 688
bogdanm 82:6473597d706e 689 //! @brief Format value for bitfield USBDCD_TIMER1_TVDPSRC_ON.
bogdanm 82:6473597d706e 690 #define BF_USBDCD_TIMER1_TVDPSRC_ON(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_USBDCD_TIMER1_TVDPSRC_ON), uint32_t) & BM_USBDCD_TIMER1_TVDPSRC_ON)
bogdanm 82:6473597d706e 691
bogdanm 82:6473597d706e 692 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 693 //! @brief Set the TVDPSRC_ON field to a new value.
bogdanm 82:6473597d706e 694 #define BW_USBDCD_TIMER1_TVDPSRC_ON(x, v) (HW_USBDCD_TIMER1_WR(x, (HW_USBDCD_TIMER1_RD(x) & ~BM_USBDCD_TIMER1_TVDPSRC_ON) | BF_USBDCD_TIMER1_TVDPSRC_ON(v)))
bogdanm 82:6473597d706e 695 #endif
bogdanm 82:6473597d706e 696 //@}
bogdanm 82:6473597d706e 697
bogdanm 82:6473597d706e 698 /*!
bogdanm 82:6473597d706e 699 * @name Register USBDCD_TIMER1, field TDCD_DBNC[25:16] (RW)
bogdanm 82:6473597d706e 700 *
bogdanm 82:6473597d706e 701 * Sets the time period (ms) to debounce the D+ signal during the data pin
bogdanm 82:6473597d706e 702 * contact detection phase. See "Debouncing the data pin contact" Valid values are
bogdanm 82:6473597d706e 703 * 1-1023, but the USB Battery Charging Specification requires a minimum value of 10
bogdanm 82:6473597d706e 704 * ms.
bogdanm 82:6473597d706e 705 */
bogdanm 82:6473597d706e 706 //@{
bogdanm 82:6473597d706e 707 #define BP_USBDCD_TIMER1_TDCD_DBNC (16U) //!< Bit position for USBDCD_TIMER1_TDCD_DBNC.
bogdanm 82:6473597d706e 708 #define BM_USBDCD_TIMER1_TDCD_DBNC (0x03FF0000U) //!< Bit mask for USBDCD_TIMER1_TDCD_DBNC.
bogdanm 82:6473597d706e 709 #define BS_USBDCD_TIMER1_TDCD_DBNC (10U) //!< Bit field size in bits for USBDCD_TIMER1_TDCD_DBNC.
bogdanm 82:6473597d706e 710
bogdanm 82:6473597d706e 711 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 712 //! @brief Read current value of the USBDCD_TIMER1_TDCD_DBNC field.
bogdanm 82:6473597d706e 713 #define BR_USBDCD_TIMER1_TDCD_DBNC(x) (HW_USBDCD_TIMER1(x).B.TDCD_DBNC)
bogdanm 82:6473597d706e 714 #endif
bogdanm 82:6473597d706e 715
bogdanm 82:6473597d706e 716 //! @brief Format value for bitfield USBDCD_TIMER1_TDCD_DBNC.
bogdanm 82:6473597d706e 717 #define BF_USBDCD_TIMER1_TDCD_DBNC(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_USBDCD_TIMER1_TDCD_DBNC), uint32_t) & BM_USBDCD_TIMER1_TDCD_DBNC)
bogdanm 82:6473597d706e 718
bogdanm 82:6473597d706e 719 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 720 //! @brief Set the TDCD_DBNC field to a new value.
bogdanm 82:6473597d706e 721 #define BW_USBDCD_TIMER1_TDCD_DBNC(x, v) (HW_USBDCD_TIMER1_WR(x, (HW_USBDCD_TIMER1_RD(x) & ~BM_USBDCD_TIMER1_TDCD_DBNC) | BF_USBDCD_TIMER1_TDCD_DBNC(v)))
bogdanm 82:6473597d706e 722 #endif
bogdanm 82:6473597d706e 723 //@}
bogdanm 82:6473597d706e 724
bogdanm 82:6473597d706e 725 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 726 // HW_USBDCD_TIMER2_BC11 - TIMER2_BC11 register
bogdanm 82:6473597d706e 727 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 728
bogdanm 82:6473597d706e 729 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 730 /*!
bogdanm 82:6473597d706e 731 * @brief HW_USBDCD_TIMER2_BC11 - TIMER2_BC11 register (RW)
bogdanm 82:6473597d706e 732 *
bogdanm 82:6473597d706e 733 * Reset value: 0x00280001U
bogdanm 82:6473597d706e 734 *
bogdanm 82:6473597d706e 735 * TIMER2_BC11 contains timing parameters for USB Battery Charging
bogdanm 82:6473597d706e 736 * Specification, v1.1. Register values can be written that are not compliant with the USB
bogdanm 82:6473597d706e 737 * Battery Charging Specification, so care should be taken when overwriting the
bogdanm 82:6473597d706e 738 * default values.
bogdanm 82:6473597d706e 739 */
bogdanm 82:6473597d706e 740 typedef union _hw_usbdcd_timer2_bc11
bogdanm 82:6473597d706e 741 {
bogdanm 82:6473597d706e 742 uint32_t U;
bogdanm 82:6473597d706e 743 struct _hw_usbdcd_timer2_bc11_bitfields
bogdanm 82:6473597d706e 744 {
bogdanm 82:6473597d706e 745 uint32_t CHECK_DM : 4; //!< [3:0] Time Before Check of D- Line
bogdanm 82:6473597d706e 746 uint32_t RESERVED0 : 12; //!< [15:4]
bogdanm 82:6473597d706e 747 uint32_t TVDPSRC_CON : 10; //!< [25:16] Time Period Before Enabling
bogdanm 82:6473597d706e 748 //! D+ Pullup
bogdanm 82:6473597d706e 749 uint32_t RESERVED1 : 6; //!< [31:26]
bogdanm 82:6473597d706e 750 } B;
bogdanm 82:6473597d706e 751 } hw_usbdcd_timer2_bc11_t;
bogdanm 82:6473597d706e 752 #endif
bogdanm 82:6473597d706e 753
bogdanm 82:6473597d706e 754 /*!
bogdanm 82:6473597d706e 755 * @name Constants and macros for entire USBDCD_TIMER2_BC11 register
bogdanm 82:6473597d706e 756 */
bogdanm 82:6473597d706e 757 //@{
bogdanm 82:6473597d706e 758 #define HW_USBDCD_TIMER2_BC11_ADDR(x) (REGS_USBDCD_BASE(x) + 0x18U)
bogdanm 82:6473597d706e 759
bogdanm 82:6473597d706e 760 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 761 #define HW_USBDCD_TIMER2_BC11(x) (*(__IO hw_usbdcd_timer2_bc11_t *) HW_USBDCD_TIMER2_BC11_ADDR(x))
bogdanm 82:6473597d706e 762 #define HW_USBDCD_TIMER2_BC11_RD(x) (HW_USBDCD_TIMER2_BC11(x).U)
bogdanm 82:6473597d706e 763 #define HW_USBDCD_TIMER2_BC11_WR(x, v) (HW_USBDCD_TIMER2_BC11(x).U = (v))
bogdanm 82:6473597d706e 764 #define HW_USBDCD_TIMER2_BC11_SET(x, v) (HW_USBDCD_TIMER2_BC11_WR(x, HW_USBDCD_TIMER2_BC11_RD(x) | (v)))
bogdanm 82:6473597d706e 765 #define HW_USBDCD_TIMER2_BC11_CLR(x, v) (HW_USBDCD_TIMER2_BC11_WR(x, HW_USBDCD_TIMER2_BC11_RD(x) & ~(v)))
bogdanm 82:6473597d706e 766 #define HW_USBDCD_TIMER2_BC11_TOG(x, v) (HW_USBDCD_TIMER2_BC11_WR(x, HW_USBDCD_TIMER2_BC11_RD(x) ^ (v)))
bogdanm 82:6473597d706e 767 #endif
bogdanm 82:6473597d706e 768 //@}
bogdanm 82:6473597d706e 769
bogdanm 82:6473597d706e 770 /*
bogdanm 82:6473597d706e 771 * Constants & macros for individual USBDCD_TIMER2_BC11 bitfields
bogdanm 82:6473597d706e 772 */
bogdanm 82:6473597d706e 773
bogdanm 82:6473597d706e 774 /*!
bogdanm 82:6473597d706e 775 * @name Register USBDCD_TIMER2_BC11, field CHECK_DM[3:0] (RW)
bogdanm 82:6473597d706e 776 *
bogdanm 82:6473597d706e 777 * Sets the amount of time (in ms) that the module waits after the device
bogdanm 82:6473597d706e 778 * connects to the USB bus until checking the state of the D- line to determine the
bogdanm 82:6473597d706e 779 * type of charging port. See "Charger Type Detection." Valid values are 1-15ms.
bogdanm 82:6473597d706e 780 */
bogdanm 82:6473597d706e 781 //@{
bogdanm 82:6473597d706e 782 #define BP_USBDCD_TIMER2_BC11_CHECK_DM (0U) //!< Bit position for USBDCD_TIMER2_BC11_CHECK_DM.
bogdanm 82:6473597d706e 783 #define BM_USBDCD_TIMER2_BC11_CHECK_DM (0x0000000FU) //!< Bit mask for USBDCD_TIMER2_BC11_CHECK_DM.
bogdanm 82:6473597d706e 784 #define BS_USBDCD_TIMER2_BC11_CHECK_DM (4U) //!< Bit field size in bits for USBDCD_TIMER2_BC11_CHECK_DM.
bogdanm 82:6473597d706e 785
bogdanm 82:6473597d706e 786 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 787 //! @brief Read current value of the USBDCD_TIMER2_BC11_CHECK_DM field.
bogdanm 82:6473597d706e 788 #define BR_USBDCD_TIMER2_BC11_CHECK_DM(x) (HW_USBDCD_TIMER2_BC11(x).B.CHECK_DM)
bogdanm 82:6473597d706e 789 #endif
bogdanm 82:6473597d706e 790
bogdanm 82:6473597d706e 791 //! @brief Format value for bitfield USBDCD_TIMER2_BC11_CHECK_DM.
bogdanm 82:6473597d706e 792 #define BF_USBDCD_TIMER2_BC11_CHECK_DM(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_USBDCD_TIMER2_BC11_CHECK_DM), uint32_t) & BM_USBDCD_TIMER2_BC11_CHECK_DM)
bogdanm 82:6473597d706e 793
bogdanm 82:6473597d706e 794 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 795 //! @brief Set the CHECK_DM field to a new value.
bogdanm 82:6473597d706e 796 #define BW_USBDCD_TIMER2_BC11_CHECK_DM(x, v) (HW_USBDCD_TIMER2_BC11_WR(x, (HW_USBDCD_TIMER2_BC11_RD(x) & ~BM_USBDCD_TIMER2_BC11_CHECK_DM) | BF_USBDCD_TIMER2_BC11_CHECK_DM(v)))
bogdanm 82:6473597d706e 797 #endif
bogdanm 82:6473597d706e 798 //@}
bogdanm 82:6473597d706e 799
bogdanm 82:6473597d706e 800 /*!
bogdanm 82:6473597d706e 801 * @name Register USBDCD_TIMER2_BC11, field TVDPSRC_CON[25:16] (RW)
bogdanm 82:6473597d706e 802 *
bogdanm 82:6473597d706e 803 * Sets the time period (ms) that the module waits after charging port detection
bogdanm 82:6473597d706e 804 * before system software must enable the D+ pullup to connect to the USB host.
bogdanm 82:6473597d706e 805 * Valid values are 1-1023, but the USB Battery Charging Specification requires a
bogdanm 82:6473597d706e 806 * minimum value of 40 ms.
bogdanm 82:6473597d706e 807 */
bogdanm 82:6473597d706e 808 //@{
bogdanm 82:6473597d706e 809 #define BP_USBDCD_TIMER2_BC11_TVDPSRC_CON (16U) //!< Bit position for USBDCD_TIMER2_BC11_TVDPSRC_CON.
bogdanm 82:6473597d706e 810 #define BM_USBDCD_TIMER2_BC11_TVDPSRC_CON (0x03FF0000U) //!< Bit mask for USBDCD_TIMER2_BC11_TVDPSRC_CON.
bogdanm 82:6473597d706e 811 #define BS_USBDCD_TIMER2_BC11_TVDPSRC_CON (10U) //!< Bit field size in bits for USBDCD_TIMER2_BC11_TVDPSRC_CON.
bogdanm 82:6473597d706e 812
bogdanm 82:6473597d706e 813 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 814 //! @brief Read current value of the USBDCD_TIMER2_BC11_TVDPSRC_CON field.
bogdanm 82:6473597d706e 815 #define BR_USBDCD_TIMER2_BC11_TVDPSRC_CON(x) (HW_USBDCD_TIMER2_BC11(x).B.TVDPSRC_CON)
bogdanm 82:6473597d706e 816 #endif
bogdanm 82:6473597d706e 817
bogdanm 82:6473597d706e 818 //! @brief Format value for bitfield USBDCD_TIMER2_BC11_TVDPSRC_CON.
bogdanm 82:6473597d706e 819 #define BF_USBDCD_TIMER2_BC11_TVDPSRC_CON(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_USBDCD_TIMER2_BC11_TVDPSRC_CON), uint32_t) & BM_USBDCD_TIMER2_BC11_TVDPSRC_CON)
bogdanm 82:6473597d706e 820
bogdanm 82:6473597d706e 821 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 822 //! @brief Set the TVDPSRC_CON field to a new value.
bogdanm 82:6473597d706e 823 #define BW_USBDCD_TIMER2_BC11_TVDPSRC_CON(x, v) (HW_USBDCD_TIMER2_BC11_WR(x, (HW_USBDCD_TIMER2_BC11_RD(x) & ~BM_USBDCD_TIMER2_BC11_TVDPSRC_CON) | BF_USBDCD_TIMER2_BC11_TVDPSRC_CON(v)))
bogdanm 82:6473597d706e 824 #endif
bogdanm 82:6473597d706e 825 //@}
bogdanm 82:6473597d706e 826 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 827 // HW_USBDCD_TIMER2_BC12 - TIMER2_BC12 register
bogdanm 82:6473597d706e 828 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 829
bogdanm 82:6473597d706e 830 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 831 /*!
bogdanm 82:6473597d706e 832 * @brief HW_USBDCD_TIMER2_BC12 - TIMER2_BC12 register (RW)
bogdanm 82:6473597d706e 833 *
bogdanm 82:6473597d706e 834 * Reset value: 0x00010028U
bogdanm 82:6473597d706e 835 *
bogdanm 82:6473597d706e 836 * TIMER2_BC12 contains timing parameters for USB Battery Charging
bogdanm 82:6473597d706e 837 * Specification, v1.2. Register values can be written that are not compliant with the USB
bogdanm 82:6473597d706e 838 * Battery Charging Specification, so care should be taken when overwriting the
bogdanm 82:6473597d706e 839 * default values.
bogdanm 82:6473597d706e 840 */
bogdanm 82:6473597d706e 841 typedef union _hw_usbdcd_timer2_bc12
bogdanm 82:6473597d706e 842 {
bogdanm 82:6473597d706e 843 uint32_t U;
bogdanm 82:6473597d706e 844 struct _hw_usbdcd_timer2_bc12_bitfields
bogdanm 82:6473597d706e 845 {
bogdanm 82:6473597d706e 846 uint32_t TVDMSRC_ON : 10; //!< [9:0]
bogdanm 82:6473597d706e 847 uint32_t RESERVED0 : 6; //!< [15:10]
bogdanm 82:6473597d706e 848 uint32_t TWAIT_AFTER_PRD : 10; //!< [25:16]
bogdanm 82:6473597d706e 849 uint32_t RESERVED1 : 6; //!< [31:26]
bogdanm 82:6473597d706e 850 } B;
bogdanm 82:6473597d706e 851 } hw_usbdcd_timer2_bc12_t;
bogdanm 82:6473597d706e 852 #endif
bogdanm 82:6473597d706e 853
bogdanm 82:6473597d706e 854 /*!
bogdanm 82:6473597d706e 855 * @name Constants and macros for entire USBDCD_TIMER2_BC12 register
bogdanm 82:6473597d706e 856 */
bogdanm 82:6473597d706e 857 //@{
bogdanm 82:6473597d706e 858 #define HW_USBDCD_TIMER2_BC12_ADDR(x) (REGS_USBDCD_BASE(x) + 0x18U)
bogdanm 82:6473597d706e 859
bogdanm 82:6473597d706e 860 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 861 #define HW_USBDCD_TIMER2_BC12(x) (*(__IO hw_usbdcd_timer2_bc12_t *) HW_USBDCD_TIMER2_BC12_ADDR(x))
bogdanm 82:6473597d706e 862 #define HW_USBDCD_TIMER2_BC12_RD(x) (HW_USBDCD_TIMER2_BC12(x).U)
bogdanm 82:6473597d706e 863 #define HW_USBDCD_TIMER2_BC12_WR(x, v) (HW_USBDCD_TIMER2_BC12(x).U = (v))
bogdanm 82:6473597d706e 864 #define HW_USBDCD_TIMER2_BC12_SET(x, v) (HW_USBDCD_TIMER2_BC12_WR(x, HW_USBDCD_TIMER2_BC12_RD(x) | (v)))
bogdanm 82:6473597d706e 865 #define HW_USBDCD_TIMER2_BC12_CLR(x, v) (HW_USBDCD_TIMER2_BC12_WR(x, HW_USBDCD_TIMER2_BC12_RD(x) & ~(v)))
bogdanm 82:6473597d706e 866 #define HW_USBDCD_TIMER2_BC12_TOG(x, v) (HW_USBDCD_TIMER2_BC12_WR(x, HW_USBDCD_TIMER2_BC12_RD(x) ^ (v)))
bogdanm 82:6473597d706e 867 #endif
bogdanm 82:6473597d706e 868 //@}
bogdanm 82:6473597d706e 869
bogdanm 82:6473597d706e 870 /*
bogdanm 82:6473597d706e 871 * Constants & macros for individual USBDCD_TIMER2_BC12 bitfields
bogdanm 82:6473597d706e 872 */
bogdanm 82:6473597d706e 873
bogdanm 82:6473597d706e 874 /*!
bogdanm 82:6473597d706e 875 * @name Register USBDCD_TIMER2_BC12, field TVDMSRC_ON[9:0] (RW)
bogdanm 82:6473597d706e 876 *
bogdanm 82:6473597d706e 877 * Sets the amount of time (in ms) that the module enables the VDM_SRC. Valid
bogdanm 82:6473597d706e 878 * values are 0-40ms.
bogdanm 82:6473597d706e 879 */
bogdanm 82:6473597d706e 880 //@{
bogdanm 82:6473597d706e 881 #define BP_USBDCD_TIMER2_BC12_TVDMSRC_ON (0U) //!< Bit position for USBDCD_TIMER2_BC12_TVDMSRC_ON.
bogdanm 82:6473597d706e 882 #define BM_USBDCD_TIMER2_BC12_TVDMSRC_ON (0x000003FFU) //!< Bit mask for USBDCD_TIMER2_BC12_TVDMSRC_ON.
bogdanm 82:6473597d706e 883 #define BS_USBDCD_TIMER2_BC12_TVDMSRC_ON (10U) //!< Bit field size in bits for USBDCD_TIMER2_BC12_TVDMSRC_ON.
bogdanm 82:6473597d706e 884
bogdanm 82:6473597d706e 885 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 886 //! @brief Read current value of the USBDCD_TIMER2_BC12_TVDMSRC_ON field.
bogdanm 82:6473597d706e 887 #define BR_USBDCD_TIMER2_BC12_TVDMSRC_ON(x) (HW_USBDCD_TIMER2_BC12(x).B.TVDMSRC_ON)
bogdanm 82:6473597d706e 888 #endif
bogdanm 82:6473597d706e 889
bogdanm 82:6473597d706e 890 //! @brief Format value for bitfield USBDCD_TIMER2_BC12_TVDMSRC_ON.
bogdanm 82:6473597d706e 891 #define BF_USBDCD_TIMER2_BC12_TVDMSRC_ON(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_USBDCD_TIMER2_BC12_TVDMSRC_ON), uint32_t) & BM_USBDCD_TIMER2_BC12_TVDMSRC_ON)
bogdanm 82:6473597d706e 892
bogdanm 82:6473597d706e 893 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 894 //! @brief Set the TVDMSRC_ON field to a new value.
bogdanm 82:6473597d706e 895 #define BW_USBDCD_TIMER2_BC12_TVDMSRC_ON(x, v) (HW_USBDCD_TIMER2_BC12_WR(x, (HW_USBDCD_TIMER2_BC12_RD(x) & ~BM_USBDCD_TIMER2_BC12_TVDMSRC_ON) | BF_USBDCD_TIMER2_BC12_TVDMSRC_ON(v)))
bogdanm 82:6473597d706e 896 #endif
bogdanm 82:6473597d706e 897 //@}
bogdanm 82:6473597d706e 898
bogdanm 82:6473597d706e 899 /*!
bogdanm 82:6473597d706e 900 * @name Register USBDCD_TIMER2_BC12, field TWAIT_AFTER_PRD[25:16] (RW)
bogdanm 82:6473597d706e 901 *
bogdanm 82:6473597d706e 902 * Sets the amount of time (in ms) that the module waits after primary detection
bogdanm 82:6473597d706e 903 * before start to secondary detection. Valid values are 1-1023ms. Default is
bogdanm 82:6473597d706e 904 * 1ms.
bogdanm 82:6473597d706e 905 */
bogdanm 82:6473597d706e 906 //@{
bogdanm 82:6473597d706e 907 #define BP_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD (16U) //!< Bit position for USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD.
bogdanm 82:6473597d706e 908 #define BM_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD (0x03FF0000U) //!< Bit mask for USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD.
bogdanm 82:6473597d706e 909 #define BS_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD (10U) //!< Bit field size in bits for USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD.
bogdanm 82:6473597d706e 910
bogdanm 82:6473597d706e 911 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 912 //! @brief Read current value of the USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD field.
bogdanm 82:6473597d706e 913 #define BR_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD(x) (HW_USBDCD_TIMER2_BC12(x).B.TWAIT_AFTER_PRD)
bogdanm 82:6473597d706e 914 #endif
bogdanm 82:6473597d706e 915
bogdanm 82:6473597d706e 916 //! @brief Format value for bitfield USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD.
bogdanm 82:6473597d706e 917 #define BF_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD), uint32_t) & BM_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD)
bogdanm 82:6473597d706e 918
bogdanm 82:6473597d706e 919 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 920 //! @brief Set the TWAIT_AFTER_PRD field to a new value.
bogdanm 82:6473597d706e 921 #define BW_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD(x, v) (HW_USBDCD_TIMER2_BC12_WR(x, (HW_USBDCD_TIMER2_BC12_RD(x) & ~BM_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD) | BF_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD(v)))
bogdanm 82:6473597d706e 922 #endif
bogdanm 82:6473597d706e 923 //@}
bogdanm 82:6473597d706e 924
bogdanm 82:6473597d706e 925 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 926 // hw_usbdcd_t - module struct
bogdanm 82:6473597d706e 927 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 928 /*!
bogdanm 82:6473597d706e 929 * @brief All USBDCD module registers.
bogdanm 82:6473597d706e 930 */
bogdanm 82:6473597d706e 931 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 932 #pragma pack(1)
bogdanm 82:6473597d706e 933 typedef struct _hw_usbdcd
bogdanm 82:6473597d706e 934 {
bogdanm 82:6473597d706e 935 __IO hw_usbdcd_control_t CONTROL; //!< [0x0] Control register
bogdanm 82:6473597d706e 936 __IO hw_usbdcd_clock_t CLOCK; //!< [0x4] Clock register
bogdanm 82:6473597d706e 937 __I hw_usbdcd_status_t STATUS; //!< [0x8] Status register
bogdanm 82:6473597d706e 938 uint8_t _reserved0[4];
bogdanm 82:6473597d706e 939 __IO hw_usbdcd_timer0_t TIMER0; //!< [0x10] TIMER0 register
bogdanm 82:6473597d706e 940 __IO hw_usbdcd_timer1_t TIMER1; //!< [0x14] TIMER1 register
bogdanm 82:6473597d706e 941 union {
bogdanm 82:6473597d706e 942 __IO hw_usbdcd_timer2_bc11_t TIMER2_BC11; //!< [0x18] TIMER2_BC11 register
bogdanm 82:6473597d706e 943 __IO hw_usbdcd_timer2_bc12_t TIMER2_BC12; //!< [0x18] TIMER2_BC12 register
bogdanm 82:6473597d706e 944 };
bogdanm 82:6473597d706e 945 } hw_usbdcd_t;
bogdanm 82:6473597d706e 946 #pragma pack()
bogdanm 82:6473597d706e 947
bogdanm 82:6473597d706e 948 //! @brief Macro to access all USBDCD registers.
bogdanm 82:6473597d706e 949 //! @param x USBDCD instance number.
bogdanm 82:6473597d706e 950 //! @return Reference (not a pointer) to the registers struct. To get a pointer to the struct,
bogdanm 82:6473597d706e 951 //! use the '&' operator, like <code>&HW_USBDCD(0)</code>.
bogdanm 82:6473597d706e 952 #define HW_USBDCD(x) (*(hw_usbdcd_t *) REGS_USBDCD_BASE(x))
bogdanm 82:6473597d706e 953 #endif
bogdanm 82:6473597d706e 954
bogdanm 82:6473597d706e 955 #endif // __HW_USBDCD_REGISTERS_H__
bogdanm 82:6473597d706e 956 // v22/130726/0.9
bogdanm 82:6473597d706e 957 // EOF