V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_mat_scale_q15.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Multiplies a Q15 matrix by a scalar.
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * -------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41 #include "arm_math.h"
emh203 0:3d9c67d97d6f 42
emh203 0:3d9c67d97d6f 43 /**
emh203 0:3d9c67d97d6f 44 * @ingroup groupMatrix
emh203 0:3d9c67d97d6f 45 */
emh203 0:3d9c67d97d6f 46
emh203 0:3d9c67d97d6f 47 /**
emh203 0:3d9c67d97d6f 48 * @addtogroup MatrixScale
emh203 0:3d9c67d97d6f 49 * @{
emh203 0:3d9c67d97d6f 50 */
emh203 0:3d9c67d97d6f 51
emh203 0:3d9c67d97d6f 52 /**
emh203 0:3d9c67d97d6f 53 * @brief Q15 matrix scaling.
emh203 0:3d9c67d97d6f 54 * @param[in] *pSrc points to input matrix
emh203 0:3d9c67d97d6f 55 * @param[in] scaleFract fractional portion of the scale factor
emh203 0:3d9c67d97d6f 56 * @param[in] shift number of bits to shift the result by
emh203 0:3d9c67d97d6f 57 * @param[out] *pDst points to output matrix structure
emh203 0:3d9c67d97d6f 58 * @return The function returns either
emh203 0:3d9c67d97d6f 59 * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
emh203 0:3d9c67d97d6f 60 *
emh203 0:3d9c67d97d6f 61 * @details
emh203 0:3d9c67d97d6f 62 * <b>Scaling and Overflow Behavior:</b>
emh203 0:3d9c67d97d6f 63 * \par
emh203 0:3d9c67d97d6f 64 * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format.
emh203 0:3d9c67d97d6f 65 * These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
emh203 0:3d9c67d97d6f 66 */
emh203 0:3d9c67d97d6f 67
emh203 0:3d9c67d97d6f 68 arm_status arm_mat_scale_q15(
emh203 0:3d9c67d97d6f 69 const arm_matrix_instance_q15 * pSrc,
emh203 0:3d9c67d97d6f 70 q15_t scaleFract,
emh203 0:3d9c67d97d6f 71 int32_t shift,
emh203 0:3d9c67d97d6f 72 arm_matrix_instance_q15 * pDst)
emh203 0:3d9c67d97d6f 73 {
emh203 0:3d9c67d97d6f 74 q15_t *pIn = pSrc->pData; /* input data matrix pointer */
emh203 0:3d9c67d97d6f 75 q15_t *pOut = pDst->pData; /* output data matrix pointer */
emh203 0:3d9c67d97d6f 76 uint32_t numSamples; /* total number of elements in the matrix */
emh203 0:3d9c67d97d6f 77 int32_t totShift = 15 - shift; /* total shift to apply after scaling */
emh203 0:3d9c67d97d6f 78 uint32_t blkCnt; /* loop counters */
emh203 0:3d9c67d97d6f 79 arm_status status; /* status of matrix scaling */
emh203 0:3d9c67d97d6f 80
emh203 0:3d9c67d97d6f 81 #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 82
emh203 0:3d9c67d97d6f 83 q15_t in1, in2, in3, in4;
emh203 0:3d9c67d97d6f 84 q31_t out1, out2, out3, out4;
emh203 0:3d9c67d97d6f 85 q31_t inA1, inA2;
emh203 0:3d9c67d97d6f 86
emh203 0:3d9c67d97d6f 87 #endif // #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 88
emh203 0:3d9c67d97d6f 89 #ifdef ARM_MATH_MATRIX_CHECK
emh203 0:3d9c67d97d6f 90 /* Check for matrix mismatch */
emh203 0:3d9c67d97d6f 91 if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
emh203 0:3d9c67d97d6f 92 {
emh203 0:3d9c67d97d6f 93 /* Set status as ARM_MATH_SIZE_MISMATCH */
emh203 0:3d9c67d97d6f 94 status = ARM_MATH_SIZE_MISMATCH;
emh203 0:3d9c67d97d6f 95 }
emh203 0:3d9c67d97d6f 96 else
emh203 0:3d9c67d97d6f 97 #endif // #ifdef ARM_MATH_MATRIX_CHECK
emh203 0:3d9c67d97d6f 98 {
emh203 0:3d9c67d97d6f 99 /* Total number of samples in the input matrix */
emh203 0:3d9c67d97d6f 100 numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
emh203 0:3d9c67d97d6f 101
emh203 0:3d9c67d97d6f 102 #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 103
emh203 0:3d9c67d97d6f 104 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 105 /* Loop Unrolling */
emh203 0:3d9c67d97d6f 106 blkCnt = numSamples >> 2;
emh203 0:3d9c67d97d6f 107
emh203 0:3d9c67d97d6f 108 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emh203 0:3d9c67d97d6f 109 ** a second loop below computes the remaining 1 to 3 samples. */
emh203 0:3d9c67d97d6f 110 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 111 {
emh203 0:3d9c67d97d6f 112 /* C(m,n) = A(m,n) * k */
emh203 0:3d9c67d97d6f 113 /* Scale, saturate and then store the results in the destination buffer. */
emh203 0:3d9c67d97d6f 114 /* Reading 2 inputs from memory */
emh203 0:3d9c67d97d6f 115 inA1 = _SIMD32_OFFSET(pIn);
emh203 0:3d9c67d97d6f 116 inA2 = _SIMD32_OFFSET(pIn + 2);
emh203 0:3d9c67d97d6f 117
emh203 0:3d9c67d97d6f 118 /* C = A * scale */
emh203 0:3d9c67d97d6f 119 /* Scale the inputs and then store the 2 results in the destination buffer
emh203 0:3d9c67d97d6f 120 * in single cycle by packing the outputs */
emh203 0:3d9c67d97d6f 121 out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract);
emh203 0:3d9c67d97d6f 122 out2 = (q31_t) ((q15_t) inA1 * scaleFract);
emh203 0:3d9c67d97d6f 123 out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract);
emh203 0:3d9c67d97d6f 124 out4 = (q31_t) ((q15_t) inA2 * scaleFract);
emh203 0:3d9c67d97d6f 125
emh203 0:3d9c67d97d6f 126 out1 = out1 >> totShift;
emh203 0:3d9c67d97d6f 127 inA1 = _SIMD32_OFFSET(pIn + 4);
emh203 0:3d9c67d97d6f 128 out2 = out2 >> totShift;
emh203 0:3d9c67d97d6f 129 inA2 = _SIMD32_OFFSET(pIn + 6);
emh203 0:3d9c67d97d6f 130 out3 = out3 >> totShift;
emh203 0:3d9c67d97d6f 131 out4 = out4 >> totShift;
emh203 0:3d9c67d97d6f 132
emh203 0:3d9c67d97d6f 133 in1 = (q15_t) (__SSAT(out1, 16));
emh203 0:3d9c67d97d6f 134 in2 = (q15_t) (__SSAT(out2, 16));
emh203 0:3d9c67d97d6f 135 in3 = (q15_t) (__SSAT(out3, 16));
emh203 0:3d9c67d97d6f 136 in4 = (q15_t) (__SSAT(out4, 16));
emh203 0:3d9c67d97d6f 137
emh203 0:3d9c67d97d6f 138 _SIMD32_OFFSET(pOut) = __PKHBT(in2, in1, 16);
emh203 0:3d9c67d97d6f 139 _SIMD32_OFFSET(pOut + 2) = __PKHBT(in4, in3, 16);
emh203 0:3d9c67d97d6f 140
emh203 0:3d9c67d97d6f 141 /* update pointers to process next sampels */
emh203 0:3d9c67d97d6f 142 pIn += 4u;
emh203 0:3d9c67d97d6f 143 pOut += 4u;
emh203 0:3d9c67d97d6f 144
emh203 0:3d9c67d97d6f 145
emh203 0:3d9c67d97d6f 146 /* Decrement the numSamples loop counter */
emh203 0:3d9c67d97d6f 147 blkCnt--;
emh203 0:3d9c67d97d6f 148 }
emh203 0:3d9c67d97d6f 149
emh203 0:3d9c67d97d6f 150 /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
emh203 0:3d9c67d97d6f 151 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 152 blkCnt = numSamples % 0x4u;
emh203 0:3d9c67d97d6f 153
emh203 0:3d9c67d97d6f 154 #else
emh203 0:3d9c67d97d6f 155
emh203 0:3d9c67d97d6f 156 /* Run the below code for Cortex-M0 */
emh203 0:3d9c67d97d6f 157
emh203 0:3d9c67d97d6f 158 /* Initialize blkCnt with number of samples */
emh203 0:3d9c67d97d6f 159 blkCnt = numSamples;
emh203 0:3d9c67d97d6f 160
emh203 0:3d9c67d97d6f 161 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emh203 0:3d9c67d97d6f 162
emh203 0:3d9c67d97d6f 163 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 164 {
emh203 0:3d9c67d97d6f 165 /* C(m,n) = A(m,n) * k */
emh203 0:3d9c67d97d6f 166 /* Scale, saturate and then store the results in the destination buffer. */
emh203 0:3d9c67d97d6f 167 *pOut++ =
emh203 0:3d9c67d97d6f 168 (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16));
emh203 0:3d9c67d97d6f 169
emh203 0:3d9c67d97d6f 170 /* Decrement the numSamples loop counter */
emh203 0:3d9c67d97d6f 171 blkCnt--;
emh203 0:3d9c67d97d6f 172 }
emh203 0:3d9c67d97d6f 173 /* Set status as ARM_MATH_SUCCESS */
emh203 0:3d9c67d97d6f 174 status = ARM_MATH_SUCCESS;
emh203 0:3d9c67d97d6f 175 }
emh203 0:3d9c67d97d6f 176
emh203 0:3d9c67d97d6f 177 /* Return to application */
emh203 0:3d9c67d97d6f 178 return (status);
emh203 0:3d9c67d97d6f 179 }
emh203 0:3d9c67d97d6f 180
emh203 0:3d9c67d97d6f 181 /**
emh203 0:3d9c67d97d6f 182 * @} end of MatrixScale group
emh203 0:3d9c67d97d6f 183 */