Eli Hughes / CMSIS_DSP_401

V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

MatrixFunctions/arm_mat_cmplx_mult_q15.c@0:3d9c67d97d6f, 2014-07-28 (annotated)

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_cmplx_mat_mult_q15.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Q15 complex matrix multiplication.
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * -------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40 #include "arm_math.h"
emh203 0:3d9c67d97d6f 41
emh203 0:3d9c67d97d6f 42 /**
emh203 0:3d9c67d97d6f 43 * @ingroup groupMatrix
emh203 0:3d9c67d97d6f 44 */
emh203 0:3d9c67d97d6f 45
emh203 0:3d9c67d97d6f 46 /**
emh203 0:3d9c67d97d6f 47 * @addtogroup CmplxMatrixMult
emh203 0:3d9c67d97d6f 48 * @{
emh203 0:3d9c67d97d6f 49 */
emh203 0:3d9c67d97d6f 50
emh203 0:3d9c67d97d6f 51
emh203 0:3d9c67d97d6f 52 /**
emh203 0:3d9c67d97d6f 53 * @brief Q15 Complex matrix multiplication
emh203 0:3d9c67d97d6f 54 * @param[in] *pSrcA points to the first input complex matrix structure
emh203 0:3d9c67d97d6f 55 * @param[in] *pSrcB points to the second input complex matrix structure
emh203 0:3d9c67d97d6f 56 * @param[out] *pDst points to output complex matrix structure
emh203 0:3d9c67d97d6f 57 * @param[in] *pScratch points to the array for storing intermediate results
emh203 0:3d9c67d97d6f 58 * @return The function returns either
emh203 0:3d9c67d97d6f 59 * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
emh203 0:3d9c67d97d6f 60 *
emh203 0:3d9c67d97d6f 61 * \par Conditions for optimum performance
emh203 0:3d9c67d97d6f 62 * Input, output and state buffers should be aligned by 32-bit
emh203 0:3d9c67d97d6f 63 *
emh203 0:3d9c67d97d6f 64 * \par Restrictions
emh203 0:3d9c67d97d6f 65 * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
emh203 0:3d9c67d97d6f 66 * In this case input, output, scratch buffers should be aligned by 32-bit
emh203 0:3d9c67d97d6f 67 *
emh203 0:3d9c67d97d6f 68 * @details
emh203 0:3d9c67d97d6f 69 * <b>Scaling and Overflow Behavior:</b>
emh203 0:3d9c67d97d6f 70 *
emh203 0:3d9c67d97d6f 71 * \par
emh203 0:3d9c67d97d6f 72 * The function is implemented using a 64-bit internal accumulator. The inputs to the
emh203 0:3d9c67d97d6f 73 * multiplications are in 1.15 format and multiplications yield a 2.30 result.
emh203 0:3d9c67d97d6f 74 * The 2.30 intermediate
emh203 0:3d9c67d97d6f 75 * results are accumulated in a 64-bit accumulator in 34.30 format. This approach
emh203 0:3d9c67d97d6f 76 * provides 33 guard bits and there is no risk of overflow. The 34.30 result is then
emh203 0:3d9c67d97d6f 77 * truncated to 34.15 format by discarding the low 15 bits and then saturated to
emh203 0:3d9c67d97d6f 78 * 1.15 format.
emh203 0:3d9c67d97d6f 79 *
emh203 0:3d9c67d97d6f 80 * \par
emh203 0:3d9c67d97d6f 81 * Refer to <code>arm_mat_mult_fast_q15()</code> for a faster but less precise version of this function.
emh203 0:3d9c67d97d6f 82 *
emh203 0:3d9c67d97d6f 83 */
emh203 0:3d9c67d97d6f 84
emh203 0:3d9c67d97d6f 85
emh203 0:3d9c67d97d6f 86
emh203 0:3d9c67d97d6f 87
emh203 0:3d9c67d97d6f 88 arm_status arm_mat_cmplx_mult_q15(
emh203 0:3d9c67d97d6f 89 const arm_matrix_instance_q15 * pSrcA,
emh203 0:3d9c67d97d6f 90 const arm_matrix_instance_q15 * pSrcB,
emh203 0:3d9c67d97d6f 91 arm_matrix_instance_q15 * pDst,
emh203 0:3d9c67d97d6f 92 q15_t * pScratch)
emh203 0:3d9c67d97d6f 93 {
emh203 0:3d9c67d97d6f 94 /* accumulator */
emh203 0:3d9c67d97d6f 95 q15_t *pSrcBT = pScratch; /* input data matrix pointer for transpose */
emh203 0:3d9c67d97d6f 96 q15_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type */
emh203 0:3d9c67d97d6f 97 q15_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type */
emh203 0:3d9c67d97d6f 98 q15_t *px; /* Temporary output data matrix pointer */
emh203 0:3d9c67d97d6f 99 uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
emh203 0:3d9c67d97d6f 100 uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
emh203 0:3d9c67d97d6f 101 uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
emh203 0:3d9c67d97d6f 102 uint16_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */
emh203 0:3d9c67d97d6f 103 uint16_t col, i = 0u, row = numRowsB, colCnt; /* loop counters */
emh203 0:3d9c67d97d6f 104 arm_status status; /* status of matrix multiplication */
emh203 0:3d9c67d97d6f 105 q63_t sumReal, sumImag;
emh203 0:3d9c67d97d6f 106
emh203 0:3d9c67d97d6f 107 #ifdef UNALIGNED_SUPPORT_DISABLE
emh203 0:3d9c67d97d6f 108 q15_t in; /* Temporary variable to hold the input value */
emh203 0:3d9c67d97d6f 109 q15_t a, b, c, d;
emh203 0:3d9c67d97d6f 110 #else
emh203 0:3d9c67d97d6f 111 q31_t in; /* Temporary variable to hold the input value */
emh203 0:3d9c67d97d6f 112 q31_t prod1, prod2;
emh203 0:3d9c67d97d6f 113 q31_t pSourceA, pSourceB;
emh203 0:3d9c67d97d6f 114 #endif
emh203 0:3d9c67d97d6f 115
emh203 0:3d9c67d97d6f 116 #ifdef ARM_MATH_MATRIX_CHECK
emh203 0:3d9c67d97d6f 117 /* Check for matrix mismatch condition */
emh203 0:3d9c67d97d6f 118 if((pSrcA->numCols != pSrcB->numRows) ||
emh203 0:3d9c67d97d6f 119 (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
emh203 0:3d9c67d97d6f 120 {
emh203 0:3d9c67d97d6f 121 /* Set status as ARM_MATH_SIZE_MISMATCH */
emh203 0:3d9c67d97d6f 122 status = ARM_MATH_SIZE_MISMATCH;
emh203 0:3d9c67d97d6f 123 }
emh203 0:3d9c67d97d6f 124 else
emh203 0:3d9c67d97d6f 125 #endif
emh203 0:3d9c67d97d6f 126 {
emh203 0:3d9c67d97d6f 127 /* Matrix transpose */
emh203 0:3d9c67d97d6f 128 do
emh203 0:3d9c67d97d6f 129 {
emh203 0:3d9c67d97d6f 130 /* Apply loop unrolling and exchange the columns with row elements */
emh203 0:3d9c67d97d6f 131 col = numColsB >> 2;
emh203 0:3d9c67d97d6f 132
emh203 0:3d9c67d97d6f 133 /* The pointer px is set to starting address of the column being processed */
emh203 0:3d9c67d97d6f 134 px = pSrcBT + i;
emh203 0:3d9c67d97d6f 135
emh203 0:3d9c67d97d6f 136 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emh203 0:3d9c67d97d6f 137 ** a second loop below computes the remaining 1 to 3 samples. */
emh203 0:3d9c67d97d6f 138 while(col > 0u)
emh203 0:3d9c67d97d6f 139 {
emh203 0:3d9c67d97d6f 140 #ifdef UNALIGNED_SUPPORT_DISABLE
emh203 0:3d9c67d97d6f 141 /* Read two elements from the row */
emh203 0:3d9c67d97d6f 142 in = *pInB++;
emh203 0:3d9c67d97d6f 143 *px = in;
emh203 0:3d9c67d97d6f 144 in = *pInB++;
emh203 0:3d9c67d97d6f 145 px[1] = in;
emh203 0:3d9c67d97d6f 146
emh203 0:3d9c67d97d6f 147 /* Update the pointer px to point to the next row of the transposed matrix */
emh203 0:3d9c67d97d6f 148 px += numRowsB * 2;
emh203 0:3d9c67d97d6f 149
emh203 0:3d9c67d97d6f 150 /* Read two elements from the row */
emh203 0:3d9c67d97d6f 151 in = *pInB++;
emh203 0:3d9c67d97d6f 152 *px = in;
emh203 0:3d9c67d97d6f 153 in = *pInB++;
emh203 0:3d9c67d97d6f 154 px[1] = in;
emh203 0:3d9c67d97d6f 155
emh203 0:3d9c67d97d6f 156 /* Update the pointer px to point to the next row of the transposed matrix */
emh203 0:3d9c67d97d6f 157 px += numRowsB * 2;
emh203 0:3d9c67d97d6f 158
emh203 0:3d9c67d97d6f 159 /* Read two elements from the row */
emh203 0:3d9c67d97d6f 160 in = *pInB++;
emh203 0:3d9c67d97d6f 161 *px = in;
emh203 0:3d9c67d97d6f 162 in = *pInB++;
emh203 0:3d9c67d97d6f 163 px[1] = in;
emh203 0:3d9c67d97d6f 164
emh203 0:3d9c67d97d6f 165 /* Update the pointer px to point to the next row of the transposed matrix */
emh203 0:3d9c67d97d6f 166 px += numRowsB * 2;
emh203 0:3d9c67d97d6f 167
emh203 0:3d9c67d97d6f 168 /* Read two elements from the row */
emh203 0:3d9c67d97d6f 169 in = *pInB++;
emh203 0:3d9c67d97d6f 170 *px = in;
emh203 0:3d9c67d97d6f 171 in = *pInB++;
emh203 0:3d9c67d97d6f 172 px[1] = in;
emh203 0:3d9c67d97d6f 173
emh203 0:3d9c67d97d6f 174 /* Update the pointer px to point to the next row of the transposed matrix */
emh203 0:3d9c67d97d6f 175 px += numRowsB * 2;
emh203 0:3d9c67d97d6f 176
emh203 0:3d9c67d97d6f 177 /* Decrement the column loop counter */
emh203 0:3d9c67d97d6f 178 col--;
emh203 0:3d9c67d97d6f 179 }
emh203 0:3d9c67d97d6f 180
emh203 0:3d9c67d97d6f 181 /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.
emh203 0:3d9c67d97d6f 182 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 183 col = numColsB % 0x4u;
emh203 0:3d9c67d97d6f 184
emh203 0:3d9c67d97d6f 185 while(col > 0u)
emh203 0:3d9c67d97d6f 186 {
emh203 0:3d9c67d97d6f 187 /* Read two elements from the row */
emh203 0:3d9c67d97d6f 188 in = *pInB++;
emh203 0:3d9c67d97d6f 189 *px = in;
emh203 0:3d9c67d97d6f 190 in = *pInB++;
emh203 0:3d9c67d97d6f 191 px[1] = in;
emh203 0:3d9c67d97d6f 192 #else
emh203 0:3d9c67d97d6f 193
emh203 0:3d9c67d97d6f 194 /* Read two elements from the row */
emh203 0:3d9c67d97d6f 195 in = *__SIMD32(pInB)++;
emh203 0:3d9c67d97d6f 196
emh203 0:3d9c67d97d6f 197 *__SIMD32(px) = in;
emh203 0:3d9c67d97d6f 198
emh203 0:3d9c67d97d6f 199 /* Update the pointer px to point to the next row of the transposed matrix */
emh203 0:3d9c67d97d6f 200 px += numRowsB * 2;
emh203 0:3d9c67d97d6f 201
emh203 0:3d9c67d97d6f 202
emh203 0:3d9c67d97d6f 203 /* Read two elements from the row */
emh203 0:3d9c67d97d6f 204 in = *__SIMD32(pInB)++;
emh203 0:3d9c67d97d6f 205
emh203 0:3d9c67d97d6f 206 *__SIMD32(px) = in;
emh203 0:3d9c67d97d6f 207
emh203 0:3d9c67d97d6f 208 /* Update the pointer px to point to the next row of the transposed matrix */
emh203 0:3d9c67d97d6f 209 px += numRowsB * 2;
emh203 0:3d9c67d97d6f 210
emh203 0:3d9c67d97d6f 211 /* Read two elements from the row */
emh203 0:3d9c67d97d6f 212 in = *__SIMD32(pInB)++;
emh203 0:3d9c67d97d6f 213
emh203 0:3d9c67d97d6f 214 *__SIMD32(px) = in;
emh203 0:3d9c67d97d6f 215
emh203 0:3d9c67d97d6f 216 /* Update the pointer px to point to the next row of the transposed matrix */
emh203 0:3d9c67d97d6f 217 px += numRowsB * 2;
emh203 0:3d9c67d97d6f 218
emh203 0:3d9c67d97d6f 219 /* Read two elements from the row */
emh203 0:3d9c67d97d6f 220 in = *__SIMD32(pInB)++;
emh203 0:3d9c67d97d6f 221
emh203 0:3d9c67d97d6f 222 *__SIMD32(px) = in;
emh203 0:3d9c67d97d6f 223
emh203 0:3d9c67d97d6f 224 /* Update the pointer px to point to the next row of the transposed matrix */
emh203 0:3d9c67d97d6f 225 px += numRowsB * 2;
emh203 0:3d9c67d97d6f 226
emh203 0:3d9c67d97d6f 227 /* Decrement the column loop counter */
emh203 0:3d9c67d97d6f 228 col--;
emh203 0:3d9c67d97d6f 229 }
emh203 0:3d9c67d97d6f 230
emh203 0:3d9c67d97d6f 231 /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.
emh203 0:3d9c67d97d6f 232 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 233 col = numColsB % 0x4u;
emh203 0:3d9c67d97d6f 234
emh203 0:3d9c67d97d6f 235 while(col > 0u)
emh203 0:3d9c67d97d6f 236 {
emh203 0:3d9c67d97d6f 237 /* Read two elements from the row */
emh203 0:3d9c67d97d6f 238 in = *__SIMD32(pInB)++;
emh203 0:3d9c67d97d6f 239
emh203 0:3d9c67d97d6f 240 *__SIMD32(px) = in;
emh203 0:3d9c67d97d6f 241 #endif
emh203 0:3d9c67d97d6f 242
emh203 0:3d9c67d97d6f 243 /* Update the pointer px to point to the next row of the transposed matrix */
emh203 0:3d9c67d97d6f 244 px += numRowsB * 2;
emh203 0:3d9c67d97d6f 245
emh203 0:3d9c67d97d6f 246 /* Decrement the column loop counter */
emh203 0:3d9c67d97d6f 247 col--;
emh203 0:3d9c67d97d6f 248 }
emh203 0:3d9c67d97d6f 249
emh203 0:3d9c67d97d6f 250 i = i + 2u;
emh203 0:3d9c67d97d6f 251
emh203 0:3d9c67d97d6f 252 /* Decrement the row loop counter */
emh203 0:3d9c67d97d6f 253 row--;
emh203 0:3d9c67d97d6f 254
emh203 0:3d9c67d97d6f 255 } while(row > 0u);
emh203 0:3d9c67d97d6f 256
emh203 0:3d9c67d97d6f 257 /* Reset the variables for the usage in the following multiplication process */
emh203 0:3d9c67d97d6f 258 row = numRowsA;
emh203 0:3d9c67d97d6f 259 i = 0u;
emh203 0:3d9c67d97d6f 260 px = pDst->pData;
emh203 0:3d9c67d97d6f 261
emh203 0:3d9c67d97d6f 262 /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
emh203 0:3d9c67d97d6f 263 /* row loop */
emh203 0:3d9c67d97d6f 264 do
emh203 0:3d9c67d97d6f 265 {
emh203 0:3d9c67d97d6f 266 /* For every row wise process, the column loop counter is to be initiated */
emh203 0:3d9c67d97d6f 267 col = numColsB;
emh203 0:3d9c67d97d6f 268
emh203 0:3d9c67d97d6f 269 /* For every row wise process, the pIn2 pointer is set
emh203 0:3d9c67d97d6f 270 ** to the starting address of the transposed pSrcB data */
emh203 0:3d9c67d97d6f 271 pInB = pSrcBT;
emh203 0:3d9c67d97d6f 272
emh203 0:3d9c67d97d6f 273 /* column loop */
emh203 0:3d9c67d97d6f 274 do
emh203 0:3d9c67d97d6f 275 {
emh203 0:3d9c67d97d6f 276 /* Set the variable sum, that acts as accumulator, to zero */
emh203 0:3d9c67d97d6f 277 sumReal = 0;
emh203 0:3d9c67d97d6f 278 sumImag = 0;
emh203 0:3d9c67d97d6f 279
emh203 0:3d9c67d97d6f 280 /* Apply loop unrolling and compute 2 MACs simultaneously. */
emh203 0:3d9c67d97d6f 281 colCnt = numColsA >> 1;
emh203 0:3d9c67d97d6f 282
emh203 0:3d9c67d97d6f 283 /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
emh203 0:3d9c67d97d6f 284 pInA = pSrcA->pData + i * 2;
emh203 0:3d9c67d97d6f 285
emh203 0:3d9c67d97d6f 286
emh203 0:3d9c67d97d6f 287 /* matrix multiplication */
emh203 0:3d9c67d97d6f 288 while(colCnt > 0u)
emh203 0:3d9c67d97d6f 289 {
emh203 0:3d9c67d97d6f 290 /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
emh203 0:3d9c67d97d6f 291
emh203 0:3d9c67d97d6f 292 #ifdef UNALIGNED_SUPPORT_DISABLE
emh203 0:3d9c67d97d6f 293
emh203 0:3d9c67d97d6f 294 /* read real and imag values from pSrcA buffer */
emh203 0:3d9c67d97d6f 295 a = *pInA;
emh203 0:3d9c67d97d6f 296 b = *(pInA + 1u);
emh203 0:3d9c67d97d6f 297 /* read real and imag values from pSrcB buffer */
emh203 0:3d9c67d97d6f 298 c = *pInB;
emh203 0:3d9c67d97d6f 299 d = *(pInB + 1u);
emh203 0:3d9c67d97d6f 300
emh203 0:3d9c67d97d6f 301 /* Multiply and Accumlates */
emh203 0:3d9c67d97d6f 302 sumReal += (q31_t) a *c;
emh203 0:3d9c67d97d6f 303 sumImag += (q31_t) a *d;
emh203 0:3d9c67d97d6f 304 sumReal -= (q31_t) b *d;
emh203 0:3d9c67d97d6f 305 sumImag += (q31_t) b *c;
emh203 0:3d9c67d97d6f 306
emh203 0:3d9c67d97d6f 307 /* read next real and imag values from pSrcA buffer */
emh203 0:3d9c67d97d6f 308 a = *(pInA + 2u);
emh203 0:3d9c67d97d6f 309 b = *(pInA + 3u);
emh203 0:3d9c67d97d6f 310 /* read next real and imag values from pSrcB buffer */
emh203 0:3d9c67d97d6f 311 c = *(pInB + 2u);
emh203 0:3d9c67d97d6f 312 d = *(pInB + 3u);
emh203 0:3d9c67d97d6f 313
emh203 0:3d9c67d97d6f 314 /* update pointer */
emh203 0:3d9c67d97d6f 315 pInA += 4u;
emh203 0:3d9c67d97d6f 316
emh203 0:3d9c67d97d6f 317 /* Multiply and Accumlates */
emh203 0:3d9c67d97d6f 318 sumReal += (q31_t) a *c;
emh203 0:3d9c67d97d6f 319 sumImag += (q31_t) a *d;
emh203 0:3d9c67d97d6f 320 sumReal -= (q31_t) b *d;
emh203 0:3d9c67d97d6f 321 sumImag += (q31_t) b *c;
emh203 0:3d9c67d97d6f 322 /* update pointer */
emh203 0:3d9c67d97d6f 323 pInB += 4u;
emh203 0:3d9c67d97d6f 324 #else
emh203 0:3d9c67d97d6f 325 /* read real and imag values from pSrcA and pSrcB buffer */
emh203 0:3d9c67d97d6f 326 pSourceA = *__SIMD32(pInA)++;
emh203 0:3d9c67d97d6f 327 pSourceB = *__SIMD32(pInB)++;
emh203 0:3d9c67d97d6f 328
emh203 0:3d9c67d97d6f 329 /* Multiply and Accumlates */
emh203 0:3d9c67d97d6f 330 #ifdef ARM_MATH_BIG_ENDIAN
emh203 0:3d9c67d97d6f 331 prod1 = -__SMUSD(pSourceA, pSourceB);
emh203 0:3d9c67d97d6f 332 #else
emh203 0:3d9c67d97d6f 333 prod1 = __SMUSD(pSourceA, pSourceB);
emh203 0:3d9c67d97d6f 334 #endif
emh203 0:3d9c67d97d6f 335 prod2 = __SMUADX(pSourceA, pSourceB);
emh203 0:3d9c67d97d6f 336 sumReal += (q63_t) prod1;
emh203 0:3d9c67d97d6f 337 sumImag += (q63_t) prod2;
emh203 0:3d9c67d97d6f 338
emh203 0:3d9c67d97d6f 339 /* read real and imag values from pSrcA and pSrcB buffer */
emh203 0:3d9c67d97d6f 340 pSourceA = *__SIMD32(pInA)++;
emh203 0:3d9c67d97d6f 341 pSourceB = *__SIMD32(pInB)++;
emh203 0:3d9c67d97d6f 342
emh203 0:3d9c67d97d6f 343 /* Multiply and Accumlates */
emh203 0:3d9c67d97d6f 344 #ifdef ARM_MATH_BIG_ENDIAN
emh203 0:3d9c67d97d6f 345 prod1 = -__SMUSD(pSourceA, pSourceB);
emh203 0:3d9c67d97d6f 346 #else
emh203 0:3d9c67d97d6f 347 prod1 = __SMUSD(pSourceA, pSourceB);
emh203 0:3d9c67d97d6f 348 #endif
emh203 0:3d9c67d97d6f 349 prod2 = __SMUADX(pSourceA, pSourceB);
emh203 0:3d9c67d97d6f 350 sumReal += (q63_t) prod1;
emh203 0:3d9c67d97d6f 351 sumImag += (q63_t) prod2;
emh203 0:3d9c67d97d6f 352
emh203 0:3d9c67d97d6f 353 #endif /* #ifdef UNALIGNED_SUPPORT_DISABLE */
emh203 0:3d9c67d97d6f 354
emh203 0:3d9c67d97d6f 355 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 356 colCnt--;
emh203 0:3d9c67d97d6f 357 }
emh203 0:3d9c67d97d6f 358
emh203 0:3d9c67d97d6f 359 /* process odd column samples */
emh203 0:3d9c67d97d6f 360 if((numColsA & 0x1u) > 0u)
emh203 0:3d9c67d97d6f 361 {
emh203 0:3d9c67d97d6f 362 /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
emh203 0:3d9c67d97d6f 363
emh203 0:3d9c67d97d6f 364 #ifdef UNALIGNED_SUPPORT_DISABLE
emh203 0:3d9c67d97d6f 365
emh203 0:3d9c67d97d6f 366 /* read real and imag values from pSrcA and pSrcB buffer */
emh203 0:3d9c67d97d6f 367 a = *pInA++;
emh203 0:3d9c67d97d6f 368 b = *pInA++;
emh203 0:3d9c67d97d6f 369 c = *pInB++;
emh203 0:3d9c67d97d6f 370 d = *pInB++;
emh203 0:3d9c67d97d6f 371
emh203 0:3d9c67d97d6f 372 /* Multiply and Accumlates */
emh203 0:3d9c67d97d6f 373 sumReal += (q31_t) a *c;
emh203 0:3d9c67d97d6f 374 sumImag += (q31_t) a *d;
emh203 0:3d9c67d97d6f 375 sumReal -= (q31_t) b *d;
emh203 0:3d9c67d97d6f 376 sumImag += (q31_t) b *c;
emh203 0:3d9c67d97d6f 377
emh203 0:3d9c67d97d6f 378 #else
emh203 0:3d9c67d97d6f 379 /* read real and imag values from pSrcA and pSrcB buffer */
emh203 0:3d9c67d97d6f 380 pSourceA = *__SIMD32(pInA)++;
emh203 0:3d9c67d97d6f 381 pSourceB = *__SIMD32(pInB)++;
emh203 0:3d9c67d97d6f 382
emh203 0:3d9c67d97d6f 383 /* Multiply and Accumlates */
emh203 0:3d9c67d97d6f 384 #ifdef ARM_MATH_BIG_ENDIAN
emh203 0:3d9c67d97d6f 385 prod1 = -__SMUSD(pSourceA, pSourceB);
emh203 0:3d9c67d97d6f 386 #else
emh203 0:3d9c67d97d6f 387 prod1 = __SMUSD(pSourceA, pSourceB);
emh203 0:3d9c67d97d6f 388 #endif
emh203 0:3d9c67d97d6f 389 prod2 = __SMUADX(pSourceA, pSourceB);
emh203 0:3d9c67d97d6f 390 sumReal += (q63_t) prod1;
emh203 0:3d9c67d97d6f 391 sumImag += (q63_t) prod2;
emh203 0:3d9c67d97d6f 392
emh203 0:3d9c67d97d6f 393 #endif /* #ifdef UNALIGNED_SUPPORT_DISABLE */
emh203 0:3d9c67d97d6f 394
emh203 0:3d9c67d97d6f 395 }
emh203 0:3d9c67d97d6f 396
emh203 0:3d9c67d97d6f 397 /* Saturate and store the result in the destination buffer */
emh203 0:3d9c67d97d6f 398
emh203 0:3d9c67d97d6f 399 *px++ = (q15_t) (__SSAT(sumReal >> 15, 16));
emh203 0:3d9c67d97d6f 400 *px++ = (q15_t) (__SSAT(sumImag >> 15, 16));
emh203 0:3d9c67d97d6f 401
emh203 0:3d9c67d97d6f 402 /* Decrement the column loop counter */
emh203 0:3d9c67d97d6f 403 col--;
emh203 0:3d9c67d97d6f 404
emh203 0:3d9c67d97d6f 405 } while(col > 0u);
emh203 0:3d9c67d97d6f 406
emh203 0:3d9c67d97d6f 407 i = i + numColsA;
emh203 0:3d9c67d97d6f 408
emh203 0:3d9c67d97d6f 409 /* Decrement the row loop counter */
emh203 0:3d9c67d97d6f 410 row--;
emh203 0:3d9c67d97d6f 411
emh203 0:3d9c67d97d6f 412 } while(row > 0u);
emh203 0:3d9c67d97d6f 413
emh203 0:3d9c67d97d6f 414 /* set status as ARM_MATH_SUCCESS */
emh203 0:3d9c67d97d6f 415 status = ARM_MATH_SUCCESS;
emh203 0:3d9c67d97d6f 416 }
emh203 0:3d9c67d97d6f 417
emh203 0:3d9c67d97d6f 418 /* Return to application */
emh203 0:3d9c67d97d6f 419 return (status);
emh203 0:3d9c67d97d6f 420 }
emh203 0:3d9c67d97d6f 421
emh203 0:3d9c67d97d6f 422 /**
emh203 0:3d9c67d97d6f 423 * @} end of MatrixMult group
emh203 0:3d9c67d97d6f 424 */