Eli Hughes / CMSIS_DSP_401

V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

BasicMathFunctions/arm_shift_q15.c@0:3d9c67d97d6f, 2014-07-28 (annotated)

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_shift_q15.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Shifts the elements of a Q15 vector by a specified number of bits.
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * -------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41 #include "arm_math.h"
emh203 0:3d9c67d97d6f 42
emh203 0:3d9c67d97d6f 43 /**
emh203 0:3d9c67d97d6f 44 * @ingroup groupMath
emh203 0:3d9c67d97d6f 45 */
emh203 0:3d9c67d97d6f 46
emh203 0:3d9c67d97d6f 47 /**
emh203 0:3d9c67d97d6f 48 * @addtogroup shift
emh203 0:3d9c67d97d6f 49 * @{
emh203 0:3d9c67d97d6f 50 */
emh203 0:3d9c67d97d6f 51
emh203 0:3d9c67d97d6f 52 /**
emh203 0:3d9c67d97d6f 53 * @brief Shifts the elements of a Q15 vector a specified number of bits.
emh203 0:3d9c67d97d6f 54 * @param[in] *pSrc points to the input vector
emh203 0:3d9c67d97d6f 55 * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
emh203 0:3d9c67d97d6f 56 * @param[out] *pDst points to the output vector
emh203 0:3d9c67d97d6f 57 * @param[in] blockSize number of samples in the vector
emh203 0:3d9c67d97d6f 58 * @return none.
emh203 0:3d9c67d97d6f 59 *
emh203 0:3d9c67d97d6f 60 * <b>Scaling and Overflow Behavior:</b>
emh203 0:3d9c67d97d6f 61 * \par
emh203 0:3d9c67d97d6f 62 * The function uses saturating arithmetic.
emh203 0:3d9c67d97d6f 63 * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
emh203 0:3d9c67d97d6f 64 */
emh203 0:3d9c67d97d6f 65
emh203 0:3d9c67d97d6f 66 void arm_shift_q15(
emh203 0:3d9c67d97d6f 67 q15_t * pSrc,
emh203 0:3d9c67d97d6f 68 int8_t shiftBits,
emh203 0:3d9c67d97d6f 69 q15_t * pDst,
emh203 0:3d9c67d97d6f 70 uint32_t blockSize)
emh203 0:3d9c67d97d6f 71 {
emh203 0:3d9c67d97d6f 72 uint32_t blkCnt; /* loop counter */
emh203 0:3d9c67d97d6f 73 uint8_t sign; /* Sign of shiftBits */
emh203 0:3d9c67d97d6f 74
emh203 0:3d9c67d97d6f 75 #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 76
emh203 0:3d9c67d97d6f 77 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 78
emh203 0:3d9c67d97d6f 79 q15_t in1, in2; /* Temporary variables */
emh203 0:3d9c67d97d6f 80
emh203 0:3d9c67d97d6f 81
emh203 0:3d9c67d97d6f 82 /*loop Unrolling */
emh203 0:3d9c67d97d6f 83 blkCnt = blockSize >> 2u;
emh203 0:3d9c67d97d6f 84
emh203 0:3d9c67d97d6f 85 /* Getting the sign of shiftBits */
emh203 0:3d9c67d97d6f 86 sign = (shiftBits & 0x80);
emh203 0:3d9c67d97d6f 87
emh203 0:3d9c67d97d6f 88 /* If the shift value is positive then do right shift else left shift */
emh203 0:3d9c67d97d6f 89 if(sign == 0u)
emh203 0:3d9c67d97d6f 90 {
emh203 0:3d9c67d97d6f 91 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emh203 0:3d9c67d97d6f 92 ** a second loop below computes the remaining 1 to 3 samples. */
emh203 0:3d9c67d97d6f 93 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 94 {
emh203 0:3d9c67d97d6f 95 /* Read 2 inputs */
emh203 0:3d9c67d97d6f 96 in1 = *pSrc++;
emh203 0:3d9c67d97d6f 97 in2 = *pSrc++;
emh203 0:3d9c67d97d6f 98 /* C = A << shiftBits */
emh203 0:3d9c67d97d6f 99 /* Shift the inputs and then store the results in the destination buffer. */
emh203 0:3d9c67d97d6f 100 #ifndef ARM_MATH_BIG_ENDIAN
emh203 0:3d9c67d97d6f 101
emh203 0:3d9c67d97d6f 102 *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16),
emh203 0:3d9c67d97d6f 103 __SSAT((in2 << shiftBits), 16), 16);
emh203 0:3d9c67d97d6f 104
emh203 0:3d9c67d97d6f 105 #else
emh203 0:3d9c67d97d6f 106
emh203 0:3d9c67d97d6f 107 *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16),
emh203 0:3d9c67d97d6f 108 __SSAT((in1 << shiftBits), 16), 16);
emh203 0:3d9c67d97d6f 109
emh203 0:3d9c67d97d6f 110 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emh203 0:3d9c67d97d6f 111
emh203 0:3d9c67d97d6f 112 in1 = *pSrc++;
emh203 0:3d9c67d97d6f 113 in2 = *pSrc++;
emh203 0:3d9c67d97d6f 114
emh203 0:3d9c67d97d6f 115 #ifndef ARM_MATH_BIG_ENDIAN
emh203 0:3d9c67d97d6f 116
emh203 0:3d9c67d97d6f 117 *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16),
emh203 0:3d9c67d97d6f 118 __SSAT((in2 << shiftBits), 16), 16);
emh203 0:3d9c67d97d6f 119
emh203 0:3d9c67d97d6f 120 #else
emh203 0:3d9c67d97d6f 121
emh203 0:3d9c67d97d6f 122 *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16),
emh203 0:3d9c67d97d6f 123 __SSAT((in1 << shiftBits), 16), 16);
emh203 0:3d9c67d97d6f 124
emh203 0:3d9c67d97d6f 125 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emh203 0:3d9c67d97d6f 126
emh203 0:3d9c67d97d6f 127 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 128 blkCnt--;
emh203 0:3d9c67d97d6f 129 }
emh203 0:3d9c67d97d6f 130
emh203 0:3d9c67d97d6f 131 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emh203 0:3d9c67d97d6f 132 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 133 blkCnt = blockSize % 0x4u;
emh203 0:3d9c67d97d6f 134
emh203 0:3d9c67d97d6f 135 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 136 {
emh203 0:3d9c67d97d6f 137 /* C = A << shiftBits */
emh203 0:3d9c67d97d6f 138 /* Shift and then store the results in the destination buffer. */
emh203 0:3d9c67d97d6f 139 *pDst++ = __SSAT((*pSrc++ << shiftBits), 16);
emh203 0:3d9c67d97d6f 140
emh203 0:3d9c67d97d6f 141 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 142 blkCnt--;
emh203 0:3d9c67d97d6f 143 }
emh203 0:3d9c67d97d6f 144 }
emh203 0:3d9c67d97d6f 145 else
emh203 0:3d9c67d97d6f 146 {
emh203 0:3d9c67d97d6f 147 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emh203 0:3d9c67d97d6f 148 ** a second loop below computes the remaining 1 to 3 samples. */
emh203 0:3d9c67d97d6f 149 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 150 {
emh203 0:3d9c67d97d6f 151 /* Read 2 inputs */
emh203 0:3d9c67d97d6f 152 in1 = *pSrc++;
emh203 0:3d9c67d97d6f 153 in2 = *pSrc++;
emh203 0:3d9c67d97d6f 154
emh203 0:3d9c67d97d6f 155 /* C = A >> shiftBits */
emh203 0:3d9c67d97d6f 156 /* Shift the inputs and then store the results in the destination buffer. */
emh203 0:3d9c67d97d6f 157 #ifndef ARM_MATH_BIG_ENDIAN
emh203 0:3d9c67d97d6f 158
emh203 0:3d9c67d97d6f 159 *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits),
emh203 0:3d9c67d97d6f 160 (in2 >> -shiftBits), 16);
emh203 0:3d9c67d97d6f 161
emh203 0:3d9c67d97d6f 162 #else
emh203 0:3d9c67d97d6f 163
emh203 0:3d9c67d97d6f 164 *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits),
emh203 0:3d9c67d97d6f 165 (in1 >> -shiftBits), 16);
emh203 0:3d9c67d97d6f 166
emh203 0:3d9c67d97d6f 167 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emh203 0:3d9c67d97d6f 168
emh203 0:3d9c67d97d6f 169 in1 = *pSrc++;
emh203 0:3d9c67d97d6f 170 in2 = *pSrc++;
emh203 0:3d9c67d97d6f 171
emh203 0:3d9c67d97d6f 172 #ifndef ARM_MATH_BIG_ENDIAN
emh203 0:3d9c67d97d6f 173
emh203 0:3d9c67d97d6f 174 *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits),
emh203 0:3d9c67d97d6f 175 (in2 >> -shiftBits), 16);
emh203 0:3d9c67d97d6f 176
emh203 0:3d9c67d97d6f 177 #else
emh203 0:3d9c67d97d6f 178
emh203 0:3d9c67d97d6f 179 *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits),
emh203 0:3d9c67d97d6f 180 (in1 >> -shiftBits), 16);
emh203 0:3d9c67d97d6f 181
emh203 0:3d9c67d97d6f 182 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emh203 0:3d9c67d97d6f 183
emh203 0:3d9c67d97d6f 184 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 185 blkCnt--;
emh203 0:3d9c67d97d6f 186 }
emh203 0:3d9c67d97d6f 187
emh203 0:3d9c67d97d6f 188 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emh203 0:3d9c67d97d6f 189 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 190 blkCnt = blockSize % 0x4u;
emh203 0:3d9c67d97d6f 191
emh203 0:3d9c67d97d6f 192 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 193 {
emh203 0:3d9c67d97d6f 194 /* C = A >> shiftBits */
emh203 0:3d9c67d97d6f 195 /* Shift the inputs and then store the results in the destination buffer. */
emh203 0:3d9c67d97d6f 196 *pDst++ = (*pSrc++ >> -shiftBits);
emh203 0:3d9c67d97d6f 197
emh203 0:3d9c67d97d6f 198 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 199 blkCnt--;
emh203 0:3d9c67d97d6f 200 }
emh203 0:3d9c67d97d6f 201 }
emh203 0:3d9c67d97d6f 202
emh203 0:3d9c67d97d6f 203 #else
emh203 0:3d9c67d97d6f 204
emh203 0:3d9c67d97d6f 205 /* Run the below code for Cortex-M0 */
emh203 0:3d9c67d97d6f 206
emh203 0:3d9c67d97d6f 207 /* Getting the sign of shiftBits */
emh203 0:3d9c67d97d6f 208 sign = (shiftBits & 0x80);
emh203 0:3d9c67d97d6f 209
emh203 0:3d9c67d97d6f 210 /* If the shift value is positive then do right shift else left shift */
emh203 0:3d9c67d97d6f 211 if(sign == 0u)
emh203 0:3d9c67d97d6f 212 {
emh203 0:3d9c67d97d6f 213 /* Initialize blkCnt with number of samples */
emh203 0:3d9c67d97d6f 214 blkCnt = blockSize;
emh203 0:3d9c67d97d6f 215
emh203 0:3d9c67d97d6f 216 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 217 {
emh203 0:3d9c67d97d6f 218 /* C = A << shiftBits */
emh203 0:3d9c67d97d6f 219 /* Shift and then store the results in the destination buffer. */
emh203 0:3d9c67d97d6f 220 *pDst++ = __SSAT(((q31_t) * pSrc++ << shiftBits), 16);
emh203 0:3d9c67d97d6f 221
emh203 0:3d9c67d97d6f 222 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 223 blkCnt--;
emh203 0:3d9c67d97d6f 224 }
emh203 0:3d9c67d97d6f 225 }
emh203 0:3d9c67d97d6f 226 else
emh203 0:3d9c67d97d6f 227 {
emh203 0:3d9c67d97d6f 228 /* Initialize blkCnt with number of samples */
emh203 0:3d9c67d97d6f 229 blkCnt = blockSize;
emh203 0:3d9c67d97d6f 230
emh203 0:3d9c67d97d6f 231 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 232 {
emh203 0:3d9c67d97d6f 233 /* C = A >> shiftBits */
emh203 0:3d9c67d97d6f 234 /* Shift the inputs and then store the results in the destination buffer. */
emh203 0:3d9c67d97d6f 235 *pDst++ = (*pSrc++ >> -shiftBits);
emh203 0:3d9c67d97d6f 236
emh203 0:3d9c67d97d6f 237 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 238 blkCnt--;
emh203 0:3d9c67d97d6f 239 }
emh203 0:3d9c67d97d6f 240 }
emh203 0:3d9c67d97d6f 241
emh203 0:3d9c67d97d6f 242 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emh203 0:3d9c67d97d6f 243
emh203 0:3d9c67d97d6f 244 }
emh203 0:3d9c67d97d6f 245
emh203 0:3d9c67d97d6f 246 /**
emh203 0:3d9c67d97d6f 247 * @} end of shift group
emh203 0:3d9c67d97d6f 248 */