Eli Hughes / CMSIS_DSP_401

V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

BasicMathFunctions/arm_scale_q7.c@0:3d9c67d97d6f, 2014-07-28 (annotated)

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_scale_q7.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Multiplies a Q7 vector by a scalar.
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * -------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41 #include "arm_math.h"
emh203 0:3d9c67d97d6f 42
emh203 0:3d9c67d97d6f 43 /**
emh203 0:3d9c67d97d6f 44 * @ingroup groupMath
emh203 0:3d9c67d97d6f 45 */
emh203 0:3d9c67d97d6f 46
emh203 0:3d9c67d97d6f 47 /**
emh203 0:3d9c67d97d6f 48 * @addtogroup scale
emh203 0:3d9c67d97d6f 49 * @{
emh203 0:3d9c67d97d6f 50 */
emh203 0:3d9c67d97d6f 51
emh203 0:3d9c67d97d6f 52 /**
emh203 0:3d9c67d97d6f 53 * @brief Multiplies a Q7 vector by a scalar.
emh203 0:3d9c67d97d6f 54 * @param[in] *pSrc points to the input vector
emh203 0:3d9c67d97d6f 55 * @param[in] scaleFract fractional portion of the scale value
emh203 0:3d9c67d97d6f 56 * @param[in] shift number of bits to shift the result by
emh203 0:3d9c67d97d6f 57 * @param[out] *pDst points to the output vector
emh203 0:3d9c67d97d6f 58 * @param[in] blockSize number of samples in the vector
emh203 0:3d9c67d97d6f 59 * @return none.
emh203 0:3d9c67d97d6f 60 *
emh203 0:3d9c67d97d6f 61 * <b>Scaling and Overflow Behavior:</b>
emh203 0:3d9c67d97d6f 62 * \par
emh203 0:3d9c67d97d6f 63 * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.7 format.
emh203 0:3d9c67d97d6f 64 * These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format.
emh203 0:3d9c67d97d6f 65 */
emh203 0:3d9c67d97d6f 66
emh203 0:3d9c67d97d6f 67 void arm_scale_q7(
emh203 0:3d9c67d97d6f 68 q7_t * pSrc,
emh203 0:3d9c67d97d6f 69 q7_t scaleFract,
emh203 0:3d9c67d97d6f 70 int8_t shift,
emh203 0:3d9c67d97d6f 71 q7_t * pDst,
emh203 0:3d9c67d97d6f 72 uint32_t blockSize)
emh203 0:3d9c67d97d6f 73 {
emh203 0:3d9c67d97d6f 74 int8_t kShift = 7 - shift; /* shift to apply after scaling */
emh203 0:3d9c67d97d6f 75 uint32_t blkCnt; /* loop counter */
emh203 0:3d9c67d97d6f 76
emh203 0:3d9c67d97d6f 77 #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 78
emh203 0:3d9c67d97d6f 79 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 80 q7_t in1, in2, in3, in4, out1, out2, out3, out4; /* Temporary variables to store input & output */
emh203 0:3d9c67d97d6f 81
emh203 0:3d9c67d97d6f 82
emh203 0:3d9c67d97d6f 83 /*loop Unrolling */
emh203 0:3d9c67d97d6f 84 blkCnt = blockSize >> 2u;
emh203 0:3d9c67d97d6f 85
emh203 0:3d9c67d97d6f 86
emh203 0:3d9c67d97d6f 87 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emh203 0:3d9c67d97d6f 88 ** a second loop below computes the remaining 1 to 3 samples. */
emh203 0:3d9c67d97d6f 89 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 90 {
emh203 0:3d9c67d97d6f 91 /* Reading 4 inputs from memory */
emh203 0:3d9c67d97d6f 92 in1 = *pSrc++;
emh203 0:3d9c67d97d6f 93 in2 = *pSrc++;
emh203 0:3d9c67d97d6f 94 in3 = *pSrc++;
emh203 0:3d9c67d97d6f 95 in4 = *pSrc++;
emh203 0:3d9c67d97d6f 96
emh203 0:3d9c67d97d6f 97 /* C = A * scale */
emh203 0:3d9c67d97d6f 98 /* Scale the inputs and then store the results in the temporary variables. */
emh203 0:3d9c67d97d6f 99 out1 = (q7_t) (__SSAT(((in1) * scaleFract) >> kShift, 8));
emh203 0:3d9c67d97d6f 100 out2 = (q7_t) (__SSAT(((in2) * scaleFract) >> kShift, 8));
emh203 0:3d9c67d97d6f 101 out3 = (q7_t) (__SSAT(((in3) * scaleFract) >> kShift, 8));
emh203 0:3d9c67d97d6f 102 out4 = (q7_t) (__SSAT(((in4) * scaleFract) >> kShift, 8));
emh203 0:3d9c67d97d6f 103
emh203 0:3d9c67d97d6f 104 /* Packing the individual outputs into 32bit and storing in
emh203 0:3d9c67d97d6f 105 * destination buffer in single write */
emh203 0:3d9c67d97d6f 106 *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
emh203 0:3d9c67d97d6f 107
emh203 0:3d9c67d97d6f 108 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 109 blkCnt--;
emh203 0:3d9c67d97d6f 110 }
emh203 0:3d9c67d97d6f 111
emh203 0:3d9c67d97d6f 112 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emh203 0:3d9c67d97d6f 113 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 114 blkCnt = blockSize % 0x4u;
emh203 0:3d9c67d97d6f 115
emh203 0:3d9c67d97d6f 116 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 117 {
emh203 0:3d9c67d97d6f 118 /* C = A * scale */
emh203 0:3d9c67d97d6f 119 /* Scale the input and then store the result in the destination buffer. */
emh203 0:3d9c67d97d6f 120 *pDst++ = (q7_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 8));
emh203 0:3d9c67d97d6f 121
emh203 0:3d9c67d97d6f 122 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 123 blkCnt--;
emh203 0:3d9c67d97d6f 124 }
emh203 0:3d9c67d97d6f 125
emh203 0:3d9c67d97d6f 126 #else
emh203 0:3d9c67d97d6f 127
emh203 0:3d9c67d97d6f 128 /* Run the below code for Cortex-M0 */
emh203 0:3d9c67d97d6f 129
emh203 0:3d9c67d97d6f 130 /* Initialize blkCnt with number of samples */
emh203 0:3d9c67d97d6f 131 blkCnt = blockSize;
emh203 0:3d9c67d97d6f 132
emh203 0:3d9c67d97d6f 133 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 134 {
emh203 0:3d9c67d97d6f 135 /* C = A * scale */
emh203 0:3d9c67d97d6f 136 /* Scale the input and then store the result in the destination buffer. */
emh203 0:3d9c67d97d6f 137 *pDst++ = (q7_t) (__SSAT((((q15_t) * pSrc++ * scaleFract) >> kShift), 8));
emh203 0:3d9c67d97d6f 138
emh203 0:3d9c67d97d6f 139 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 140 blkCnt--;
emh203 0:3d9c67d97d6f 141 }
emh203 0:3d9c67d97d6f 142
emh203 0:3d9c67d97d6f 143 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emh203 0:3d9c67d97d6f 144
emh203 0:3d9c67d97d6f 145 }
emh203 0:3d9c67d97d6f 146
emh203 0:3d9c67d97d6f 147 /**
emh203 0:3d9c67d97d6f 148 * @} end of scale group
emh203 0:3d9c67d97d6f 149 */