eth_comfort_freebus - Program for decoding radio-signals sent by a ETH-…

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Karl Zweimüller / Mbed 2 deprecated eth_comfort_freebus

Program for decoding radio-signals sent by a ETH-Window-Shutter-Contact, received with a RFM12B-module. The messages are sent to KNX via a freebus rs-interface. Details see http://mbed.org/users/charly/notebook/connecting-a-radio-window-shutter-contact-to-knx/

Dependencies: TextLCD mbed ConfigFile

rfm.h@0:b79cb3278583, 2011-04-27 (annotated)

Committer:: charly
Date:: Wed Apr 27 19:02:00 2011 +0000
Revision:: 0:b79cb3278583

Who changed what in which revision?

User	Revision	Line number	New contents of line
charly	0:b79cb3278583	1	/*
charly	0:b79cb3278583	2	* Open HR20
charly	0:b79cb3278583	3	*
charly	0:b79cb3278583	4	* target: ATmega169 @ 4 MHz in Honnywell Rondostat HR20E
charly	0:b79cb3278583	5	*
charly	0:b79cb3278583	6	* compiler: WinAVR-20071221
charly	0:b79cb3278583	7	* avr-libc 1.6.0
charly	0:b79cb3278583	8	* GCC 4.2.2
charly	0:b79cb3278583	9	*
charly	0:b79cb3278583	10	* copyright: 2008 Dario Carluccio (hr20-at-carluccio-dot-de)
charly	0:b79cb3278583	11	* 2008 Jiri Dobry (jdobry-at-centrum-dot-cz)
charly	0:b79cb3278583	12	* 2008 Mario Fischer (MarioFischer-at-gmx-dot-net)
charly	0:b79cb3278583	13	* 2007 Michael Smola (Michael-dot-Smola-at-gmx-dot-net)
charly	0:b79cb3278583	14	*
charly	0:b79cb3278583	15	* license: This program is free software; you can redistribute it and/or
charly	0:b79cb3278583	16	* modify it under the terms of the GNU Library General Public
charly	0:b79cb3278583	17	* License as published by the Free Software Foundation; either
charly	0:b79cb3278583	18	* version 2 of the License, or (at your option) any later version.
charly	0:b79cb3278583	19	*
charly	0:b79cb3278583	20	* This program is distributed in the hope that it will be useful,
charly	0:b79cb3278583	21	* but WITHOUT ANY WARRANTY; without even the implied warranty of
charly	0:b79cb3278583	22	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
charly	0:b79cb3278583	23	* GNU General Public License for more details.
charly	0:b79cb3278583	24	*
charly	0:b79cb3278583	25	* You should have received a copy of the GNU General Public License
charly	0:b79cb3278583	26	* along with this program. If not, see http:*www.gnu.org/licenses
charly	0:b79cb3278583	27	*/
charly	0:b79cb3278583	28
charly	0:b79cb3278583	29	/*!
charly	0:b79cb3278583	30	* \file rfm.h
charly	0:b79cb3278583	31	* \brief functions to control the RFM12 Radio Transceiver Module
charly	0:b79cb3278583	32	* \author Mario Fischer <MarioFischer-at-gmx-dot-net>; Michael Smola <Michael-dot-Smola-at-gmx-dot-net>
charly	0:b79cb3278583	33	* \date $Date: 2010/04/17 17:57:02 $
charly	0:b79cb3278583	34	* $Rev: 260 $
charly	0:b79cb3278583	35	*/
charly	0:b79cb3278583	36
charly	0:b79cb3278583	37	//#pragma once // multi-iclude prevention. gcc knows this pragma
charly	0:b79cb3278583	38	#ifndef rfm_H
charly	0:b79cb3278583	39	#define rfm_H
charly	0:b79cb3278583	40
charly	0:b79cb3278583	41
charly	0:b79cb3278583	42	#define RFM_SPI_16(OUTVAL) rfm_spi16(OUTVAL) //<! a function that gets a uint16_t (clocked out value) and returns a uint16_t (clocked in value)
charly	0:b79cb3278583	43
charly	0:b79cb3278583	44	#define RFM_CLK_OUTPUT 0
charly	0:b79cb3278583	45
charly	0:b79cb3278583	46
charly	0:b79cb3278583	47	#define RFM_TESTPIN_INIT
charly	0:b79cb3278583	48	#define RFM_TESTPIN_ON
charly	0:b79cb3278583	49	#define RFM_TESTPIN_OFF
charly	0:b79cb3278583	50	#define RFM_TESTPIN_TOG
charly	0:b79cb3278583	51
charly	0:b79cb3278583	52	#define RFM_CONFIG_DISABLE 0x00 //<! RFM_CONFIG_*** are combinable flags, what the RFM shold do
charly	0:b79cb3278583	53	#define RFM_CONFIG_BROADCASTSTATUS 0x01 //<! Flag that enables the HR20's status broadcast every minute
charly	0:b79cb3278583	54
charly	0:b79cb3278583	55	#define RFM_CONFIG_ENABLEALL 0xff
charly	0:b79cb3278583	56
charly	0:b79cb3278583	57
charly	0:b79cb3278583	58	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	59	//
charly	0:b79cb3278583	60	// RFM status bits
charly	0:b79cb3278583	61	//
charly	0:b79cb3278583	62	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	63
charly	0:b79cb3278583	64	// Interrupt bits, latched ////////////////////////////////////////////////////
charly	0:b79cb3278583	65
charly	0:b79cb3278583	66	#define RFM_STATUS_FFIT 0x8000 // RX FIFO reached the progr. number of bits
charly	0:b79cb3278583	67	// Cleared by any FIFO read method
charly	0:b79cb3278583	68
charly	0:b79cb3278583	69	#define RFM_STATUS_RGIT 0x8000 // TX register is ready to receive
charly	0:b79cb3278583	70	// Cleared by TX write
charly	0:b79cb3278583	71
charly	0:b79cb3278583	72	#define RFM_STATUS_POR 0x4000 // Power On reset
charly	0:b79cb3278583	73	// Cleared by read status
charly	0:b79cb3278583	74
charly	0:b79cb3278583	75	#define RFM_STATUS_RGUR 0x2000 // TX register underrun, register over write
charly	0:b79cb3278583	76	// Cleared by read status
charly	0:b79cb3278583	77
charly	0:b79cb3278583	78	#define RFM_STATUS_FFOV 0x2000 // RX FIFO overflow
charly	0:b79cb3278583	79	// Cleared by read status
charly	0:b79cb3278583	80
charly	0:b79cb3278583	81	#define RFM_STATUS_WKUP 0x1000 // Wake up timer overflow
charly	0:b79cb3278583	82	// Cleared by read status
charly	0:b79cb3278583	83
charly	0:b79cb3278583	84	#define RFM_STATUS_EXT 0x0800 // Interupt changed to low
charly	0:b79cb3278583	85	// Cleared by read status
charly	0:b79cb3278583	86
charly	0:b79cb3278583	87	#define RFM_STATUS_LBD 0x0400 // Low battery detect
charly	0:b79cb3278583	88
charly	0:b79cb3278583	89	// Status bits ////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	90
charly	0:b79cb3278583	91	#define RFM_STATUS_FFEM 0x0200 // FIFO is empty
charly	0:b79cb3278583	92	#define RFM_STATUS_ATS 0x0100 // TX mode: Strong enough RF signal
charly	0:b79cb3278583	93	#define RFM_STATUS_RSSI 0x0100 // RX mode: signal strength above programmed limit
charly	0:b79cb3278583	94	#define RFM_STATUS_DQD 0x0080 // Data Quality detector output
charly	0:b79cb3278583	95	#define RFM_STATUS_CRL 0x0040 // Clock recovery lock
charly	0:b79cb3278583	96	#define RFM_STATUS_ATGL 0x0020 // Toggling in each AFC cycle
charly	0:b79cb3278583	97
charly	0:b79cb3278583	98	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	99	//
charly	0:b79cb3278583	100	// 1. Configuration Setting Command
charly	0:b79cb3278583	101	//
charly	0:b79cb3278583	102	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	103
charly	0:b79cb3278583	104	#define RFM_CONFIG 0x8000
charly	0:b79cb3278583	105
charly	0:b79cb3278583	106	#define RFM_CONFIG_EL 0x8080 // Enable TX Register
charly	0:b79cb3278583	107	#define RFM_CONFIG_EF 0x8040 // Enable RX FIFO buffer
charly	0:b79cb3278583	108	#define RFM_CONFIG_BAND_315 0x8000 // Frequency band
charly	0:b79cb3278583	109	#define RFM_CONFIG_BAND_433 0x8010
charly	0:b79cb3278583	110	#define RFM_CONFIG_BAND_868 0x8020
charly	0:b79cb3278583	111	#define RFM_CONFIG_BAND_915 0x8030
charly	0:b79cb3278583	112	#define RFM_CONFIG_X_8_5pf 0x8000 // Crystal Load Capacitor
charly	0:b79cb3278583	113	#define RFM_CONFIG_X_9_0pf 0x8001
charly	0:b79cb3278583	114	#define RFM_CONFIG_X_9_5pf 0x8002
charly	0:b79cb3278583	115	#define RFM_CONFIG_X_10_0pf 0x8003
charly	0:b79cb3278583	116	#define RFM_CONFIG_X_10_5pf 0x8004
charly	0:b79cb3278583	117	#define RFM_CONFIG_X_11_0pf 0x8005
charly	0:b79cb3278583	118	#define RFM_CONFIG_X_11_5pf 0x8006
charly	0:b79cb3278583	119	#define RFM_CONFIG_X_12_0pf 0x8007
charly	0:b79cb3278583	120	#define RFM_CONFIG_X_12_5pf 0x8008
charly	0:b79cb3278583	121	#define RFM_CONFIG_X_13_0pf 0x8009
charly	0:b79cb3278583	122	#define RFM_CONFIG_X_13_5pf 0x800A
charly	0:b79cb3278583	123	#define RFM_CONFIG_X_14_0pf 0x800B
charly	0:b79cb3278583	124	#define RFM_CONFIG_X_14_5pf 0x800C
charly	0:b79cb3278583	125	#define RFM_CONFIG_X_15_0pf 0x800D
charly	0:b79cb3278583	126	#define RFM_CONFIG_X_15_5pf 0x800E
charly	0:b79cb3278583	127	#define RFM_CONFIG_X_16_0pf 0x800F
charly	0:b79cb3278583	128
charly	0:b79cb3278583	129	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	130	//
charly	0:b79cb3278583	131	// 2. Power Management Command
charly	0:b79cb3278583	132	//
charly	0:b79cb3278583	133	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	134
charly	0:b79cb3278583	135	#define RFM_POWER_MANAGEMENT 0x8200
charly	0:b79cb3278583	136
charly	0:b79cb3278583	137	#define RFM_POWER_MANAGEMENT_ER 0x8280 // Enable receiver
charly	0:b79cb3278583	138	#define RFM_POWER_MANAGEMENT_EBB 0x8240 // Enable base band block
charly	0:b79cb3278583	139	#define RFM_POWER_MANAGEMENT_ET 0x8220 // Enable transmitter
charly	0:b79cb3278583	140	#define RFM_POWER_MANAGEMENT_ES 0x8210 // Enable synthesizer
charly	0:b79cb3278583	141	#define RFM_POWER_MANAGEMENT_EX 0x8208 // Enable crystal oscillator
charly	0:b79cb3278583	142	#define RFM_POWER_MANAGEMENT_EB 0x8204 // Enable low battery detector
charly	0:b79cb3278583	143	#define RFM_POWER_MANAGEMENT_EW 0x8202 // Enable wake-up timer
charly	0:b79cb3278583	144	#define RFM_POWER_MANAGEMENT_DC 0x8201 // Disable clock output of CLK pin
charly	0:b79cb3278583	145
charly	0:b79cb3278583	146	#ifndef RFM_CLK_OUTPUT
charly	0:b79cb3278583	147	#error RFM_CLK_OUTPUT must be defined to 0 or 1
charly	0:b79cb3278583	148	#endif
charly	0:b79cb3278583	149	#if RFM_CLK_OUTPUT
charly	0:b79cb3278583	150	#define RFM_TX_ON_PRE() RFM_SPI_16( \
charly	0:b79cb3278583	151	RFM_POWER_MANAGEMENT_ES \| \
charly	0:b79cb3278583	152	RFM_POWER_MANAGEMENT_EX )
charly	0:b79cb3278583	153	#define RFM_TX_ON() RFM_SPI_16( \
charly	0:b79cb3278583	154	RFM_POWER_MANAGEMENT_ET \| \
charly	0:b79cb3278583	155	RFM_POWER_MANAGEMENT_ES \| \
charly	0:b79cb3278583	156	RFM_POWER_MANAGEMENT_EX )
charly	0:b79cb3278583	157	#define RFM_RX_ON() RFM_SPI_16( \
charly	0:b79cb3278583	158	RFM_POWER_MANAGEMENT_ER \| \
charly	0:b79cb3278583	159	RFM_POWER_MANAGEMENT_EBB \| \
charly	0:b79cb3278583	160	RFM_POWER_MANAGEMENT_ES \| \
charly	0:b79cb3278583	161	RFM_POWER_MANAGEMENT_EX )
charly	0:b79cb3278583	162	#define RFM_OFF() RFM_SPI_16( \
charly	0:b79cb3278583	163	RFM_POWER_MANAGEMENT_EX )
charly	0:b79cb3278583	164	#else
charly	0:b79cb3278583	165	#define RFM_TX_ON_PRE() RFM_SPI_16( \
charly	0:b79cb3278583	166	RFM_POWER_MANAGEMENT_DC \| \
charly	0:b79cb3278583	167	RFM_POWER_MANAGEMENT_ES \| \
charly	0:b79cb3278583	168	RFM_POWER_MANAGEMENT_EX )
charly	0:b79cb3278583	169	#define RFM_TX_ON() RFM_SPI_16( \
charly	0:b79cb3278583	170	RFM_POWER_MANAGEMENT_DC \| \
charly	0:b79cb3278583	171	RFM_POWER_MANAGEMENT_ET \| \
charly	0:b79cb3278583	172	RFM_POWER_MANAGEMENT_ES \| \
charly	0:b79cb3278583	173	RFM_POWER_MANAGEMENT_EX )
charly	0:b79cb3278583	174	#define RFM_RX_ON() RFM_SPI_16( \
charly	0:b79cb3278583	175	RFM_POWER_MANAGEMENT_DC \| \
charly	0:b79cb3278583	176	RFM_POWER_MANAGEMENT_ER \| \
charly	0:b79cb3278583	177	RFM_POWER_MANAGEMENT_EBB \| \
charly	0:b79cb3278583	178	RFM_POWER_MANAGEMENT_ES \| \
charly	0:b79cb3278583	179	RFM_POWER_MANAGEMENT_EX )
charly	0:b79cb3278583	180	#define RFM_OFF() RFM_SPI_16(RFM_POWER_MANAGEMENT_DC)
charly	0:b79cb3278583	181	#endif
charly	0:b79cb3278583	182	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	183	//
charly	0:b79cb3278583	184	// 3. Frequency Setting Command
charly	0:b79cb3278583	185	//
charly	0:b79cb3278583	186	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	187
charly	0:b79cb3278583	188	#define RFM_FREQUENCY 0xA000
charly	0:b79cb3278583	189
charly	0:b79cb3278583	190	#define RFM_FREQ_315Band(v) (uint16_t)((v/10.0-31)*4000)
charly	0:b79cb3278583	191	#define RFM_FREQ_433Band(v) (uint16_t)((v/10.0-43)*4000)
charly	0:b79cb3278583	192	#define RFM_FREQ_868Band(v) (uint16_t)((v/20.0-43)*4000)
charly	0:b79cb3278583	193	#define RFM_FREQ_915Band(v) (uint16_t)((v/30.0-30)*4000)
charly	0:b79cb3278583	194
charly	0:b79cb3278583	195	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	196	//
charly	0:b79cb3278583	197	// 4. Data Rate Command
charly	0:b79cb3278583	198	//
charly	0:b79cb3278583	199	/////////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	200
charly	0:b79cb3278583	201	#define RFM_BAUD_RATE 9600
charly	0:b79cb3278583	202
charly	0:b79cb3278583	203	#define RFM_DATA_RATE 0xC600
charly	0:b79cb3278583	204
charly	0:b79cb3278583	205	#define RFM_DATA_RATE_CS 0xC680
charly	0:b79cb3278583	206	#define RFM_DATA_RATE_4800 0xC647
charly	0:b79cb3278583	207	#define RFM_DATA_RATE_9600 0xC623
charly	0:b79cb3278583	208	#define RFM_DATA_RATE_19200 0xC611
charly	0:b79cb3278583	209	#define RFM_DATA_RATE_38400 0xC608
charly	0:b79cb3278583	210	#define RFM_DATA_RATE_57600 0xC605
charly	0:b79cb3278583	211
charly	0:b79cb3278583	212	#define RFM_SET_DATARATE(baud) ( ((baud)<5400) ? (RFM_DATA_RATE_CS\|((43104/(baud))-1)) : (RFM_DATA_RATE\|((344828UL/(baud))-1)) )
charly	0:b79cb3278583	213
charly	0:b79cb3278583	214	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	215	//
charly	0:b79cb3278583	216	// 5. Receiver Control Command
charly	0:b79cb3278583	217	//
charly	0:b79cb3278583	218	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	219
charly	0:b79cb3278583	220	#define RFM_RX_CONTROL 0x9000
charly	0:b79cb3278583	221
charly	0:b79cb3278583	222	#define RFM_RX_CONTROL_P20_INT 0x9000 // Pin20 = ExternalInt
charly	0:b79cb3278583	223	#define RFM_RX_CONTROL_P20_VDI 0x9400 // Pin20 = VDI out
charly	0:b79cb3278583	224
charly	0:b79cb3278583	225	#define RFM_RX_CONTROL_VDI_FAST 0x9000 // fast VDI Response time
charly	0:b79cb3278583	226	#define RFM_RX_CONTROL_VDI_MED 0x9100 // medium
charly	0:b79cb3278583	227	#define RFM_RX_CONTROL_VDI_SLOW 0x9200 // slow
charly	0:b79cb3278583	228	#define RFM_RX_CONTROL_VDI_ON 0x9300 // Always on
charly	0:b79cb3278583	229
charly	0:b79cb3278583	230	#define RFM_RX_CONTROL_BW_400 0x9020 // bandwidth 400kHz
charly	0:b79cb3278583	231	#define RFM_RX_CONTROL_BW_340 0x9040 // bandwidth 340kHz
charly	0:b79cb3278583	232	#define RFM_RX_CONTROL_BW_270 0x9060 // bandwidth 270kHz
charly	0:b79cb3278583	233	#define RFM_RX_CONTROL_BW_200 0x9080 // bandwidth 200kHz
charly	0:b79cb3278583	234	#define RFM_RX_CONTROL_BW_134 0x90A0 // bandwidth 134kHz
charly	0:b79cb3278583	235	#define RFM_RX_CONTROL_BW_67 0x90C0 // bandwidth 67kHz
charly	0:b79cb3278583	236
charly	0:b79cb3278583	237	#define RFM_RX_CONTROL_GAIN_0 0x9000 // LNA gain 0db
charly	0:b79cb3278583	238	#define RFM_RX_CONTROL_GAIN_6 0x9008 // LNA gain -6db
charly	0:b79cb3278583	239	#define RFM_RX_CONTROL_GAIN_14 0x9010 // LNA gain -14db
charly	0:b79cb3278583	240	#define RFM_RX_CONTROL_GAIN_20 0x9018 // LNA gain -20db
charly	0:b79cb3278583	241
charly	0:b79cb3278583	242	#define RFM_RX_CONTROL_RSSI_103 0x9000 // DRSSI threshold -103dbm
charly	0:b79cb3278583	243	#define RFM_RX_CONTROL_RSSI_97 0x9001 // DRSSI threshold -97dbm
charly	0:b79cb3278583	244	#define RFM_RX_CONTROL_RSSI_91 0x9002 // DRSSI threshold -91dbm
charly	0:b79cb3278583	245	#define RFM_RX_CONTROL_RSSI_85 0x9003 // DRSSI threshold -85dbm
charly	0:b79cb3278583	246	#define RFM_RX_CONTROL_RSSI_79 0x9004 // DRSSI threshold -79dbm
charly	0:b79cb3278583	247	#define RFM_RX_CONTROL_RSSI_73 0x9005 // DRSSI threshold -73dbm
charly	0:b79cb3278583	248	//#define RFM_RX_CONTROL_RSSI_67 0x9006 // DRSSI threshold -67dbm // RF12B reserved
charly	0:b79cb3278583	249	//#define RFM_RX_CONTROL_RSSI_61 0x9007 // DRSSI threshold -61dbm // RF12B reserved
charly	0:b79cb3278583	250
charly	0:b79cb3278583	251	#define RFM_RX_CONTROL_BW(baud) (((baud)<8000) ? \
charly	0:b79cb3278583	252	RFM_RX_CONTROL_BW_67 : \
charly	0:b79cb3278583	253	( \
charly	0:b79cb3278583	254	((baud)<30000) ? \
charly	0:b79cb3278583	255	RFM_RX_CONTROL_BW_134 : \
charly	0:b79cb3278583	256	RFM_RX_CONTROL_BW_200 \
charly	0:b79cb3278583	257	))
charly	0:b79cb3278583	258
charly	0:b79cb3278583	259	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	260	//
charly	0:b79cb3278583	261	// 6. Data Filter Command
charly	0:b79cb3278583	262	//
charly	0:b79cb3278583	263	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	264
charly	0:b79cb3278583	265	#define RFM_DATA_FILTER 0xC228
charly	0:b79cb3278583	266
charly	0:b79cb3278583	267	#define RFM_DATA_FILTER_AL 0xC2A8 // clock recovery auto-lock
charly	0:b79cb3278583	268	#define RFM_DATA_FILTER_ML 0xC268 // clock recovery fast mode
charly	0:b79cb3278583	269	#define RFM_DATA_FILTER_DIG 0xC228 // data filter type digital
charly	0:b79cb3278583	270	#define RFM_DATA_FILTER_ANALOG 0xC238 // data filter type analog
charly	0:b79cb3278583	271	#define RFM_DATA_FILTER_DQD(level) (RFM_DATA_FILTER \| (level & 0x7))
charly	0:b79cb3278583	272
charly	0:b79cb3278583	273	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	274	//
charly	0:b79cb3278583	275	// 7. FIFO and Reset Mode Command
charly	0:b79cb3278583	276	//
charly	0:b79cb3278583	277	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	278
charly	0:b79cb3278583	279	#define RFM_FIFO 0xCA00
charly	0:b79cb3278583	280
charly	0:b79cb3278583	281	#define RFM_FIFO_AL 0xCA04 // FIFO Start condition sync-word/always
charly	0:b79cb3278583	282	#define RFM_FIFO_FF 0xCA02 // Enable FIFO fill
charly	0:b79cb3278583	283	#define RFM_FIFO_DR 0xCA01 // Disable hi sens reset mode
charly	0:b79cb3278583	284	#define RFM_FIFO_IT(level) (RFM_FIFO \| (( (level) & 0xF)<<4))
charly	0:b79cb3278583	285
charly	0:b79cb3278583	286	#define RFM_FIFO_OFF() RFM_SPI_16(RFM_FIFO_IT(8) \| RFM_FIFO_DR)
charly	0:b79cb3278583	287	#define RFM_FIFO_ON() RFM_SPI_16(RFM_FIFO_IT(8) \| RFM_FIFO_FF \| RFM_FIFO_DR)
charly	0:b79cb3278583	288
charly	0:b79cb3278583	289	/////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	290	//
charly	0:b79cb3278583	291	// 8. Receiver FIFO Read
charly	0:b79cb3278583	292	//
charly	0:b79cb3278583	293	/////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	294
charly	0:b79cb3278583	295	#define RFM_READ_FIFO() (RFM_SPI_16(0xB000) & 0xFF)
charly	0:b79cb3278583	296
charly	0:b79cb3278583	297	/////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	298	//
charly	0:b79cb3278583	299	// 9. AFC Command
charly	0:b79cb3278583	300	//
charly	0:b79cb3278583	301	/////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	302
charly	0:b79cb3278583	303	#define RFM_AFC 0xC400
charly	0:b79cb3278583	304
charly	0:b79cb3278583	305	#define RFM_AFC_EN 0xC401
charly	0:b79cb3278583	306	#define RFM_AFC_OE 0xC402
charly	0:b79cb3278583	307	#define RFM_AFC_FI 0xC404
charly	0:b79cb3278583	308	#define RFM_AFC_ST 0xC408
charly	0:b79cb3278583	309
charly	0:b79cb3278583	310	// Limits the value of the frequency offset register to the next values:
charly	0:b79cb3278583	311
charly	0:b79cb3278583	312	#define RFM_AFC_RANGE_LIMIT_NO 0xC400 // 0: No restriction
charly	0:b79cb3278583	313	#define RFM_AFC_RANGE_LIMIT_15_16 0xC410 // 1: +15 fres to -16 fres
charly	0:b79cb3278583	314	#define RFM_AFC_RANGE_LIMIT_7_8 0xC420 // 2: +7 fres to -8 fres
charly	0:b79cb3278583	315	#define RFM_AFC_RANGE_LIMIT_3_4 0xC430 // 3: +3 fres to -4 fres
charly	0:b79cb3278583	316
charly	0:b79cb3278583	317	// fres=2.5 kHz in 315MHz and 433MHz Bands
charly	0:b79cb3278583	318	// fres=5.0 kHz in 868MHz Band
charly	0:b79cb3278583	319	// fres=7.5 kHz in 915MHz Band
charly	0:b79cb3278583	320
charly	0:b79cb3278583	321	#define RFM_AFC_AUTO_OFF 0xC400 // 0: Auto mode off (Strobe is controlled by microcontroller)
charly	0:b79cb3278583	322	#define RFM_AFC_AUTO_ONCE 0xC440 // 1: Runs only once after each power-up
charly	0:b79cb3278583	323	#define RFM_AFC_AUTO_VDI 0xC480 // 2: Keep the foffset only during receiving(VDI=high)
charly	0:b79cb3278583	324	#define RFM_AFC_AUTO_INDEPENDENT 0xC4C0 // 3: Keep the foffset value independently trom the state of the VDI signal
charly	0:b79cb3278583	325
charly	0:b79cb3278583	326	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	327	//
charly	0:b79cb3278583	328	// 10. TX Configuration Control Command
charly	0:b79cb3278583	329	//
charly	0:b79cb3278583	330	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	331
charly	0:b79cb3278583	332	#define RFM_TX_CONTROL 0x9800
charly	0:b79cb3278583	333
charly	0:b79cb3278583	334	#define RFM_TX_CONTROL_POW_0 0x9800
charly	0:b79cb3278583	335	#define RFM_TX_CONTROL_POW_3 0x9801
charly	0:b79cb3278583	336	#define RFM_TX_CONTROL_POW_6 0x9802
charly	0:b79cb3278583	337	#define RFM_TX_CONTROL_POW_9 0x9803
charly	0:b79cb3278583	338	#define RFM_TX_CONTROL_POW_12 0x9804
charly	0:b79cb3278583	339	#define RFM_TX_CONTROL_POW_15 0x9805
charly	0:b79cb3278583	340	#define RFM_TX_CONTROL_POW_18 0x9806
charly	0:b79cb3278583	341	#define RFM_TX_CONTROL_POW_21 0x9807
charly	0:b79cb3278583	342	#define RFM_TX_CONTROL_MOD_15 0x9800
charly	0:b79cb3278583	343	#define RFM_TX_CONTROL_MOD_30 0x9810
charly	0:b79cb3278583	344	#define RFM_TX_CONTROL_MOD_45 0x9820
charly	0:b79cb3278583	345	#define RFM_TX_CONTROL_MOD_60 0x9830
charly	0:b79cb3278583	346	#define RFM_TX_CONTROL_MOD_75 0x9840
charly	0:b79cb3278583	347	#define RFM_TX_CONTROL_MOD_90 0x9850
charly	0:b79cb3278583	348	#define RFM_TX_CONTROL_MOD_105 0x9860
charly	0:b79cb3278583	349	#define RFM_TX_CONTROL_MOD_120 0x9870
charly	0:b79cb3278583	350	#define RFM_TX_CONTROL_MOD_135 0x9880
charly	0:b79cb3278583	351	#define RFM_TX_CONTROL_MOD_150 0x9890
charly	0:b79cb3278583	352	#define RFM_TX_CONTROL_MOD_165 0x98A0
charly	0:b79cb3278583	353	#define RFM_TX_CONTROL_MOD_180 0x98B0
charly	0:b79cb3278583	354	#define RFM_TX_CONTROL_MOD_195 0x98C0
charly	0:b79cb3278583	355	#define RFM_TX_CONTROL_MOD_210 0x98D0
charly	0:b79cb3278583	356	#define RFM_TX_CONTROL_MOD_225 0x98E0
charly	0:b79cb3278583	357	#define RFM_TX_CONTROL_MOD_240 0x98F0
charly	0:b79cb3278583	358	#define RFM_TX_CONTROL_MP 0x9900
charly	0:b79cb3278583	359
charly	0:b79cb3278583	360	#define RFM_TX_CONTROL_MOD(baud) (((baud)<8000) ? \
charly	0:b79cb3278583	361	RFM_TX_CONTROL_MOD_45 : \
charly	0:b79cb3278583	362	( \
charly	0:b79cb3278583	363	((baud)<20000) ? \
charly	0:b79cb3278583	364	RFM_TX_CONTROL_MOD_60 : \
charly	0:b79cb3278583	365	( \
charly	0:b79cb3278583	366	((baud)<30000) ? \
charly	0:b79cb3278583	367	RFM_TX_CONTROL_MOD_75 : \
charly	0:b79cb3278583	368	( \
charly	0:b79cb3278583	369	((baud)<40000) ? \
charly	0:b79cb3278583	370	RFM_TX_CONTROL_MOD_90 : \
charly	0:b79cb3278583	371	RFM_TX_CONTROL_MOD_120 \
charly	0:b79cb3278583	372	) \
charly	0:b79cb3278583	373	) \
charly	0:b79cb3278583	374	))
charly	0:b79cb3278583	375
charly	0:b79cb3278583	376	/////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	377	//
charly	0:b79cb3278583	378	// 11. Transmitter Register Write Command
charly	0:b79cb3278583	379	//
charly	0:b79cb3278583	380	/////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	381
charly	0:b79cb3278583	382	//#define RFM_WRITE(byte) RFM_SPI_16(0xB800 \| ((byte) & 0xFF))
charly	0:b79cb3278583	383	#define RFM_WRITE(byte) RFM_SPI_16(0xB800 \| (byte) )
charly	0:b79cb3278583	384
charly	0:b79cb3278583	385	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	386	//
charly	0:b79cb3278583	387	// 12. Wake-up Timer Command
charly	0:b79cb3278583	388	//
charly	0:b79cb3278583	389	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	390
charly	0:b79cb3278583	391	#define RFM_WAKEUP_TIMER 0xE000
charly	0:b79cb3278583	392	#define RFM_WAKEUP_SET(time) RFM_SPI_16(RFM_WAKEUP_TIMER \| (time))
charly	0:b79cb3278583	393
charly	0:b79cb3278583	394	#define RFM_WAKEUP_480s (RFM_WAKEUP_TIMER \|(11 << 8)\| 234)
charly	0:b79cb3278583	395	#define RFM_WAKEUP_240s (RFM_WAKEUP_TIMER \|(10 << 8)\| 234)
charly	0:b79cb3278583	396	#define RFM_WAKEUP_120s (RFM_WAKEUP_TIMER \|(9 << 8)\| 234)
charly	0:b79cb3278583	397	#define RFM_WAKEUP_119s (RFM_WAKEUP_TIMER \|(9 << 8)\| 232)
charly	0:b79cb3278583	398
charly	0:b79cb3278583	399	#define RFM_WAKEUP_60s (RFM_WAKEUP_TIMER \|(8 << 8) \| 235)
charly	0:b79cb3278583	400	#define RFM_WAKEUP_59s (RFM_WAKEUP_TIMER \|(8 << 8) \| 230)
charly	0:b79cb3278583	401
charly	0:b79cb3278583	402	#define RFM_WAKEUP_30s (RFM_WAKEUP_TIMER \|(7 << 8) \| 235)
charly	0:b79cb3278583	403	#define RFM_WAKEUP_29s (RFM_WAKEUP_TIMER \|(7 << 8) \| 227)
charly	0:b79cb3278583	404
charly	0:b79cb3278583	405	#define RFM_WAKEUP_8s (RFM_WAKEUP_TIMER \|(5 << 8) \| 250)
charly	0:b79cb3278583	406	#define RFM_WAKEUP_7s (RFM_WAKEUP_TIMER \|(5 << 8) \| 219)
charly	0:b79cb3278583	407	#define RFM_WAKEUP_6s (RFM_WAKEUP_TIMER \|(6 << 8) \| 94)
charly	0:b79cb3278583	408	#define RFM_WAKEUP_5s (RFM_WAKEUP_TIMER \|(5 << 8) \| 156)
charly	0:b79cb3278583	409	#define RFM_WAKEUP_4s (RFM_WAKEUP_TIMER \|(5 << 8) \| 125)
charly	0:b79cb3278583	410	#define RFM_WAKEUP_1s (RFM_WAKEUP_TIMER \|(2 << 8) \| 250)
charly	0:b79cb3278583	411	#define RFM_WAKEUP_900ms (RFM_WAKEUP_TIMER \|(2 << 8) \| 225)
charly	0:b79cb3278583	412	#define RFM_WAKEUP_800ms (RFM_WAKEUP_TIMER \|(2 << 8) \| 200)
charly	0:b79cb3278583	413	#define RFM_WAKEUP_700ms (RFM_WAKEUP_TIMER \|(2 << 8) \| 175)
charly	0:b79cb3278583	414	#define RFM_WAKEUP_600ms (RFM_WAKEUP_TIMER \|(2 << 8) \| 150)
charly	0:b79cb3278583	415	#define RFM_WAKEUP_500ms (RFM_WAKEUP_TIMER \|(2 << 8) \| 125)
charly	0:b79cb3278583	416	#define RFM_WAKEUP_400ms (RFM_WAKEUP_TIMER \|(2 << 8) \| 100)
charly	0:b79cb3278583	417	#define RFM_WAKEUP_300ms (RFM_WAKEUP_TIMER \|(2 << 8) \| 75)
charly	0:b79cb3278583	418	#define RFM_WAKEUP_200ms (RFM_WAKEUP_TIMER \|(2 << 8) \| 50)
charly	0:b79cb3278583	419	#define RFM_WAKEUP_100ms (RFM_WAKEUP_TIMER \|(2 << 8) \| 25)
charly	0:b79cb3278583	420
charly	0:b79cb3278583	421	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	422	//
charly	0:b79cb3278583	423	// 13. Low Duty-Cycle Command
charly	0:b79cb3278583	424	//
charly	0:b79cb3278583	425	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	426
charly	0:b79cb3278583	427	#define RFM_LOW_DUTY_CYCLE 0xC800
charly	0:b79cb3278583	428
charly	0:b79cb3278583	429	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	430	//
charly	0:b79cb3278583	431	// 14. Low Battery Detector Command
charly	0:b79cb3278583	432	//
charly	0:b79cb3278583	433	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	434
charly	0:b79cb3278583	435	#define RFM_LOW_BATT_DETECT 0xC000
charly	0:b79cb3278583	436	#define RFM_LOW_BATT_DETECT_D_1MHZ 0xC000
charly	0:b79cb3278583	437	#define RFM_LOW_BATT_DETECT_D_1_25MHZ 0xC020
charly	0:b79cb3278583	438	#define RFM_LOW_BATT_DETECT_D_1_66MHZ 0xC040
charly	0:b79cb3278583	439	#define RFM_LOW_BATT_DETECT_D_2MHZ 0xC060
charly	0:b79cb3278583	440	#define RFM_LOW_BATT_DETECT_D_2_5MHZ 0xC080
charly	0:b79cb3278583	441	#define RFM_LOW_BATT_DETECT_D_3_33MHZ 0xC0A0
charly	0:b79cb3278583	442	#define RFM_LOW_BATT_DETECT_D_5MHZ 0xC0C0
charly	0:b79cb3278583	443	#define RFM_LOW_BATT_DETECT_D_10MHZ 0xC0E0
charly	0:b79cb3278583	444
charly	0:b79cb3278583	445	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	446	//
charly	0:b79cb3278583	447	// 15. Status Read Command
charly	0:b79cb3278583	448	//
charly	0:b79cb3278583	449	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	450
charly	0:b79cb3278583	451	#define RFM_READ_STATUS() RFM_SPI_16(0x0000)
charly	0:b79cb3278583	452	#define RFM_READ_STATUS_FFIT() SPI_1 (0x00)
charly	0:b79cb3278583	453	#define RFM_READ_STATUS_RGIT RFM_READ_STATUS_FFIT
charly	0:b79cb3278583	454
charly	0:b79cb3278583	455	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	456
charly	0:b79cb3278583	457	#include <stdint.h>
charly	0:b79cb3278583	458	void RFM_init(void);
charly	0:b79cb3278583	459	uint16_t rfm_spi16(uint16_t outval);
charly	0:b79cb3278583	460
charly	0:b79cb3278583	461	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	462
charly	0:b79cb3278583	463	// RFM air protocol flags:
charly	0:b79cb3278583	464
charly	0:b79cb3278583	465	#define RFMPROTO_FLAGS_BITASK_PACKETTYPE 0b11000000 //!< the uppermost 2 bits of the flags field encode the packettype
charly	0:b79cb3278583	466	#define RFMPROTO_FLAGS_PACKETTYPE_BROADCAST 0b00000000 //!< broadcast packettype (message from hr20, protocol; step 1)
charly	0:b79cb3278583	467	#define RFMPROTO_FLAGS_PACKETTYPE_COMMAND 0b01000000 //!< command packettype (message to hr20, protocol; step 2)
charly	0:b79cb3278583	468	#define RFMPROTO_FLAGS_PACKETTYPE_REPLY 0b10000000 //!< reply packettype (message from hr20, protocol; step 3)
charly	0:b79cb3278583	469	#define RFMPROTO_FLAGS_PACKETTYPE_SPECIAL 0b11000000 //!< currently unused packettype
charly	0:b79cb3278583	470
charly	0:b79cb3278583	471	#define RFMPROTO_FLAGS_BITASK_DEVICETYPE 0b00011111 //!< the lowermost 5 bytes denote the device type. this way other sensors and actors may coexist
charly	0:b79cb3278583	472	#define RFMPROTO_FLAGS_DEVICETYPE_OPENHR20 0b00010100 //!< topen HR20 device type. 10100 is for decimal 20
charly	0:b79cb3278583	473
charly	0:b79cb3278583	474	#define RFMPROTO_IS_PACKETTYPE_BROADCAST(FLAGS) ( RFMPROTO_FLAGS_PACKETTYPE_BROADCAST == ((FLAGS) & RFMPROTO_FLAGS_BITASK_PACKETTYPE) )
charly	0:b79cb3278583	475	#define RFMPROTO_IS_PACKETTYPE_COMMAND(FLAGS) ( RFMPROTO_FLAGS_PACKETTYPE_COMMAND == ((FLAGS) & RFMPROTO_FLAGS_BITASK_PACKETTYPE) )
charly	0:b79cb3278583	476	#define RFMPROTO_IS_PACKETTYPE_REPLY(FLAGS) ( RFMPROTO_FLAGS_PACKETTYPE_REPLY == ((FLAGS) & RFMPROTO_FLAGS_BITASK_PACKETTYPE) )
charly	0:b79cb3278583	477	#define RFMPROTO_IS_PACKETTYPE_SPECIAL(FLAGS) ( RFMPROTO_FLAGS_PACKETTYPE_SPECIAL == ((FLAGS) & RFMPROTO_FLAGS_BITASK_PACKETTYPE) )
charly	0:b79cb3278583	478	#define RFMPROTO_IS_DEVICETYPE_OPENHR20(FLAGS) ( RFMPROTO_FLAGS_DEVICETYPE_OPENHR20 == ((FLAGS) & RFMPROTO_FLAGS_BITASK_DEVICETYPE) )
charly	0:b79cb3278583	479
charly	0:b79cb3278583	480	///////////////////////////////////////////////////////////////////////////////
charly	0:b79cb3278583	481
charly	0:b79cb3278583	482	// RFM send and receive buffer:
charly	0:b79cb3278583	483
charly	0:b79cb3278583	484	#define RFM_FRAME_MAX 80
charly	0:b79cb3278583	485
charly	0:b79cb3278583	486	typedef enum {rfmmode_stop=0,
charly	0:b79cb3278583	487	rfmmode_start_tx=1,
charly	0:b79cb3278583	488	rfmmode_tx=2,
charly	0:b79cb3278583	489	rfmmode_tx_done=3,
charly	0:b79cb3278583	490	rfmmode_rx=4,
charly	0:b79cb3278583	491	rfmmode_rx_owf=5,
charly	0:b79cb3278583	492	} rfm_mode_t;
charly	0:b79cb3278583	493
charly	0:b79cb3278583	494	extern uint8_t rfm_framebuf[RFM_FRAME_MAX];
charly	0:b79cb3278583	495	extern uint8_t rfm_framesize;
charly	0:b79cb3278583	496	extern uint8_t rfm_framepos;
charly	0:b79cb3278583	497	extern rfm_mode_t rfm_mode;
charly	0:b79cb3278583	498
charly	0:b79cb3278583	499	#define rfm_start_tx()
charly	0:b79cb3278583	500	// (rfm_mode=rfmmode_start_tx)
charly	0:b79cb3278583	501
charly	0:b79cb3278583	502	#endif

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Type:	Program
Mbed OS support:	Mbed 2 deprecated
Created:	27 Apr 2011
Imports:	15
Forks:	0
Commits:	1
Dependents:	0
Dependencies:	3
Followers:	3

rfm.h@0:b79cb3278583, 2011-04-27 (annotated)

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