Projet_APP5 / PowerControl

jm6wud

Dependents:   test_mbed_32U4

PowerControl.h@1:d37f2d5a0362, 2021-12-08 (annotated)

Committer:
bouaziz
Date:
Wed Dec 08 08:43:01 2021 +0000
Revision:
1:d37f2d5a0362
Parent:
0:1e3c93949823 
no changes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jm6wud 0:1e3c93949823 1 /* mbed PowerControl Library
jm6wud 0:1e3c93949823 2 * Copyright (c) 2010 Michael Wei
jm6wud 0:1e3c93949823 3 */
jm6wud 0:1e3c93949823 4
jm6wud 0:1e3c93949823 5 #ifndef MBED_POWERCONTROL_H
jm6wud 0:1e3c93949823 6 #define MBED_POWERCONTROL_H
jm6wud 0:1e3c93949823 7
jm6wud 0:1e3c93949823 8 //shouldn't have to include, but fixes weird problems with defines
bouaziz 1:d37f2d5a0362 9 #include "LPC17xx.h"
jm6wud 0:1e3c93949823 10
jm6wud 0:1e3c93949823 11 //System Control Register
jm6wud 0:1e3c93949823 12 // bit 0: Reserved
jm6wud 0:1e3c93949823 13 // bit 1: Sleep on Exit
jm6wud 0:1e3c93949823 14 #define LPC1768_SCR_SLEEPONEXIT 0x2
jm6wud 0:1e3c93949823 15 // bit 2: Deep Sleep
jm6wud 0:1e3c93949823 16 #define LPC1768_SCR_SLEEPDEEP 0x4
jm6wud 0:1e3c93949823 17 // bit 3: Resereved
jm6wud 0:1e3c93949823 18 // bit 4: Send on Pending
jm6wud 0:1e3c93949823 19 #define LPC1768_SCR_SEVONPEND 0x10
jm6wud 0:1e3c93949823 20 // bit 5-31: Reserved
jm6wud 0:1e3c93949823 21
jm6wud 0:1e3c93949823 22 //Power Control Register
jm6wud 0:1e3c93949823 23 // bit 0: Power mode control bit 0 (power-down mode)
jm6wud 0:1e3c93949823 24 #define LPC1768_PCON_PM0 0x1
jm6wud 0:1e3c93949823 25 // bit 1: Power mode control bit 1 (deep power-down mode)
jm6wud 0:1e3c93949823 26 #define LPC1768_PCON_PM1 0x2
jm6wud 0:1e3c93949823 27 // bit 2: Brown-out reduced power mode
jm6wud 0:1e3c93949823 28 #define LPC1768_PCON_BODRPM 0x4
jm6wud 0:1e3c93949823 29 // bit 3: Brown-out global disable
jm6wud 0:1e3c93949823 30 #define LPC1768_PCON_BOGD 0x8
jm6wud 0:1e3c93949823 31 // bit 4: Brown-out reset disable
jm6wud 0:1e3c93949823 32 #define LPC1768_PCON_BORD 0x10
jm6wud 0:1e3c93949823 33 // bit 5-7 : Reserved
jm6wud 0:1e3c93949823 34 // bit 8: Sleep Mode Entry Flag
jm6wud 0:1e3c93949823 35 #define LPC1768_PCON_SMFLAG 0x100
jm6wud 0:1e3c93949823 36 // bit 9: Deep Sleep Entry Flag
jm6wud 0:1e3c93949823 37 #define LPC1768_PCON_DSFLAG 0x200
jm6wud 0:1e3c93949823 38 // bit 10: Power Down Entry Flag
jm6wud 0:1e3c93949823 39 #define LPC1768_PCON_PDFLAG 0x400
jm6wud 0:1e3c93949823 40 // bit 11: Deep Power Down Entry Flag
jm6wud 0:1e3c93949823 41 #define LPC1768_PCON_DPDFLAG 0x800
jm6wud 0:1e3c93949823 42 // bit 12-31: Reserved
jm6wud 0:1e3c93949823 43
jm6wud 0:1e3c93949823 44 //"Sleep Mode" (WFI).
jm6wud 0:1e3c93949823 45 inline void Sleep(void)
jm6wud 0:1e3c93949823 46 {
jm6wud 0:1e3c93949823 47 __WFI();
jm6wud 0:1e3c93949823 48 }
jm6wud 0:1e3c93949823 49
jm6wud 0:1e3c93949823 50 //"Deep Sleep" Mode
jm6wud 0:1e3c93949823 51 inline void DeepSleep(void)
jm6wud 0:1e3c93949823 52 {
jm6wud 0:1e3c93949823 53 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
jm6wud 0:1e3c93949823 54 __WFI();
jm6wud 0:1e3c93949823 55 }
jm6wud 0:1e3c93949823 56
jm6wud 0:1e3c93949823 57 //"Power-Down" Mode
jm6wud 0:1e3c93949823 58 inline void PowerDown(void)
jm6wud 0:1e3c93949823 59 {
jm6wud 0:1e3c93949823 60 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
jm6wud 0:1e3c93949823 61 LPC_SC->PCON &= ~LPC1768_PCON_PM1;
jm6wud 0:1e3c93949823 62 LPC_SC->PCON |= LPC1768_PCON_PM0;
jm6wud 0:1e3c93949823 63 __WFI();
jm6wud 0:1e3c93949823 64 //reset back to normal
jm6wud 0:1e3c93949823 65 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
jm6wud 0:1e3c93949823 66 }
jm6wud 0:1e3c93949823 67
jm6wud 0:1e3c93949823 68 //"Deep Power-Down" Mode
jm6wud 0:1e3c93949823 69 inline void DeepPowerDown(void)
jm6wud 0:1e3c93949823 70 {
jm6wud 0:1e3c93949823 71 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
jm6wud 0:1e3c93949823 72 LPC_SC->PCON |= LPC1768_PCON_PM1 | LPC1768_PCON_PM0;
jm6wud 0:1e3c93949823 73 __WFI();
jm6wud 0:1e3c93949823 74 //reset back to normal
jm6wud 0:1e3c93949823 75 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
jm6wud 0:1e3c93949823 76 }
jm6wud 0:1e3c93949823 77
jm6wud 0:1e3c93949823 78 //shut down BOD during power-down/deep sleep
jm6wud 0:1e3c93949823 79 inline void BrownOut_ReducedPowerMode_Enable(void)
jm6wud 0:1e3c93949823 80 {
jm6wud 0:1e3c93949823 81 LPC_SC->PCON |= LPC1768_PCON_BODRPM;
jm6wud 0:1e3c93949823 82 }
jm6wud 0:1e3c93949823 83
jm6wud 0:1e3c93949823 84 //turn on BOD during power-down/deep sleep
jm6wud 0:1e3c93949823 85 inline void BrownOut_ReducedPowerMode_Disable(void)
jm6wud 0:1e3c93949823 86 {
jm6wud 0:1e3c93949823 87 LPC_SC->PCON &= ~LPC1768_PCON_BODRPM;
jm6wud 0:1e3c93949823 88 }
jm6wud 0:1e3c93949823 89
jm6wud 0:1e3c93949823 90 //turn off brown out circutry
jm6wud 0:1e3c93949823 91 inline void BrownOut_Global_Disable(void)
jm6wud 0:1e3c93949823 92 {
jm6wud 0:1e3c93949823 93 LPC_SC->PCON |= LPC1768_PCON_BOGD;
jm6wud 0:1e3c93949823 94 }
jm6wud 0:1e3c93949823 95
jm6wud 0:1e3c93949823 96 //turn on brown out circutry
jm6wud 0:1e3c93949823 97 inline void BrownOut_Global_Enable(void)
jm6wud 0:1e3c93949823 98 {
jm6wud 0:1e3c93949823 99 LPC_SC->PCON &= !LPC1768_PCON_BOGD;
jm6wud 0:1e3c93949823 100 }
jm6wud 0:1e3c93949823 101
jm6wud 0:1e3c93949823 102 //turn off brown out reset circutry
jm6wud 0:1e3c93949823 103 inline void BrownOut_Reset_Disable(void)
jm6wud 0:1e3c93949823 104 {
jm6wud 0:1e3c93949823 105 LPC_SC->PCON |= LPC1768_PCON_BORD;
jm6wud 0:1e3c93949823 106 }
jm6wud 0:1e3c93949823 107
jm6wud 0:1e3c93949823 108 //turn on brown outreset circutry
jm6wud 0:1e3c93949823 109 inline void BrownOut_Reset_Enable(void)
jm6wud 0:1e3c93949823 110 {
jm6wud 0:1e3c93949823 111 LPC_SC->PCON &= ~LPC1768_PCON_BORD;
jm6wud 0:1e3c93949823 112 }
jm6wud 0:1e3c93949823 113 //Peripheral Control Register
jm6wud 0:1e3c93949823 114 // bit 0: Reserved
jm6wud 0:1e3c93949823 115 // bit 1: PCTIM0: Timer/Counter 0 power/clock enable
jm6wud 0:1e3c93949823 116 #define LPC1768_PCONP_PCTIM0 0x2
jm6wud 0:1e3c93949823 117 // bit 2: PCTIM1: Timer/Counter 1 power/clock enable
jm6wud 0:1e3c93949823 118 #define LPC1768_PCONP_PCTIM1 0x4
jm6wud 0:1e3c93949823 119 // bit 3: PCUART0: UART 0 power/clock enable
jm6wud 0:1e3c93949823 120 #define LPC1768_PCONP_PCUART0 0x8
jm6wud 0:1e3c93949823 121 // bit 4: PCUART1: UART 1 power/clock enable
jm6wud 0:1e3c93949823 122 #define LPC1768_PCONP_PCUART1 0x10
jm6wud 0:1e3c93949823 123 // bit 5: Reserved
jm6wud 0:1e3c93949823 124 // bit 6: PCPWM1: PWM 1 power/clock enable
jm6wud 0:1e3c93949823 125 #define LPC1768_PCONP_PCPWM1 0x40
jm6wud 0:1e3c93949823 126 // bit 7: PCI2C0: I2C interface 0 power/clock enable
jm6wud 0:1e3c93949823 127 #define LPC1768_PCONP_PCI2C0 0x80
jm6wud 0:1e3c93949823 128 // bit 8: PCSPI: SPI interface power/clock enable
jm6wud 0:1e3c93949823 129 #define LPC1768_PCONP_PCSPI 0x100
jm6wud 0:1e3c93949823 130 // bit 9: PCRTC: RTC power/clock enable
jm6wud 0:1e3c93949823 131 #define LPC1768_PCONP_PCRTC 0x200
jm6wud 0:1e3c93949823 132 // bit 10: PCSSP1: SSP interface 1 power/clock enable
jm6wud 0:1e3c93949823 133 #define LPC1768_PCONP_PCSSP1 0x400
jm6wud 0:1e3c93949823 134 // bit 11: Reserved
jm6wud 0:1e3c93949823 135 // bit 12: PCADC: A/D converter power/clock enable
jm6wud 0:1e3c93949823 136 #define LPC1768_PCONP_PCADC 0x1000
jm6wud 0:1e3c93949823 137 // bit 13: PCCAN1: CAN controller 1 power/clock enable
jm6wud 0:1e3c93949823 138 #define LPC1768_PCONP_PCCAN1 0x2000
jm6wud 0:1e3c93949823 139 // bit 14: PCCAN2: CAN controller 2 power/clock enable
jm6wud 0:1e3c93949823 140 #define LPC1768_PCONP_PCCAN2 0x4000
jm6wud 0:1e3c93949823 141 // bit 15: PCGPIO: GPIOs power/clock enable
jm6wud 0:1e3c93949823 142 #define LPC1768_PCONP_PCGPIO 0x8000
jm6wud 0:1e3c93949823 143 // bit 16: PCRIT: Repetitive interrupt timer power/clock enable
jm6wud 0:1e3c93949823 144 #define LPC1768_PCONP_PCRIT 0x10000
jm6wud 0:1e3c93949823 145 // bit 17: PCMCPWM: Motor control PWM power/clock enable
jm6wud 0:1e3c93949823 146 #define LPC1768_PCONP_PCMCPWM 0x20000
jm6wud 0:1e3c93949823 147 // bit 18: PCQEI: Quadrature encoder interface power/clock enable
jm6wud 0:1e3c93949823 148 #define LPC1768_PCONP_PCQEI 0x40000
jm6wud 0:1e3c93949823 149 // bit 19: PCI2C1: I2C interface 1 power/clock enable
jm6wud 0:1e3c93949823 150 #define LPC1768_PCONP_PCI2C1 0x80000
jm6wud 0:1e3c93949823 151 // bit 20: Reserved
jm6wud 0:1e3c93949823 152 // bit 21: PCSSP0: SSP interface 0 power/clock enable
jm6wud 0:1e3c93949823 153 #define LPC1768_PCONP_PCSSP0 0x200000
jm6wud 0:1e3c93949823 154 // bit 22: PCTIM2: Timer 2 power/clock enable
jm6wud 0:1e3c93949823 155 #define LPC1768_PCONP_PCTIM2 0x400000
jm6wud 0:1e3c93949823 156 // bit 23: PCTIM3: Timer 3 power/clock enable
jm6wud 0:1e3c93949823 157 #define LPC1768_PCONP_PCQTIM3 0x800000
jm6wud 0:1e3c93949823 158 // bit 24: PCUART2: UART 2 power/clock enable
jm6wud 0:1e3c93949823 159 #define LPC1768_PCONP_PCUART2 0x1000000
jm6wud 0:1e3c93949823 160 // bit 25: PCUART3: UART 3 power/clock enable
jm6wud 0:1e3c93949823 161 #define LPC1768_PCONP_PCUART3 0x2000000
jm6wud 0:1e3c93949823 162 // bit 26: PCI2C2: I2C interface 2 power/clock enable
jm6wud 0:1e3c93949823 163 #define LPC1768_PCONP_PCI2C2 0x4000000
jm6wud 0:1e3c93949823 164 // bit 27: PCI2S: I2S interface power/clock enable
jm6wud 0:1e3c93949823 165 #define LPC1768_PCONP_PCI2S 0x8000000
jm6wud 0:1e3c93949823 166 // bit 28: Reserved
jm6wud 0:1e3c93949823 167 // bit 29: PCGPDMA: GP DMA function power/clock enable
jm6wud 0:1e3c93949823 168 #define LPC1768_PCONP_PCGPDMA 0x20000000
jm6wud 0:1e3c93949823 169 // bit 30: PCENET: Ethernet block power/clock enable
jm6wud 0:1e3c93949823 170 #define LPC1768_PCONP_PCENET 0x40000000
jm6wud 0:1e3c93949823 171 // bit 31: PCUSB: USB interface power/clock enable
jm6wud 0:1e3c93949823 172 #define LPC1768_PCONP_PCUSB 0x80000000
jm6wud 0:1e3c93949823 173
jm6wud 0:1e3c93949823 174 //Powers Up specified Peripheral(s)
jm6wud 0:1e3c93949823 175 inline unsigned int Peripheral_PowerUp(unsigned int bitMask)
jm6wud 0:1e3c93949823 176 {
jm6wud 0:1e3c93949823 177 return LPC_SC->PCONP |= bitMask;
jm6wud 0:1e3c93949823 178 }
jm6wud 0:1e3c93949823 179
jm6wud 0:1e3c93949823 180 //Powers Down specified Peripheral(s)
jm6wud 0:1e3c93949823 181 inline unsigned int Peripheral_PowerDown(unsigned int bitMask)
jm6wud 0:1e3c93949823 182 {
jm6wud 0:1e3c93949823 183 return LPC_SC->PCONP &= ~bitMask;
jm6wud 0:1e3c93949823 184 }
jm6wud 0:1e3c93949823 185
jm6wud 0:1e3c93949823 186 //returns if the peripheral is on or off
jm6wud 0:1e3c93949823 187 inline bool Peripheral_GetStatus(unsigned int peripheral)
jm6wud 0:1e3c93949823 188 {
jm6wud 0:1e3c93949823 189 return (LPC_SC->PCONP & peripheral) ? true : false;
jm6wud 0:1e3c93949823 190 }
jm6wud 0:1e3c93949823 191
jm6wud 0:1e3c93949823 192 #endif