How to get rid of one clock delay between spi.write

16 Feb 2013

How do I get rid of the one SPI clock cycle delay between each spi.write command?

I would like to send a continuous 24 bit clock without any clock delay in mbed? It seems to me that it only support 8 and 16 but not 24 bits. Please advise.

/media/uploads/bjsrlu/get_rid_of_1_cycle_delay.jpg

Here is my codes.

#include "mbed.h"

SPI spi(p5, p6, p7); //mosi, miso, sclk
DigitalOut cs_n(p8);
DigitalOut led1(LED1);

Serial pc(USBTX, USBRX); // tx, rx

int main() {
  
    // Chip must be deselected
    cs_n = 1;
    led1 = 0;
 
    // Setup the spi for 8 bit data, high steady state clock,
    // second edge capture, with a 1MHz clock rate
    spi.format(16,3);
    spi.frequency(1000000);
    wait(1);
    while (1) {
    // Select the device by seting chip select low
       
       cs_n = 0;
   
       int Num1=spi.write (0x00);  // send the address location of 0x0010 and expect to read the content to SerialNum  
       int Num2=spi.write (0x00);
       int Num3=spi.write (0x00);  
       int Num4=spi.write (0x00);       
       
       cs_n = 1; 
       
       printf ("Read Value = 0x %2X %2X %2X %2X  \n\n", Num1, Num2,Num3,Num4);   // re-check the content again.
       wait_ms(50);
    }
}
16 Feb 2013

if its just a bitstream you need, rather than "real" SPI you could have a look at the Texas Instruments synchronous serial frame format:

SPI spi(p5,p6,p7);
spi.frequency(1000000);
LPC_SSP1->CR0 |= 0x10;        // Switch to TI mode

main() {
            while (!(LPC_SSP1->SR & 2));   //if TNF-Bit = 0 (FIFO full) then wait; TNF-Bit is Bit 1 in SSPxSR
            LPC_SSP1->DR = (0xff);
            while (!(LPC_SSP1->SR & 2));   //if TNF-Bit = 0 (FIFO full) then wait; TNF-Bit is Bit 1 in SSPxSR
            LPC_SSP1->DR = (0x00);
            while (!(LPC_SSP1->SR & 2));   //if TNF-Bit = 0 (FIFO full) then wait; TNF-Bit is Bit 1 in SSPxSR
            LPC_SSP1->DR = (0x00);
}
//untested

but i am afraid the clock phase doesn't fit your need :-( (mode 3?) A high speed inverter on the clock line maybe?

http://www.nxp.com/documents/user_manual/UM10360.pdf page 413 ish..

16 Feb 2013

I would check if it is the mbed library adding overhead or the LPC1768. You can try it with BurstSPI library, although that one only writes and doesnt read, but it does generate the clock at max speed, you could also use it as starting point to adapt it to reading if that does work.

Easier solution to test which one it is, is changing the clock rate. Does the delay stay constant, or does it stay one cycle.