Zakaria ElQotbi / mbed-src

mbed library sources for airmote

Fork of mbed-src by mbed official

targets/hal/TARGET_NXP/TARGET_LPC81X/us_ticker.c@614:9d86c2ae5de0, 2015-09-01 (annotated)

Committer:
mbed_official
Date:
Tue Sep 01 16:00:09 2015 +0100
Revision:
614:9d86c2ae5de0
Parent:
480:69aad4cbc07a 
Synchronized with git revision 483bb0197fd032956a31330bd6c6eb50758f2dda



Full URL: https://github.com/mbedmicro/mbed/commit/483bb0197fd032956a31330bd6c6eb50758f2dda/



LPC81X: reduce code size and add ARM_GCC support

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 46:bebbbd80dd87 1 /* mbed Microcontroller Library
mbed_official 46:bebbbd80dd87 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 46:bebbbd80dd87 3 *
mbed_official 46:bebbbd80dd87 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 46:bebbbd80dd87 5 * you may not use this file except in compliance with the License.
mbed_official 46:bebbbd80dd87 6 * You may obtain a copy of the License at
mbed_official 46:bebbbd80dd87 7 *
mbed_official 46:bebbbd80dd87 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 46:bebbbd80dd87 9 *
mbed_official 46:bebbbd80dd87 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 46:bebbbd80dd87 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 46:bebbbd80dd87 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 46:bebbbd80dd87 13 * See the License for the specific language governing permissions and
mbed_official 46:bebbbd80dd87 14 * limitations under the License.
mbed_official 46:bebbbd80dd87 15 */
mbed_official 46:bebbbd80dd87 16 #include <stddef.h>
mbed_official 46:bebbbd80dd87 17 #include "us_ticker_api.h"
mbed_official 46:bebbbd80dd87 18 #include "PeripheralNames.h"
mbed_official 46:bebbbd80dd87 19
mbed_official 480:69aad4cbc07a 20 //New, using MRT instead of SCT, needed to free up SCT for PWM
mbed_official 480:69aad4cbc07a 21 //Ported from LPC824 libs
mbed_official 480:69aad4cbc07a 22 static int us_ticker_inited = 0;
mbed_official 614:9d86c2ae5de0 23 static int us_ticker_interrupt_inited = 0;
mbed_official 480:69aad4cbc07a 24 unsigned int ticker_fullcount_us;
mbed_official 480:69aad4cbc07a 25 unsigned long int ticker_expired_count_us = 0;
mbed_official 480:69aad4cbc07a 26 int MRT_Clock_MHz;
mbed_official 46:bebbbd80dd87 27
mbed_official 480:69aad4cbc07a 28 #define US_TICKER_TIMER_IRQn MRT_IRQn
mbed_official 46:bebbbd80dd87 29
mbed_official 46:bebbbd80dd87 30 void us_ticker_init(void) {
mbed_official 480:69aad4cbc07a 31
mbed_official 480:69aad4cbc07a 32 if (us_ticker_inited)
mbed_official 480:69aad4cbc07a 33 return;
mbed_official 480:69aad4cbc07a 34
mbed_official 46:bebbbd80dd87 35 us_ticker_inited = 1;
mbed_official 46:bebbbd80dd87 36
mbed_official 480:69aad4cbc07a 37 // Calculate MRT clock value (MRT has no prescaler)
mbed_official 480:69aad4cbc07a 38 MRT_Clock_MHz = (SystemCoreClock / 1000000);
mbed_official 480:69aad4cbc07a 39 // Calculate fullcounter value in us (MRT has 31 bits and clock is 30 MHz)
mbed_official 480:69aad4cbc07a 40 ticker_fullcount_us = 0x80000000UL/MRT_Clock_MHz;
mbed_official 480:69aad4cbc07a 41
mbed_official 480:69aad4cbc07a 42 // Enable the MRT clock
mbed_official 480:69aad4cbc07a 43 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 10);
mbed_official 480:69aad4cbc07a 44
mbed_official 480:69aad4cbc07a 45 // Clear peripheral reset the MRT
mbed_official 480:69aad4cbc07a 46 LPC_SYSCON->PRESETCTRL |= (1 << 7);
mbed_official 480:69aad4cbc07a 47
mbed_official 480:69aad4cbc07a 48 // Force load interval value (Bit 0-30 is interval value, Bit 31 is Force Load bit)
mbed_official 480:69aad4cbc07a 49 LPC_MRT->INTVAL0 = 0xFFFFFFFFUL;
mbed_official 480:69aad4cbc07a 50 // Enable Ch0 interrupt, Mode 0 is Repeat Interrupt
mbed_official 480:69aad4cbc07a 51 LPC_MRT->CTRL0 = (0x0 << 1) | (0x1 << 0);
mbed_official 480:69aad4cbc07a 52
mbed_official 480:69aad4cbc07a 53 // Force load interval value (Bit 0-30 is interval value, Bit 31 is Force Load bit)
mbed_official 480:69aad4cbc07a 54 LPC_MRT->INTVAL1 = 0x80000000UL;
mbed_official 480:69aad4cbc07a 55 // Disable ch1 interrupt, Mode 0 is Repeat Interrupt
mbed_official 480:69aad4cbc07a 56 LPC_MRT->CTRL1 = (0x0 << 1) | (0x0 << 0);
mbed_official 614:9d86c2ae5de0 57 }
mbed_official 614:9d86c2ae5de0 58
mbed_official 614:9d86c2ae5de0 59 void us_ticker_interrupt_init(void) {
mbed_official 614:9d86c2ae5de0 60
mbed_official 614:9d86c2ae5de0 61 if (us_ticker_interrupt_inited)
mbed_official 614:9d86c2ae5de0 62 return;
mbed_official 614:9d86c2ae5de0 63
mbed_official 614:9d86c2ae5de0 64 us_ticker_interrupt_inited = 1;
mbed_official 614:9d86c2ae5de0 65
mbed_official 480:69aad4cbc07a 66 // Set MRT interrupt vector
mbed_official 46:bebbbd80dd87 67 NVIC_SetVector(US_TICKER_TIMER_IRQn, (uint32_t)us_ticker_irq_handler);
mbed_official 46:bebbbd80dd87 68 NVIC_EnableIRQ(US_TICKER_TIMER_IRQn);
mbed_official 46:bebbbd80dd87 69 }
mbed_official 46:bebbbd80dd87 70
mbed_official 480:69aad4cbc07a 71 //TIMER0 is used for us ticker and timers (Timer, wait(), wait_us() etc)
mbed_official 46:bebbbd80dd87 72 uint32_t us_ticker_read() {
mbed_official 480:69aad4cbc07a 73
mbed_official 46:bebbbd80dd87 74 if (!us_ticker_inited)
mbed_official 46:bebbbd80dd87 75 us_ticker_init();
mbed_official 480:69aad4cbc07a 76
mbed_official 480:69aad4cbc07a 77 // Generate ticker value
mbed_official 480:69aad4cbc07a 78 // MRT source clock is SystemCoreClock (30MHz) and MRT is a 31-bit countdown timer
mbed_official 480:69aad4cbc07a 79 // Calculate expected value using current count and number of expired times to mimic a 32bit timer @ 1 MHz
mbed_official 480:69aad4cbc07a 80 //
mbed_official 480:69aad4cbc07a 81 // ticker_expired_count_us
mbed_official 480:69aad4cbc07a 82 // The variable ticker_expired_count_us keeps track of the number of 31bits overflows (counted by TIMER0) and
mbed_official 480:69aad4cbc07a 83 // corrects that back to us counts.
mbed_official 480:69aad4cbc07a 84 //
mbed_official 480:69aad4cbc07a 85 // (0x7FFFFFFFUL - LPC_MRT->TIMER0)/MRT_Clock_MHz
mbed_official 480:69aad4cbc07a 86 // The counter is a 31bit downcounter from 7FFFFFFF so correct to actual count-up value and correct
mbed_official 480:69aad4cbc07a 87 // for 30 counts per us.
mbed_official 480:69aad4cbc07a 88 //
mbed_official 480:69aad4cbc07a 89 // Added up these 2 parts result in current us time returned as 32 bits.
mbed_official 480:69aad4cbc07a 90 return (0x7FFFFFFFUL - LPC_MRT->TIMER0)/MRT_Clock_MHz + ticker_expired_count_us;
mbed_official 46:bebbbd80dd87 91 }
mbed_official 46:bebbbd80dd87 92
mbed_official 480:69aad4cbc07a 93 //TIMER1 is used for Timestamped interrupts (Ticker(), Timeout())
mbed_official 304:89b9c3a9a045 94 void us_ticker_set_interrupt(timestamp_t timestamp) {
mbed_official 46:bebbbd80dd87 95
mbed_official 614:9d86c2ae5de0 96 if (!us_ticker_interrupt_inited)
mbed_official 614:9d86c2ae5de0 97 us_ticker_interrupt_init();
mbed_official 614:9d86c2ae5de0 98
mbed_official 480:69aad4cbc07a 99 // MRT source clock is SystemCoreClock (30MHz) and MRT is a 31-bit countdown timer
mbed_official 480:69aad4cbc07a 100 // Force load interval value (Bit 0-30 is interval value, Bit 31 is Force Load bit)
mbed_official 480:69aad4cbc07a 101 // Note: The MRT has less counter headroom available than the typical mbed 32bit timer @ 1 MHz.
mbed_official 480:69aad4cbc07a 102 // The calculated counter interval until the next timestamp will be truncated and an
mbed_official 480:69aad4cbc07a 103 // 'early' interrupt will be generated in case the max required count interval exceeds
mbed_official 480:69aad4cbc07a 104 // the available 31 bits space. However, the mbed us_ticker interrupt handler will
mbed_official 480:69aad4cbc07a 105 // check current time against the next scheduled timestamp and simply re-issue the
mbed_official 480:69aad4cbc07a 106 // same interrupt again when needed. The calculated counter interval will now be smaller.
mbed_official 480:69aad4cbc07a 107 LPC_MRT->INTVAL1 = (((timestamp - us_ticker_read()) * MRT_Clock_MHz) | 0x80000000UL);
mbed_official 46:bebbbd80dd87 108
mbed_official 480:69aad4cbc07a 109 // Enable interrupt
mbed_official 480:69aad4cbc07a 110 LPC_MRT->CTRL1 |= 1;
mbed_official 480:69aad4cbc07a 111 }
mbed_official 480:69aad4cbc07a 112
mbed_official 480:69aad4cbc07a 113 //Disable Timestamped interrupts triggered by TIMER1
mbed_official 480:69aad4cbc07a 114 void us_ticker_disable_interrupt() {
mbed_official 480:69aad4cbc07a 115 //Timer1 for Timestamped interrupts (31 bits downcounter @ SystemCoreClock)
mbed_official 480:69aad4cbc07a 116 LPC_MRT->CTRL1 &= ~1;
mbed_official 480:69aad4cbc07a 117 }
mbed_official 480:69aad4cbc07a 118
mbed_official 480:69aad4cbc07a 119 void us_ticker_clear_interrupt() {
mbed_official 480:69aad4cbc07a 120
mbed_official 480:69aad4cbc07a 121 //Timer1 for Timestamped interrupts (31 bits downcounter @ SystemCoreClock)
mbed_official 480:69aad4cbc07a 122 if (LPC_MRT->STAT1 & 1)
mbed_official 480:69aad4cbc07a 123 LPC_MRT->STAT1 = 1;
mbed_official 480:69aad4cbc07a 124
mbed_official 480:69aad4cbc07a 125 //Timer0 for us counter (31 bits downcounter @ SystemCoreClock)
mbed_official 480:69aad4cbc07a 126 if (LPC_MRT->STAT0 & 1) {
mbed_official 480:69aad4cbc07a 127 LPC_MRT->STAT0 = 1;
mbed_official 480:69aad4cbc07a 128 // ticker_expired_count_us = (ticker_expired * 0x80000000UL) / MRT_Clock_MHz
mbed_official 480:69aad4cbc07a 129 // The variable ticker_expired_count_us keeps track of the number of 31bits overflows (counted by TIMER0) and
mbed_official 480:69aad4cbc07a 130 // the multiplication/division corrects that back to us counts.
mbed_official 480:69aad4cbc07a 131 ticker_expired_count_us += ticker_fullcount_us;
mbed_official 46:bebbbd80dd87 132 }
mbed_official 46:bebbbd80dd87 133 }