雄介 太田 / mbed

mbed(SerialHalfDuplex入り)

Fork of mbed by mbed official

TARGET_NUCLEO_F302R8/stm32f30x_spi.h@82:6473597d706e, 2014-04-07 (annotated)

Committer:
bogdanm
Date:
Mon Apr 07 18:28:36 2014 +0100
Revision:
82:6473597d706e
Release 82 of the mbed library



Main changes:



- support for K64F

- Revisited Nordic code structure

- Test infrastructure improvements

- various bug fixes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 82:6473597d706e 1 /**
bogdanm 82:6473597d706e 2 ******************************************************************************
bogdanm 82:6473597d706e 3 * @file stm32f30x_spi.h
bogdanm 82:6473597d706e 4 * @author MCD Application Team
bogdanm 82:6473597d706e 5 * @version V1.1.0
bogdanm 82:6473597d706e 6 * @date 27-February-2014
bogdanm 82:6473597d706e 7 * @brief This file contains all the functions prototypes for the SPI
bogdanm 82:6473597d706e 8 * firmware library.
bogdanm 82:6473597d706e 9 ******************************************************************************
bogdanm 82:6473597d706e 10 * @attention
bogdanm 82:6473597d706e 11 *
bogdanm 82:6473597d706e 12 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 82:6473597d706e 13 *
bogdanm 82:6473597d706e 14 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 82:6473597d706e 15 * are permitted provided that the following conditions are met:
bogdanm 82:6473597d706e 16 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 82:6473597d706e 17 * this list of conditions and the following disclaimer.
bogdanm 82:6473597d706e 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 82:6473597d706e 19 * this list of conditions and the following disclaimer in the documentation
bogdanm 82:6473597d706e 20 * and/or other materials provided with the distribution.
bogdanm 82:6473597d706e 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 82:6473597d706e 22 * may be used to endorse or promote products derived from this software
bogdanm 82:6473597d706e 23 * without specific prior written permission.
bogdanm 82:6473597d706e 24 *
bogdanm 82:6473597d706e 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 82:6473597d706e 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 82:6473597d706e 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 82:6473597d706e 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 82:6473597d706e 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 82:6473597d706e 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 82:6473597d706e 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 82:6473597d706e 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 82:6473597d706e 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 82:6473597d706e 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 82:6473597d706e 35 *
bogdanm 82:6473597d706e 36 ******************************************************************************
bogdanm 82:6473597d706e 37 */
bogdanm 82:6473597d706e 38
bogdanm 82:6473597d706e 39 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 82:6473597d706e 40 #ifndef __STM32F30x_SPI_H
bogdanm 82:6473597d706e 41 #define __STM32F30x_SPI_H
bogdanm 82:6473597d706e 42
bogdanm 82:6473597d706e 43 #ifdef __cplusplus
bogdanm 82:6473597d706e 44 extern "C" {
bogdanm 82:6473597d706e 45 #endif
bogdanm 82:6473597d706e 46
bogdanm 82:6473597d706e 47 /* Includes ------------------------------------------------------------------*/
bogdanm 82:6473597d706e 48 #include "stm32f30x.h"
bogdanm 82:6473597d706e 49
bogdanm 82:6473597d706e 50 /** @addtogroup STM32F30x_StdPeriph_Driver
bogdanm 82:6473597d706e 51 * @{
bogdanm 82:6473597d706e 52 */
bogdanm 82:6473597d706e 53
bogdanm 82:6473597d706e 54 /** @addtogroup SPI
bogdanm 82:6473597d706e 55 * @{
bogdanm 82:6473597d706e 56 */
bogdanm 82:6473597d706e 57
bogdanm 82:6473597d706e 58 /* Exported types ------------------------------------------------------------*/
bogdanm 82:6473597d706e 59
bogdanm 82:6473597d706e 60 /**
bogdanm 82:6473597d706e 61 * @brief SPI Init structure definition
bogdanm 82:6473597d706e 62 */
bogdanm 82:6473597d706e 63
bogdanm 82:6473597d706e 64 typedef struct
bogdanm 82:6473597d706e 65 {
bogdanm 82:6473597d706e 66 uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
bogdanm 82:6473597d706e 67 This parameter can be a value of @ref SPI_data_direction */
bogdanm 82:6473597d706e 68
bogdanm 82:6473597d706e 69 uint16_t SPI_Mode; /*!< Specifies the SPI mode (Master/Slave).
bogdanm 82:6473597d706e 70 This parameter can be a value of @ref SPI_mode */
bogdanm 82:6473597d706e 71
bogdanm 82:6473597d706e 72 uint16_t SPI_DataSize; /*!< Specifies the SPI data size.
bogdanm 82:6473597d706e 73 This parameter can be a value of @ref SPI_data_size */
bogdanm 82:6473597d706e 74
bogdanm 82:6473597d706e 75 uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.
bogdanm 82:6473597d706e 76 This parameter can be a value of @ref SPI_Clock_Polarity */
bogdanm 82:6473597d706e 77
bogdanm 82:6473597d706e 78 uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
bogdanm 82:6473597d706e 79 This parameter can be a value of @ref SPI_Clock_Phase */
bogdanm 82:6473597d706e 80
bogdanm 82:6473597d706e 81 uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
bogdanm 82:6473597d706e 82 hardware (NSS pin) or by software using the SSI bit.
bogdanm 82:6473597d706e 83 This parameter can be a value of @ref SPI_Slave_Select_management */
bogdanm 82:6473597d706e 84
bogdanm 82:6473597d706e 85 uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
bogdanm 82:6473597d706e 86 used to configure the transmit and receive SCK clock.
bogdanm 82:6473597d706e 87 This parameter can be a value of @ref SPI_BaudRate_Prescaler.
bogdanm 82:6473597d706e 88 @note The communication clock is derived from the master
bogdanm 82:6473597d706e 89 clock. The slave clock does not need to be set. */
bogdanm 82:6473597d706e 90
bogdanm 82:6473597d706e 91 uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
bogdanm 82:6473597d706e 92 This parameter can be a value of @ref SPI_MSB_LSB_transmission */
bogdanm 82:6473597d706e 93
bogdanm 82:6473597d706e 94 uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */
bogdanm 82:6473597d706e 95 }SPI_InitTypeDef;
bogdanm 82:6473597d706e 96
bogdanm 82:6473597d706e 97
bogdanm 82:6473597d706e 98 /**
bogdanm 82:6473597d706e 99 * @brief I2S Init structure definition
bogdanm 82:6473597d706e 100 */
bogdanm 82:6473597d706e 101
bogdanm 82:6473597d706e 102 typedef struct
bogdanm 82:6473597d706e 103 {
bogdanm 82:6473597d706e 104 uint16_t I2S_Mode; /*!< Specifies the I2S operating mode.
bogdanm 82:6473597d706e 105 This parameter can be a value of @ref I2S_Mode */
bogdanm 82:6473597d706e 106
bogdanm 82:6473597d706e 107 uint16_t I2S_Standard; /*!< Specifies the standard used for the I2S communication.
bogdanm 82:6473597d706e 108 This parameter can be a value of @ref I2S_Standard */
bogdanm 82:6473597d706e 109
bogdanm 82:6473597d706e 110 uint16_t I2S_DataFormat; /*!< Specifies the data format for the I2S communication.
bogdanm 82:6473597d706e 111 This parameter can be a value of @ref I2S_Data_Format */
bogdanm 82:6473597d706e 112
bogdanm 82:6473597d706e 113 uint16_t I2S_MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
bogdanm 82:6473597d706e 114 This parameter can be a value of @ref I2S_MCLK_Output */
bogdanm 82:6473597d706e 115
bogdanm 82:6473597d706e 116 uint32_t I2S_AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
bogdanm 82:6473597d706e 117 This parameter can be a value of @ref I2S_Audio_Frequency */
bogdanm 82:6473597d706e 118
bogdanm 82:6473597d706e 119 uint16_t I2S_CPOL; /*!< Specifies the idle state of the I2S clock.
bogdanm 82:6473597d706e 120 This parameter can be a value of @ref I2S_Clock_Polarity */
bogdanm 82:6473597d706e 121 }I2S_InitTypeDef;
bogdanm 82:6473597d706e 122
bogdanm 82:6473597d706e 123 /* Exported constants --------------------------------------------------------*/
bogdanm 82:6473597d706e 124
bogdanm 82:6473597d706e 125 /** @defgroup SPI_Exported_Constants
bogdanm 82:6473597d706e 126 * @{
bogdanm 82:6473597d706e 127 */
bogdanm 82:6473597d706e 128
bogdanm 82:6473597d706e 129 #define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
bogdanm 82:6473597d706e 130 ((PERIPH) == SPI2) || \
bogdanm 82:6473597d706e 131 ((PERIPH) == SPI3))
bogdanm 82:6473597d706e 132
bogdanm 82:6473597d706e 133 #define IS_SPI_ALL_PERIPH_EXT(PERIPH) (((PERIPH) == SPI1) || \
bogdanm 82:6473597d706e 134 ((PERIPH) == SPI2) || \
bogdanm 82:6473597d706e 135 ((PERIPH) == SPI3) || \
bogdanm 82:6473597d706e 136 ((PERIPH) == I2S2ext) || \
bogdanm 82:6473597d706e 137 ((PERIPH) == I2S3ext))
bogdanm 82:6473597d706e 138
bogdanm 82:6473597d706e 139 #define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \
bogdanm 82:6473597d706e 140 ((PERIPH) == SPI3))
bogdanm 82:6473597d706e 141
bogdanm 82:6473597d706e 142 #define IS_SPI_23_PERIPH_EXT(PERIPH) (((PERIPH) == SPI2) || \
bogdanm 82:6473597d706e 143 ((PERIPH) == SPI3) || \
bogdanm 82:6473597d706e 144 ((PERIPH) == I2S2ext) || \
bogdanm 82:6473597d706e 145 ((PERIPH) == I2S3ext))
bogdanm 82:6473597d706e 146
bogdanm 82:6473597d706e 147 #define IS_I2S_EXT_PERIPH(PERIPH) (((PERIPH) == I2S2ext) || \
bogdanm 82:6473597d706e 148 ((PERIPH) == I2S3ext))
bogdanm 82:6473597d706e 149
bogdanm 82:6473597d706e 150 /** @defgroup SPI_data_direction
bogdanm 82:6473597d706e 151 * @{
bogdanm 82:6473597d706e 152 */
bogdanm 82:6473597d706e 153
bogdanm 82:6473597d706e 154 #define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
bogdanm 82:6473597d706e 155 #define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
bogdanm 82:6473597d706e 156 #define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
bogdanm 82:6473597d706e 157 #define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
bogdanm 82:6473597d706e 158 #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
bogdanm 82:6473597d706e 159 ((MODE) == SPI_Direction_2Lines_RxOnly) || \
bogdanm 82:6473597d706e 160 ((MODE) == SPI_Direction_1Line_Rx) || \
bogdanm 82:6473597d706e 161 ((MODE) == SPI_Direction_1Line_Tx))
bogdanm 82:6473597d706e 162 /**
bogdanm 82:6473597d706e 163 * @}
bogdanm 82:6473597d706e 164 */
bogdanm 82:6473597d706e 165
bogdanm 82:6473597d706e 166 /** @defgroup SPI_mode
bogdanm 82:6473597d706e 167 * @{
bogdanm 82:6473597d706e 168 */
bogdanm 82:6473597d706e 169
bogdanm 82:6473597d706e 170 #define SPI_Mode_Master ((uint16_t)0x0104)
bogdanm 82:6473597d706e 171 #define SPI_Mode_Slave ((uint16_t)0x0000)
bogdanm 82:6473597d706e 172 #define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
bogdanm 82:6473597d706e 173 ((MODE) == SPI_Mode_Slave))
bogdanm 82:6473597d706e 174 /**
bogdanm 82:6473597d706e 175 * @}
bogdanm 82:6473597d706e 176 */
bogdanm 82:6473597d706e 177
bogdanm 82:6473597d706e 178 /** @defgroup SPI_data_size
bogdanm 82:6473597d706e 179 * @{
bogdanm 82:6473597d706e 180 */
bogdanm 82:6473597d706e 181
bogdanm 82:6473597d706e 182 #define SPI_DataSize_4b ((uint16_t)0x0300)
bogdanm 82:6473597d706e 183 #define SPI_DataSize_5b ((uint16_t)0x0400)
bogdanm 82:6473597d706e 184 #define SPI_DataSize_6b ((uint16_t)0x0500)
bogdanm 82:6473597d706e 185 #define SPI_DataSize_7b ((uint16_t)0x0600)
bogdanm 82:6473597d706e 186 #define SPI_DataSize_8b ((uint16_t)0x0700)
bogdanm 82:6473597d706e 187 #define SPI_DataSize_9b ((uint16_t)0x0800)
bogdanm 82:6473597d706e 188 #define SPI_DataSize_10b ((uint16_t)0x0900)
bogdanm 82:6473597d706e 189 #define SPI_DataSize_11b ((uint16_t)0x0A00)
bogdanm 82:6473597d706e 190 #define SPI_DataSize_12b ((uint16_t)0x0B00)
bogdanm 82:6473597d706e 191 #define SPI_DataSize_13b ((uint16_t)0x0C00)
bogdanm 82:6473597d706e 192 #define SPI_DataSize_14b ((uint16_t)0x0D00)
bogdanm 82:6473597d706e 193 #define SPI_DataSize_15b ((uint16_t)0x0E00)
bogdanm 82:6473597d706e 194 #define SPI_DataSize_16b ((uint16_t)0x0F00)
bogdanm 82:6473597d706e 195 #define IS_SPI_DATA_SIZE(SIZE) (((SIZE) == SPI_DataSize_4b) || \
bogdanm 82:6473597d706e 196 ((SIZE) == SPI_DataSize_5b) || \
bogdanm 82:6473597d706e 197 ((SIZE) == SPI_DataSize_6b) || \
bogdanm 82:6473597d706e 198 ((SIZE) == SPI_DataSize_7b) || \
bogdanm 82:6473597d706e 199 ((SIZE) == SPI_DataSize_8b) || \
bogdanm 82:6473597d706e 200 ((SIZE) == SPI_DataSize_9b) || \
bogdanm 82:6473597d706e 201 ((SIZE) == SPI_DataSize_10b) || \
bogdanm 82:6473597d706e 202 ((SIZE) == SPI_DataSize_11b) || \
bogdanm 82:6473597d706e 203 ((SIZE) == SPI_DataSize_12b) || \
bogdanm 82:6473597d706e 204 ((SIZE) == SPI_DataSize_13b) || \
bogdanm 82:6473597d706e 205 ((SIZE) == SPI_DataSize_14b) || \
bogdanm 82:6473597d706e 206 ((SIZE) == SPI_DataSize_15b) || \
bogdanm 82:6473597d706e 207 ((SIZE) == SPI_DataSize_16b))
bogdanm 82:6473597d706e 208 /**
bogdanm 82:6473597d706e 209 * @}
bogdanm 82:6473597d706e 210 */
bogdanm 82:6473597d706e 211
bogdanm 82:6473597d706e 212 /** @defgroup SPI_CRC_length
bogdanm 82:6473597d706e 213 * @{
bogdanm 82:6473597d706e 214 */
bogdanm 82:6473597d706e 215
bogdanm 82:6473597d706e 216 #define SPI_CRCLength_8b ((uint16_t)0x0000)
bogdanm 82:6473597d706e 217 #define SPI_CRCLength_16b ((uint16_t)0x0800)
bogdanm 82:6473597d706e 218 #define IS_SPI_CRC_LENGTH(LENGTH) (((LENGTH) == SPI_CRCLength_8b) || \
bogdanm 82:6473597d706e 219 ((LENGTH) == SPI_CRCLength_16b))
bogdanm 82:6473597d706e 220 /**
bogdanm 82:6473597d706e 221 * @}
bogdanm 82:6473597d706e 222 */
bogdanm 82:6473597d706e 223
bogdanm 82:6473597d706e 224 /** @defgroup SPI_Clock_Polarity
bogdanm 82:6473597d706e 225 * @{
bogdanm 82:6473597d706e 226 */
bogdanm 82:6473597d706e 227
bogdanm 82:6473597d706e 228 #define SPI_CPOL_Low ((uint16_t)0x0000)
bogdanm 82:6473597d706e 229 #define SPI_CPOL_High ((uint16_t)0x0002)
bogdanm 82:6473597d706e 230 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
bogdanm 82:6473597d706e 231 ((CPOL) == SPI_CPOL_High))
bogdanm 82:6473597d706e 232 /**
bogdanm 82:6473597d706e 233 * @}
bogdanm 82:6473597d706e 234 */
bogdanm 82:6473597d706e 235
bogdanm 82:6473597d706e 236 /** @defgroup SPI_Clock_Phase
bogdanm 82:6473597d706e 237 * @{
bogdanm 82:6473597d706e 238 */
bogdanm 82:6473597d706e 239
bogdanm 82:6473597d706e 240 #define SPI_CPHA_1Edge ((uint16_t)0x0000)
bogdanm 82:6473597d706e 241 #define SPI_CPHA_2Edge ((uint16_t)0x0001)
bogdanm 82:6473597d706e 242 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
bogdanm 82:6473597d706e 243 ((CPHA) == SPI_CPHA_2Edge))
bogdanm 82:6473597d706e 244 /**
bogdanm 82:6473597d706e 245 * @}
bogdanm 82:6473597d706e 246 */
bogdanm 82:6473597d706e 247
bogdanm 82:6473597d706e 248 /** @defgroup SPI_Slave_Select_management
bogdanm 82:6473597d706e 249 * @{
bogdanm 82:6473597d706e 250 */
bogdanm 82:6473597d706e 251
bogdanm 82:6473597d706e 252 #define SPI_NSS_Soft ((uint16_t)0x0200)
bogdanm 82:6473597d706e 253 #define SPI_NSS_Hard ((uint16_t)0x0000)
bogdanm 82:6473597d706e 254 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
bogdanm 82:6473597d706e 255 ((NSS) == SPI_NSS_Hard))
bogdanm 82:6473597d706e 256 /**
bogdanm 82:6473597d706e 257 * @}
bogdanm 82:6473597d706e 258 */
bogdanm 82:6473597d706e 259
bogdanm 82:6473597d706e 260 /** @defgroup SPI_BaudRate_Prescaler
bogdanm 82:6473597d706e 261 * @{
bogdanm 82:6473597d706e 262 */
bogdanm 82:6473597d706e 263
bogdanm 82:6473597d706e 264 #define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
bogdanm 82:6473597d706e 265 #define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
bogdanm 82:6473597d706e 266 #define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
bogdanm 82:6473597d706e 267 #define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
bogdanm 82:6473597d706e 268 #define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
bogdanm 82:6473597d706e 269 #define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
bogdanm 82:6473597d706e 270 #define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
bogdanm 82:6473597d706e 271 #define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
bogdanm 82:6473597d706e 272 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
bogdanm 82:6473597d706e 273 ((PRESCALER) == SPI_BaudRatePrescaler_4) || \
bogdanm 82:6473597d706e 274 ((PRESCALER) == SPI_BaudRatePrescaler_8) || \
bogdanm 82:6473597d706e 275 ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
bogdanm 82:6473597d706e 276 ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
bogdanm 82:6473597d706e 277 ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
bogdanm 82:6473597d706e 278 ((PRESCALER) == SPI_BaudRatePrescaler_128) || \
bogdanm 82:6473597d706e 279 ((PRESCALER) == SPI_BaudRatePrescaler_256))
bogdanm 82:6473597d706e 280 /**
bogdanm 82:6473597d706e 281 * @}
bogdanm 82:6473597d706e 282 */
bogdanm 82:6473597d706e 283
bogdanm 82:6473597d706e 284 /** @defgroup SPI_MSB_LSB_transmission
bogdanm 82:6473597d706e 285 * @{
bogdanm 82:6473597d706e 286 */
bogdanm 82:6473597d706e 287
bogdanm 82:6473597d706e 288 #define SPI_FirstBit_MSB ((uint16_t)0x0000)
bogdanm 82:6473597d706e 289 #define SPI_FirstBit_LSB ((uint16_t)0x0080)
bogdanm 82:6473597d706e 290 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
bogdanm 82:6473597d706e 291 ((BIT) == SPI_FirstBit_LSB))
bogdanm 82:6473597d706e 292 /**
bogdanm 82:6473597d706e 293 * @}
bogdanm 82:6473597d706e 294 */
bogdanm 82:6473597d706e 295
bogdanm 82:6473597d706e 296 /** @defgroup I2S_Mode
bogdanm 82:6473597d706e 297 * @{
bogdanm 82:6473597d706e 298 */
bogdanm 82:6473597d706e 299
bogdanm 82:6473597d706e 300 #define I2S_Mode_SlaveTx ((uint16_t)0x0000)
bogdanm 82:6473597d706e 301 #define I2S_Mode_SlaveRx ((uint16_t)0x0100)
bogdanm 82:6473597d706e 302 #define I2S_Mode_MasterTx ((uint16_t)0x0200)
bogdanm 82:6473597d706e 303 #define I2S_Mode_MasterRx ((uint16_t)0x0300)
bogdanm 82:6473597d706e 304 #define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
bogdanm 82:6473597d706e 305 ((MODE) == I2S_Mode_SlaveRx) || \
bogdanm 82:6473597d706e 306 ((MODE) == I2S_Mode_MasterTx)|| \
bogdanm 82:6473597d706e 307 ((MODE) == I2S_Mode_MasterRx))
bogdanm 82:6473597d706e 308 /**
bogdanm 82:6473597d706e 309 * @}
bogdanm 82:6473597d706e 310 */
bogdanm 82:6473597d706e 311
bogdanm 82:6473597d706e 312 /** @defgroup I2S_Standard
bogdanm 82:6473597d706e 313 * @{
bogdanm 82:6473597d706e 314 */
bogdanm 82:6473597d706e 315
bogdanm 82:6473597d706e 316 #define I2S_Standard_Phillips ((uint16_t)0x0000)
bogdanm 82:6473597d706e 317 #define I2S_Standard_MSB ((uint16_t)0x0010)
bogdanm 82:6473597d706e 318 #define I2S_Standard_LSB ((uint16_t)0x0020)
bogdanm 82:6473597d706e 319 #define I2S_Standard_PCMShort ((uint16_t)0x0030)
bogdanm 82:6473597d706e 320 #define I2S_Standard_PCMLong ((uint16_t)0x00B0)
bogdanm 82:6473597d706e 321 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
bogdanm 82:6473597d706e 322 ((STANDARD) == I2S_Standard_MSB) || \
bogdanm 82:6473597d706e 323 ((STANDARD) == I2S_Standard_LSB) || \
bogdanm 82:6473597d706e 324 ((STANDARD) == I2S_Standard_PCMShort) || \
bogdanm 82:6473597d706e 325 ((STANDARD) == I2S_Standard_PCMLong))
bogdanm 82:6473597d706e 326 /**
bogdanm 82:6473597d706e 327 * @}
bogdanm 82:6473597d706e 328 */
bogdanm 82:6473597d706e 329
bogdanm 82:6473597d706e 330 /** @defgroup I2S_Data_Format
bogdanm 82:6473597d706e 331 * @{
bogdanm 82:6473597d706e 332 */
bogdanm 82:6473597d706e 333
bogdanm 82:6473597d706e 334 #define I2S_DataFormat_16b ((uint16_t)0x0000)
bogdanm 82:6473597d706e 335 #define I2S_DataFormat_16bextended ((uint16_t)0x0001)
bogdanm 82:6473597d706e 336 #define I2S_DataFormat_24b ((uint16_t)0x0003)
bogdanm 82:6473597d706e 337 #define I2S_DataFormat_32b ((uint16_t)0x0005)
bogdanm 82:6473597d706e 338 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
bogdanm 82:6473597d706e 339 ((FORMAT) == I2S_DataFormat_16bextended) || \
bogdanm 82:6473597d706e 340 ((FORMAT) == I2S_DataFormat_24b) || \
bogdanm 82:6473597d706e 341 ((FORMAT) == I2S_DataFormat_32b))
bogdanm 82:6473597d706e 342 /**
bogdanm 82:6473597d706e 343 * @}
bogdanm 82:6473597d706e 344 */
bogdanm 82:6473597d706e 345
bogdanm 82:6473597d706e 346 /** @defgroup I2S_MCLK_Output
bogdanm 82:6473597d706e 347 * @{
bogdanm 82:6473597d706e 348 */
bogdanm 82:6473597d706e 349
bogdanm 82:6473597d706e 350 #define I2S_MCLKOutput_Enable ((uint16_t)0x0200)
bogdanm 82:6473597d706e 351 #define I2S_MCLKOutput_Disable ((uint16_t)0x0000)
bogdanm 82:6473597d706e 352 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
bogdanm 82:6473597d706e 353 ((OUTPUT) == I2S_MCLKOutput_Disable))
bogdanm 82:6473597d706e 354 /**
bogdanm 82:6473597d706e 355 * @}
bogdanm 82:6473597d706e 356 */
bogdanm 82:6473597d706e 357
bogdanm 82:6473597d706e 358 /** @defgroup I2S_Audio_Frequency
bogdanm 82:6473597d706e 359 * @{
bogdanm 82:6473597d706e 360 */
bogdanm 82:6473597d706e 361
bogdanm 82:6473597d706e 362 #define I2S_AudioFreq_192k ((uint32_t)192000)
bogdanm 82:6473597d706e 363 #define I2S_AudioFreq_96k ((uint32_t)96000)
bogdanm 82:6473597d706e 364 #define I2S_AudioFreq_48k ((uint32_t)48000)
bogdanm 82:6473597d706e 365 #define I2S_AudioFreq_44k ((uint32_t)44100)
bogdanm 82:6473597d706e 366 #define I2S_AudioFreq_32k ((uint32_t)32000)
bogdanm 82:6473597d706e 367 #define I2S_AudioFreq_22k ((uint32_t)22050)
bogdanm 82:6473597d706e 368 #define I2S_AudioFreq_16k ((uint32_t)16000)
bogdanm 82:6473597d706e 369 #define I2S_AudioFreq_11k ((uint32_t)11025)
bogdanm 82:6473597d706e 370 #define I2S_AudioFreq_8k ((uint32_t)8000)
bogdanm 82:6473597d706e 371 #define I2S_AudioFreq_Default ((uint32_t)2)
bogdanm 82:6473597d706e 372
bogdanm 82:6473597d706e 373 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \
bogdanm 82:6473597d706e 374 ((FREQ) <= I2S_AudioFreq_192k)) || \
bogdanm 82:6473597d706e 375 ((FREQ) == I2S_AudioFreq_Default))
bogdanm 82:6473597d706e 376 /**
bogdanm 82:6473597d706e 377 * @}
bogdanm 82:6473597d706e 378 */
bogdanm 82:6473597d706e 379
bogdanm 82:6473597d706e 380 /** @defgroup I2S_Clock_Polarity
bogdanm 82:6473597d706e 381 * @{
bogdanm 82:6473597d706e 382 */
bogdanm 82:6473597d706e 383
bogdanm 82:6473597d706e 384 #define I2S_CPOL_Low ((uint16_t)0x0000)
bogdanm 82:6473597d706e 385 #define I2S_CPOL_High ((uint16_t)0x0008)
bogdanm 82:6473597d706e 386 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
bogdanm 82:6473597d706e 387 ((CPOL) == I2S_CPOL_High))
bogdanm 82:6473597d706e 388 /**
bogdanm 82:6473597d706e 389 * @}
bogdanm 82:6473597d706e 390 */
bogdanm 82:6473597d706e 391
bogdanm 82:6473597d706e 392 /** @defgroup SPI_FIFO_reception_threshold
bogdanm 82:6473597d706e 393 * @{
bogdanm 82:6473597d706e 394 */
bogdanm 82:6473597d706e 395
bogdanm 82:6473597d706e 396 #define SPI_RxFIFOThreshold_HF ((uint16_t)0x0000)
bogdanm 82:6473597d706e 397 #define SPI_RxFIFOThreshold_QF ((uint16_t)0x1000)
bogdanm 82:6473597d706e 398 #define IS_SPI_RX_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) == SPI_RxFIFOThreshold_HF) || \
bogdanm 82:6473597d706e 399 ((THRESHOLD) == SPI_RxFIFOThreshold_QF))
bogdanm 82:6473597d706e 400 /**
bogdanm 82:6473597d706e 401 * @}
bogdanm 82:6473597d706e 402 */
bogdanm 82:6473597d706e 403
bogdanm 82:6473597d706e 404 /** @defgroup SPI_I2S_DMA_transfer_requests
bogdanm 82:6473597d706e 405 * @{
bogdanm 82:6473597d706e 406 */
bogdanm 82:6473597d706e 407
bogdanm 82:6473597d706e 408 #define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)
bogdanm 82:6473597d706e 409 #define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)
bogdanm 82:6473597d706e 410 #define IS_SPI_I2S_DMA_REQ(REQ) ((((REQ) & (uint16_t)0xFFFC) == 0x00) && ((REQ) != 0x00))
bogdanm 82:6473597d706e 411 /**
bogdanm 82:6473597d706e 412 * @}
bogdanm 82:6473597d706e 413 */
bogdanm 82:6473597d706e 414
bogdanm 82:6473597d706e 415 /** @defgroup SPI_last_DMA_transfers
bogdanm 82:6473597d706e 416 * @{
bogdanm 82:6473597d706e 417 */
bogdanm 82:6473597d706e 418
bogdanm 82:6473597d706e 419 #define SPI_LastDMATransfer_TxEvenRxEven ((uint16_t)0x0000)
bogdanm 82:6473597d706e 420 #define SPI_LastDMATransfer_TxOddRxEven ((uint16_t)0x4000)
bogdanm 82:6473597d706e 421 #define SPI_LastDMATransfer_TxEvenRxOdd ((uint16_t)0x2000)
bogdanm 82:6473597d706e 422 #define SPI_LastDMATransfer_TxOddRxOdd ((uint16_t)0x6000)
bogdanm 82:6473597d706e 423 #define IS_SPI_LAST_DMA_TRANSFER(TRANSFER) (((TRANSFER) == SPI_LastDMATransfer_TxEvenRxEven) || \
bogdanm 82:6473597d706e 424 ((TRANSFER) == SPI_LastDMATransfer_TxOddRxEven) || \
bogdanm 82:6473597d706e 425 ((TRANSFER) == SPI_LastDMATransfer_TxEvenRxOdd) || \
bogdanm 82:6473597d706e 426 ((TRANSFER) == SPI_LastDMATransfer_TxOddRxOdd))
bogdanm 82:6473597d706e 427 /**
bogdanm 82:6473597d706e 428 * @}
bogdanm 82:6473597d706e 429 */
bogdanm 82:6473597d706e 430 /** @defgroup SPI_NSS_internal_software_management
bogdanm 82:6473597d706e 431 * @{
bogdanm 82:6473597d706e 432 */
bogdanm 82:6473597d706e 433
bogdanm 82:6473597d706e 434 #define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
bogdanm 82:6473597d706e 435 #define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
bogdanm 82:6473597d706e 436 #define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
bogdanm 82:6473597d706e 437 ((INTERNAL) == SPI_NSSInternalSoft_Reset))
bogdanm 82:6473597d706e 438 /**
bogdanm 82:6473597d706e 439 * @}
bogdanm 82:6473597d706e 440 */
bogdanm 82:6473597d706e 441
bogdanm 82:6473597d706e 442 /** @defgroup SPI_CRC_Transmit_Receive
bogdanm 82:6473597d706e 443 * @{
bogdanm 82:6473597d706e 444 */
bogdanm 82:6473597d706e 445
bogdanm 82:6473597d706e 446 #define SPI_CRC_Tx ((uint8_t)0x00)
bogdanm 82:6473597d706e 447 #define SPI_CRC_Rx ((uint8_t)0x01)
bogdanm 82:6473597d706e 448 #define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
bogdanm 82:6473597d706e 449 /**
bogdanm 82:6473597d706e 450 * @}
bogdanm 82:6473597d706e 451 */
bogdanm 82:6473597d706e 452
bogdanm 82:6473597d706e 453 /** @defgroup SPI_direction_transmit_receive
bogdanm 82:6473597d706e 454 * @{
bogdanm 82:6473597d706e 455 */
bogdanm 82:6473597d706e 456
bogdanm 82:6473597d706e 457 #define SPI_Direction_Rx ((uint16_t)0xBFFF)
bogdanm 82:6473597d706e 458 #define SPI_Direction_Tx ((uint16_t)0x4000)
bogdanm 82:6473597d706e 459 #define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
bogdanm 82:6473597d706e 460 ((DIRECTION) == SPI_Direction_Tx))
bogdanm 82:6473597d706e 461 /**
bogdanm 82:6473597d706e 462 * @}
bogdanm 82:6473597d706e 463 */
bogdanm 82:6473597d706e 464
bogdanm 82:6473597d706e 465 /** @defgroup SPI_I2S_interrupts_definition
bogdanm 82:6473597d706e 466 * @{
bogdanm 82:6473597d706e 467 */
bogdanm 82:6473597d706e 468
bogdanm 82:6473597d706e 469 #define SPI_I2S_IT_TXE ((uint8_t)0x71)
bogdanm 82:6473597d706e 470 #define SPI_I2S_IT_RXNE ((uint8_t)0x60)
bogdanm 82:6473597d706e 471 #define SPI_I2S_IT_ERR ((uint8_t)0x50)
bogdanm 82:6473597d706e 472
bogdanm 82:6473597d706e 473 #define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
bogdanm 82:6473597d706e 474 ((IT) == SPI_I2S_IT_RXNE) || \
bogdanm 82:6473597d706e 475 ((IT) == SPI_I2S_IT_ERR))
bogdanm 82:6473597d706e 476
bogdanm 82:6473597d706e 477 #define I2S_IT_UDR ((uint8_t)0x53)
bogdanm 82:6473597d706e 478 #define SPI_IT_MODF ((uint8_t)0x55)
bogdanm 82:6473597d706e 479 #define SPI_I2S_IT_OVR ((uint8_t)0x56)
bogdanm 82:6473597d706e 480 #define SPI_I2S_IT_FRE ((uint8_t)0x58)
bogdanm 82:6473597d706e 481
bogdanm 82:6473597d706e 482 #define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
bogdanm 82:6473597d706e 483 ((IT) == SPI_I2S_IT_OVR) || ((IT) == SPI_IT_MODF) || \
bogdanm 82:6473597d706e 484 ((IT) == SPI_I2S_IT_FRE)|| ((IT) == I2S_IT_UDR))
bogdanm 82:6473597d706e 485 /**
bogdanm 82:6473597d706e 486 * @}
bogdanm 82:6473597d706e 487 */
bogdanm 82:6473597d706e 488
bogdanm 82:6473597d706e 489
bogdanm 82:6473597d706e 490 /** @defgroup SPI_transmission_fifo_status_level
bogdanm 82:6473597d706e 491 * @{
bogdanm 82:6473597d706e 492 */
bogdanm 82:6473597d706e 493
bogdanm 82:6473597d706e 494 #define SPI_TransmissionFIFOStatus_Empty ((uint16_t)0x0000)
bogdanm 82:6473597d706e 495 #define SPI_TransmissionFIFOStatus_1QuarterFull ((uint16_t)0x0800)
bogdanm 82:6473597d706e 496 #define SPI_TransmissionFIFOStatus_HalfFull ((uint16_t)0x1000)
bogdanm 82:6473597d706e 497 #define SPI_TransmissionFIFOStatus_Full ((uint16_t)0x1800)
bogdanm 82:6473597d706e 498
bogdanm 82:6473597d706e 499 /**
bogdanm 82:6473597d706e 500 * @}
bogdanm 82:6473597d706e 501 */
bogdanm 82:6473597d706e 502
bogdanm 82:6473597d706e 503 /** @defgroup SPI_reception_fifo_status_level
bogdanm 82:6473597d706e 504 * @{
bogdanm 82:6473597d706e 505 */
bogdanm 82:6473597d706e 506 #define SPI_ReceptionFIFOStatus_Empty ((uint16_t)0x0000)
bogdanm 82:6473597d706e 507 #define SPI_ReceptionFIFOStatus_1QuarterFull ((uint16_t)0x0200)
bogdanm 82:6473597d706e 508 #define SPI_ReceptionFIFOStatus_HalfFull ((uint16_t)0x0400)
bogdanm 82:6473597d706e 509 #define SPI_ReceptionFIFOStatus_Full ((uint16_t)0x0600)
bogdanm 82:6473597d706e 510
bogdanm 82:6473597d706e 511 /**
bogdanm 82:6473597d706e 512 * @}
bogdanm 82:6473597d706e 513 */
bogdanm 82:6473597d706e 514
bogdanm 82:6473597d706e 515
bogdanm 82:6473597d706e 516 /** @defgroup SPI_I2S_flags_definition
bogdanm 82:6473597d706e 517 * @{
bogdanm 82:6473597d706e 518 */
bogdanm 82:6473597d706e 519
bogdanm 82:6473597d706e 520 #define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
bogdanm 82:6473597d706e 521 #define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
bogdanm 82:6473597d706e 522 #define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
bogdanm 82:6473597d706e 523 #define I2S_FLAG_UDR ((uint16_t)0x0008)
bogdanm 82:6473597d706e 524 #define SPI_FLAG_CRCERR ((uint16_t)0x0010)
bogdanm 82:6473597d706e 525 #define SPI_FLAG_MODF ((uint16_t)0x0020)
bogdanm 82:6473597d706e 526 #define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
bogdanm 82:6473597d706e 527 #define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
bogdanm 82:6473597d706e 528 #define SPI_I2S_FLAG_FRE ((uint16_t)0x0100)
bogdanm 82:6473597d706e 529
bogdanm 82:6473597d706e 530
bogdanm 82:6473597d706e 531
bogdanm 82:6473597d706e 532 #define IS_SPI_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
bogdanm 82:6473597d706e 533 #define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
bogdanm 82:6473597d706e 534 ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
bogdanm 82:6473597d706e 535 ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE)|| \
bogdanm 82:6473597d706e 536 ((FLAG) == SPI_I2S_FLAG_FRE)|| ((FLAG) == I2S_FLAG_CHSIDE)|| \
bogdanm 82:6473597d706e 537 ((FLAG) == I2S_FLAG_UDR))
bogdanm 82:6473597d706e 538 /**
bogdanm 82:6473597d706e 539 * @}
bogdanm 82:6473597d706e 540 */
bogdanm 82:6473597d706e 541
bogdanm 82:6473597d706e 542 /** @defgroup SPI_CRC_polynomial
bogdanm 82:6473597d706e 543 * @{
bogdanm 82:6473597d706e 544 */
bogdanm 82:6473597d706e 545
bogdanm 82:6473597d706e 546 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
bogdanm 82:6473597d706e 547 /**
bogdanm 82:6473597d706e 548 * @}
bogdanm 82:6473597d706e 549 */
bogdanm 82:6473597d706e 550
bogdanm 82:6473597d706e 551 /**
bogdanm 82:6473597d706e 552 * @}
bogdanm 82:6473597d706e 553 */
bogdanm 82:6473597d706e 554
bogdanm 82:6473597d706e 555 /* Exported macro ------------------------------------------------------------*/
bogdanm 82:6473597d706e 556 /* Exported functions ------------------------------------------------------- */
bogdanm 82:6473597d706e 557
bogdanm 82:6473597d706e 558 /* Function used to set the SPI configuration to the default reset state*******/
bogdanm 82:6473597d706e 559 void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
bogdanm 82:6473597d706e 560
bogdanm 82:6473597d706e 561 /* Initialization and Configuration functions *********************************/
bogdanm 82:6473597d706e 562 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
bogdanm 82:6473597d706e 563 void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
bogdanm 82:6473597d706e 564 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
bogdanm 82:6473597d706e 565 void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
bogdanm 82:6473597d706e 566 void SPI_TIModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
bogdanm 82:6473597d706e 567 void SPI_NSSPulseModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
bogdanm 82:6473597d706e 568 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
bogdanm 82:6473597d706e 569 void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
bogdanm 82:6473597d706e 570 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
bogdanm 82:6473597d706e 571 void SPI_RxFIFOThresholdConfig(SPI_TypeDef* SPIx, uint16_t SPI_RxFIFOThreshold);
bogdanm 82:6473597d706e 572 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
bogdanm 82:6473597d706e 573 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
bogdanm 82:6473597d706e 574 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
bogdanm 82:6473597d706e 575 void I2S_FullDuplexConfig(SPI_TypeDef* I2Sxext, I2S_InitTypeDef* I2S_InitStruct);
bogdanm 82:6473597d706e 576
bogdanm 82:6473597d706e 577 /* Data transfers functions ***************************************************/
bogdanm 82:6473597d706e 578 void SPI_SendData8(SPI_TypeDef* SPIx, uint8_t Data);
bogdanm 82:6473597d706e 579 void SPI_I2S_SendData16(SPI_TypeDef* SPIx, uint16_t Data);
bogdanm 82:6473597d706e 580 uint8_t SPI_ReceiveData8(SPI_TypeDef* SPIx);
bogdanm 82:6473597d706e 581 uint16_t SPI_I2S_ReceiveData16(SPI_TypeDef* SPIx);
bogdanm 82:6473597d706e 582
bogdanm 82:6473597d706e 583 /* Hardware CRC Calculation functions *****************************************/
bogdanm 82:6473597d706e 584 void SPI_CRCLengthConfig(SPI_TypeDef* SPIx, uint16_t SPI_CRCLength);
bogdanm 82:6473597d706e 585 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
bogdanm 82:6473597d706e 586 void SPI_TransmitCRC(SPI_TypeDef* SPIx);
bogdanm 82:6473597d706e 587 uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
bogdanm 82:6473597d706e 588 uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
bogdanm 82:6473597d706e 589
bogdanm 82:6473597d706e 590 /* DMA transfers management functions *****************************************/
bogdanm 82:6473597d706e 591 void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
bogdanm 82:6473597d706e 592 void SPI_LastDMATransferCmd(SPI_TypeDef* SPIx, uint16_t SPI_LastDMATransfer);
bogdanm 82:6473597d706e 593
bogdanm 82:6473597d706e 594 /* Interrupts and flags management functions **********************************/
bogdanm 82:6473597d706e 595 void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
bogdanm 82:6473597d706e 596 uint16_t SPI_GetTransmissionFIFOStatus(SPI_TypeDef* SPIx);
bogdanm 82:6473597d706e 597 uint16_t SPI_GetReceptionFIFOStatus(SPI_TypeDef* SPIx);
bogdanm 82:6473597d706e 598 FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
bogdanm 82:6473597d706e 599 void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
bogdanm 82:6473597d706e 600 ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
bogdanm 82:6473597d706e 601
bogdanm 82:6473597d706e 602 #ifdef __cplusplus
bogdanm 82:6473597d706e 603 }
bogdanm 82:6473597d706e 604 #endif
bogdanm 82:6473597d706e 605
bogdanm 82:6473597d706e 606 #endif /*__STM32F30x_SPI_H */
bogdanm 82:6473597d706e 607
bogdanm 82:6473597d706e 608 /**
bogdanm 82:6473597d706e 609 * @}
bogdanm 82:6473597d706e 610 */
bogdanm 82:6473597d706e 611
bogdanm 82:6473597d706e 612 /**
bogdanm 82:6473597d706e 613 * @}
bogdanm 82:6473597d706e 614 */
bogdanm 82:6473597d706e 615
bogdanm 82:6473597d706e 616 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/