雄介 太田 / mbed

mbed(SerialHalfDuplex入り)

Fork of mbed by mbed official

TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/sdhc/fsl_sdhc_hal.h@82:6473597d706e, 2014-04-07 (annotated)

Committer:
bogdanm
Date:
Mon Apr 07 18:28:36 2014 +0100
Revision:
82:6473597d706e
Child:
90:cb3d968589d8
Release 82 of the mbed library



Main changes:



- support for K64F

- Revisited Nordic code structure

- Test infrastructure improvements

- various bug fixes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 82:6473597d706e 1 /*
bogdanm 82:6473597d706e 2 * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
bogdanm 82:6473597d706e 3 * All rights reserved.
bogdanm 82:6473597d706e 4 *
bogdanm 82:6473597d706e 5 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 82:6473597d706e 6 * are permitted provided that the following conditions are met:
bogdanm 82:6473597d706e 7 *
bogdanm 82:6473597d706e 8 * o Redistributions of source code must retain the above copyright notice, this list
bogdanm 82:6473597d706e 9 * of conditions and the following disclaimer.
bogdanm 82:6473597d706e 10 *
bogdanm 82:6473597d706e 11 * o Redistributions in binary form must reproduce the above copyright notice, this
bogdanm 82:6473597d706e 12 * list of conditions and the following disclaimer in the documentation and/or
bogdanm 82:6473597d706e 13 * other materials provided with the distribution.
bogdanm 82:6473597d706e 14 *
bogdanm 82:6473597d706e 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
bogdanm 82:6473597d706e 16 * contributors may be used to endorse or promote products derived from this
bogdanm 82:6473597d706e 17 * software without specific prior written permission.
bogdanm 82:6473597d706e 18 *
bogdanm 82:6473597d706e 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
bogdanm 82:6473597d706e 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
bogdanm 82:6473597d706e 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 82:6473597d706e 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
bogdanm 82:6473597d706e 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
bogdanm 82:6473597d706e 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
bogdanm 82:6473597d706e 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
bogdanm 82:6473597d706e 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
bogdanm 82:6473597d706e 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
bogdanm 82:6473597d706e 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 82:6473597d706e 29 */
bogdanm 82:6473597d706e 30 #ifndef __FSL_SDHC_HAL_H__
bogdanm 82:6473597d706e 31 #define __FSL_SDHC_HAL_H__
bogdanm 82:6473597d706e 32
bogdanm 82:6473597d706e 33 #include <assert.h>
bogdanm 82:6473597d706e 34 #include <stdbool.h>
bogdanm 82:6473597d706e 35 #include "fsl_device_registers.h"
bogdanm 82:6473597d706e 36
bogdanm 82:6473597d706e 37 /*! @addtogroup sdhc_hal */
bogdanm 82:6473597d706e 38 /*! @{ */
bogdanm 82:6473597d706e 39
bogdanm 82:6473597d706e 40 /* PRSSTA */
bogdanm 82:6473597d706e 41 #define SDHC_HAL_DAT0_LEVEL (BM_SDHC_PRSSTAT_DLSL & (1 << 24))
bogdanm 82:6473597d706e 42
bogdanm 82:6473597d706e 43 /* XFERTYP */
bogdanm 82:6473597d706e 44 #define SDHC_HAL_MAX_BLOCK_COUNT (BS_SDHC_BLKATTR_BLKCNT - 1)
bogdanm 82:6473597d706e 45 #define SDHC_HAL_ENABLE_DMA BM_SDHC_XFERTYP_DMAEN
bogdanm 82:6473597d706e 46 #define SDHC_HAL_DISABLE_DMA (0U)
bogdanm 82:6473597d706e 47
bogdanm 82:6473597d706e 48 #define SDHC_HAL_CMD_TYPE_SUSPEND (BF_SDHC_XFERTYP_CMDTYP(1))
bogdanm 82:6473597d706e 49 #define SDHC_HAL_CMD_TYPE_RESUME (BF_SDHC_XFERTYP_CMDTYP(2))
bogdanm 82:6473597d706e 50 #define SDHC_HAL_CMD_TYPE_ABORT (BF_SDHC_XFERTYP_CMDTYP(3))
bogdanm 82:6473597d706e 51
bogdanm 82:6473597d706e 52 #define SDHC_HAL_ENABLE_BLOCK_COUNT BM_SDHC_XFERTYP_BCEN
bogdanm 82:6473597d706e 53 #define SDHC_HAL_DISABLE_BLOCK_COUNT (0U)
bogdanm 82:6473597d706e 54
bogdanm 82:6473597d706e 55 #define SDHC_HAL_ENABLE_AUTO_CMD12 BM_SDHC_XFERTYP_AC12EN
bogdanm 82:6473597d706e 56 #define SDHC_HAL_DISABLE_AUTO_CMD12 (0U)
bogdanm 82:6473597d706e 57
bogdanm 82:6473597d706e 58 #define SDHC_HAL_ENABLE_DATA_READ BM_SDHC_XFERTYP_DTDSEL
bogdanm 82:6473597d706e 59 #define SDHC_HAL_DISABLE_AUTO_CMD12 (0U)
bogdanm 82:6473597d706e 60
bogdanm 82:6473597d706e 61 #define SDHC_HAL_MULTIPLE_BLOCK BM_SDHC_XFERTYP_MSBSEL
bogdanm 82:6473597d706e 62 #define SDHC_HAL_SINGLE_BLOCK (0U)
bogdanm 82:6473597d706e 63
bogdanm 82:6473597d706e 64 #define SDHC_HAL_NO_RESPONE (0U)
bogdanm 82:6473597d706e 65 #define SDHC_HAL_RESP_LEN_136 ((0x1 << BP_SDHC_XFERTYP_RSPTYP) & BM_SDHC_XFERTYP_RSPTYP)
bogdanm 82:6473597d706e 66 #define SDHC_HAL_RESP_LEN_48 ((0x2 << BP_SDHC_XFERTYP_RSPTYP) & BM_SDHC_XFERTYP_RSPTYP)
bogdanm 82:6473597d706e 67 #define SDHC_HAL_RESP_LEN_48_BC ((0x3 << BP_SDHC_XFERTYP_RSPTYP) & BM_SDHC_XFERTYP_RSPTYP)
bogdanm 82:6473597d706e 68
bogdanm 82:6473597d706e 69 #define SDHC_HAL_ENABLE_CRC_CHECK BM_SDHC_XFERTYP_CCCEN
bogdanm 82:6473597d706e 70 #define SDHC_HAL_DISABLE_CRC_CHECK (0U)
bogdanm 82:6473597d706e 71
bogdanm 82:6473597d706e 72 #define SDHC_HAL_ENABLE_INDEX_CHECK BM_SDHC_XFERTYP_CICEN
bogdanm 82:6473597d706e 73 #define SDHC_HAL_DISABLE_INDEX_CHECK (0U)
bogdanm 82:6473597d706e 74
bogdanm 82:6473597d706e 75 #define SDHC_HAL_DATA_PRESENT BM_SDHC_XFERTYP_DPSEL
bogdanm 82:6473597d706e 76 #define SDHC_HAL_NO_DATA_PRESENT (0U)
bogdanm 82:6473597d706e 77
bogdanm 82:6473597d706e 78 /* SYSCTL */
bogdanm 82:6473597d706e 79 #define SDHC_HAL_MAX_DVS (16U)
bogdanm 82:6473597d706e 80 #define SDHC_HAL_INITIAL_DVS (1U) /* initial value of divisor to calculate clock rate */
bogdanm 82:6473597d706e 81 #define SDHC_HAL_INITIAL_CLKFS (2U) /* initial value of clock selector to calculate clock rate */
bogdanm 82:6473597d706e 82 #define SDHC_HAL_NEXT_DVS(x) do { ((x) += 1); } while(0)
bogdanm 82:6473597d706e 83 #define SDHC_HAL_PREV_DVS(x) do { ((x) -= 1); } while(0)
bogdanm 82:6473597d706e 84 #define SDHC_HAL_MAX_CLKFS (256U)
bogdanm 82:6473597d706e 85 #define SDHC_HAL_NEXT_CLKFS(x) do { ((x) <<= 1); } while(0)
bogdanm 82:6473597d706e 86 #define SDHC_HAL_PREV_CLKFS(x) do { ((x) >>= 1); } while(0)
bogdanm 82:6473597d706e 87
bogdanm 82:6473597d706e 88 /* IRQSTAT */
bogdanm 82:6473597d706e 89 #define SDHC_HAL_CMD_COMPLETE_INT BM_SDHC_IRQSTAT_CC
bogdanm 82:6473597d706e 90 #define SDHC_HAL_TRANS_COMPLETE_INT BM_SDHC_IRQSTAT_TC
bogdanm 82:6473597d706e 91 #define SDHC_HAL_BLOCK_GAP_EVENT_INT BM_SDHC_IRQSTAT_BGE
bogdanm 82:6473597d706e 92 #define SDHC_HAL_DMA_INT BM_SDHC_IRQSTAT_DMAE
bogdanm 82:6473597d706e 93 #define SDHC_HAL_BUF_WRITE_READY_INT BM_SDHC_IRQSTAT_BWR
bogdanm 82:6473597d706e 94 #define SDHC_HAL_BUF_READ_READY_INT BM_SDHC_IRQSTAT_BRR
bogdanm 82:6473597d706e 95 #define SDHC_HAL_CARD_INSERTION_INT BM_SDHC_IRQSTAT_CINS
bogdanm 82:6473597d706e 96 #define SDHC_HAL_CARD_REMOVAL_INT BM_SDHC_IRQSTAT_CRM
bogdanm 82:6473597d706e 97 #define SDHC_HAL_CARD_INT BM_SDHC_IRQSTAT_CINT
bogdanm 82:6473597d706e 98 #define SDHC_HAL_CMD_TIMEOUT_ERR_INT BM_SDHC_IRQSTAT_CTOE
bogdanm 82:6473597d706e 99 #define SDHC_HAL_CMD_CRC_ERR_INT BM_SDHC_IRQSTAT_CCE
bogdanm 82:6473597d706e 100 #define SDHC_HAL_CMD_END_BIT_ERR_INT BM_SDHC_IRQSTAT_CEBE
bogdanm 82:6473597d706e 101 #define SDHC_HAL_CMD_INDEX_ERR_INT BM_SDHC_IRQSTAT_CIE
bogdanm 82:6473597d706e 102 #define SDHC_HAL_DATA_TIMEOUT_ERR_INT BM_SDHC_IRQSTAT_DTOE
bogdanm 82:6473597d706e 103 #define SDHC_HAL_DATA_CRC_ERR_INT BM_SDHC_IRQSTAT_CCE
bogdanm 82:6473597d706e 104 #define SDHC_HAL_DATA_END_BIT_ERR_INT BM_SDHC_IRQSTAT_DEBE
bogdanm 82:6473597d706e 105 #define SDHC_HAL_AUTO_CMD12_ERR_INT BM_SDHC_IRQSTAT_AC12E
bogdanm 82:6473597d706e 106 #define SDHC_HAL_DMA_ERR_INT BM_SDHC_IRQSTAT_DMAE
bogdanm 82:6473597d706e 107
bogdanm 82:6473597d706e 108 /* AC12ERR */
bogdanm 82:6473597d706e 109 #define SDHC_HAL_ACMD12_NOT_EXEC_ERR BM_SDHC_AC12ERR_AC12NE
bogdanm 82:6473597d706e 110 #define SDHC_HAL_ACMD12_TIMEOUT_ERR BM_SDHC_AC12ERR_AC12TOE
bogdanm 82:6473597d706e 111 #define SDHC_HAL_ACMD12_END_BIT_ERR BM_SDHC_AC12ERR_AC12EBE
bogdanm 82:6473597d706e 112 #define SDHC_HAL_ACMD12_CRC_ERR BM_SDHC_AC12ERR_AC12CE
bogdanm 82:6473597d706e 113 #define SDHC_HAL_ACMD12_INDEX_ERR BM_SDHC_AC12ERR_AC12IE
bogdanm 82:6473597d706e 114 #define SDHC_HAL_ACMD12_NOT_ISSUE_ERR BM_SDHC_AC12ERR_CNIBAC12E
bogdanm 82:6473597d706e 115
bogdanm 82:6473597d706e 116 /* HTCAPBLT */
bogdanm 82:6473597d706e 117 #define SDHC_HAL_SUPPORT_ADMA BM_SDHC_HTCAPBLT_ADMAS
bogdanm 82:6473597d706e 118 #define SDHC_HAL_SUPPORT_HIGHSPEED BM_SDHC_HTCAPBLT_HSS
bogdanm 82:6473597d706e 119 #define SDHC_HAL_SUPPORT_DMA BM_SDHC_HTCAPBLT_DMAS
bogdanm 82:6473597d706e 120 #define SDHC_HAL_SUPPORT_SUSPEND_RESUME BM_SDHC_HTCAPBLT_SRS
bogdanm 82:6473597d706e 121 #define SDHC_HAL_SUPPORT_3_3_V BM_SDHC_HTCAPBLT_VS33
bogdanm 82:6473597d706e 122 #define SDHC_HAL_SUPPORT_3_0_V BM_SDHC_HTCAPBLT_VS30
bogdanm 82:6473597d706e 123 #define SDHC_HAL_SUPPORT_1_8_V BM_SDHC_HTCAPBLT_VS18
bogdanm 82:6473597d706e 124
bogdanm 82:6473597d706e 125 /* FEVT */
bogdanm 82:6473597d706e 126 #define SDHC_HAL_ACMD12_NOT_EXEC_ERR_EVENT BM_SDHC_FEVT_AC12NE
bogdanm 82:6473597d706e 127 #define SDHC_HAL_ACMD12_TIMEOUT_ERR_EVENT BM_SDHC_FEVT_AC12TOE
bogdanm 82:6473597d706e 128 #define SDHC_HAL_ACMD12_CRC_ERR_EVENT BM_SDHC_FEVT_AC12CE
bogdanm 82:6473597d706e 129 #define SDHC_HAL_ACMD12_END_BIT_ERR_EVENT BM_SDHC_FEVT_AC12EBE
bogdanm 82:6473597d706e 130 #define SDHC_HAL_ACMD12_INDEX_ERR_EVENT BM_SDHC_FEVT_AC12IE
bogdanm 82:6473597d706e 131 #define SDHC_HAL_ACMD12_NOT_ISSUE_ERR_EVENT BM_SDHC_FEVT_CNIBAC12E
bogdanm 82:6473597d706e 132 #define SDHC_HAL_CMD_TIMEOUT_ERR_EVENT BM_SDHC_FEVT_CTOE
bogdanm 82:6473597d706e 133 #define SDHC_HAL_CMD_CRC_ERR_EVENT BM_SDHC_FEVT_CCE
bogdanm 82:6473597d706e 134 #define SDHC_HAL_CMD_END_BIT_ERR_EVENT BM_SDHC_FEVT_CEBE
bogdanm 82:6473597d706e 135 #define SDHC_HAL_CMD_INDEX_ERR_EVENT BM_SDHC_FEVT_CIE
bogdanm 82:6473597d706e 136 #define SDHC_HAL_DATA_TIMEOUT_ERR_EVENT BM_SDHC_FEVT_DTOE
bogdanm 82:6473597d706e 137 #define SDHC_HAL_DATA_CRC_ERR_EVENT BM_SDHC_FEVT_DCE
bogdanm 82:6473597d706e 138 #define SDHC_HAL_DATA_END_BIT_ERR_EVENT BM_SDHC_FEVT_DEBE
bogdanm 82:6473597d706e 139 #define SDHC_HAL_ACMD12_ERR_EVENT BM_SDHC_FEVT_AC12E
bogdanm 82:6473597d706e 140 #define SDHC_HAL_CARD_INT_EVENT BM_SDHC_FEVT_CINT
bogdanm 82:6473597d706e 141 #define SDHC_HAL_DMA_ERROR_EVENT BM_SDHC_FEVT_DMAE
bogdanm 82:6473597d706e 142
bogdanm 82:6473597d706e 143 /* MMCBOOT */
bogdanm 82:6473597d706e 144 typedef enum _sdhc_hal_mmcboot
bogdanm 82:6473597d706e 145 {
bogdanm 82:6473597d706e 146 kSDHC_HAL_MMCBOOT_Normal = 0,
bogdanm 82:6473597d706e 147 kSDHC_HAL_MMCBOOT_Alter = 1,
bogdanm 82:6473597d706e 148 } sdhc_hal_mmcboot_t;
bogdanm 82:6473597d706e 149
bogdanm 82:6473597d706e 150 /* PROCTL */
bogdanm 82:6473597d706e 151 typedef enum _sdhc_hal_led
bogdanm 82:6473597d706e 152 {
bogdanm 82:6473597d706e 153 kSDHC_HAL_LED_Off = 0,
bogdanm 82:6473597d706e 154 kSDHC_HAL_LED_On = 1,
bogdanm 82:6473597d706e 155 } sdhc_hal_led_t;
bogdanm 82:6473597d706e 156
bogdanm 82:6473597d706e 157 typedef enum _sdhc_hal_dtw
bogdanm 82:6473597d706e 158 {
bogdanm 82:6473597d706e 159 kSDHC_HAL_DTW_1Bit = 0,
bogdanm 82:6473597d706e 160 kSDHC_HAL_DTW_4Bit = 1,
bogdanm 82:6473597d706e 161 kSDHC_HAL_DTW_8Bit = 2,
bogdanm 82:6473597d706e 162 } sdhc_hal_dtw_t;
bogdanm 82:6473597d706e 163
bogdanm 82:6473597d706e 164 typedef enum _sdhc_hal_endian
bogdanm 82:6473597d706e 165 {
bogdanm 82:6473597d706e 166 kSDHC_HAL_ENDIAN_Big = 0,
bogdanm 82:6473597d706e 167 kSDHC_HAL_ENDIAN_HalfWordBig = 1,
bogdanm 82:6473597d706e 168 kSDHC_HAL_ENDIAN_Little = 2,
bogdanm 82:6473597d706e 169 } sdhc_hal_endian_t;
bogdanm 82:6473597d706e 170
bogdanm 82:6473597d706e 171 typedef enum _sdhc_hal_dma_mode
bogdanm 82:6473597d706e 172 {
bogdanm 82:6473597d706e 173 kSDHC_HAL_DMA_NoOrSimple = 0,
bogdanm 82:6473597d706e 174 kSDHC_HAL_DMA_Adma1 = 1,
bogdanm 82:6473597d706e 175 kSDHC_HAL_DMA_Adma2 = 2,
bogdanm 82:6473597d706e 176 } sdhc_hal_dma_mode_t;
bogdanm 82:6473597d706e 177
bogdanm 82:6473597d706e 178 #define SDHC_HAL_RST_TYPE_ALL BM_SDHC_SYSCTL_RSTA
bogdanm 82:6473597d706e 179 #define SDHC_HAL_RST_TYPE_CMD BM_SDHC_SYSCTL_RSTC
bogdanm 82:6473597d706e 180 #define SDHC_HAL_RST_TYPE_DATA BM_SDHC_SYSCTL_RSTD
bogdanm 82:6473597d706e 181
bogdanm 82:6473597d706e 182 #define SDHC_HAL_MAX_BLKLEN_512B (0U)
bogdanm 82:6473597d706e 183 #define SDHC_HAL_MAX_BLKLEN_1024B (1U)
bogdanm 82:6473597d706e 184 #define SDHC_HAL_MAX_BLKLEN_2048B (2U)
bogdanm 82:6473597d706e 185 #define SDHC_HAL_MAX_BLKLEN_4096B (3U)
bogdanm 82:6473597d706e 186
bogdanm 82:6473597d706e 187 /*************************************************************************************************
bogdanm 82:6473597d706e 188 * API
bogdanm 82:6473597d706e 189 ************************************************************************************************/
bogdanm 82:6473597d706e 190
bogdanm 82:6473597d706e 191 #if defined(__cplusplus)
bogdanm 82:6473597d706e 192 extern "C" {
bogdanm 82:6473597d706e 193 #endif
bogdanm 82:6473597d706e 194
bogdanm 82:6473597d706e 195 /*! @name SDHC HAL FUNCTION */
bogdanm 82:6473597d706e 196 /*@{ */
bogdanm 82:6473597d706e 197
bogdanm 82:6473597d706e 198 /*!
bogdanm 82:6473597d706e 199 * @brief Checks whether the given instance is valid.
bogdanm 82:6473597d706e 200 *
bogdanm 82:6473597d706e 201 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 202 * @return true if valid
bogdanm 82:6473597d706e 203 */
bogdanm 82:6473597d706e 204 static inline bool sdhc_hal_is_valid_instance(uint8_t instance)
bogdanm 82:6473597d706e 205 {
bogdanm 82:6473597d706e 206 return (instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 207 }
bogdanm 82:6473597d706e 208
bogdanm 82:6473597d706e 209 /*!
bogdanm 82:6473597d706e 210 * @brief Configures the DMA address.
bogdanm 82:6473597d706e 211 *
bogdanm 82:6473597d706e 212 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 213 * @param address the DMA address
bogdanm 82:6473597d706e 214 */
bogdanm 82:6473597d706e 215 static inline void sdhc_hal_set_dma_addr(uint8_t instance, uint32_t address)
bogdanm 82:6473597d706e 216 {
bogdanm 82:6473597d706e 217 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 218 HW_SDHC_DSADDR_WR(BF_SDHC_DSADDR_DSADDR(address));
bogdanm 82:6473597d706e 219 }
bogdanm 82:6473597d706e 220
bogdanm 82:6473597d706e 221 /*!
bogdanm 82:6473597d706e 222 * @brief Gets the DMA address.
bogdanm 82:6473597d706e 223 *
bogdanm 82:6473597d706e 224 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 225 * @return the DMA address
bogdanm 82:6473597d706e 226 */
bogdanm 82:6473597d706e 227 static inline uint32_t sdhc_hal_get_dma_addr(uint8_t instance)
bogdanm 82:6473597d706e 228 {
bogdanm 82:6473597d706e 229 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 230 return HW_SDHC_DSADDR_RD();
bogdanm 82:6473597d706e 231 }
bogdanm 82:6473597d706e 232
bogdanm 82:6473597d706e 233 /*!
bogdanm 82:6473597d706e 234 * @brief Gets the block size configured.
bogdanm 82:6473597d706e 235 *
bogdanm 82:6473597d706e 236 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 237 * @return the block size already configured
bogdanm 82:6473597d706e 238 */
bogdanm 82:6473597d706e 239 static inline uint32_t sdhc_hal_get_blksz(uint8_t instance)
bogdanm 82:6473597d706e 240 {
bogdanm 82:6473597d706e 241 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 242 return BR_SDHC_BLKATTR_BLKSIZE;
bogdanm 82:6473597d706e 243 }
bogdanm 82:6473597d706e 244
bogdanm 82:6473597d706e 245 /*!
bogdanm 82:6473597d706e 246 * @brief Sets the block size.
bogdanm 82:6473597d706e 247 *
bogdanm 82:6473597d706e 248 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 249 * @param blockSize the block size
bogdanm 82:6473597d706e 250 */
bogdanm 82:6473597d706e 251 static inline void sdhc_hal_set_blksz(uint8_t instance, uint32_t blockSize)
bogdanm 82:6473597d706e 252 {
bogdanm 82:6473597d706e 253 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 254 BW_SDHC_BLKATTR_BLKSIZE(blockSize);
bogdanm 82:6473597d706e 255 }
bogdanm 82:6473597d706e 256
bogdanm 82:6473597d706e 257 /*!
bogdanm 82:6473597d706e 258 * @brief Sets the block count.
bogdanm 82:6473597d706e 259 *
bogdanm 82:6473597d706e 260 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 261 * @param blockCount the block count
bogdanm 82:6473597d706e 262 */
bogdanm 82:6473597d706e 263 static inline void sdhc_hal_set_blkcnt(uint8_t instance, uint32_t blockCount)
bogdanm 82:6473597d706e 264 {
bogdanm 82:6473597d706e 265 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 266 BW_SDHC_BLKATTR_BLKCNT(blockCount);
bogdanm 82:6473597d706e 267 }
bogdanm 82:6473597d706e 268
bogdanm 82:6473597d706e 269 /*!
bogdanm 82:6473597d706e 270 * @brief Gets the block count configured.
bogdanm 82:6473597d706e 271 *
bogdanm 82:6473597d706e 272 * @param instance SDHC instance id
bogdanm 82:6473597d706e 273 * @return the block count already configured
bogdanm 82:6473597d706e 274 */
bogdanm 82:6473597d706e 275 static inline uint32_t sdhc_hal_get_blkcnt(uint8_t instance)
bogdanm 82:6473597d706e 276 {
bogdanm 82:6473597d706e 277 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 278 return BR_SDHC_BLKATTR_BLKCNT;
bogdanm 82:6473597d706e 279 }
bogdanm 82:6473597d706e 280
bogdanm 82:6473597d706e 281 /*!
bogdanm 82:6473597d706e 282 * @brief Configures the command argument.
bogdanm 82:6473597d706e 283 *
bogdanm 82:6473597d706e 284 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 285 * @param arg the command argument
bogdanm 82:6473597d706e 286 */
bogdanm 82:6473597d706e 287 static inline void sdhc_hal_set_cmd_arg(uint8_t instance, uint32_t arg)
bogdanm 82:6473597d706e 288 {
bogdanm 82:6473597d706e 289 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 290 BW_SDHC_CMDARG_CMDARG(arg);
bogdanm 82:6473597d706e 291 }
bogdanm 82:6473597d706e 292
bogdanm 82:6473597d706e 293 /*!
bogdanm 82:6473597d706e 294 * @brief Sends a command.
bogdanm 82:6473597d706e 295 *
bogdanm 82:6473597d706e 296 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 297 * @param index command index
bogdanm 82:6473597d706e 298 * @param flags transfer type flags
bogdanm 82:6473597d706e 299 */
bogdanm 82:6473597d706e 300 static inline void sdhc_hal_send_cmd(uint8_t instance, uint32_t index, uint32_t flags)
bogdanm 82:6473597d706e 301 {
bogdanm 82:6473597d706e 302 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 303 HW_SDHC_XFERTYP_WR(((index << BP_SDHC_XFERTYP_CMDINX) & BM_SDHC_XFERTYP_CMDINX)
bogdanm 82:6473597d706e 304 | (flags & ( BM_SDHC_XFERTYP_DMAEN | BM_SDHC_XFERTYP_MSBSEL | BM_SDHC_XFERTYP_DPSEL
bogdanm 82:6473597d706e 305 | BM_SDHC_XFERTYP_CMDTYP | BM_SDHC_XFERTYP_BCEN | BM_SDHC_XFERTYP_CICEN
bogdanm 82:6473597d706e 306 | BM_SDHC_XFERTYP_CCCEN | BM_SDHC_XFERTYP_RSPTYP | BM_SDHC_XFERTYP_DTDSEL
bogdanm 82:6473597d706e 307 | BM_SDHC_XFERTYP_AC12EN)));
bogdanm 82:6473597d706e 308 }
bogdanm 82:6473597d706e 309
bogdanm 82:6473597d706e 310 /*!
bogdanm 82:6473597d706e 311 * @brief Fills the the data port.
bogdanm 82:6473597d706e 312 *
bogdanm 82:6473597d706e 313 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 314 * @param data the data about to be sent
bogdanm 82:6473597d706e 315 */
bogdanm 82:6473597d706e 316 static inline void sdhc_hal_set_data(uint8_t instance, uint32_t data)
bogdanm 82:6473597d706e 317 {
bogdanm 82:6473597d706e 318 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 319 HW_SDHC_DATPORT_WR(data);
bogdanm 82:6473597d706e 320 }
bogdanm 82:6473597d706e 321
bogdanm 82:6473597d706e 322 /*!
bogdanm 82:6473597d706e 323 * @brief Retrieves the data from the data port.
bogdanm 82:6473597d706e 324 *
bogdanm 82:6473597d706e 325 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 326 * @return data the data read
bogdanm 82:6473597d706e 327 */
bogdanm 82:6473597d706e 328 static inline uint32_t sdhc_hal_get_data(uint8_t instance)
bogdanm 82:6473597d706e 329 {
bogdanm 82:6473597d706e 330 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 331 return BR_SDHC_DATPORT_DATCONT;
bogdanm 82:6473597d706e 332 }
bogdanm 82:6473597d706e 333
bogdanm 82:6473597d706e 334 /*!
bogdanm 82:6473597d706e 335 * @brief Checks whether the command inhibit bit is set or not.
bogdanm 82:6473597d706e 336 *
bogdanm 82:6473597d706e 337 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 338 * @return 1 if command inhibit, 0 if not.
bogdanm 82:6473597d706e 339 */
bogdanm 82:6473597d706e 340 static inline uint32_t sdhc_hal_is_cmd_inhibit(uint8_t instance)
bogdanm 82:6473597d706e 341 {
bogdanm 82:6473597d706e 342 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 343 return BR_SDHC_PRSSTAT_CIHB;
bogdanm 82:6473597d706e 344 }
bogdanm 82:6473597d706e 345
bogdanm 82:6473597d706e 346 /*!
bogdanm 82:6473597d706e 347 * @brief Checks whether data inhibit bit is set or not.
bogdanm 82:6473597d706e 348 *
bogdanm 82:6473597d706e 349 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 350 * @return 1 if data inhibit, 0 if not.
bogdanm 82:6473597d706e 351 */
bogdanm 82:6473597d706e 352 static inline uint32_t sdhc_hal_is_data_inhibit(uint8_t instance)
bogdanm 82:6473597d706e 353 {
bogdanm 82:6473597d706e 354 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 355 return BR_SDHC_PRSSTAT_CDIHB;
bogdanm 82:6473597d706e 356 }
bogdanm 82:6473597d706e 357
bogdanm 82:6473597d706e 358 /*!
bogdanm 82:6473597d706e 359 * @brief Checks whether data line is active.
bogdanm 82:6473597d706e 360 *
bogdanm 82:6473597d706e 361 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 362 * @return 1 if it's active, 0 if not.
bogdanm 82:6473597d706e 363 */
bogdanm 82:6473597d706e 364 static inline uint32_t sdhc_hal_is_data_line_active(uint8_t instance)
bogdanm 82:6473597d706e 365 {
bogdanm 82:6473597d706e 366 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 367 return BR_SDHC_PRSSTAT_DLA;
bogdanm 82:6473597d706e 368 }
bogdanm 82:6473597d706e 369
bogdanm 82:6473597d706e 370 /*!
bogdanm 82:6473597d706e 371 * @brief Checks whether the SD clock is stable or not.
bogdanm 82:6473597d706e 372 *
bogdanm 82:6473597d706e 373 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 374 * @return 1 if it's stable, 0 if not.
bogdanm 82:6473597d706e 375 */
bogdanm 82:6473597d706e 376 static inline uint32_t sdhc_hal_is_sd_clk_stable(uint8_t instance)
bogdanm 82:6473597d706e 377 {
bogdanm 82:6473597d706e 378 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 379 return BR_SDHC_PRSSTAT_SDSTB;
bogdanm 82:6473597d706e 380 }
bogdanm 82:6473597d706e 381
bogdanm 82:6473597d706e 382 /*!
bogdanm 82:6473597d706e 383 * @brief Checks whether the IPG clock is off or not.
bogdanm 82:6473597d706e 384 *
bogdanm 82:6473597d706e 385 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 386 * @return 1 if it's off, 0 if not.
bogdanm 82:6473597d706e 387 */
bogdanm 82:6473597d706e 388 static inline uint32_t sdhc_hal_is_ipg_clk_off(uint8_t instance)
bogdanm 82:6473597d706e 389 {
bogdanm 82:6473597d706e 390 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 391 return BR_SDHC_PRSSTAT_IPGOFF;
bogdanm 82:6473597d706e 392 }
bogdanm 82:6473597d706e 393
bogdanm 82:6473597d706e 394 /*!
bogdanm 82:6473597d706e 395 * @brief Checks whether the system clock is off or not.
bogdanm 82:6473597d706e 396 *
bogdanm 82:6473597d706e 397 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 398 * @return 1 if it's off, 0 if not.
bogdanm 82:6473597d706e 399 */
bogdanm 82:6473597d706e 400 static inline uint32_t sdhc_hal_is_sys_clk_off(uint8_t instance)
bogdanm 82:6473597d706e 401 {
bogdanm 82:6473597d706e 402 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 403 return BR_SDHC_PRSSTAT_HCKOFF;
bogdanm 82:6473597d706e 404 }
bogdanm 82:6473597d706e 405
bogdanm 82:6473597d706e 406 /*!
bogdanm 82:6473597d706e 407 * @brief Checks whether the peripheral clock is off or not.
bogdanm 82:6473597d706e 408 *
bogdanm 82:6473597d706e 409 * @param instance SDHC instance ID.
bogdanm 82:6473597d706e 410 * @return 1 if it's off, 0 if not.
bogdanm 82:6473597d706e 411 */
bogdanm 82:6473597d706e 412 static inline uint32_t sdhc_hal_is_per_clk_off(uint8_t instance)
bogdanm 82:6473597d706e 413 {
bogdanm 82:6473597d706e 414 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 415 return BR_SDHC_PRSSTAT_PEROFF;
bogdanm 82:6473597d706e 416 }
bogdanm 82:6473597d706e 417
bogdanm 82:6473597d706e 418 /*!
bogdanm 82:6473597d706e 419 * @brief Checks whether the SD clock is off or not.
bogdanm 82:6473597d706e 420 *
bogdanm 82:6473597d706e 421 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 422 * @return 1 if it's off, 0 if not.
bogdanm 82:6473597d706e 423 */
bogdanm 82:6473597d706e 424 static inline uint32_t sdhc_hal_is_sd_clk_off(uint8_t instance)
bogdanm 82:6473597d706e 425 {
bogdanm 82:6473597d706e 426 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 427 return BR_SDHC_PRSSTAT_SDOFF;
bogdanm 82:6473597d706e 428 }
bogdanm 82:6473597d706e 429
bogdanm 82:6473597d706e 430 /*!
bogdanm 82:6473597d706e 431 * @brief Checks whether the write transfer is active or not.
bogdanm 82:6473597d706e 432 *
bogdanm 82:6473597d706e 433 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 434 * @return 1 if it's active, 0 if not.
bogdanm 82:6473597d706e 435 */
bogdanm 82:6473597d706e 436 static inline uint32_t sdhc_hal_is_write_trans_active(uint8_t instance)
bogdanm 82:6473597d706e 437 {
bogdanm 82:6473597d706e 438 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 439 return BR_SDHC_PRSSTAT_WTA;
bogdanm 82:6473597d706e 440 }
bogdanm 82:6473597d706e 441
bogdanm 82:6473597d706e 442 /*!
bogdanm 82:6473597d706e 443 * @brief Checks whether the read transfer is active or not.
bogdanm 82:6473597d706e 444 *
bogdanm 82:6473597d706e 445 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 446 * @return 1 if it's off, 0 if not.
bogdanm 82:6473597d706e 447 */
bogdanm 82:6473597d706e 448 static inline uint32_t sdhc_hal_is_read_trans_active(uint8_t instance)
bogdanm 82:6473597d706e 449 {
bogdanm 82:6473597d706e 450 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 451 return BR_SDHC_PRSSTAT_RTA;
bogdanm 82:6473597d706e 452 }
bogdanm 82:6473597d706e 453
bogdanm 82:6473597d706e 454 /*!
bogdanm 82:6473597d706e 455 * @brief Check whether the buffer write is enabled or not.
bogdanm 82:6473597d706e 456 *
bogdanm 82:6473597d706e 457 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 458 * @return 1 if it's isEnabledd, 0 if not.
bogdanm 82:6473597d706e 459 */
bogdanm 82:6473597d706e 460 static inline uint32_t sdhc_hal_is_buf_write_enabled(uint8_t instance)
bogdanm 82:6473597d706e 461 {
bogdanm 82:6473597d706e 462 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 463 return BR_SDHC_PRSSTAT_BWEN;
bogdanm 82:6473597d706e 464 }
bogdanm 82:6473597d706e 465
bogdanm 82:6473597d706e 466 /*!
bogdanm 82:6473597d706e 467 * @brief Checks whether the buffer read is enabled or not.
bogdanm 82:6473597d706e 468 *
bogdanm 82:6473597d706e 469 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 470 * @return 1 if it's isEnabledd, 0 if not.
bogdanm 82:6473597d706e 471 */
bogdanm 82:6473597d706e 472 static inline uint32_t sdhc_hal_is_buf_read_enabled(uint8_t instance)
bogdanm 82:6473597d706e 473 {
bogdanm 82:6473597d706e 474 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 475 return BR_SDHC_PRSSTAT_BREN;
bogdanm 82:6473597d706e 476 }
bogdanm 82:6473597d706e 477
bogdanm 82:6473597d706e 478 /*!
bogdanm 82:6473597d706e 479 * @brief Checks whether the card is inserted or not.
bogdanm 82:6473597d706e 480 *
bogdanm 82:6473597d706e 481 * @param instance SDHC instance ID.
bogdanm 82:6473597d706e 482 * @return 1 if it's inserted, 0 if not.
bogdanm 82:6473597d706e 483 */
bogdanm 82:6473597d706e 484 static inline uint32_t sdhc_hal_is_card_inserted(uint8_t instance)
bogdanm 82:6473597d706e 485 {
bogdanm 82:6473597d706e 486 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 487 return BR_SDHC_PRSSTAT_CINS;
bogdanm 82:6473597d706e 488 }
bogdanm 82:6473597d706e 489
bogdanm 82:6473597d706e 490 /*!
bogdanm 82:6473597d706e 491 * @brief Checks whether the command line signal is high or not.
bogdanm 82:6473597d706e 492 *
bogdanm 82:6473597d706e 493 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 494 * @return 1 if it's high, 0 if not.
bogdanm 82:6473597d706e 495 */
bogdanm 82:6473597d706e 496 static inline uint32_t sdhc_hal_is_cmd_line_level_high(uint8_t instance)
bogdanm 82:6473597d706e 497 {
bogdanm 82:6473597d706e 498 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 499 return BR_SDHC_PRSSTAT_CLSL;
bogdanm 82:6473597d706e 500 }
bogdanm 82:6473597d706e 501
bogdanm 82:6473597d706e 502 /*!
bogdanm 82:6473597d706e 503 * @brief Gets the data line signal level or not.
bogdanm 82:6473597d706e 504 *
bogdanm 82:6473597d706e 505 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 506 * @return [7:0] data line signal level
bogdanm 82:6473597d706e 507 */
bogdanm 82:6473597d706e 508 static inline uint32_t sdhc_hal_get_data_line_level(uint8_t instance)
bogdanm 82:6473597d706e 509 {
bogdanm 82:6473597d706e 510 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 511 return BR_SDHC_PRSSTAT_DLSL;
bogdanm 82:6473597d706e 512 }
bogdanm 82:6473597d706e 513
bogdanm 82:6473597d706e 514 /*!
bogdanm 82:6473597d706e 515 * @brief Sets the LED state.
bogdanm 82:6473597d706e 516 *
bogdanm 82:6473597d706e 517 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 518 * @param state the LED state
bogdanm 82:6473597d706e 519 */
bogdanm 82:6473597d706e 520 static inline void sdhc_hal_set_led_state(uint8_t instance, sdhc_hal_led_t state)
bogdanm 82:6473597d706e 521 {
bogdanm 82:6473597d706e 522 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 523 BW_SDHC_PROCTL_LCTL(state);
bogdanm 82:6473597d706e 524 }
bogdanm 82:6473597d706e 525
bogdanm 82:6473597d706e 526 /*!
bogdanm 82:6473597d706e 527 * @brief Sets the data transfer width.
bogdanm 82:6473597d706e 528 *
bogdanm 82:6473597d706e 529 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 530 * @param dtw data transfer width
bogdanm 82:6473597d706e 531 */
bogdanm 82:6473597d706e 532 static inline void sdhc_hal_set_data_trans_width(uint8_t instance, sdhc_hal_dtw_t dtw)
bogdanm 82:6473597d706e 533 {
bogdanm 82:6473597d706e 534 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 535 BW_SDHC_PROCTL_DTW(dtw);
bogdanm 82:6473597d706e 536 }
bogdanm 82:6473597d706e 537
bogdanm 82:6473597d706e 538 /*!
bogdanm 82:6473597d706e 539 * @brief Checks whether the DAT3 is taken as card detect pin.
bogdanm 82:6473597d706e 540 *
bogdanm 82:6473597d706e 541 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 542 */
bogdanm 82:6473597d706e 543 static inline bool sdhc_hal_is_d3cd_enabled(uint8_t instance)
bogdanm 82:6473597d706e 544 {
bogdanm 82:6473597d706e 545 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 546 return BR_SDHC_PROCTL_D3CD;
bogdanm 82:6473597d706e 547 }
bogdanm 82:6473597d706e 548
bogdanm 82:6473597d706e 549 /*!
bogdanm 82:6473597d706e 550 * @brief Enables the DAT3 as a card detect pin.
bogdanm 82:6473597d706e 551 *
bogdanm 82:6473597d706e 552 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 553 * @param isEnabled isEnabled the feature
bogdanm 82:6473597d706e 554 */
bogdanm 82:6473597d706e 555 static inline void sdhc_hal_enable_d3cd(uint8_t instance, bool isEnabled)
bogdanm 82:6473597d706e 556 {
bogdanm 82:6473597d706e 557 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 558 BW_SDHC_PROCTL_D3CD(isEnabled ? 1 : 0);
bogdanm 82:6473597d706e 559 }
bogdanm 82:6473597d706e 560
bogdanm 82:6473597d706e 561 /*!
bogdanm 82:6473597d706e 562 * @brief Configures the endian mode.
bogdanm 82:6473597d706e 563 *
bogdanm 82:6473597d706e 564 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 565 * @param endianMode endian mode
bogdanm 82:6473597d706e 566 */
bogdanm 82:6473597d706e 567 static inline void sdhc_hal_set_endian(uint8_t instance, sdhc_hal_endian_t endianMode)
bogdanm 82:6473597d706e 568 {
bogdanm 82:6473597d706e 569 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 570 BW_SDHC_PROCTL_EMODE(endianMode);
bogdanm 82:6473597d706e 571 }
bogdanm 82:6473597d706e 572
bogdanm 82:6473597d706e 573 /*!
bogdanm 82:6473597d706e 574 * @brief Gets the card detect test level.
bogdanm 82:6473597d706e 575 *
bogdanm 82:6473597d706e 576 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 577 * @return card detect test level
bogdanm 82:6473597d706e 578 */
bogdanm 82:6473597d706e 579 static inline uint32_t sdhc_hal_get_cd_test_level(uint8_t instance)
bogdanm 82:6473597d706e 580 {
bogdanm 82:6473597d706e 581 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 582 return BR_SDHC_PROCTL_CDTL;
bogdanm 82:6473597d706e 583 }
bogdanm 82:6473597d706e 584
bogdanm 82:6473597d706e 585 /*!
bogdanm 82:6473597d706e 586 * @brief Enables the card detect test.
bogdanm 82:6473597d706e 587 *
bogdanm 82:6473597d706e 588 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 589 * @param isEnabled
bogdanm 82:6473597d706e 590 */
bogdanm 82:6473597d706e 591 static inline void sdhc_hal_enable_cd_test(uint8_t instance, bool isEnabled)
bogdanm 82:6473597d706e 592 {
bogdanm 82:6473597d706e 593 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 594 BW_SDHC_PROCTL_CDSS(isEnabled ? 1 : 0);
bogdanm 82:6473597d706e 595 }
bogdanm 82:6473597d706e 596
bogdanm 82:6473597d706e 597 /*!
bogdanm 82:6473597d706e 598 * @brief Sets the DMA mode.
bogdanm 82:6473597d706e 599 *
bogdanm 82:6473597d706e 600 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 601 * @param dmaMode the DMA mode
bogdanm 82:6473597d706e 602 */
bogdanm 82:6473597d706e 603 static inline void sdhc_hal_set_dma_mode(uint8_t instance, sdhc_hal_dma_mode_t dmaMode)
bogdanm 82:6473597d706e 604 {
bogdanm 82:6473597d706e 605 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 606 BW_SDHC_PROCTL_DMAS(dmaMode);
bogdanm 82:6473597d706e 607 }
bogdanm 82:6473597d706e 608
bogdanm 82:6473597d706e 609 /*!
bogdanm 82:6473597d706e 610 * @brief Enables stop at the block gap.
bogdanm 82:6473597d706e 611 *
bogdanm 82:6473597d706e 612 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 613 * @param isEnabled
bogdanm 82:6473597d706e 614 */
bogdanm 82:6473597d706e 615 static inline void sdhc_hal_enable_stop_at_blkgap(uint8_t instance, bool isEnabled)
bogdanm 82:6473597d706e 616 {
bogdanm 82:6473597d706e 617 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 618 BW_SDHC_PROCTL_SABGREQ(isEnabled ? 1 : 0);
bogdanm 82:6473597d706e 619 }
bogdanm 82:6473597d706e 620
bogdanm 82:6473597d706e 621 /*!
bogdanm 82:6473597d706e 622 * @brief Restarts a transaction which has stopped at the block gap.
bogdanm 82:6473597d706e 623 *
bogdanm 82:6473597d706e 624 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 625 */
bogdanm 82:6473597d706e 626 static inline void sdhc_hal_continue_req(uint8_t instance)
bogdanm 82:6473597d706e 627 {
bogdanm 82:6473597d706e 628 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 629 BW_SDHC_PROCTL_CREQ(1);
bogdanm 82:6473597d706e 630 }
bogdanm 82:6473597d706e 631
bogdanm 82:6473597d706e 632 /*!
bogdanm 82:6473597d706e 633 * @brief Enables teh read wait control for the SDIO cards.
bogdanm 82:6473597d706e 634 *
bogdanm 82:6473597d706e 635 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 636 * @param isEnabled
bogdanm 82:6473597d706e 637 */
bogdanm 82:6473597d706e 638 static inline void sdhc_hal_enable_read_wait_ctrl(uint8_t instance, bool isEnabled)
bogdanm 82:6473597d706e 639 {
bogdanm 82:6473597d706e 640 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 641 BW_SDHC_PROCTL_RWCTL(isEnabled ? 1 : 0);
bogdanm 82:6473597d706e 642 }
bogdanm 82:6473597d706e 643
bogdanm 82:6473597d706e 644 /*!
bogdanm 82:6473597d706e 645 * @brief Enables stop at the block gap requests.
bogdanm 82:6473597d706e 646 *
bogdanm 82:6473597d706e 647 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 648 * @param isEnabled
bogdanm 82:6473597d706e 649 */
bogdanm 82:6473597d706e 650 static inline void sdhc_hal_enable_intr_stop_at_blk_gap(uint8_t instance, bool isEnabled)
bogdanm 82:6473597d706e 651 {
bogdanm 82:6473597d706e 652 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 653 BW_SDHC_PROCTL_IABG(isEnabled ? 1 : 0);
bogdanm 82:6473597d706e 654 }
bogdanm 82:6473597d706e 655
bogdanm 82:6473597d706e 656 /*!
bogdanm 82:6473597d706e 657 * @brief Enables wakeup event on the card interrupt.
bogdanm 82:6473597d706e 658 *
bogdanm 82:6473597d706e 659 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 660 * @param isEnabled
bogdanm 82:6473597d706e 661 */
bogdanm 82:6473597d706e 662 static inline void sdhc_hal_enable_wakeup_on_card_intr(uint8_t instance, bool isEnabled)
bogdanm 82:6473597d706e 663 {
bogdanm 82:6473597d706e 664 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 665 BW_SDHC_PROCTL_WECINT(isEnabled ? 1 : 0);
bogdanm 82:6473597d706e 666 }
bogdanm 82:6473597d706e 667
bogdanm 82:6473597d706e 668 /*!
bogdanm 82:6473597d706e 669 * @brief Enables wakeup event on the card insertion.
bogdanm 82:6473597d706e 670 *
bogdanm 82:6473597d706e 671 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 672 * @param isEnabled
bogdanm 82:6473597d706e 673 */
bogdanm 82:6473597d706e 674 static inline void sdhc_hal_enable_wakeup_on_card_ins(uint8_t instance, bool isEnabled)
bogdanm 82:6473597d706e 675 {
bogdanm 82:6473597d706e 676 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 677 BW_SDHC_PROCTL_WECINS(isEnabled ? 1 : 0);
bogdanm 82:6473597d706e 678 }
bogdanm 82:6473597d706e 679
bogdanm 82:6473597d706e 680 /*!
bogdanm 82:6473597d706e 681 * @brief Enables wakeup event on card removal.
bogdanm 82:6473597d706e 682 *
bogdanm 82:6473597d706e 683 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 684 * @param isEnabled
bogdanm 82:6473597d706e 685 */
bogdanm 82:6473597d706e 686 static inline void sdhc_hal_enable_wakeup_on_card_rm(uint8_t instance, bool isEnabled)
bogdanm 82:6473597d706e 687 {
bogdanm 82:6473597d706e 688 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 689 BW_SDHC_PROCTL_WECRM(isEnabled ? 1 : 0);
bogdanm 82:6473597d706e 690 }
bogdanm 82:6473597d706e 691
bogdanm 82:6473597d706e 692 /*!
bogdanm 82:6473597d706e 693 * @brief Enables the IPG clock, then no automatic clock gating off.
bogdanm 82:6473597d706e 694 *
bogdanm 82:6473597d706e 695 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 696 * @param isEnabled
bogdanm 82:6473597d706e 697 */
bogdanm 82:6473597d706e 698 static inline void sdhc_hal_enable_ipg_clk(uint8_t instance, bool isEnabled)
bogdanm 82:6473597d706e 699 {
bogdanm 82:6473597d706e 700 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 701 BW_SDHC_SYSCTL_IPGEN(isEnabled ? 1 : 0);
bogdanm 82:6473597d706e 702 }
bogdanm 82:6473597d706e 703
bogdanm 82:6473597d706e 704 /*!
bogdanm 82:6473597d706e 705 * @brief Enables the system clock, then no automatic clock gating off.
bogdanm 82:6473597d706e 706 *
bogdanm 82:6473597d706e 707 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 708 * @param isEnabled
bogdanm 82:6473597d706e 709 */
bogdanm 82:6473597d706e 710 static inline void sdhc_hal_enable_sys_clk(uint8_t instance, bool isEnabled)
bogdanm 82:6473597d706e 711 {
bogdanm 82:6473597d706e 712 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 713 BW_SDHC_SYSCTL_HCKEN(isEnabled ? 1 : 0);
bogdanm 82:6473597d706e 714 }
bogdanm 82:6473597d706e 715
bogdanm 82:6473597d706e 716 /*!
bogdanm 82:6473597d706e 717 * @brief Enables the peripheral clock, then no automatic clock gating off.
bogdanm 82:6473597d706e 718 *
bogdanm 82:6473597d706e 719 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 720 * @param isEnabled
bogdanm 82:6473597d706e 721 */
bogdanm 82:6473597d706e 722 static inline void sdhc_hal_enable_per_clk(uint8_t instance, bool isEnabled)
bogdanm 82:6473597d706e 723 {
bogdanm 82:6473597d706e 724 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 725 BW_SDHC_SYSCTL_PEREN(isEnabled ? 1 : 0);
bogdanm 82:6473597d706e 726 }
bogdanm 82:6473597d706e 727
bogdanm 82:6473597d706e 728 /*!
bogdanm 82:6473597d706e 729 * @brief Enables the SD clock. It should be disabled before changing SD clock
bogdanm 82:6473597d706e 730 * frequency.
bogdanm 82:6473597d706e 731 *
bogdanm 82:6473597d706e 732 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 733 * @param isEnabled
bogdanm 82:6473597d706e 734 */
bogdanm 82:6473597d706e 735 static inline void sdhc_hal_enable_sd_clk(uint8_t instance, bool isEnabled)
bogdanm 82:6473597d706e 736 {
bogdanm 82:6473597d706e 737 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 738 BW_SDHC_SYSCTL_SDCLKEN(isEnabled ? 1 : 0);
bogdanm 82:6473597d706e 739 }
bogdanm 82:6473597d706e 740
bogdanm 82:6473597d706e 741 /*!
bogdanm 82:6473597d706e 742 * @brief Sets the SD clock frequency divisor.
bogdanm 82:6473597d706e 743 *
bogdanm 82:6473597d706e 744 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 745 * @param divisor the divisor
bogdanm 82:6473597d706e 746 */
bogdanm 82:6473597d706e 747 static inline void sdhc_hal_set_clk_div(uint8_t instance, uint32_t divisor)
bogdanm 82:6473597d706e 748 {
bogdanm 82:6473597d706e 749 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 750 BW_SDHC_SYSCTL_DVS(divisor);
bogdanm 82:6473597d706e 751 }
bogdanm 82:6473597d706e 752
bogdanm 82:6473597d706e 753 /*!
bogdanm 82:6473597d706e 754 * @brief Sets the SD clock frequency select.
bogdanm 82:6473597d706e 755 *
bogdanm 82:6473597d706e 756 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 757 * @param freq the frequency selector
bogdanm 82:6473597d706e 758 */
bogdanm 82:6473597d706e 759 static inline void sdhc_hal_set_clk_freq(uint8_t instance, uint32_t freq)
bogdanm 82:6473597d706e 760 {
bogdanm 82:6473597d706e 761 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 762 BW_SDHC_SYSCTL_SDCLKFS(freq);
bogdanm 82:6473597d706e 763 }
bogdanm 82:6473597d706e 764
bogdanm 82:6473597d706e 765 /*!
bogdanm 82:6473597d706e 766 * @brief Sets the data timeout counter value.
bogdanm 82:6473597d706e 767 *
bogdanm 82:6473597d706e 768 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 769 * @param timeout
bogdanm 82:6473597d706e 770 */
bogdanm 82:6473597d706e 771 static inline void sdhc_hal_set_data_timeout(uint8_t instance, uint32_t timeout)
bogdanm 82:6473597d706e 772 {
bogdanm 82:6473597d706e 773 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 774 BW_SDHC_SYSCTL_DTOCV(timeout);
bogdanm 82:6473597d706e 775 }
bogdanm 82:6473597d706e 776
bogdanm 82:6473597d706e 777 /*!
bogdanm 82:6473597d706e 778 * @brief Performs the kinds of SDHC reset.
bogdanm 82:6473597d706e 779 *
bogdanm 82:6473597d706e 780 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 781 * @param type the type of reset
bogdanm 82:6473597d706e 782 */
bogdanm 82:6473597d706e 783 static inline void sdhc_hal_reset(uint8_t instance, uint32_t type)
bogdanm 82:6473597d706e 784 {
bogdanm 82:6473597d706e 785 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 786 HW_SDHC_SYSCTL_SET(type & (BM_SDHC_SYSCTL_RSTA | BM_SDHC_SYSCTL_RSTC | BM_SDHC_SYSCTL_RSTD));
bogdanm 82:6473597d706e 787 }
bogdanm 82:6473597d706e 788
bogdanm 82:6473597d706e 789 /*!
bogdanm 82:6473597d706e 790 * @brief Checks whether the given SDHC reset is finished.
bogdanm 82:6473597d706e 791 *
bogdanm 82:6473597d706e 792 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 793 * @param type the type of reset
bogdanm 82:6473597d706e 794 * @return if the given reset is done
bogdanm 82:6473597d706e 795 */
bogdanm 82:6473597d706e 796 static inline uint32_t sdhc_hal_is_reset_done(uint8_t instance, uint32_t type)
bogdanm 82:6473597d706e 797 {
bogdanm 82:6473597d706e 798 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 799 return !(HW_SDHC_SYSCTL_RD()
bogdanm 82:6473597d706e 800 & (type & (BM_SDHC_SYSCTL_RSTA | BM_SDHC_SYSCTL_RSTC | BM_SDHC_SYSCTL_RSTD)));
bogdanm 82:6473597d706e 801 }
bogdanm 82:6473597d706e 802
bogdanm 82:6473597d706e 803 /*!
bogdanm 82:6473597d706e 804 * @brief Sends 80 SD clock cycles to the card.
bogdanm 82:6473597d706e 805 *
bogdanm 82:6473597d706e 806 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 807 */
bogdanm 82:6473597d706e 808 static inline void sdhc_hal_init_card(uint8_t instance)
bogdanm 82:6473597d706e 809 {
bogdanm 82:6473597d706e 810 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 811 BW_SDHC_SYSCTL_INITA(1);
bogdanm 82:6473597d706e 812 }
bogdanm 82:6473597d706e 813
bogdanm 82:6473597d706e 814 /*!
bogdanm 82:6473597d706e 815 * @brief Checks whether sending 80 SD clock cycles to card is finished.
bogdanm 82:6473597d706e 816 *
bogdanm 82:6473597d706e 817 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 818 * @return if sending 80 SD clock cycles is finished
bogdanm 82:6473597d706e 819 */
bogdanm 82:6473597d706e 820 static inline uint32_t sdhc_hal_is_init_card_done(uint8_t instance)
bogdanm 82:6473597d706e 821 {
bogdanm 82:6473597d706e 822 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 823 return !(BR_SDHC_SYSCTL_INITA);
bogdanm 82:6473597d706e 824 }
bogdanm 82:6473597d706e 825
bogdanm 82:6473597d706e 826 /*!
bogdanm 82:6473597d706e 827 * @brief Gets the current interrupt status.
bogdanm 82:6473597d706e 828 *
bogdanm 82:6473597d706e 829 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 830 * @return current interrupt flags
bogdanm 82:6473597d706e 831 */
bogdanm 82:6473597d706e 832 static inline uint32_t sdhc_hal_get_intr_flags(uint8_t instance)
bogdanm 82:6473597d706e 833 {
bogdanm 82:6473597d706e 834 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 835 return HW_SDHC_IRQSTAT_RD();
bogdanm 82:6473597d706e 836 }
bogdanm 82:6473597d706e 837
bogdanm 82:6473597d706e 838 /*!
bogdanm 82:6473597d706e 839 * @brief Clears a specified interrupt status.
bogdanm 82:6473597d706e 840 *
bogdanm 82:6473597d706e 841 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 842 * @param mask to specify interrupts' flags to be cleared
bogdanm 82:6473597d706e 843 */
bogdanm 82:6473597d706e 844 static inline void sdhc_hal_clear_intr_flags(uint8_t instance, uint32_t mask)
bogdanm 82:6473597d706e 845 {
bogdanm 82:6473597d706e 846 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 847 HW_SDHC_IRQSTAT_WR(mask);
bogdanm 82:6473597d706e 848 }
bogdanm 82:6473597d706e 849
bogdanm 82:6473597d706e 850 /*!
bogdanm 82:6473597d706e 851 * @brief Gets the currently enabled interrupt signal.
bogdanm 82:6473597d706e 852 *
bogdanm 82:6473597d706e 853 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 854 * @return currently enabled interrupt signal
bogdanm 82:6473597d706e 855 */
bogdanm 82:6473597d706e 856 static inline uint32_t sdhc_hal_get_intr_signal(uint8_t instance)
bogdanm 82:6473597d706e 857 {
bogdanm 82:6473597d706e 858 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 859 return HW_SDHC_IRQSIGEN_RD();
bogdanm 82:6473597d706e 860 }
bogdanm 82:6473597d706e 861
bogdanm 82:6473597d706e 862 /*!
bogdanm 82:6473597d706e 863 * @brief Gets the currently enabled interrupt state.
bogdanm 82:6473597d706e 864 *
bogdanm 82:6473597d706e 865 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 866 * @return currently enabled interrupts' state
bogdanm 82:6473597d706e 867 */
bogdanm 82:6473597d706e 868 static inline uint32_t sdhc_hal_get_intr_state(uint8_t instance)
bogdanm 82:6473597d706e 869 {
bogdanm 82:6473597d706e 870 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 871 return HW_SDHC_IRQSTATEN_RD();
bogdanm 82:6473597d706e 872 }
bogdanm 82:6473597d706e 873
bogdanm 82:6473597d706e 874 /*!
bogdanm 82:6473597d706e 875 * @brief Gets the auto cmd12 error.
bogdanm 82:6473597d706e 876 *
bogdanm 82:6473597d706e 877 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 878 * @return auto cmd12 error status
bogdanm 82:6473597d706e 879 */
bogdanm 82:6473597d706e 880 static inline uint32_t sdhc_hal_get_ac12_error(uint8_t instance)
bogdanm 82:6473597d706e 881 {
bogdanm 82:6473597d706e 882 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 883 return HW_SDHC_AC12ERR_RD();
bogdanm 82:6473597d706e 884 }
bogdanm 82:6473597d706e 885
bogdanm 82:6473597d706e 886 /*!
bogdanm 82:6473597d706e 887 * @brief Gets the maximum block length supported.
bogdanm 82:6473597d706e 888 *
bogdanm 82:6473597d706e 889 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 890 * @return the maximum block length support
bogdanm 82:6473597d706e 891 */
bogdanm 82:6473597d706e 892 static inline uint32_t sdhc_hal_get_max_blklen(uint8_t instance)
bogdanm 82:6473597d706e 893 {
bogdanm 82:6473597d706e 894 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 895 return BR_SDHC_HTCAPBLT_MBL;
bogdanm 82:6473597d706e 896 }
bogdanm 82:6473597d706e 897
bogdanm 82:6473597d706e 898 /*!
bogdanm 82:6473597d706e 899 * @brief Checks whether the ADMA is supported.
bogdanm 82:6473597d706e 900 *
bogdanm 82:6473597d706e 901 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 902 * @return if ADMA is supported
bogdanm 82:6473597d706e 903 */
bogdanm 82:6473597d706e 904 static inline uint32_t sdhc_hal_host_can_do_adma(uint8_t instance)
bogdanm 82:6473597d706e 905 {
bogdanm 82:6473597d706e 906 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 907 return BR_SDHC_HTCAPBLT_ADMAS;
bogdanm 82:6473597d706e 908 }
bogdanm 82:6473597d706e 909
bogdanm 82:6473597d706e 910 /*!
bogdanm 82:6473597d706e 911 * @brief Checks whether the high speed is supported.
bogdanm 82:6473597d706e 912 *
bogdanm 82:6473597d706e 913 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 914 * @return if high speed is supported
bogdanm 82:6473597d706e 915 */
bogdanm 82:6473597d706e 916 static inline uint32_t sdhc_hal_host_can_do_highspeed(uint8_t instance)
bogdanm 82:6473597d706e 917 {
bogdanm 82:6473597d706e 918 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 919 return BR_SDHC_HTCAPBLT_HSS;
bogdanm 82:6473597d706e 920 }
bogdanm 82:6473597d706e 921
bogdanm 82:6473597d706e 922 /*!
bogdanm 82:6473597d706e 923 * @brief Checks whether the DMA is supported.
bogdanm 82:6473597d706e 924 *
bogdanm 82:6473597d706e 925 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 926 * @return if high speed is supported
bogdanm 82:6473597d706e 927 */
bogdanm 82:6473597d706e 928 static inline uint32_t sdhc_hal_host_can_do_dma(uint8_t instance)
bogdanm 82:6473597d706e 929 {
bogdanm 82:6473597d706e 930 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 931 return BR_SDHC_HTCAPBLT_DMAS;
bogdanm 82:6473597d706e 932 }
bogdanm 82:6473597d706e 933
bogdanm 82:6473597d706e 934 /*!
bogdanm 82:6473597d706e 935 * @brief Checks whether the suspend/resume is supported.
bogdanm 82:6473597d706e 936 *
bogdanm 82:6473597d706e 937 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 938 * @return if suspend and resume is supported
bogdanm 82:6473597d706e 939 */
bogdanm 82:6473597d706e 940 static inline uint32_t sdhc_hal_host_can_do_suspend_resume(uint8_t instance)
bogdanm 82:6473597d706e 941 {
bogdanm 82:6473597d706e 942 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 943 return BR_SDHC_HTCAPBLT_SRS;
bogdanm 82:6473597d706e 944 }
bogdanm 82:6473597d706e 945
bogdanm 82:6473597d706e 946 /*!
bogdanm 82:6473597d706e 947 * @brief Checks whether the voltage 3.3 is supported.
bogdanm 82:6473597d706e 948 *
bogdanm 82:6473597d706e 949 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 950 * @return if voltage 3.3 is supported
bogdanm 82:6473597d706e 951 */
bogdanm 82:6473597d706e 952 static inline uint32_t sdhc_hal_host_supports_v330(uint8_t instance)
bogdanm 82:6473597d706e 953 {
bogdanm 82:6473597d706e 954 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 955 return BR_SDHC_HTCAPBLT_VS33;
bogdanm 82:6473597d706e 956 }
bogdanm 82:6473597d706e 957
bogdanm 82:6473597d706e 958 /*!
bogdanm 82:6473597d706e 959 * @brief Checks whether the voltage 3.0 is supported.
bogdanm 82:6473597d706e 960 *
bogdanm 82:6473597d706e 961 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 962 * @return if voltage 3.0 is supported
bogdanm 82:6473597d706e 963 */
bogdanm 82:6473597d706e 964 static inline uint32_t sdhc_hal_host_supports_v300(uint8_t instance)
bogdanm 82:6473597d706e 965 {
bogdanm 82:6473597d706e 966 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 967 #if defined(FSL_FEATURE_SDHC_HAS_V300_SUPPORT) && FSL_FEATURE_SDHC_HAS_V300_SUPPORT
bogdanm 82:6473597d706e 968 return BR_SDHC_HTCAPBLT_VS30;
bogdanm 82:6473597d706e 969 #else
bogdanm 82:6473597d706e 970 return 0;
bogdanm 82:6473597d706e 971 #endif
bogdanm 82:6473597d706e 972 }
bogdanm 82:6473597d706e 973
bogdanm 82:6473597d706e 974 /*!
bogdanm 82:6473597d706e 975 * @brief Checks whether the voltage 1.8 is supported.
bogdanm 82:6473597d706e 976 *
bogdanm 82:6473597d706e 977 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 978 * @return if voltage 1.8 is supported
bogdanm 82:6473597d706e 979 */
bogdanm 82:6473597d706e 980 static inline uint32_t sdhc_hal_host_supports_v180(uint8_t instance)
bogdanm 82:6473597d706e 981 {
bogdanm 82:6473597d706e 982 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 983 #if defined(FSL_FEATURE_SDHC_HAS_V180_SUPPORT) && FSL_FEATURE_SDHC_HAS_V180_SUPPORT
bogdanm 82:6473597d706e 984 return BR_SDHC_HTCAPBLT_VS18;
bogdanm 82:6473597d706e 985 #else
bogdanm 82:6473597d706e 986 return 0;
bogdanm 82:6473597d706e 987 #endif
bogdanm 82:6473597d706e 988 }
bogdanm 82:6473597d706e 989
bogdanm 82:6473597d706e 990 /*!
bogdanm 82:6473597d706e 991 * @brief Sets the watermark for writing.
bogdanm 82:6473597d706e 992 *
bogdanm 82:6473597d706e 993 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 994 * @param watermark for writing
bogdanm 82:6473597d706e 995 */
bogdanm 82:6473597d706e 996 static inline void sdhc_hal_set_write_watermark(uint8_t instance, uint32_t watermark)
bogdanm 82:6473597d706e 997 {
bogdanm 82:6473597d706e 998 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 999 BW_SDHC_WML_WRWML(watermark);
bogdanm 82:6473597d706e 1000 }
bogdanm 82:6473597d706e 1001
bogdanm 82:6473597d706e 1002 /*!
bogdanm 82:6473597d706e 1003 * @brief Sets the watermark for reading.
bogdanm 82:6473597d706e 1004 *
bogdanm 82:6473597d706e 1005 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 1006 * @param watermark for reading
bogdanm 82:6473597d706e 1007 */
bogdanm 82:6473597d706e 1008 static inline void sdhc_hal_set_read_watermark(uint8_t instance, uint32_t watermark)
bogdanm 82:6473597d706e 1009 {
bogdanm 82:6473597d706e 1010 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 1011 BW_SDHC_WML_RDWML(watermark);
bogdanm 82:6473597d706e 1012 }
bogdanm 82:6473597d706e 1013
bogdanm 82:6473597d706e 1014 /*!
bogdanm 82:6473597d706e 1015 * @brief Sets the force events according to the given mask.
bogdanm 82:6473597d706e 1016 *
bogdanm 82:6473597d706e 1017 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 1018 * @param mask to specify the force events' flags to be set
bogdanm 82:6473597d706e 1019 */
bogdanm 82:6473597d706e 1020 static inline void sdhc_hal_set_force_event_flags(uint8_t instance, uint32_t mask)
bogdanm 82:6473597d706e 1021 {
bogdanm 82:6473597d706e 1022 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 1023 HW_SDHC_FEVT_WR(mask);
bogdanm 82:6473597d706e 1024 }
bogdanm 82:6473597d706e 1025
bogdanm 82:6473597d706e 1026 /*!
bogdanm 82:6473597d706e 1027 * @brief Checks whether the ADMA error is length mismatch.
bogdanm 82:6473597d706e 1028 *
bogdanm 82:6473597d706e 1029 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 1030 * @return if ADMA error is length mismatch
bogdanm 82:6473597d706e 1031 */
bogdanm 82:6473597d706e 1032 static inline uint32_t sdhc_hal_is_adma_len_mismatch_err(uint8_t instance)
bogdanm 82:6473597d706e 1033 {
bogdanm 82:6473597d706e 1034 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 1035 return BR_SDHC_ADMAES_ADMALME;
bogdanm 82:6473597d706e 1036 }
bogdanm 82:6473597d706e 1037
bogdanm 82:6473597d706e 1038 /*!
bogdanm 82:6473597d706e 1039 * @brief Gets back the state of the ADMA error.
bogdanm 82:6473597d706e 1040 *
bogdanm 82:6473597d706e 1041 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 1042 * @return error state
bogdanm 82:6473597d706e 1043 */
bogdanm 82:6473597d706e 1044 static inline uint32_t sdhc_hal_get_adma_error_stat(uint8_t instance)
bogdanm 82:6473597d706e 1045 {
bogdanm 82:6473597d706e 1046 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 1047 return BR_SDHC_ADMAES_ADMAES;
bogdanm 82:6473597d706e 1048 }
bogdanm 82:6473597d706e 1049
bogdanm 82:6473597d706e 1050 /*!
bogdanm 82:6473597d706e 1051 * @brief Checks whether the ADMA error is a descriptor error.
bogdanm 82:6473597d706e 1052 *
bogdanm 82:6473597d706e 1053 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 1054 * @return if ADMA error is descriptor error
bogdanm 82:6473597d706e 1055 */
bogdanm 82:6473597d706e 1056 static inline uint32_t sdhc_hal_is_adma_desc_err(uint8_t instance)
bogdanm 82:6473597d706e 1057 {
bogdanm 82:6473597d706e 1058 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 1059 return BR_SDHC_ADMAES_ADMADCE;
bogdanm 82:6473597d706e 1060 }
bogdanm 82:6473597d706e 1061
bogdanm 82:6473597d706e 1062 /*!
bogdanm 82:6473597d706e 1063 * @brief Sets the ADMA address.
bogdanm 82:6473597d706e 1064 *
bogdanm 82:6473597d706e 1065 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 1066 * @param address for ADMA transfer
bogdanm 82:6473597d706e 1067 */
bogdanm 82:6473597d706e 1068 static inline void sdhc_hal_set_adma_addr(uint8_t instance, uint32_t address)
bogdanm 82:6473597d706e 1069 {
bogdanm 82:6473597d706e 1070 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 1071 HW_SDHC_ADSADDR_WR(BF_SDHC_ADSADDR_ADSADDR(address));
bogdanm 82:6473597d706e 1072 }
bogdanm 82:6473597d706e 1073
bogdanm 82:6473597d706e 1074 /*!
bogdanm 82:6473597d706e 1075 * @brief Enables the external DMA request.
bogdanm 82:6473597d706e 1076 *
bogdanm 82:6473597d706e 1077 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 1078 * @param isEnabled or not
bogdanm 82:6473597d706e 1079 */
bogdanm 82:6473597d706e 1080 static inline void sdhc_hal_enable_ext_dma_req(uint8_t instance, bool isEnabled)
bogdanm 82:6473597d706e 1081 {
bogdanm 82:6473597d706e 1082 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 1083 BW_SDHC_VENDOR_EXTDMAEN(isEnabled ? 1 : 0);
bogdanm 82:6473597d706e 1084 }
bogdanm 82:6473597d706e 1085
bogdanm 82:6473597d706e 1086 /*!
bogdanm 82:6473597d706e 1087 * @brief Enables the exact block number for the SDIO CMD53.
bogdanm 82:6473597d706e 1088 *
bogdanm 82:6473597d706e 1089 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 1090 * @param isEnabled or not
bogdanm 82:6473597d706e 1091 */
bogdanm 82:6473597d706e 1092 static inline void sdhc_hal_enable_exact_blk_num(uint8_t instance, bool isEnabled)
bogdanm 82:6473597d706e 1093 {
bogdanm 82:6473597d706e 1094 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 1095 BW_SDHC_VENDOR_EXBLKNU(isEnabled ? 1 : 0);
bogdanm 82:6473597d706e 1096 }
bogdanm 82:6473597d706e 1097
bogdanm 82:6473597d706e 1098 /*!
bogdanm 82:6473597d706e 1099 * @brief Sets the timeout value for the boot ACK.
bogdanm 82:6473597d706e 1100 *
bogdanm 82:6473597d706e 1101 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 1102 * @param timeout
bogdanm 82:6473597d706e 1103 */
bogdanm 82:6473597d706e 1104 static inline void sdhc_hal_set_boot_ack_timeout(uint8_t instance, uint32_t timeout)
bogdanm 82:6473597d706e 1105 {
bogdanm 82:6473597d706e 1106 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 1107 BW_SDHC_MMCBOOT_DTOCVACK(timeout);
bogdanm 82:6473597d706e 1108 }
bogdanm 82:6473597d706e 1109
bogdanm 82:6473597d706e 1110 /*!
bogdanm 82:6473597d706e 1111 * @brief Enables the boot ACK.
bogdanm 82:6473597d706e 1112 *
bogdanm 82:6473597d706e 1113 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 1114 * @param isEnabled
bogdanm 82:6473597d706e 1115 */
bogdanm 82:6473597d706e 1116 static inline void sdhc_hal_enable_boot_ack(uint8_t instance, bool isEnabled)
bogdanm 82:6473597d706e 1117 {
bogdanm 82:6473597d706e 1118 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 1119 BW_SDHC_MMCBOOT_BOOTACK(isEnabled ? 1 : 0);
bogdanm 82:6473597d706e 1120 }
bogdanm 82:6473597d706e 1121
bogdanm 82:6473597d706e 1122 /*!
bogdanm 82:6473597d706e 1123 * @brief Configures the boot mode.
bogdanm 82:6473597d706e 1124 *
bogdanm 82:6473597d706e 1125 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 1126 * @param mode the boot mode
bogdanm 82:6473597d706e 1127 */
bogdanm 82:6473597d706e 1128 static inline void sdhc_hal_set_boot_mode(uint8_t instance, sdhc_hal_mmcboot_t mode)
bogdanm 82:6473597d706e 1129 {
bogdanm 82:6473597d706e 1130 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 1131 BW_SDHC_MMCBOOT_BOOTMODE(mode);
bogdanm 82:6473597d706e 1132 }
bogdanm 82:6473597d706e 1133
bogdanm 82:6473597d706e 1134 /*!
bogdanm 82:6473597d706e 1135 * @brief Enables the fast boot.
bogdanm 82:6473597d706e 1136 *
bogdanm 82:6473597d706e 1137 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 1138 * @param isEnabled or not
bogdanm 82:6473597d706e 1139 */
bogdanm 82:6473597d706e 1140 static inline void sdhc_hal_enable_fastboot(uint8_t instance, bool isEnabled)
bogdanm 82:6473597d706e 1141 {
bogdanm 82:6473597d706e 1142 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 1143 BW_SDHC_MMCBOOT_BOOTEN(isEnabled ? 1 : 0);
bogdanm 82:6473597d706e 1144 }
bogdanm 82:6473597d706e 1145
bogdanm 82:6473597d706e 1146 /*!
bogdanm 82:6473597d706e 1147 * @brief Enables the automatic stop at the block gap.
bogdanm 82:6473597d706e 1148 *
bogdanm 82:6473597d706e 1149 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 1150 * @param isEnabled or not
bogdanm 82:6473597d706e 1151 */
bogdanm 82:6473597d706e 1152 static inline void sdhc_hal_enable_auto_stop_at_blkgap(uint8_t instance, bool isEnabled)
bogdanm 82:6473597d706e 1153 {
bogdanm 82:6473597d706e 1154 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 1155 BW_SDHC_MMCBOOT_AUTOSABGEN(isEnabled ? 1 : 0);
bogdanm 82:6473597d706e 1156 }
bogdanm 82:6473597d706e 1157
bogdanm 82:6473597d706e 1158 /*!
bogdanm 82:6473597d706e 1159 * @brief Configures the the block count for the boot.
bogdanm 82:6473597d706e 1160 *
bogdanm 82:6473597d706e 1161 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 1162 * @param blockCount the block count for boot
bogdanm 82:6473597d706e 1163 */
bogdanm 82:6473597d706e 1164 static inline void sdhc_hal_set_boot_blkcnt(uint8_t instance, uint32_t blockCount)
bogdanm 82:6473597d706e 1165 {
bogdanm 82:6473597d706e 1166 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 1167 BW_SDHC_MMCBOOT_BOOTBLKCNT(blockCount);
bogdanm 82:6473597d706e 1168 }
bogdanm 82:6473597d706e 1169
bogdanm 82:6473597d706e 1170 /*!
bogdanm 82:6473597d706e 1171 * @brief Gets a specification version.
bogdanm 82:6473597d706e 1172 *
bogdanm 82:6473597d706e 1173 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 1174 * @return specification version
bogdanm 82:6473597d706e 1175 */
bogdanm 82:6473597d706e 1176 static inline uint32_t sdhc_hal_get_spec_ver(uint8_t instance)
bogdanm 82:6473597d706e 1177 {
bogdanm 82:6473597d706e 1178 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 1179 return BR_SDHC_HOSTVER_SVN;
bogdanm 82:6473597d706e 1180 }
bogdanm 82:6473597d706e 1181
bogdanm 82:6473597d706e 1182 /*!
bogdanm 82:6473597d706e 1183 * @brief Gets the vendor version.
bogdanm 82:6473597d706e 1184 *
bogdanm 82:6473597d706e 1185 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 1186 * @return vendor version
bogdanm 82:6473597d706e 1187 */
bogdanm 82:6473597d706e 1188 static inline uint32_t sdhc_hal_get_vendor_ver(uint8_t instance)
bogdanm 82:6473597d706e 1189 {
bogdanm 82:6473597d706e 1190 assert(instance < HW_SDHC_INSTANCE_COUNT);
bogdanm 82:6473597d706e 1191 return BR_SDHC_HOSTVER_VVN;
bogdanm 82:6473597d706e 1192 }
bogdanm 82:6473597d706e 1193
bogdanm 82:6473597d706e 1194 /*!
bogdanm 82:6473597d706e 1195 * @brief Gets the command response.
bogdanm 82:6473597d706e 1196 *
bogdanm 82:6473597d706e 1197 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 1198 * @param resp an array of response, 4 bytes
bogdanm 82:6473597d706e 1199 */
bogdanm 82:6473597d706e 1200 void sdhc_hal_get_resp(uint8_t instance, uint32_t * resp);
bogdanm 82:6473597d706e 1201
bogdanm 82:6473597d706e 1202 /*!
bogdanm 82:6473597d706e 1203 * @brief Enables the specified interrupts.
bogdanm 82:6473597d706e 1204 *
bogdanm 82:6473597d706e 1205 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 1206 * @param isEnabled enable or disable
bogdanm 82:6473597d706e 1207 * @param mask to specify interrupts to be isEnabledd
bogdanm 82:6473597d706e 1208 */
bogdanm 82:6473597d706e 1209 void sdhc_hal_enable_intr_signal(uint8_t instance, bool isEnabled, uint32_t mask);
bogdanm 82:6473597d706e 1210
bogdanm 82:6473597d706e 1211 /*!
bogdanm 82:6473597d706e 1212 * @brief Enables the specified interrupt state.
bogdanm 82:6473597d706e 1213 *
bogdanm 82:6473597d706e 1214 * @param instance SDHC instance ID
bogdanm 82:6473597d706e 1215 * @param isEnabled enable or disable
bogdanm 82:6473597d706e 1216 * @param mask to specify interrupts' state to be enabled
bogdanm 82:6473597d706e 1217 */
bogdanm 82:6473597d706e 1218 void sdhc_hal_enable_intr_state(uint8_t instance, bool isEnabled, uint32_t mask);
bogdanm 82:6473597d706e 1219
bogdanm 82:6473597d706e 1220 /*@} */
bogdanm 82:6473597d706e 1221
bogdanm 82:6473597d706e 1222 #if defined(__cplusplus)
bogdanm 82:6473597d706e 1223 }
bogdanm 82:6473597d706e 1224 #endif
bogdanm 82:6473597d706e 1225 /*! @} */
bogdanm 82:6473597d706e 1226
bogdanm 82:6473597d706e 1227 #endif
bogdanm 82:6473597d706e 1228
bogdanm 82:6473597d706e 1229 /*************************************************************************************************
bogdanm 82:6473597d706e 1230 * EOF
bogdanm 82:6473597d706e 1231 ************************************************************************************************/
bogdanm 82:6473597d706e 1232