mbed(SerialHalfDuplex入り)
Fork of mbed by
TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/flextimer/fsl_ftm_hal.h@82:6473597d706e, 2014-04-07 (annotated)
- Committer:
- bogdanm
- Date:
- Mon Apr 07 18:28:36 2014 +0100
- Revision:
- 82:6473597d706e
- Child:
- 90:cb3d968589d8
Release 82 of the mbed library
Main changes:
- support for K64F
- Revisited Nordic code structure
- Test infrastructure improvements
- various bug fixes
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 82:6473597d706e | 1 | /* |
bogdanm | 82:6473597d706e | 2 | * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc. |
bogdanm | 82:6473597d706e | 3 | * All rights reserved. |
bogdanm | 82:6473597d706e | 4 | * |
bogdanm | 82:6473597d706e | 5 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 82:6473597d706e | 6 | * are permitted provided that the following conditions are met: |
bogdanm | 82:6473597d706e | 7 | * |
bogdanm | 82:6473597d706e | 8 | * o Redistributions of source code must retain the above copyright notice, this list |
bogdanm | 82:6473597d706e | 9 | * of conditions and the following disclaimer. |
bogdanm | 82:6473597d706e | 10 | * |
bogdanm | 82:6473597d706e | 11 | * o Redistributions in binary form must reproduce the above copyright notice, this |
bogdanm | 82:6473597d706e | 12 | * list of conditions and the following disclaimer in the documentation and/or |
bogdanm | 82:6473597d706e | 13 | * other materials provided with the distribution. |
bogdanm | 82:6473597d706e | 14 | * |
bogdanm | 82:6473597d706e | 15 | * o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
bogdanm | 82:6473597d706e | 16 | * contributors may be used to endorse or promote products derived from this |
bogdanm | 82:6473597d706e | 17 | * software without specific prior written permission. |
bogdanm | 82:6473597d706e | 18 | * |
bogdanm | 82:6473597d706e | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
bogdanm | 82:6473597d706e | 20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
bogdanm | 82:6473597d706e | 21 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 82:6473597d706e | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
bogdanm | 82:6473597d706e | 23 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
bogdanm | 82:6473597d706e | 24 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
bogdanm | 82:6473597d706e | 25 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
bogdanm | 82:6473597d706e | 26 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
bogdanm | 82:6473597d706e | 27 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
bogdanm | 82:6473597d706e | 28 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 82:6473597d706e | 29 | */ |
bogdanm | 82:6473597d706e | 30 | #if !defined(__FSL_FTM_HAL_H__) |
bogdanm | 82:6473597d706e | 31 | #define __FSL_FTM_HAL_H__ |
bogdanm | 82:6473597d706e | 32 | |
bogdanm | 82:6473597d706e | 33 | #include "fsl_device_registers.h" |
bogdanm | 82:6473597d706e | 34 | #include "fsl_ftm_features.h" |
bogdanm | 82:6473597d706e | 35 | #include <stdbool.h> |
bogdanm | 82:6473597d706e | 36 | #include <assert.h> |
bogdanm | 82:6473597d706e | 37 | |
bogdanm | 82:6473597d706e | 38 | /*! |
bogdanm | 82:6473597d706e | 39 | * @addtogroup ftm_hal |
bogdanm | 82:6473597d706e | 40 | * @{ |
bogdanm | 82:6473597d706e | 41 | */ |
bogdanm | 82:6473597d706e | 42 | |
bogdanm | 82:6473597d706e | 43 | /******************************************************************************* |
bogdanm | 82:6473597d706e | 44 | * Definitions |
bogdanm | 82:6473597d706e | 45 | ******************************************************************************/ |
bogdanm | 82:6473597d706e | 46 | #define HW_FTM_CHANNEL_COUNT (8U) /*!< Number of channels for one FTM instance.*/ |
bogdanm | 82:6473597d706e | 47 | #define HW_FTM_CHANNEL_PAIR_COUNT (4U) /*!< Number of combined channel of one FTM instance.*/ |
bogdanm | 82:6473597d706e | 48 | #define HW_CHAN0 (0U) /*!< Channel number for CHAN0.*/ |
bogdanm | 82:6473597d706e | 49 | #define HW_CHAN1 (1U) /*!< Channel number for CHAN1.*/ |
bogdanm | 82:6473597d706e | 50 | #define HW_CHAN2 (2U) /*!< Channel number for CHAN2.*/ |
bogdanm | 82:6473597d706e | 51 | #define HW_CHAN3 (3U) /*!< Channel number for CHAN3.*/ |
bogdanm | 82:6473597d706e | 52 | #define HW_CHAN4 (4U) /*!< Channel number for CHAN4.*/ |
bogdanm | 82:6473597d706e | 53 | #define HW_CHAN5 (5U) /*!< Channel number for CHAN5.*/ |
bogdanm | 82:6473597d706e | 54 | #define HW_CHAN6 (6U) /*!< Channel number for CHAN6.*/ |
bogdanm | 82:6473597d706e | 55 | #define HW_CHAN7 (7U) /*!< Channel number for CHAN7.*/ |
bogdanm | 82:6473597d706e | 56 | |
bogdanm | 82:6473597d706e | 57 | #define FTM_COMBINE_CHAN_CTRL_WIDTH (8U) |
bogdanm | 82:6473597d706e | 58 | /*! @brief FlexTimer clock source selection*/ |
bogdanm | 82:6473597d706e | 59 | typedef enum _ftm_clock_source |
bogdanm | 82:6473597d706e | 60 | { |
bogdanm | 82:6473597d706e | 61 | kClock_source_FTM_None = 0, |
bogdanm | 82:6473597d706e | 62 | kClock_source_FTM_SystemClk, |
bogdanm | 82:6473597d706e | 63 | kClock_source_FTM_FixedClk, |
bogdanm | 82:6473597d706e | 64 | kClock_source_FTM_ExternalClk |
bogdanm | 82:6473597d706e | 65 | }ftm_clock_source_t; |
bogdanm | 82:6473597d706e | 66 | |
bogdanm | 82:6473597d706e | 67 | /*! @brief FlexTimer counting mode, up-down*/ |
bogdanm | 82:6473597d706e | 68 | typedef enum _ftm_counting_mode |
bogdanm | 82:6473597d706e | 69 | { |
bogdanm | 82:6473597d706e | 70 | kCounting_FTM_UP = 0, |
bogdanm | 82:6473597d706e | 71 | kCounting_FTM_Down |
bogdanm | 82:6473597d706e | 72 | }ftm_counting_mode_t; |
bogdanm | 82:6473597d706e | 73 | |
bogdanm | 82:6473597d706e | 74 | /*! @brief FlexTimer pre-scaler factor selection for the clock source*/ |
bogdanm | 82:6473597d706e | 75 | typedef enum _ftm_clock_ps |
bogdanm | 82:6473597d706e | 76 | { |
bogdanm | 82:6473597d706e | 77 | kFtmDividedBy1 = 0, |
bogdanm | 82:6473597d706e | 78 | kFtmDividedBy2 , |
bogdanm | 82:6473597d706e | 79 | kFtmDividedBy4 , |
bogdanm | 82:6473597d706e | 80 | kFtmDividedBy8, |
bogdanm | 82:6473597d706e | 81 | kFtmDividedBy16, |
bogdanm | 82:6473597d706e | 82 | kFtmDividedBy32, |
bogdanm | 82:6473597d706e | 83 | kFtmDividedBy64, |
bogdanm | 82:6473597d706e | 84 | kFtmDividedBy128 |
bogdanm | 82:6473597d706e | 85 | }ftm_clock_ps_t; |
bogdanm | 82:6473597d706e | 86 | |
bogdanm | 82:6473597d706e | 87 | /*! @brief FlexTimer phase for the quadrature*/ |
bogdanm | 82:6473597d706e | 88 | typedef enum _ftm_phase_t |
bogdanm | 82:6473597d706e | 89 | { |
bogdanm | 82:6473597d706e | 90 | kFtmPhaseA = 0, |
bogdanm | 82:6473597d706e | 91 | kFtmPhaseB |
bogdanm | 82:6473597d706e | 92 | }ftm_phase_t; |
bogdanm | 82:6473597d706e | 93 | |
bogdanm | 82:6473597d706e | 94 | |
bogdanm | 82:6473597d706e | 95 | /*! @brief FlexTimer pre-scaler factor for the deadtime insertion*/ |
bogdanm | 82:6473597d706e | 96 | typedef enum _ftm_deadtime_ps |
bogdanm | 82:6473597d706e | 97 | { |
bogdanm | 82:6473597d706e | 98 | kFtmDivided0 = 0, |
bogdanm | 82:6473597d706e | 99 | kFtmDivided1 = 1, |
bogdanm | 82:6473597d706e | 100 | kFtmDivided4 = 2, |
bogdanm | 82:6473597d706e | 101 | kFtmDivided16 = 3, |
bogdanm | 82:6473597d706e | 102 | }ftm_deadtime_ps_t; |
bogdanm | 82:6473597d706e | 103 | |
bogdanm | 82:6473597d706e | 104 | /*! @brief FlexTimer operation mode, capture, output, dual, or quad*/ |
bogdanm | 82:6473597d706e | 105 | typedef enum _ftm_config_mode_t |
bogdanm | 82:6473597d706e | 106 | { |
bogdanm | 82:6473597d706e | 107 | kFtmInputCapture, |
bogdanm | 82:6473597d706e | 108 | kFtmOutputCompare, |
bogdanm | 82:6473597d706e | 109 | kFtmEdgeAlignedPWM, |
bogdanm | 82:6473597d706e | 110 | kFtmCenterAlignedPWM, |
bogdanm | 82:6473597d706e | 111 | kFtmCombinedPWM, |
bogdanm | 82:6473597d706e | 112 | kFtmDualEdgeCapture, |
bogdanm | 82:6473597d706e | 113 | kFtmQuadCapture |
bogdanm | 82:6473597d706e | 114 | }ftm_config_mode_t; |
bogdanm | 82:6473597d706e | 115 | |
bogdanm | 82:6473597d706e | 116 | /*! @brief FlexTimer input capture edge mode, rising edge, or falling edge */ |
bogdanm | 82:6473597d706e | 117 | typedef enum _ftm_input_capture_edge_mode_t |
bogdanm | 82:6473597d706e | 118 | { |
bogdanm | 82:6473597d706e | 119 | kFtmRisingEdge = 0, |
bogdanm | 82:6473597d706e | 120 | kFtmFallingEdge, |
bogdanm | 82:6473597d706e | 121 | kFtmRisingAndFalling |
bogdanm | 82:6473597d706e | 122 | }ftm_input_capture_edge_mode_t; |
bogdanm | 82:6473597d706e | 123 | |
bogdanm | 82:6473597d706e | 124 | /*! @brief FlexTimer output compare edge mode. Toggle, clear or set.*/ |
bogdanm | 82:6473597d706e | 125 | typedef enum _ftm_output_compare_edge_mode_t |
bogdanm | 82:6473597d706e | 126 | { |
bogdanm | 82:6473597d706e | 127 | kFtmToggleOnMatch = 0, |
bogdanm | 82:6473597d706e | 128 | kFtmClearOnMatch, |
bogdanm | 82:6473597d706e | 129 | kFtmSetOnMatch |
bogdanm | 82:6473597d706e | 130 | }ftm_output_compare_edge_mode_t; |
bogdanm | 82:6473597d706e | 131 | |
bogdanm | 82:6473597d706e | 132 | /*! @brief FlexTimer PWM output pulse mode, high-true or low-true on match up */ |
bogdanm | 82:6473597d706e | 133 | typedef enum _ftm_pwm_edge_mode_t |
bogdanm | 82:6473597d706e | 134 | { |
bogdanm | 82:6473597d706e | 135 | kFtmHighTrue = 0, |
bogdanm | 82:6473597d706e | 136 | kFtmLowTrue |
bogdanm | 82:6473597d706e | 137 | }ftm_pwm_edge_mode_t; |
bogdanm | 82:6473597d706e | 138 | |
bogdanm | 82:6473597d706e | 139 | /*! @brief FlexTimer dual capture edge mode, one shot or continuous */ |
bogdanm | 82:6473597d706e | 140 | typedef enum _ftm_dual_capture_edge_mode_t |
bogdanm | 82:6473597d706e | 141 | { |
bogdanm | 82:6473597d706e | 142 | kFtmOneShout = 0, |
bogdanm | 82:6473597d706e | 143 | kFtmContinuous |
bogdanm | 82:6473597d706e | 144 | }ftm_dual_capture_edge_mode_t; |
bogdanm | 82:6473597d706e | 145 | |
bogdanm | 82:6473597d706e | 146 | /*! @brief FlexTimer edge mode*/ |
bogdanm | 82:6473597d706e | 147 | typedef union _ftm_edge_mode_t |
bogdanm | 82:6473597d706e | 148 | { |
bogdanm | 82:6473597d706e | 149 | ftm_input_capture_edge_mode_t input_capture_edge_mode; |
bogdanm | 82:6473597d706e | 150 | ftm_output_compare_edge_mode_t output_compare_edge_mode; |
bogdanm | 82:6473597d706e | 151 | ftm_pwm_edge_mode_t ftm_pwm_edge_mode; |
bogdanm | 82:6473597d706e | 152 | ftm_dual_capture_edge_mode_t ftm_dual_capture_edge_mode; |
bogdanm | 82:6473597d706e | 153 | }ftm_edge_mode_t; |
bogdanm | 82:6473597d706e | 154 | /*! @brief FlexTimer module configuration*/ |
bogdanm | 82:6473597d706e | 155 | typedef struct FTMConfig { |
bogdanm | 82:6473597d706e | 156 | ftm_config_mode_t mode; |
bogdanm | 82:6473597d706e | 157 | uint8_t channel; /*channel or channel pair in combine mode*/ |
bogdanm | 82:6473597d706e | 158 | ftm_edge_mode_t edge_mode; |
bogdanm | 82:6473597d706e | 159 | |
bogdanm | 82:6473597d706e | 160 | }ftm_config_t; |
bogdanm | 82:6473597d706e | 161 | /*FTM timer control*/ |
bogdanm | 82:6473597d706e | 162 | /*! |
bogdanm | 82:6473597d706e | 163 | * @brief Sets the FTM clock source. |
bogdanm | 82:6473597d706e | 164 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 165 | * @param clock The FTM peripheral clock selection |
bogdanm | 82:6473597d706e | 166 | * bits:00: No clock 01: system clock 10 :fixed clock 11:External clock |
bogdanm | 82:6473597d706e | 167 | */ |
bogdanm | 82:6473597d706e | 168 | static inline void ftm_hal_set_clock_source(uint8_t instance, ftm_clock_source_t clock) |
bogdanm | 82:6473597d706e | 169 | { |
bogdanm | 82:6473597d706e | 170 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 171 | BW_FTM_SC_CLKS(instance, clock); |
bogdanm | 82:6473597d706e | 172 | } |
bogdanm | 82:6473597d706e | 173 | |
bogdanm | 82:6473597d706e | 174 | /*! |
bogdanm | 82:6473597d706e | 175 | * @brief Sets the FTM clock divider. |
bogdanm | 82:6473597d706e | 176 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 177 | * @param ps The FTM peripheral clock pre-scale divider |
bogdanm | 82:6473597d706e | 178 | */ |
bogdanm | 82:6473597d706e | 179 | static inline void ftm_hal_set_clock_ps(uint8_t instance, ftm_clock_ps_t ps) |
bogdanm | 82:6473597d706e | 180 | { |
bogdanm | 82:6473597d706e | 181 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 182 | BW_FTM_SC_PS(instance, ps); |
bogdanm | 82:6473597d706e | 183 | } |
bogdanm | 82:6473597d706e | 184 | |
bogdanm | 82:6473597d706e | 185 | /*! |
bogdanm | 82:6473597d706e | 186 | * @brief Enables the FTM peripheral timer overflow interrupt. |
bogdanm | 82:6473597d706e | 187 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 188 | */ |
bogdanm | 82:6473597d706e | 189 | static inline void ftm_hal_enable_timer_overflow_interrupt(uint8_t instance) |
bogdanm | 82:6473597d706e | 190 | { |
bogdanm | 82:6473597d706e | 191 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 192 | HW_FTM_SC_SET(instance, BM_FTM_SC_TOIE); |
bogdanm | 82:6473597d706e | 193 | } |
bogdanm | 82:6473597d706e | 194 | |
bogdanm | 82:6473597d706e | 195 | /*! |
bogdanm | 82:6473597d706e | 196 | * @brief Disables the FTM peripheral timer overflow interrupt. |
bogdanm | 82:6473597d706e | 197 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 198 | */ |
bogdanm | 82:6473597d706e | 199 | static inline void ftm_hal_disable_timer_overflow_interrupt(uint8_t instance) |
bogdanm | 82:6473597d706e | 200 | { |
bogdanm | 82:6473597d706e | 201 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 202 | HW_FTM_SC_CLR(instance, BM_FTM_SC_TOIE); |
bogdanm | 82:6473597d706e | 203 | } |
bogdanm | 82:6473597d706e | 204 | |
bogdanm | 82:6473597d706e | 205 | /*! |
bogdanm | 82:6473597d706e | 206 | * @brief Returns the FTM peripheral timer overflow interrupt flag. |
bogdanm | 82:6473597d706e | 207 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 208 | * @retval true if overflow, false if not |
bogdanm | 82:6473597d706e | 209 | */ |
bogdanm | 82:6473597d706e | 210 | static inline bool ftm_is_timer_overflow(uint8_t instance) |
bogdanm | 82:6473597d706e | 211 | { |
bogdanm | 82:6473597d706e | 212 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 213 | return BR_FTM_SC_TOF(instance); |
bogdanm | 82:6473597d706e | 214 | } |
bogdanm | 82:6473597d706e | 215 | |
bogdanm | 82:6473597d706e | 216 | /*! |
bogdanm | 82:6473597d706e | 217 | * @brief Sets the FTM center-aligned PWM select. |
bogdanm | 82:6473597d706e | 218 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 219 | * @param mode 1:upcounting mode 0:up_down counting mode |
bogdanm | 82:6473597d706e | 220 | */ |
bogdanm | 82:6473597d706e | 221 | static inline void ftm_hal_set_cpwms(uint8_t instance, uint8_t mode) |
bogdanm | 82:6473597d706e | 222 | { |
bogdanm | 82:6473597d706e | 223 | assert(instance <HW_FTM_INSTANCE_COUNT && mode<2); |
bogdanm | 82:6473597d706e | 224 | BW_FTM_SC_CPWMS(instance, mode); |
bogdanm | 82:6473597d706e | 225 | } |
bogdanm | 82:6473597d706e | 226 | |
bogdanm | 82:6473597d706e | 227 | /*! |
bogdanm | 82:6473597d706e | 228 | * @brief Sets the FTM peripheral current counter value. |
bogdanm | 82:6473597d706e | 229 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 230 | * @param val FTM timer counter value to be set |
bogdanm | 82:6473597d706e | 231 | */ |
bogdanm | 82:6473597d706e | 232 | static inline void ftm_hal_set_counter(uint8_t instance,uint16_t val) |
bogdanm | 82:6473597d706e | 233 | { |
bogdanm | 82:6473597d706e | 234 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 235 | BW_FTM_CNT_COUNT(instance, val); |
bogdanm | 82:6473597d706e | 236 | } |
bogdanm | 82:6473597d706e | 237 | |
bogdanm | 82:6473597d706e | 238 | /*! |
bogdanm | 82:6473597d706e | 239 | * @brief Returns the FTM peripheral current counter value. |
bogdanm | 82:6473597d706e | 240 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 241 | * @retval current FTM timer counter value |
bogdanm | 82:6473597d706e | 242 | */ |
bogdanm | 82:6473597d706e | 243 | static inline uint16_t ftm_hal_get_counter(uint8_t instance) |
bogdanm | 82:6473597d706e | 244 | { |
bogdanm | 82:6473597d706e | 245 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 246 | return BR_FTM_CNT_COUNT(instance); |
bogdanm | 82:6473597d706e | 247 | } |
bogdanm | 82:6473597d706e | 248 | |
bogdanm | 82:6473597d706e | 249 | /*! |
bogdanm | 82:6473597d706e | 250 | * @brief Sets the FTM peripheral timer modulo value. |
bogdanm | 82:6473597d706e | 251 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 252 | * @param val The value to be set to the timer modulo |
bogdanm | 82:6473597d706e | 253 | */ |
bogdanm | 82:6473597d706e | 254 | static inline void ftm_hal_set_mod(uint8_t instance, uint16_t val) |
bogdanm | 82:6473597d706e | 255 | { |
bogdanm | 82:6473597d706e | 256 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 257 | BW_FTM_MOD_MOD(instance, val); |
bogdanm | 82:6473597d706e | 258 | } |
bogdanm | 82:6473597d706e | 259 | |
bogdanm | 82:6473597d706e | 260 | /*! |
bogdanm | 82:6473597d706e | 261 | * @brief Returns the FTM peripheral counter modulo value. |
bogdanm | 82:6473597d706e | 262 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 263 | * @retval FTM timer modulo value |
bogdanm | 82:6473597d706e | 264 | */ |
bogdanm | 82:6473597d706e | 265 | static inline uint16_t ftm_hal_get_mod(uint8_t instance) |
bogdanm | 82:6473597d706e | 266 | { |
bogdanm | 82:6473597d706e | 267 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 268 | return BR_FTM_MOD_MOD(instance); |
bogdanm | 82:6473597d706e | 269 | } |
bogdanm | 82:6473597d706e | 270 | |
bogdanm | 82:6473597d706e | 271 | /*! |
bogdanm | 82:6473597d706e | 272 | * @brief Sets the FTM peripheral timer counter initial value. |
bogdanm | 82:6473597d706e | 273 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 274 | * @param val initial value to be set |
bogdanm | 82:6473597d706e | 275 | */ |
bogdanm | 82:6473597d706e | 276 | static inline void ftm_hal_set_counter_init_val(uint8_t instance, uint16_t val) |
bogdanm | 82:6473597d706e | 277 | { |
bogdanm | 82:6473597d706e | 278 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 279 | BW_FTM_CNTIN_INIT(instance, val&BM_FTM_CNTIN_INIT); |
bogdanm | 82:6473597d706e | 280 | } |
bogdanm | 82:6473597d706e | 281 | |
bogdanm | 82:6473597d706e | 282 | /*! |
bogdanm | 82:6473597d706e | 283 | * @brief Returns the FTM peripheral counter initial value. |
bogdanm | 82:6473597d706e | 284 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 285 | * @retval FTM timer counter initial value |
bogdanm | 82:6473597d706e | 286 | */ |
bogdanm | 82:6473597d706e | 287 | static inline uint16_t ftm_hal_get_counter_init_val(uint8_t instance) |
bogdanm | 82:6473597d706e | 288 | { |
bogdanm | 82:6473597d706e | 289 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 290 | return BR_FTM_CNTIN_INIT(instance); |
bogdanm | 82:6473597d706e | 291 | } |
bogdanm | 82:6473597d706e | 292 | |
bogdanm | 82:6473597d706e | 293 | /*FTM channel operating mode (Mode, edge and level selection) for capture, output, PWM, combine, dual or quad*/ |
bogdanm | 82:6473597d706e | 294 | /*! |
bogdanm | 82:6473597d706e | 295 | * @brief Sets the FTM peripheral timer channel mode. |
bogdanm | 82:6473597d706e | 296 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 297 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 298 | * @param selection The mode to be set valid value MSnB:MSnA :00,01, 10, 11 |
bogdanm | 82:6473597d706e | 299 | */ |
bogdanm | 82:6473597d706e | 300 | static inline void ftm_hal_set_channel_MSnBA_mode(uint8_t instance, uint8_t channel, uint8_t selection) |
bogdanm | 82:6473597d706e | 301 | { |
bogdanm | 82:6473597d706e | 302 | assert(instance <HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 303 | BW_FTM_CnSC_MSA(instance, channel, selection&1); |
bogdanm | 82:6473597d706e | 304 | BW_FTM_CnSC_MSB(instance, channel, selection&2? 1:0); |
bogdanm | 82:6473597d706e | 305 | |
bogdanm | 82:6473597d706e | 306 | } |
bogdanm | 82:6473597d706e | 307 | |
bogdanm | 82:6473597d706e | 308 | /*! |
bogdanm | 82:6473597d706e | 309 | * @brief Sets the FTM peripheral timer channel edge level. |
bogdanm | 82:6473597d706e | 310 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 311 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 312 | * @param level The rising or falling edge to be set, valid value ELSnB:ELSnA :00,01, 10, 11 |
bogdanm | 82:6473597d706e | 313 | */ |
bogdanm | 82:6473597d706e | 314 | static inline void ftm_hal_set_channel_edge_level(uint8_t instance, uint8_t channel, uint8_t level) |
bogdanm | 82:6473597d706e | 315 | { |
bogdanm | 82:6473597d706e | 316 | assert(instance <HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 317 | BW_FTM_CnSC_ELSA(instance, channel, level&1? 1:0); |
bogdanm | 82:6473597d706e | 318 | BW_FTM_CnSC_ELSB(instance, channel, level&2?1:0); |
bogdanm | 82:6473597d706e | 319 | } |
bogdanm | 82:6473597d706e | 320 | |
bogdanm | 82:6473597d706e | 321 | /*! |
bogdanm | 82:6473597d706e | 322 | * @brief Gets the FTM peripheral timer channel mode. |
bogdanm | 82:6473597d706e | 323 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 324 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 325 | * @retval The MSnB:MSnA mode value, will be 00,01, 10, 11 |
bogdanm | 82:6473597d706e | 326 | */ |
bogdanm | 82:6473597d706e | 327 | static inline uint8_t ftm_hal_get_channel_mode(uint8_t instance, uint8_t channel) |
bogdanm | 82:6473597d706e | 328 | { |
bogdanm | 82:6473597d706e | 329 | assert(instance <HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 330 | return (BR_FTM_CnSC_MSA(instance, channel)|| (BR_FTM_CnSC_MSB(instance, channel)<<1)); |
bogdanm | 82:6473597d706e | 331 | } |
bogdanm | 82:6473597d706e | 332 | |
bogdanm | 82:6473597d706e | 333 | /*! |
bogdanm | 82:6473597d706e | 334 | * @brief Gets the FTM peripheral timer channel edge level. |
bogdanm | 82:6473597d706e | 335 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 336 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 337 | * @retval The ELSnB:ELSnA mode value, will be 00,01, 10, 11 |
bogdanm | 82:6473597d706e | 338 | */ |
bogdanm | 82:6473597d706e | 339 | static inline uint8_t ftm_hal_get_channel_edge_level(uint8_t instance, uint8_t channel) |
bogdanm | 82:6473597d706e | 340 | { |
bogdanm | 82:6473597d706e | 341 | assert(instance <HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 342 | return (BR_FTM_CnSC_ELSA(instance, channel)|| (BR_FTM_CnSC_ELSB(instance, channel)<<1)); |
bogdanm | 82:6473597d706e | 343 | } |
bogdanm | 82:6473597d706e | 344 | |
bogdanm | 82:6473597d706e | 345 | /*! |
bogdanm | 82:6473597d706e | 346 | * @brief Enables or disables the FTM peripheral timer channel DMA. |
bogdanm | 82:6473597d706e | 347 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 348 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 349 | * @param val enable or disable |
bogdanm | 82:6473597d706e | 350 | */ |
bogdanm | 82:6473597d706e | 351 | static inline void ftm_hal_enable_channle_dma(uint8_t instance, uint8_t channel, bool val) |
bogdanm | 82:6473597d706e | 352 | { |
bogdanm | 82:6473597d706e | 353 | assert(instance <HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 354 | BW_FTM_CnSC_DMA(instance, channel,(val? 1:0)); |
bogdanm | 82:6473597d706e | 355 | } |
bogdanm | 82:6473597d706e | 356 | |
bogdanm | 82:6473597d706e | 357 | /*! |
bogdanm | 82:6473597d706e | 358 | * @brief Returns whether the FTM peripheral timer channel DMA is enabled. |
bogdanm | 82:6473597d706e | 359 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 360 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 361 | * @retval true if enabled, false if disabled |
bogdanm | 82:6473597d706e | 362 | */ |
bogdanm | 82:6473597d706e | 363 | static inline bool ftm_hal_is_channel_dma(uint8_t instance, uint8_t channel, bool val) |
bogdanm | 82:6473597d706e | 364 | { |
bogdanm | 82:6473597d706e | 365 | assert(instance <HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 366 | return (BR_FTM_CnSC_DMA(instance, channel) ? true : false); |
bogdanm | 82:6473597d706e | 367 | } |
bogdanm | 82:6473597d706e | 368 | |
bogdanm | 82:6473597d706e | 369 | /*! |
bogdanm | 82:6473597d706e | 370 | * @brief Enables the FTM peripheral timer channel(n) interrupt. |
bogdanm | 82:6473597d706e | 371 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 372 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 373 | */ |
bogdanm | 82:6473597d706e | 374 | static inline void ftm_hal_enable_channel_interrupt(uint8_t instance, uint8_t channel) |
bogdanm | 82:6473597d706e | 375 | { |
bogdanm | 82:6473597d706e | 376 | assert(instance <HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 377 | BW_FTM_CnSC_CHIE(instance, channel, 1); |
bogdanm | 82:6473597d706e | 378 | } |
bogdanm | 82:6473597d706e | 379 | /*! |
bogdanm | 82:6473597d706e | 380 | * @brief Disables the FTM peripheral timer channel(n) interrupt. |
bogdanm | 82:6473597d706e | 381 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 382 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 383 | */ |
bogdanm | 82:6473597d706e | 384 | static inline void ftm_hal_disable_channel_interrupt(uint8_t instance, uint8_t channel) |
bogdanm | 82:6473597d706e | 385 | { |
bogdanm | 82:6473597d706e | 386 | assert(instance <HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 387 | BW_FTM_CnSC_CHIE(instance, channel, 0); |
bogdanm | 82:6473597d706e | 388 | } |
bogdanm | 82:6473597d706e | 389 | |
bogdanm | 82:6473597d706e | 390 | /*! |
bogdanm | 82:6473597d706e | 391 | * @brief Returns whether any event for the FTM peripheral timer channel has occurred. |
bogdanm | 82:6473597d706e | 392 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 393 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 394 | * @retval true if event occurred, false otherwise. |
bogdanm | 82:6473597d706e | 395 | */ |
bogdanm | 82:6473597d706e | 396 | static inline bool ftm_is_channel_event_occurred(uint8_t instance, uint8_t channel) |
bogdanm | 82:6473597d706e | 397 | { |
bogdanm | 82:6473597d706e | 398 | assert(instance <HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 399 | return (BR_FTM_CnSC_CHF(instance, channel))? true : false; |
bogdanm | 82:6473597d706e | 400 | } |
bogdanm | 82:6473597d706e | 401 | |
bogdanm | 82:6473597d706e | 402 | /*FTM channel control*/ |
bogdanm | 82:6473597d706e | 403 | /*! |
bogdanm | 82:6473597d706e | 404 | * @brief Sets the FTM peripheral timer channel counter value. |
bogdanm | 82:6473597d706e | 405 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 406 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 407 | * @param val counter value to be set |
bogdanm | 82:6473597d706e | 408 | */ |
bogdanm | 82:6473597d706e | 409 | static inline void ftm_hal_set_channel_count_value(uint8_t instance, uint8_t channel, uint16_t val) |
bogdanm | 82:6473597d706e | 410 | { |
bogdanm | 82:6473597d706e | 411 | assert(instance <HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 412 | HW_FTM_CnV_WR(instance, channel, val); |
bogdanm | 82:6473597d706e | 413 | } |
bogdanm | 82:6473597d706e | 414 | |
bogdanm | 82:6473597d706e | 415 | /*! |
bogdanm | 82:6473597d706e | 416 | * @brief Gets the FTM peripheral timer channel counter value. |
bogdanm | 82:6473597d706e | 417 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 418 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 419 | * @retval val return current channel counter value |
bogdanm | 82:6473597d706e | 420 | */ |
bogdanm | 82:6473597d706e | 421 | static inline uint16_t ftm_hal_get_channel_count_value(uint8_t instance, uint8_t channel, uint16_t val) |
bogdanm | 82:6473597d706e | 422 | { |
bogdanm | 82:6473597d706e | 423 | assert(instance <HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 424 | return BR_FTM_CnV_VAL(instance, channel); |
bogdanm | 82:6473597d706e | 425 | } |
bogdanm | 82:6473597d706e | 426 | |
bogdanm | 82:6473597d706e | 427 | /*! |
bogdanm | 82:6473597d706e | 428 | * @brief Gets the FTM peripheral timer channel event status. |
bogdanm | 82:6473597d706e | 429 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 430 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 431 | * @retval val return current channel event status value |
bogdanm | 82:6473597d706e | 432 | */ |
bogdanm | 82:6473597d706e | 433 | static inline uint32_t ftm_hal_get_channel_event_status(uint8_t instance, uint8_t channel) |
bogdanm | 82:6473597d706e | 434 | { |
bogdanm | 82:6473597d706e | 435 | assert(instance <HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 436 | return (HW_FTM_STATUS_RD(instance)&(1U<<channel))? true: false; |
bogdanm | 82:6473597d706e | 437 | /*return BR_FTM_STATUS(instance, channel);*/ |
bogdanm | 82:6473597d706e | 438 | } |
bogdanm | 82:6473597d706e | 439 | |
bogdanm | 82:6473597d706e | 440 | /*! |
bogdanm | 82:6473597d706e | 441 | * @brief Clears the FTM peripheral timer all channel event status. |
bogdanm | 82:6473597d706e | 442 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 443 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 444 | * @retval val return current channel counter value |
bogdanm | 82:6473597d706e | 445 | */ |
bogdanm | 82:6473597d706e | 446 | static inline void ftm_hal_clear_channel_event_status(uint8_t instance, uint8_t channel) |
bogdanm | 82:6473597d706e | 447 | { |
bogdanm | 82:6473597d706e | 448 | assert(instance <HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 449 | HW_FTM_STATUS_CLR(instance, 1U<<channel); |
bogdanm | 82:6473597d706e | 450 | } |
bogdanm | 82:6473597d706e | 451 | |
bogdanm | 82:6473597d706e | 452 | /*! |
bogdanm | 82:6473597d706e | 453 | * @brief Sets the FTM peripheral timer channel output mask. |
bogdanm | 82:6473597d706e | 454 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 455 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 456 | * @param mask mask to be set 0 or 1, unmasked or masked |
bogdanm | 82:6473597d706e | 457 | */ |
bogdanm | 82:6473597d706e | 458 | static inline void ftm_hal_set_channel_output_mask(uint8_t instance, uint8_t channel, bool mask) |
bogdanm | 82:6473597d706e | 459 | { |
bogdanm | 82:6473597d706e | 460 | assert(instance <HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 461 | mask? HW_FTM_OUTMASK_SET(instance, 1U<<channel):HW_FTM_OUTMASK_CLR(instance, 1U<<channel); |
bogdanm | 82:6473597d706e | 462 | /* BW_FTM_OUTMASK_CHnOM(instance, channel,mask); */ |
bogdanm | 82:6473597d706e | 463 | } |
bogdanm | 82:6473597d706e | 464 | |
bogdanm | 82:6473597d706e | 465 | /*! |
bogdanm | 82:6473597d706e | 466 | * @brief Sets the FTM peripheral timer channel output initial state 0 or 1. |
bogdanm | 82:6473597d706e | 467 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 468 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 469 | * @param state counter value to be set 0 or 1 |
bogdanm | 82:6473597d706e | 470 | */ |
bogdanm | 82:6473597d706e | 471 | static inline void ftm_hal_set_channel_output_init_state(uint8_t instance, uint8_t channel, uint8_t state) |
bogdanm | 82:6473597d706e | 472 | { |
bogdanm | 82:6473597d706e | 473 | assert(instance <HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 474 | HW_FTM_OUTINIT_CLR(instance, 1U<<channel); |
bogdanm | 82:6473597d706e | 475 | HW_FTM_OUTINIT_SET(instance, (uint8_t)(state<<channel)); |
bogdanm | 82:6473597d706e | 476 | } |
bogdanm | 82:6473597d706e | 477 | |
bogdanm | 82:6473597d706e | 478 | /*! |
bogdanm | 82:6473597d706e | 479 | * @brief Sets the FTM peripheral timer channel output polarity. |
bogdanm | 82:6473597d706e | 480 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 481 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 482 | * @param pol polarity to be set 0 or 1 |
bogdanm | 82:6473597d706e | 483 | */ |
bogdanm | 82:6473597d706e | 484 | static inline void ftm_hal_set_channel_output_polarity(uint8_t instance, uint8_t channel, uint8_t pol) |
bogdanm | 82:6473597d706e | 485 | { |
bogdanm | 82:6473597d706e | 486 | assert(instance <HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 487 | HW_FTM_POL_CLR(instance, 1U<<channel); |
bogdanm | 82:6473597d706e | 488 | HW_FTM_POL_SET(instance, (uint8_t)(pol<<channel)); |
bogdanm | 82:6473597d706e | 489 | } |
bogdanm | 82:6473597d706e | 490 | /*! |
bogdanm | 82:6473597d706e | 491 | * @brief Sets the FTM peripheral timer channel input polarity. |
bogdanm | 82:6473597d706e | 492 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 493 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 494 | * @param pol polarity to be set, 0: active high, 1:active low |
bogdanm | 82:6473597d706e | 495 | */ |
bogdanm | 82:6473597d706e | 496 | static inline void ftm_hal_set_channel_fault_input_polarity(uint8_t instance, uint8_t channel, uint8_t pol) |
bogdanm | 82:6473597d706e | 497 | { |
bogdanm | 82:6473597d706e | 498 | assert(instance <HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 499 | HW_FTM_FLTPOL_CLR(instance, 1U<<channel); |
bogdanm | 82:6473597d706e | 500 | HW_FTM_FLTPOL_SET(instance, (uint8_t)(pol<<channel)); |
bogdanm | 82:6473597d706e | 501 | } |
bogdanm | 82:6473597d706e | 502 | |
bogdanm | 82:6473597d706e | 503 | |
bogdanm | 82:6473597d706e | 504 | /*Feature mode selection HAL*/ |
bogdanm | 82:6473597d706e | 505 | /*FTM fault control*/ |
bogdanm | 82:6473597d706e | 506 | /*! |
bogdanm | 82:6473597d706e | 507 | * @brief Enables the FTM peripheral timer fault interrupt. |
bogdanm | 82:6473597d706e | 508 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 509 | */ |
bogdanm | 82:6473597d706e | 510 | static inline void ftm_hal_enable_fault_interrupt(uint8_t instance) |
bogdanm | 82:6473597d706e | 511 | { |
bogdanm | 82:6473597d706e | 512 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 513 | BW_FTM_MODE_FAULTIE(instance, 1); |
bogdanm | 82:6473597d706e | 514 | } |
bogdanm | 82:6473597d706e | 515 | |
bogdanm | 82:6473597d706e | 516 | /*! |
bogdanm | 82:6473597d706e | 517 | * @brief Disables the FTM peripheral timer fault interrupt. |
bogdanm | 82:6473597d706e | 518 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 519 | */ |
bogdanm | 82:6473597d706e | 520 | static inline void ftm_hal_disable_fault_interrupt(uint8_t instance) |
bogdanm | 82:6473597d706e | 521 | { |
bogdanm | 82:6473597d706e | 522 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 523 | BW_FTM_MODE_FAULTIE(instance, 0); |
bogdanm | 82:6473597d706e | 524 | } |
bogdanm | 82:6473597d706e | 525 | |
bogdanm | 82:6473597d706e | 526 | /*! |
bogdanm | 82:6473597d706e | 527 | * @brief Sets the FTM peripheral timer fault control mode. |
bogdanm | 82:6473597d706e | 528 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 529 | * @param mode, valid number bits:00, 01, 10,11 (1, 2, 3, 4) |
bogdanm | 82:6473597d706e | 530 | */ |
bogdanm | 82:6473597d706e | 531 | static inline void ftm_hal_set_fault_control_mode(uint8_t instance, uint8_t mode) |
bogdanm | 82:6473597d706e | 532 | { |
bogdanm | 82:6473597d706e | 533 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 534 | BW_FTM_MODE_FAULTM(instance, mode); |
bogdanm | 82:6473597d706e | 535 | } |
bogdanm | 82:6473597d706e | 536 | |
bogdanm | 82:6473597d706e | 537 | /*! |
bogdanm | 82:6473597d706e | 538 | * @brief Enables the FTM peripheral timer capture test. |
bogdanm | 82:6473597d706e | 539 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 540 | * @param enable true to enable, false to disable |
bogdanm | 82:6473597d706e | 541 | */ |
bogdanm | 82:6473597d706e | 542 | static inline void ftm_hal_enable_capture_test(uint8_t instance, bool enable) |
bogdanm | 82:6473597d706e | 543 | { |
bogdanm | 82:6473597d706e | 544 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 545 | BW_FTM_MODE_CAPTEST(instance, enable? 1: 0); |
bogdanm | 82:6473597d706e | 546 | } |
bogdanm | 82:6473597d706e | 547 | |
bogdanm | 82:6473597d706e | 548 | /*! |
bogdanm | 82:6473597d706e | 549 | * @brief Enables the FTM peripheral timer write protection. |
bogdanm | 82:6473597d706e | 550 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 551 | * @param enable true to enable, false to disable |
bogdanm | 82:6473597d706e | 552 | */ |
bogdanm | 82:6473597d706e | 553 | static inline void ftm_hal_enable_write_protection(uint8_t instance, bool enable) |
bogdanm | 82:6473597d706e | 554 | { |
bogdanm | 82:6473597d706e | 555 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 556 | BW_FTM_MODE_WPDIS(instance, enable? 0: 1); |
bogdanm | 82:6473597d706e | 557 | } |
bogdanm | 82:6473597d706e | 558 | |
bogdanm | 82:6473597d706e | 559 | /*! |
bogdanm | 82:6473597d706e | 560 | * @brief Enables the FTM peripheral timer group. |
bogdanm | 82:6473597d706e | 561 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 562 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 563 | */ |
bogdanm | 82:6473597d706e | 564 | static inline void ftm_hal_ftm_enable(uint8_t instance, bool enable) |
bogdanm | 82:6473597d706e | 565 | { |
bogdanm | 82:6473597d706e | 566 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 567 | assert(BR_FTM_MODE_WPDIS(instance)); |
bogdanm | 82:6473597d706e | 568 | BW_FTM_MODE_FTMEN(instance, enable? 0: 1); |
bogdanm | 82:6473597d706e | 569 | } |
bogdanm | 82:6473597d706e | 570 | |
bogdanm | 82:6473597d706e | 571 | /*! |
bogdanm | 82:6473597d706e | 572 | * @brief Enables the FTM peripheral timer channel output initialization. |
bogdanm | 82:6473597d706e | 573 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 574 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 575 | */ |
bogdanm | 82:6473597d706e | 576 | static inline void ftm_hal_enable_channel_init_output(uint8_t instance, bool enable) |
bogdanm | 82:6473597d706e | 577 | { |
bogdanm | 82:6473597d706e | 578 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 579 | BW_FTM_MODE_INIT(instance, enable? 1:0); |
bogdanm | 82:6473597d706e | 580 | } |
bogdanm | 82:6473597d706e | 581 | |
bogdanm | 82:6473597d706e | 582 | /*! |
bogdanm | 82:6473597d706e | 583 | * @brief Sets the FTM peripheral timer sync mode. |
bogdanm | 82:6473597d706e | 584 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 585 | * @param enable True no restriction both software and hardware sync, false only software sync. |
bogdanm | 82:6473597d706e | 586 | */ |
bogdanm | 82:6473597d706e | 587 | static inline void ftm_hal_set_pwm_sync_mdoe(uint8_t instance, bool enable) |
bogdanm | 82:6473597d706e | 588 | { |
bogdanm | 82:6473597d706e | 589 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 590 | BW_FTM_MODE_PWMSYNC(instance, enable? 1:0); |
bogdanm | 82:6473597d706e | 591 | } |
bogdanm | 82:6473597d706e | 592 | |
bogdanm | 82:6473597d706e | 593 | /*FTM synchronization control*/ |
bogdanm | 82:6473597d706e | 594 | /*! |
bogdanm | 82:6473597d706e | 595 | * @brief Enables the FTM peripheral timer software trigger. |
bogdanm | 82:6473597d706e | 596 | * @param instance The FTM peripheral instance number. |
bogdanm | 82:6473597d706e | 597 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 598 | */ |
bogdanm | 82:6473597d706e | 599 | static inline void ftm_hal_enable_software_trigger(uint8_t instance, bool enable) |
bogdanm | 82:6473597d706e | 600 | { |
bogdanm | 82:6473597d706e | 601 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 602 | BW_FTM_SYNC_SWSYNC(instance, enable? 1:0); |
bogdanm | 82:6473597d706e | 603 | } |
bogdanm | 82:6473597d706e | 604 | |
bogdanm | 82:6473597d706e | 605 | /*! |
bogdanm | 82:6473597d706e | 606 | * @brief Sets the FTM peripheral timer hardware trigger. |
bogdanm | 82:6473597d706e | 607 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 608 | * @param trigger_num 0, 1,2 for trigger0, trigger1 and trigger3 |
bogdanm | 82:6473597d706e | 609 | * @param enable True to enable, 1 to enable |
bogdanm | 82:6473597d706e | 610 | */ |
bogdanm | 82:6473597d706e | 611 | void ftm_hal_set_hardware_trigger(uint8_t instance, uint8_t trigger_num, bool enable); |
bogdanm | 82:6473597d706e | 612 | |
bogdanm | 82:6473597d706e | 613 | /*! |
bogdanm | 82:6473597d706e | 614 | * @brief Enables the FTM peripheral timer output mask update by PWM sync. |
bogdanm | 82:6473597d706e | 615 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 616 | * @param enable True to enable PWM sync, false to enable outmask in the rising edges of the system clock |
bogdanm | 82:6473597d706e | 617 | */ |
bogdanm | 82:6473597d706e | 618 | static inline void ftm_hal_enable_output_mask_sync_by_pwm(uint8_t instance, bool enable) |
bogdanm | 82:6473597d706e | 619 | { |
bogdanm | 82:6473597d706e | 620 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 621 | BW_FTM_SYNC_SYNCHOM(instance, enable?1:0); |
bogdanm | 82:6473597d706e | 622 | } |
bogdanm | 82:6473597d706e | 623 | |
bogdanm | 82:6473597d706e | 624 | /*! |
bogdanm | 82:6473597d706e | 625 | * @brief Enables the FTM peripheral timer counter re-initialized by sync. |
bogdanm | 82:6473597d706e | 626 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 627 | * @param enable True to update FTM counter when triggered , false to count normally |
bogdanm | 82:6473597d706e | 628 | */ |
bogdanm | 82:6473597d706e | 629 | static inline void ftm_hal_enable_count_reinit_sync(uint8_t instance, bool enable) |
bogdanm | 82:6473597d706e | 630 | { |
bogdanm | 82:6473597d706e | 631 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 632 | BW_FTM_SYNC_REINIT(instance, enable?1:0); |
bogdanm | 82:6473597d706e | 633 | } |
bogdanm | 82:6473597d706e | 634 | /*! |
bogdanm | 82:6473597d706e | 635 | * @brief Enables the FTM peripheral timer maximum loading points. |
bogdanm | 82:6473597d706e | 636 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 637 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 638 | */ |
bogdanm | 82:6473597d706e | 639 | static inline void ftm_hal_enable_max_loading(uint8_t instance, bool enable) |
bogdanm | 82:6473597d706e | 640 | { |
bogdanm | 82:6473597d706e | 641 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 642 | BW_FTM_SYNC_CNTMAX(instance, enable?1:0); |
bogdanm | 82:6473597d706e | 643 | } |
bogdanm | 82:6473597d706e | 644 | /*! |
bogdanm | 82:6473597d706e | 645 | * @brief Enables the FTM peripheral timer minimum loading points. |
bogdanm | 82:6473597d706e | 646 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 647 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 648 | */ |
bogdanm | 82:6473597d706e | 649 | static inline void ftm_hal_enable_min_loading(uint8_t instance, bool enable) |
bogdanm | 82:6473597d706e | 650 | { |
bogdanm | 82:6473597d706e | 651 | assert(instance <HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 652 | BW_FTM_SYNC_CNTMIN(instance, enable?1:0); |
bogdanm | 82:6473597d706e | 653 | } |
bogdanm | 82:6473597d706e | 654 | |
bogdanm | 82:6473597d706e | 655 | /*! |
bogdanm | 82:6473597d706e | 656 | * @brief Combines the channel control. |
bogdanm | 82:6473597d706e | 657 | * |
bogdanm | 82:6473597d706e | 658 | * Returns an index for each channel pair. |
bogdanm | 82:6473597d706e | 659 | * |
bogdanm | 82:6473597d706e | 660 | * @param channel The FTM peripheral channel number. |
bogdanm | 82:6473597d706e | 661 | * @return 0 for channel pair 0 & 1\n |
bogdanm | 82:6473597d706e | 662 | * 1 for channel pair 2 & 3\n |
bogdanm | 82:6473597d706e | 663 | * 2 for channel pair 4 & 5\n |
bogdanm | 82:6473597d706e | 664 | * 3 for channel pair 6 & 7 |
bogdanm | 82:6473597d706e | 665 | */ |
bogdanm | 82:6473597d706e | 666 | static uint32_t get_channel_pair_index(uint8_t channel) |
bogdanm | 82:6473597d706e | 667 | { |
bogdanm | 82:6473597d706e | 668 | if((channel == HW_CHAN0) || (channel == HW_CHAN1)) |
bogdanm | 82:6473597d706e | 669 | { |
bogdanm | 82:6473597d706e | 670 | return 0; |
bogdanm | 82:6473597d706e | 671 | } |
bogdanm | 82:6473597d706e | 672 | else if((channel == HW_CHAN2) || (channel == HW_CHAN3)) |
bogdanm | 82:6473597d706e | 673 | { |
bogdanm | 82:6473597d706e | 674 | return 1; |
bogdanm | 82:6473597d706e | 675 | } |
bogdanm | 82:6473597d706e | 676 | else if((channel == HW_CHAN4) || (channel == HW_CHAN5)) |
bogdanm | 82:6473597d706e | 677 | { |
bogdanm | 82:6473597d706e | 678 | return 2; |
bogdanm | 82:6473597d706e | 679 | } |
bogdanm | 82:6473597d706e | 680 | else |
bogdanm | 82:6473597d706e | 681 | { |
bogdanm | 82:6473597d706e | 682 | return 3; |
bogdanm | 82:6473597d706e | 683 | } |
bogdanm | 82:6473597d706e | 684 | } |
bogdanm | 82:6473597d706e | 685 | |
bogdanm | 82:6473597d706e | 686 | /*set DECAPEN bit*/ |
bogdanm | 82:6473597d706e | 687 | /*! |
bogdanm | 82:6473597d706e | 688 | * @brief Enables the FTM peripheral timer dual edge capture mode. |
bogdanm | 82:6473597d706e | 689 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 690 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 691 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 692 | */ |
bogdanm | 82:6473597d706e | 693 | static inline void ftm_hal_enable_dual_capture(uint8_t instance, uint8_t channel, bool enable) |
bogdanm | 82:6473597d706e | 694 | { |
bogdanm | 82:6473597d706e | 695 | assert(instance < HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 696 | |
bogdanm | 82:6473597d706e | 697 | enable? HW_FTM_COMBINE_SET(instance, BM_FTM_COMBINE_DECAPEN0 << (get_channel_pair_index(channel) * FTM_COMBINE_CHAN_CTRL_WIDTH)): |
bogdanm | 82:6473597d706e | 698 | HW_FTM_COMBINE_CLR(instance, BM_FTM_COMBINE_DECAPEN0 << (get_channel_pair_index(channel) * FTM_COMBINE_CHAN_CTRL_WIDTH)); |
bogdanm | 82:6473597d706e | 699 | } |
bogdanm | 82:6473597d706e | 700 | |
bogdanm | 82:6473597d706e | 701 | /*! |
bogdanm | 82:6473597d706e | 702 | * @brief Enables the FTM peripheral timer channel pair fault control. |
bogdanm | 82:6473597d706e | 703 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 704 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 705 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 706 | */ |
bogdanm | 82:6473597d706e | 707 | static inline void ftm_hal_enable_dual_channel_fault(uint8_t instance, uint8_t channel, bool enable) |
bogdanm | 82:6473597d706e | 708 | { |
bogdanm | 82:6473597d706e | 709 | assert(instance < HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 710 | |
bogdanm | 82:6473597d706e | 711 | enable? HW_FTM_COMBINE_SET(instance, BM_FTM_COMBINE_FAULTEN0 << (get_channel_pair_index(channel) * FTM_COMBINE_CHAN_CTRL_WIDTH)): |
bogdanm | 82:6473597d706e | 712 | HW_FTM_COMBINE_CLR(instance, BM_FTM_COMBINE_FAULTEN0 << (get_channel_pair_index(channel) * FTM_COMBINE_CHAN_CTRL_WIDTH)); |
bogdanm | 82:6473597d706e | 713 | } |
bogdanm | 82:6473597d706e | 714 | |
bogdanm | 82:6473597d706e | 715 | /*! |
bogdanm | 82:6473597d706e | 716 | * @brief Enables the FTM peripheral timer channel pair counter PWM sync. |
bogdanm | 82:6473597d706e | 717 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 718 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 719 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 720 | */ |
bogdanm | 82:6473597d706e | 721 | static inline void ftm_hal_enable_dual_channel_pwm_sync(uint8_t instance, uint8_t channel, bool enable) |
bogdanm | 82:6473597d706e | 722 | { |
bogdanm | 82:6473597d706e | 723 | assert(instance < HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 724 | |
bogdanm | 82:6473597d706e | 725 | enable? HW_FTM_COMBINE_SET(instance, BM_FTM_COMBINE_SYNCEN0 << (get_channel_pair_index(channel) * FTM_COMBINE_CHAN_CTRL_WIDTH)): |
bogdanm | 82:6473597d706e | 726 | HW_FTM_COMBINE_CLR(instance, BM_FTM_COMBINE_SYNCEN0 << (get_channel_pair_index(channel) * FTM_COMBINE_CHAN_CTRL_WIDTH)); |
bogdanm | 82:6473597d706e | 727 | } |
bogdanm | 82:6473597d706e | 728 | |
bogdanm | 82:6473597d706e | 729 | /*! |
bogdanm | 82:6473597d706e | 730 | * @brief Enables the FTM peripheral timer channel pair deadtime. |
bogdanm | 82:6473597d706e | 731 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 732 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 733 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 734 | */ |
bogdanm | 82:6473597d706e | 735 | static inline void ftm_hal_enable_dual_channel_deadtime(uint8_t instance, uint8_t channel, bool enable) |
bogdanm | 82:6473597d706e | 736 | { |
bogdanm | 82:6473597d706e | 737 | assert(instance < HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 738 | |
bogdanm | 82:6473597d706e | 739 | enable? HW_FTM_COMBINE_SET(instance, BM_FTM_COMBINE_DTEN0 << (get_channel_pair_index(channel) * FTM_COMBINE_CHAN_CTRL_WIDTH)): |
bogdanm | 82:6473597d706e | 740 | HW_FTM_COMBINE_CLR(instance, BM_FTM_COMBINE_DTEN0 << (get_channel_pair_index(channel) * FTM_COMBINE_CHAN_CTRL_WIDTH)); |
bogdanm | 82:6473597d706e | 741 | } |
bogdanm | 82:6473597d706e | 742 | |
bogdanm | 82:6473597d706e | 743 | /*! |
bogdanm | 82:6473597d706e | 744 | * @brief Enables the FTM peripheral timer channel dual edge capture decap, not decapen. |
bogdanm | 82:6473597d706e | 745 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 746 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 747 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 748 | */ |
bogdanm | 82:6473597d706e | 749 | static inline void ftm_hal_enable_dual_channel_decap(uint8_t instance, uint8_t channel, bool enable) |
bogdanm | 82:6473597d706e | 750 | { |
bogdanm | 82:6473597d706e | 751 | assert(instance < HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 752 | |
bogdanm | 82:6473597d706e | 753 | enable? HW_FTM_COMBINE_SET(instance, BM_FTM_COMBINE_DECAP0 << (get_channel_pair_index(channel) * FTM_COMBINE_CHAN_CTRL_WIDTH)): |
bogdanm | 82:6473597d706e | 754 | HW_FTM_COMBINE_CLR(instance, BM_FTM_COMBINE_DECAP0 << (get_channel_pair_index(channel) * FTM_COMBINE_CHAN_CTRL_WIDTH)); |
bogdanm | 82:6473597d706e | 755 | } |
bogdanm | 82:6473597d706e | 756 | |
bogdanm | 82:6473597d706e | 757 | /*! |
bogdanm | 82:6473597d706e | 758 | * @brief Enables the FTM peripheral timer channel pair output complement mode. |
bogdanm | 82:6473597d706e | 759 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 760 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 761 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 762 | */ |
bogdanm | 82:6473597d706e | 763 | static inline void ftm_hal_enable_dual_channel_comp(uint8_t instance, uint8_t channel, bool enable) |
bogdanm | 82:6473597d706e | 764 | { |
bogdanm | 82:6473597d706e | 765 | assert(instance < HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 766 | |
bogdanm | 82:6473597d706e | 767 | enable? HW_FTM_COMBINE_SET(instance, BM_FTM_COMBINE_COMP0 << (get_channel_pair_index(channel) * FTM_COMBINE_CHAN_CTRL_WIDTH)): |
bogdanm | 82:6473597d706e | 768 | HW_FTM_COMBINE_CLR(instance, BM_FTM_COMBINE_COMP0 << (get_channel_pair_index(channel) * FTM_COMBINE_CHAN_CTRL_WIDTH)); |
bogdanm | 82:6473597d706e | 769 | |
bogdanm | 82:6473597d706e | 770 | } |
bogdanm | 82:6473597d706e | 771 | |
bogdanm | 82:6473597d706e | 772 | /*! |
bogdanm | 82:6473597d706e | 773 | * @brief Enables the FTM peripheral timer channel pair output combine mode. |
bogdanm | 82:6473597d706e | 774 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 775 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 776 | * @param enable True to enable channel pair to combine, false to disable |
bogdanm | 82:6473597d706e | 777 | */ |
bogdanm | 82:6473597d706e | 778 | static inline void ftm_hal_enable_dual_channel_combine(uint8_t instance, uint8_t channel, bool enable) |
bogdanm | 82:6473597d706e | 779 | { |
bogdanm | 82:6473597d706e | 780 | assert(instance < HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 781 | |
bogdanm | 82:6473597d706e | 782 | enable? HW_FTM_COMBINE_SET(instance, BM_FTM_COMBINE_COMBINE0 << (get_channel_pair_index(channel) * FTM_COMBINE_CHAN_CTRL_WIDTH)): |
bogdanm | 82:6473597d706e | 783 | HW_FTM_COMBINE_CLR(instance, BM_FTM_COMBINE_COMBINE0 << (get_channel_pair_index(channel) * FTM_COMBINE_CHAN_CTRL_WIDTH)); |
bogdanm | 82:6473597d706e | 784 | } |
bogdanm | 82:6473597d706e | 785 | |
bogdanm | 82:6473597d706e | 786 | /*FTM dead time insertion control*/ |
bogdanm | 82:6473597d706e | 787 | /*! |
bogdanm | 82:6473597d706e | 788 | * @brief Set the FTM deadtime divider. |
bogdanm | 82:6473597d706e | 789 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 790 | * @param divider The FTM peripheral prescale divider |
bogdanm | 82:6473597d706e | 791 | 0x :divided by 1, 10: divided by 4 11:divided by 16 |
bogdanm | 82:6473597d706e | 792 | */ |
bogdanm | 82:6473597d706e | 793 | static inline void ftm_hal_set_deadtime_prescale(uint8_t instance, ftm_deadtime_ps_t divider) |
bogdanm | 82:6473597d706e | 794 | { |
bogdanm | 82:6473597d706e | 795 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 796 | BW_FTM_DEADTIME_DTVAL(instance, divider); |
bogdanm | 82:6473597d706e | 797 | } |
bogdanm | 82:6473597d706e | 798 | |
bogdanm | 82:6473597d706e | 799 | /*! |
bogdanm | 82:6473597d706e | 800 | * @brief Sets the FTM deadtime value. |
bogdanm | 82:6473597d706e | 801 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 802 | * @param divider The FTM peripheral prescale divider |
bogdanm | 82:6473597d706e | 803 | count: 0, no counts inserted 1: 1 count is inserted 2: 2 count is inserted.... |
bogdanm | 82:6473597d706e | 804 | */ |
bogdanm | 82:6473597d706e | 805 | static inline void ftm_hal_set_deadtime_count(uint8_t instance, uint8_t count) |
bogdanm | 82:6473597d706e | 806 | { |
bogdanm | 82:6473597d706e | 807 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 808 | BW_FTM_DEADTIME_DTPS(instance, count); |
bogdanm | 82:6473597d706e | 809 | } |
bogdanm | 82:6473597d706e | 810 | /*FTM external trigger */ |
bogdanm | 82:6473597d706e | 811 | /*! |
bogdanm | 82:6473597d706e | 812 | * @brief Enables the generation of the FTM peripheral timer channel trigger when the FTM counter is equal to its initial value. |
bogdanm | 82:6473597d706e | 813 | Channels 6 and 7 cannot be used as triggers. |
bogdanm | 82:6473597d706e | 814 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 815 | * @param channel Channel to be enabled, valid value 0, 1, 2, 3, 4, 5 |
bogdanm | 82:6473597d706e | 816 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 817 | */ |
bogdanm | 82:6473597d706e | 818 | void ftm_hal_enable_channel_trigger(uint8_t instance, uint8_t channel, bool val); |
bogdanm | 82:6473597d706e | 819 | /*! |
bogdanm | 82:6473597d706e | 820 | * @brief Checks whether any channel trigger event has occurred. |
bogdanm | 82:6473597d706e | 821 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 822 | * @retval True if there is a trigger event, false if not. |
bogdanm | 82:6473597d706e | 823 | */ |
bogdanm | 82:6473597d706e | 824 | static inline bool ftm_hal_is_channel_trigger_generated(uint8_t instance, uint8_t channel) |
bogdanm | 82:6473597d706e | 825 | { |
bogdanm | 82:6473597d706e | 826 | assert(instance <HW_FTM_INSTANCE_COUNT && channel < HW_CHAN6); |
bogdanm | 82:6473597d706e | 827 | return BR_FTM_EXTTRIG_TRIGF(instance); |
bogdanm | 82:6473597d706e | 828 | } |
bogdanm | 82:6473597d706e | 829 | |
bogdanm | 82:6473597d706e | 830 | |
bogdanm | 82:6473597d706e | 831 | /*Fault mode status*/ |
bogdanm | 82:6473597d706e | 832 | /*! |
bogdanm | 82:6473597d706e | 833 | * @brief Gets the FTM detected fault input. |
bogdanm | 82:6473597d706e | 834 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 835 | * @retval Return faulty byte |
bogdanm | 82:6473597d706e | 836 | */ |
bogdanm | 82:6473597d706e | 837 | static inline uint8_t ftm_hal_get_detected_fault_input(uint8_t instance) |
bogdanm | 82:6473597d706e | 838 | { |
bogdanm | 82:6473597d706e | 839 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 840 | return (HW_FTM_FMS(instance).U &0x0f); |
bogdanm | 82:6473597d706e | 841 | } |
bogdanm | 82:6473597d706e | 842 | /*! |
bogdanm | 82:6473597d706e | 843 | * @brief Checks whether the write protection is enabled. |
bogdanm | 82:6473597d706e | 844 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 845 | * @retval True if enabled, false if not |
bogdanm | 82:6473597d706e | 846 | */ |
bogdanm | 82:6473597d706e | 847 | static inline bool ftm_hal_is_write_protection_enable(uint8_t instance) |
bogdanm | 82:6473597d706e | 848 | { |
bogdanm | 82:6473597d706e | 849 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 850 | return BR_FTM_FMS_WPEN(instance)? true:false; |
bogdanm | 82:6473597d706e | 851 | } |
bogdanm | 82:6473597d706e | 852 | |
bogdanm | 82:6473597d706e | 853 | /*Quadrature decoder control*/ |
bogdanm | 82:6473597d706e | 854 | /*! |
bogdanm | 82:6473597d706e | 855 | * @brief Enables the channel quadrature decoder. |
bogdanm | 82:6473597d706e | 856 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 857 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 858 | */ |
bogdanm | 82:6473597d706e | 859 | static inline void ftm_hal_enable_quad_capture(uint8_t instance, bool enable) |
bogdanm | 82:6473597d706e | 860 | { |
bogdanm | 82:6473597d706e | 861 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 862 | } |
bogdanm | 82:6473597d706e | 863 | |
bogdanm | 82:6473597d706e | 864 | /*Hardware definition for quadrature decoder control is missing, implement this later */ |
bogdanm | 82:6473597d706e | 865 | /*static inline void ftm_hal_enable_quad_input_filter(uint8_t instance, ftm_phase_t phase) |
bogdanm | 82:6473597d706e | 866 | static inline void ftm_hal_set_quad_phase_normal_polarity(uint8_t instance, ftm_phase_t phase) |
bogdanm | 82:6473597d706e | 867 | static inline void ftm_hal_set_quad_phase_invert_polarity(uint8_t instance, ftm_phase_t phase) |
bogdanm | 82:6473597d706e | 868 | static inline void ftm_hal_set_quad_mode() |
bogdanm | 82:6473597d706e | 869 | static inline void ftm_hal_set_quad_direction() |
bogdanm | 82:6473597d706e | 870 | static inline void ftm_hal_set_quad_timer_overflow_direction()*/ |
bogdanm | 82:6473597d706e | 871 | |
bogdanm | 82:6473597d706e | 872 | /*! |
bogdanm | 82:6473597d706e | 873 | * @brief Sets the FTM peripheral timer channel input capture filter value. |
bogdanm | 82:6473597d706e | 874 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 875 | * @param channel The FTM peripheral channel number, only 0,1,2,3, channel 4, 5,6, 7 don't have. |
bogdanm | 82:6473597d706e | 876 | * @param val Filter value to be set |
bogdanm | 82:6473597d706e | 877 | */ |
bogdanm | 82:6473597d706e | 878 | void ftm_hal_set_channel_input_capture_filter(uint8_t instance, uint8_t channel, uint8_t val); |
bogdanm | 82:6473597d706e | 879 | |
bogdanm | 82:6473597d706e | 880 | |
bogdanm | 82:6473597d706e | 881 | |
bogdanm | 82:6473597d706e | 882 | /*! |
bogdanm | 82:6473597d706e | 883 | * @brief Enables the channel input filter. |
bogdanm | 82:6473597d706e | 884 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 885 | * @param channel Channel to be enabled, valid value 0, 1, 2, 3 |
bogdanm | 82:6473597d706e | 886 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 887 | */ |
bogdanm | 82:6473597d706e | 888 | static inline void ftm_hal_enable_channel_fault_input_filter(uint8_t instance, uint8_t channel, bool val) |
bogdanm | 82:6473597d706e | 889 | { |
bogdanm | 82:6473597d706e | 890 | assert(instance < HW_FTM_INSTANCE_COUNT && channel < HW_CHAN4); |
bogdanm | 82:6473597d706e | 891 | val? HW_FTM_FLTCTRL_SET(instance, (1U<<channel)) : HW_FTM_FLTCTRL_CLR(instance, (1U<<channel)); |
bogdanm | 82:6473597d706e | 892 | } |
bogdanm | 82:6473597d706e | 893 | |
bogdanm | 82:6473597d706e | 894 | /*! |
bogdanm | 82:6473597d706e | 895 | * @brief Enables the channel fault input. |
bogdanm | 82:6473597d706e | 896 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 897 | * @param channel Channel to be enabled, valid value 0, 1, 2, 3 |
bogdanm | 82:6473597d706e | 898 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 899 | */ |
bogdanm | 82:6473597d706e | 900 | static inline void ftm_hal_enable_channel_fault_input(uint8_t instance, uint8_t channel, bool val) |
bogdanm | 82:6473597d706e | 901 | { |
bogdanm | 82:6473597d706e | 902 | assert(instance < HW_FTM_INSTANCE_COUNT && channel < HW_CHAN4); |
bogdanm | 82:6473597d706e | 903 | val ? HW_FTM_FLTCTRL_SET(instance, ((1U << channel) + 4)) |
bogdanm | 82:6473597d706e | 904 | : HW_FTM_FLTCTRL_CLR(instance, ((1U << channel) + 4)); |
bogdanm | 82:6473597d706e | 905 | } |
bogdanm | 82:6473597d706e | 906 | |
bogdanm | 82:6473597d706e | 907 | /*! |
bogdanm | 82:6473597d706e | 908 | * @brief Enables the channel invert. |
bogdanm | 82:6473597d706e | 909 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 910 | * @param channel The FTM peripheral channel number |
bogdanm | 82:6473597d706e | 911 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 912 | */ |
bogdanm | 82:6473597d706e | 913 | static inline void ftm_hal_enable_dual_channel_invert(uint8_t instance, uint8_t channel, bool val) |
bogdanm | 82:6473597d706e | 914 | { |
bogdanm | 82:6473597d706e | 915 | assert(instance < HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 916 | |
bogdanm | 82:6473597d706e | 917 | val ? HW_FTM_INVCTRL_SET(instance, (1U << get_channel_pair_index(channel))) |
bogdanm | 82:6473597d706e | 918 | : HW_FTM_INVCTRL_CLR(instance, (1U << get_channel_pair_index(channel))); |
bogdanm | 82:6473597d706e | 919 | } |
bogdanm | 82:6473597d706e | 920 | |
bogdanm | 82:6473597d706e | 921 | /*FTM software output control*/ |
bogdanm | 82:6473597d706e | 922 | /*! |
bogdanm | 82:6473597d706e | 923 | * @brief Enables the channel software control. |
bogdanm | 82:6473597d706e | 924 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 925 | * @param channel Channel to be enabled, valid value 0, 1, 2, 3, 4,5,6,7 |
bogdanm | 82:6473597d706e | 926 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 927 | */ |
bogdanm | 82:6473597d706e | 928 | static inline void ftm_hal_enable_channel_software_ctrl(uint8_t instance, uint8_t channel, bool val) |
bogdanm | 82:6473597d706e | 929 | { |
bogdanm | 82:6473597d706e | 930 | assert(instance < HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 931 | val? HW_FTM_SWOCTRL_SET(instance, (1U<<channel)) : HW_FTM_SWOCTRL_CLR(instance, (1U<<channel)); |
bogdanm | 82:6473597d706e | 932 | } |
bogdanm | 82:6473597d706e | 933 | /*! |
bogdanm | 82:6473597d706e | 934 | * @brief Sets the channel software control value. |
bogdanm | 82:6473597d706e | 935 | * @param instance The FTM peripheral instance number. |
bogdanm | 82:6473597d706e | 936 | * @param channel Channel to be enabled, valid value 0, 1, 2, 3,5,6,7, |
bogdanm | 82:6473597d706e | 937 | * @param bool True to set 1, false to set 0 |
bogdanm | 82:6473597d706e | 938 | */ |
bogdanm | 82:6473597d706e | 939 | static inline void ftm_hal_set_channel_software_ctrl_val(uint8_t instance, uint8_t channel, bool val) |
bogdanm | 82:6473597d706e | 940 | { |
bogdanm | 82:6473597d706e | 941 | assert(instance < HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 942 | val? HW_FTM_SWOCTRL_SET(instance, (1U<<(channel+8))) : HW_FTM_SWOCTRL_CLR(instance, (1U<<(channel+8))); |
bogdanm | 82:6473597d706e | 943 | } |
bogdanm | 82:6473597d706e | 944 | |
bogdanm | 82:6473597d706e | 945 | /*FTM PWM load control*/ |
bogdanm | 82:6473597d706e | 946 | /*! |
bogdanm | 82:6473597d706e | 947 | * @brief Enables the FTM timer PWM loading of MOD, CNTIN and CV. |
bogdanm | 82:6473597d706e | 948 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 949 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 950 | */ |
bogdanm | 82:6473597d706e | 951 | static inline void ftm_hal_enable_pwm_load(uint8_t instance, bool enable) |
bogdanm | 82:6473597d706e | 952 | { |
bogdanm | 82:6473597d706e | 953 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 954 | HW_FTM_PWMLOAD(instance).B.LDOK = enable? 1:0; |
bogdanm | 82:6473597d706e | 955 | } |
bogdanm | 82:6473597d706e | 956 | |
bogdanm | 82:6473597d706e | 957 | /*! |
bogdanm | 82:6473597d706e | 958 | * @brief Enables the channel matching process. |
bogdanm | 82:6473597d706e | 959 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 960 | * @param channel Channel to be enabled, valid value 0, 1, 2, 3, 4,5,6,7 |
bogdanm | 82:6473597d706e | 961 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 962 | */ |
bogdanm | 82:6473597d706e | 963 | static inline void ftm_hal_enable_pwm_load_matching_channel(uint8_t instance, uint8_t channel, bool val) |
bogdanm | 82:6473597d706e | 964 | { |
bogdanm | 82:6473597d706e | 965 | assert(instance < HW_FTM_INSTANCE_COUNT && channel < HW_FTM_CHANNEL_COUNT); |
bogdanm | 82:6473597d706e | 966 | val? HW_FTM_PWMLOAD_SET(instance, 1U<<channel) : HW_FTM_PWMLOAD_CLR(instance, 1U<<channel); |
bogdanm | 82:6473597d706e | 967 | } |
bogdanm | 82:6473597d706e | 968 | /*FTM configuration*/ |
bogdanm | 82:6473597d706e | 969 | /*! |
bogdanm | 82:6473597d706e | 970 | * @brief Enables the FTM timer global time base output. |
bogdanm | 82:6473597d706e | 971 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 972 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 973 | */ |
bogdanm | 82:6473597d706e | 974 | static inline void ftm_hal_enable_global_time_base_output(uint8_t instance, bool enable) |
bogdanm | 82:6473597d706e | 975 | { |
bogdanm | 82:6473597d706e | 976 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 977 | BW_FTM_CONF_GTBEOUT(instance, enable? 1:0); |
bogdanm | 82:6473597d706e | 978 | } |
bogdanm | 82:6473597d706e | 979 | |
bogdanm | 82:6473597d706e | 980 | /*! |
bogdanm | 82:6473597d706e | 981 | * @brief Enables the FTM timer global time base. |
bogdanm | 82:6473597d706e | 982 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 983 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 984 | */ |
bogdanm | 82:6473597d706e | 985 | static inline void ftm_hal_enable_global_time_base(uint8_t instance, bool enable) |
bogdanm | 82:6473597d706e | 986 | { |
bogdanm | 82:6473597d706e | 987 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 988 | BW_FTM_CONF_GTBEEN(instance, enable? 1:0); |
bogdanm | 82:6473597d706e | 989 | } |
bogdanm | 82:6473597d706e | 990 | |
bogdanm | 82:6473597d706e | 991 | /*! |
bogdanm | 82:6473597d706e | 992 | * @brief Sets the FTM timer TOF Frequency. |
bogdanm | 82:6473597d706e | 993 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 994 | * @param val Value of the TOF bit set frequency |
bogdanm | 82:6473597d706e | 995 | */ |
bogdanm | 82:6473597d706e | 996 | static inline void ftm_hal_set_bdm_mode(uint8_t instance, uint8_t val) |
bogdanm | 82:6473597d706e | 997 | { |
bogdanm | 82:6473597d706e | 998 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 999 | BW_FTM_CONF_NUMTOF(instance, val); |
bogdanm | 82:6473597d706e | 1000 | } |
bogdanm | 82:6473597d706e | 1001 | |
bogdanm | 82:6473597d706e | 1002 | /*! |
bogdanm | 82:6473597d706e | 1003 | * @brief Sets the BDM mode. |
bogdanm | 82:6473597d706e | 1004 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 1005 | * @param val Value of the TOF bit set frequency |
bogdanm | 82:6473597d706e | 1006 | */ |
bogdanm | 82:6473597d706e | 1007 | static inline void ftm_hal_set_tof_frequency(uint8_t instance, uint8_t val) |
bogdanm | 82:6473597d706e | 1008 | { |
bogdanm | 82:6473597d706e | 1009 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 1010 | BW_FTM_CONF_BDMMODE(instance, val); |
bogdanm | 82:6473597d706e | 1011 | } |
bogdanm | 82:6473597d706e | 1012 | |
bogdanm | 82:6473597d706e | 1013 | /*FTM sync configuration*/ |
bogdanm | 82:6473597d706e | 1014 | /*hardware sync*/ |
bogdanm | 82:6473597d706e | 1015 | /*! |
bogdanm | 82:6473597d706e | 1016 | * @brief Enables the FTM timer hardware sync activation. |
bogdanm | 82:6473597d706e | 1017 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 1018 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 1019 | */ |
bogdanm | 82:6473597d706e | 1020 | static inline void ftm_hal_enable_hardware_sync_software_output_ctrl(uint8_t instance, bool enable ) |
bogdanm | 82:6473597d706e | 1021 | { |
bogdanm | 82:6473597d706e | 1022 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 1023 | BW_FTM_SYNCONF_HWSOC(instance, enable? 1:0); |
bogdanm | 82:6473597d706e | 1024 | } |
bogdanm | 82:6473597d706e | 1025 | |
bogdanm | 82:6473597d706e | 1026 | /*! |
bogdanm | 82:6473597d706e | 1027 | * @brief Enables the FTM timer hardware inverting control sync. |
bogdanm | 82:6473597d706e | 1028 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 1029 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 1030 | */ |
bogdanm | 82:6473597d706e | 1031 | static inline void ftm_hal_enable_hardware_sync_invert_ctrl(uint8_t instance, bool enable ) |
bogdanm | 82:6473597d706e | 1032 | { |
bogdanm | 82:6473597d706e | 1033 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 1034 | BW_FTM_SYNCONF_HWINVC(instance, enable? 1:0); |
bogdanm | 82:6473597d706e | 1035 | } |
bogdanm | 82:6473597d706e | 1036 | |
bogdanm | 82:6473597d706e | 1037 | /*! |
bogdanm | 82:6473597d706e | 1038 | * @brief Enables the FTM timer hardware outmask sync. |
bogdanm | 82:6473597d706e | 1039 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 1040 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 1041 | */ |
bogdanm | 82:6473597d706e | 1042 | static inline void ftm_hal_enable_hardware_sync_output_mask(uint8_t instance, bool enable ) |
bogdanm | 82:6473597d706e | 1043 | { |
bogdanm | 82:6473597d706e | 1044 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 1045 | BW_FTM_SYNCONF_HWOM(instance, enable? 1:0); |
bogdanm | 82:6473597d706e | 1046 | } |
bogdanm | 82:6473597d706e | 1047 | |
bogdanm | 82:6473597d706e | 1048 | /*! |
bogdanm | 82:6473597d706e | 1049 | * @brief MOD, CNTIN, and CV registers synchronization is activated. |
bogdanm | 82:6473597d706e | 1050 | * |
bogdanm | 82:6473597d706e | 1051 | * A hardware trigger activates the synchronization. |
bogdanm | 82:6473597d706e | 1052 | * |
bogdanm | 82:6473597d706e | 1053 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 1054 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 1055 | */ |
bogdanm | 82:6473597d706e | 1056 | static inline void ftm_hal_enable_hardware_sycn_mod_cntin_cv(uint8_t instance, bool enable ) |
bogdanm | 82:6473597d706e | 1057 | { |
bogdanm | 82:6473597d706e | 1058 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 1059 | BW_FTM_SYNCONF_HWWRBUF(instance, enable? 1:0); |
bogdanm | 82:6473597d706e | 1060 | } |
bogdanm | 82:6473597d706e | 1061 | |
bogdanm | 82:6473597d706e | 1062 | /*! |
bogdanm | 82:6473597d706e | 1063 | * @brief The FTM counter synchronization is activated by a hardware trigger. |
bogdanm | 82:6473597d706e | 1064 | * |
bogdanm | 82:6473597d706e | 1065 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 1066 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 1067 | */ |
bogdanm | 82:6473597d706e | 1068 | static inline void ftm_hal_enable_hardware_sync_counter(uint8_t instance, bool enable ) |
bogdanm | 82:6473597d706e | 1069 | { |
bogdanm | 82:6473597d706e | 1070 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 1071 | BW_FTM_SYNCONF_HWRSTCNT(instance, enable? 1:0); |
bogdanm | 82:6473597d706e | 1072 | } |
bogdanm | 82:6473597d706e | 1073 | |
bogdanm | 82:6473597d706e | 1074 | /*! |
bogdanm | 82:6473597d706e | 1075 | * @brief Enables the FTM timer software sync activation. |
bogdanm | 82:6473597d706e | 1076 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 1077 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 1078 | */ |
bogdanm | 82:6473597d706e | 1079 | static inline void ftm_hal_enable_pwm_sync_swoctrl(uint8_t instance, bool enable ) |
bogdanm | 82:6473597d706e | 1080 | { |
bogdanm | 82:6473597d706e | 1081 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 1082 | BW_FTM_SYNCONF_SWOC(instance, enable? 1:0); |
bogdanm | 82:6473597d706e | 1083 | } |
bogdanm | 82:6473597d706e | 1084 | |
bogdanm | 82:6473597d706e | 1085 | /*! |
bogdanm | 82:6473597d706e | 1086 | * @brief Enables the FTM timer enhanced PWM sync mode. |
bogdanm | 82:6473597d706e | 1087 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 1088 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 1089 | */ |
bogdanm | 82:6473597d706e | 1090 | static inline void ftm_hal_enable_enhanced_pwm_sync_mdoe(uint8_t instance, bool enable ) |
bogdanm | 82:6473597d706e | 1091 | { |
bogdanm | 82:6473597d706e | 1092 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 1093 | BW_FTM_SYNCONF_SYNCMODE(instance, enable? 1:0); |
bogdanm | 82:6473597d706e | 1094 | } |
bogdanm | 82:6473597d706e | 1095 | |
bogdanm | 82:6473597d706e | 1096 | |
bogdanm | 82:6473597d706e | 1097 | /*! |
bogdanm | 82:6473597d706e | 1098 | * @brief Enables the FTM timer software output control sync. |
bogdanm | 82:6473597d706e | 1099 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 1100 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 1101 | */ |
bogdanm | 82:6473597d706e | 1102 | static inline void ftm_hal_enable_software_sync_swoctrl(uint8_t instance, bool enable ) |
bogdanm | 82:6473597d706e | 1103 | { |
bogdanm | 82:6473597d706e | 1104 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 1105 | BW_FTM_SYNCONF_SWSOC(instance, enable? 1:0); |
bogdanm | 82:6473597d706e | 1106 | } |
bogdanm | 82:6473597d706e | 1107 | |
bogdanm | 82:6473597d706e | 1108 | /*! |
bogdanm | 82:6473597d706e | 1109 | * @brief Enables the FTM timer software inverting control sync. |
bogdanm | 82:6473597d706e | 1110 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 1111 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 1112 | */ |
bogdanm | 82:6473597d706e | 1113 | static inline void ftm_hal_enable_software_sync_invert_ctrl(uint8_t instance, bool enable ) |
bogdanm | 82:6473597d706e | 1114 | { |
bogdanm | 82:6473597d706e | 1115 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 1116 | BW_FTM_SYNCONF_SWINVC(instance, enable? 1:0); |
bogdanm | 82:6473597d706e | 1117 | } |
bogdanm | 82:6473597d706e | 1118 | |
bogdanm | 82:6473597d706e | 1119 | /*! |
bogdanm | 82:6473597d706e | 1120 | * @brief Enables the FTM timer software outmask sync. |
bogdanm | 82:6473597d706e | 1121 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 1122 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 1123 | */ |
bogdanm | 82:6473597d706e | 1124 | static inline void ftm_hal_enable_software_sync_output_mask(uint8_t instance, bool enable ) |
bogdanm | 82:6473597d706e | 1125 | { |
bogdanm | 82:6473597d706e | 1126 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 1127 | BW_FTM_SYNCONF_SWOM(instance, enable? 1:0); |
bogdanm | 82:6473597d706e | 1128 | } |
bogdanm | 82:6473597d706e | 1129 | |
bogdanm | 82:6473597d706e | 1130 | /*! |
bogdanm | 82:6473597d706e | 1131 | * @brief Enables the FTM timer software outmask sync. |
bogdanm | 82:6473597d706e | 1132 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 1133 | * @param enable True to enable, false to disable. |
bogdanm | 82:6473597d706e | 1134 | */ |
bogdanm | 82:6473597d706e | 1135 | static inline void ftm_hal_enable_software_sycn_mod_cntin_cv(uint8_t instance, bool enable ) |
bogdanm | 82:6473597d706e | 1136 | { |
bogdanm | 82:6473597d706e | 1137 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 1138 | BW_FTM_SYNCONF_SWWRBUF(instance, enable? 1:0); |
bogdanm | 82:6473597d706e | 1139 | } |
bogdanm | 82:6473597d706e | 1140 | |
bogdanm | 82:6473597d706e | 1141 | /*! |
bogdanm | 82:6473597d706e | 1142 | * @brief Enables the FTM timer counter software sync. |
bogdanm | 82:6473597d706e | 1143 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 1144 | * @param enable True to enable, false to disable |
bogdanm | 82:6473597d706e | 1145 | */ |
bogdanm | 82:6473597d706e | 1146 | static inline void ftm_hal_enable_software_sync_counter(uint8_t instance, bool enable ) |
bogdanm | 82:6473597d706e | 1147 | { |
bogdanm | 82:6473597d706e | 1148 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 1149 | BW_FTM_SYNCONF_SWRSTCNT(instance, enable? 1:0); |
bogdanm | 82:6473597d706e | 1150 | } |
bogdanm | 82:6473597d706e | 1151 | |
bogdanm | 82:6473597d706e | 1152 | /*! |
bogdanm | 82:6473597d706e | 1153 | * @brief Enables the FTM timer INVCTRL update by PWM. |
bogdanm | 82:6473597d706e | 1154 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 1155 | * @param enable True to update with PWM, false to update with rising edge of system clock. |
bogdanm | 82:6473597d706e | 1156 | */ |
bogdanm | 82:6473597d706e | 1157 | static inline void ftm_hal_enable_invert_sync_with_rising_edge(uint8_t instance, bool enable) |
bogdanm | 82:6473597d706e | 1158 | { |
bogdanm | 82:6473597d706e | 1159 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 1160 | BW_FTM_SYNCONF_INVC(instance, enable? 1:0); |
bogdanm | 82:6473597d706e | 1161 | } |
bogdanm | 82:6473597d706e | 1162 | |
bogdanm | 82:6473597d706e | 1163 | /*! |
bogdanm | 82:6473597d706e | 1164 | * @brief Enables the FTM timer cntin update by PWM. |
bogdanm | 82:6473597d706e | 1165 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 1166 | * @param enable True to update with PWM, false to update with rising edge of system clock. |
bogdanm | 82:6473597d706e | 1167 | */ |
bogdanm | 82:6473597d706e | 1168 | static inline void ftm_hal_enable_cntin_sync_with_rising_edge(uint8_t instance, bool enable ) |
bogdanm | 82:6473597d706e | 1169 | { |
bogdanm | 82:6473597d706e | 1170 | assert(instance < HW_FTM_INSTANCE_COUNT); |
bogdanm | 82:6473597d706e | 1171 | BW_FTM_SYNCONF_CNTINC(instance, enable? 1:0); |
bogdanm | 82:6473597d706e | 1172 | } |
bogdanm | 82:6473597d706e | 1173 | |
bogdanm | 82:6473597d706e | 1174 | |
bogdanm | 82:6473597d706e | 1175 | /*HAL functionality*/ |
bogdanm | 82:6473597d706e | 1176 | /*! |
bogdanm | 82:6473597d706e | 1177 | * @brief Resets the FTM registers |
bogdanm | 82:6473597d706e | 1178 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 1179 | */ |
bogdanm | 82:6473597d706e | 1180 | void ftm_hal_reset(uint8_t instance); |
bogdanm | 82:6473597d706e | 1181 | |
bogdanm | 82:6473597d706e | 1182 | /*! |
bogdanm | 82:6473597d706e | 1183 | * @brief Initializes the FTM. |
bogdanm | 82:6473597d706e | 1184 | * @param instance The FTM peripheral instance number. |
bogdanm | 82:6473597d706e | 1185 | */ |
bogdanm | 82:6473597d706e | 1186 | void ftm_hal_init(uint8_t instance, ftm_config_t *config); |
bogdanm | 82:6473597d706e | 1187 | /*Initializes the 5 FTM operating mode, input capture, output compare, PWM output(edge aligned, center-aligned, conbine), dual and quadrature).*/ |
bogdanm | 82:6473597d706e | 1188 | |
bogdanm | 82:6473597d706e | 1189 | /*void ftm_hal_input_capture_mode(uint8_t instance);*/ |
bogdanm | 82:6473597d706e | 1190 | /*void ftm_hal_output_compare_mode(uint8_t instance);*/ |
bogdanm | 82:6473597d706e | 1191 | |
bogdanm | 82:6473597d706e | 1192 | /*! |
bogdanm | 82:6473597d706e | 1193 | * @brief Enables the FTM timer when it is PWM output mode. |
bogdanm | 82:6473597d706e | 1194 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 1195 | * @param config pwm config parameter |
bogdanm | 82:6473597d706e | 1196 | */ |
bogdanm | 82:6473597d706e | 1197 | void ftm_hal_enable_pwm_mode(uint8_t instance, ftm_config_t *config); |
bogdanm | 82:6473597d706e | 1198 | |
bogdanm | 82:6473597d706e | 1199 | /*! |
bogdanm | 82:6473597d706e | 1200 | * @brief Initializes the FTM timer when it is PWM output mode. |
bogdanm | 82:6473597d706e | 1201 | * @param instance The FTM peripheral instance number |
bogdanm | 82:6473597d706e | 1202 | */ |
bogdanm | 82:6473597d706e | 1203 | void ftm_hal_disable_pwm_mode(uint8_t instance, ftm_config_t *config); |
bogdanm | 82:6473597d706e | 1204 | /*void ftm_hal_dual_mode(uint8_t instance);*/ |
bogdanm | 82:6473597d706e | 1205 | /*void ftm_hal_quad_mode(uint8_t instance);*/ |
bogdanm | 82:6473597d706e | 1206 | |
bogdanm | 82:6473597d706e | 1207 | |
bogdanm | 82:6473597d706e | 1208 | /*void ftm_hal_set_counting_mode(); //up, up down or free running counting mode*/ |
bogdanm | 82:6473597d706e | 1209 | /*void ftm_hal_set_deadtime(uint8_t instance, uint_32 us);*/ |
bogdanm | 82:6473597d706e | 1210 | |
bogdanm | 82:6473597d706e | 1211 | /*! @}*/ |
bogdanm | 82:6473597d706e | 1212 | |
bogdanm | 82:6473597d706e | 1213 | #endif /* __FSL_FTM_HAL_H__*/ |
bogdanm | 82:6473597d706e | 1214 | /******************************************************************************* |
bogdanm | 82:6473597d706e | 1215 | * EOF |
bogdanm | 82:6473597d706e | 1216 | ******************************************************************************/ |