Libraries and Example of mbed parallel bus using I2C port expanders

Dependencies:   HDSP253X mbed PCF8574_Bus

Committer:
wim
Date:
Wed Aug 31 19:45:31 2011 +0000
Revision:
0:2467aed99127
First Version

Who changed what in which revision?

UserRevisionLine numberNew contents of line
wim 0:2467aed99127 1 /* PCF8574_EnableBus - Use the PCF8574 I2C Port Extender for controlling the Chip Enable Bus
wim 0:2467aed99127 2 * Copyright (c) 2011 Wim Huiskamp
wim 0:2467aed99127 3 *
wim 0:2467aed99127 4 * Released under the MIT License: http://mbed.org/license/mit
wim 0:2467aed99127 5 *
wim 0:2467aed99127 6 * version 0.2 Initial Release
wim 0:2467aed99127 7 */
wim 0:2467aed99127 8 #include "mbed.h"
wim 0:2467aed99127 9 #include "PCF8574_EnableBus.h"
wim 0:2467aed99127 10
wim 0:2467aed99127 11
wim 0:2467aed99127 12 /** Create an PCF8574_EnableBus object connected to the specified I2C object and using the specified deviceAddress
wim 0:2467aed99127 13 *
wim 0:2467aed99127 14 * @param I2C &i2c the I2C port to connect to
wim 0:2467aed99127 15 * @param char deviceAddress the address of the PCF8574
wim 0:2467aed99127 16 */
wim 0:2467aed99127 17 PCF8574_EnableBus::PCF8574_EnableBus(I2C &i2c, char deviceAddress) : _i2c(i2c) {
wim 0:2467aed99127 18 _writeOpcode = deviceAddress & 0xFE; // low order bit = 0 for write
wim 0:2467aed99127 19 _readOpcode = deviceAddress | 0x01; // low order bit = 1 for read
wim 0:2467aed99127 20 _init();
wim 0:2467aed99127 21 }
wim 0:2467aed99127 22
wim 0:2467aed99127 23
wim 0:2467aed99127 24 /** Set or Reset Chip Select pins on Enable Bus
wim 0:2467aed99127 25 *
wim 0:2467aed99127 26 * @param CS_Pin cs_pin
wim 0:2467aed99127 27 * @param Bit_Level cs_level
wim 0:2467aed99127 28 */
wim 0:2467aed99127 29 void PCF8574_EnableBus::chipselect (CS_Pin cs_pin, Bit_Level cs_level) {
wim 0:2467aed99127 30 int result = 1;
wim 0:2467aed99127 31
wim 0:2467aed99127 32 switch (cs_pin) {
wim 0:2467aed99127 33 case CS_SWITCH : if (cs_level == LOW)
wim 0:2467aed99127 34 _enable_bus = ~D_CS_SWITCH; // CS Pin Low, make sure that only one CS is active
wim 0:2467aed99127 35 else
wim 0:2467aed99127 36 _enable_bus |= D_CS_SWITCH; // CS Pin High
wim 0:2467aed99127 37 break;
wim 0:2467aed99127 38 case LATCHEN_1 : if (cs_level == LOW)
wim 0:2467aed99127 39 _enable_bus = ~D_LATCHEN_1; // CS Pin Low, make sure that only one CS is active
wim 0:2467aed99127 40 else
wim 0:2467aed99127 41 _enable_bus |= D_LATCHEN_1; // CS Pin High
wim 0:2467aed99127 42 break;
wim 0:2467aed99127 43 case LATCHEN_2 : if (cs_level == LOW)
wim 0:2467aed99127 44 _enable_bus = ~D_LATCHEN_2; // CS Pin Low, make sure that only one CS is active
wim 0:2467aed99127 45 else
wim 0:2467aed99127 46 _enable_bus |= D_LATCHEN_2; // CS Pin High
wim 0:2467aed99127 47 break;
wim 0:2467aed99127 48 case CS_BRIGHT : if (cs_level == LOW)
wim 0:2467aed99127 49 _enable_bus = ~D_CS_BRIGHT; // CS Pin Low, make sure that only one CS is active
wim 0:2467aed99127 50 else
wim 0:2467aed99127 51 _enable_bus |= D_CS_BRIGHT; // CS Pin High
wim 0:2467aed99127 52 break;
wim 0:2467aed99127 53 case CS_DISP : if (cs_level == LOW)
wim 0:2467aed99127 54 _enable_bus = ~D_CS_DISP; // CS Pin Low, make sure that only one CS is active
wim 0:2467aed99127 55 else
wim 0:2467aed99127 56 _enable_bus |= D_CS_DISP; // CS Pin High
wim 0:2467aed99127 57 break;
wim 0:2467aed99127 58
wim 0:2467aed99127 59 default: // Oops, we should never end up here....
wim 0:2467aed99127 60 result = -1;
wim 0:2467aed99127 61 }
wim 0:2467aed99127 62
wim 0:2467aed99127 63 _write(); // Write chip enable bits to bus
wim 0:2467aed99127 64 }
wim 0:2467aed99127 65
wim 0:2467aed99127 66 /** Set or Clear the Reset pin on Enable Bus
wim 0:2467aed99127 67 *
wim 0:2467aed99127 68 * @param Bit_Level rst_level
wim 0:2467aed99127 69 */
wim 0:2467aed99127 70 void PCF8574_EnableBus::reset (Bit_Level rst_level) {
wim 0:2467aed99127 71
wim 0:2467aed99127 72 if (rst_level == LOW) {
wim 0:2467aed99127 73 _reset_pin = 0x00; // Reset Pin Low
wim 0:2467aed99127 74 }
wim 0:2467aed99127 75 else {
wim 0:2467aed99127 76 _reset_pin = D_RESET; // Reset Pin High
wim 0:2467aed99127 77 }
wim 0:2467aed99127 78
wim 0:2467aed99127 79 _write(); // Write RST bit to bus
wim 0:2467aed99127 80 }
wim 0:2467aed99127 81
wim 0:2467aed99127 82
wim 0:2467aed99127 83 /** Set or Clear the NoGo pin on Enable Bus
wim 0:2467aed99127 84 *
wim 0:2467aed99127 85 * @param Bit_Level nogo_level
wim 0:2467aed99127 86 */
wim 0:2467aed99127 87 void PCF8574_EnableBus::nogo (Bit_Level nogo_level) {
wim 0:2467aed99127 88
wim 0:2467aed99127 89 if (nogo_level == LOW) {
wim 0:2467aed99127 90 _nogo_pin = 0x00; // NOGO Pin Low
wim 0:2467aed99127 91 }
wim 0:2467aed99127 92 else {
wim 0:2467aed99127 93 _nogo_pin = D_NOGO; // NOGO Pin High
wim 0:2467aed99127 94 }
wim 0:2467aed99127 95
wim 0:2467aed99127 96 _write(); // Write NoGo bit to bus
wim 0:2467aed99127 97 }
wim 0:2467aed99127 98
wim 0:2467aed99127 99
wim 0:2467aed99127 100 /** Optimised EnableBus write operation.
wim 0:2467aed99127 101 * @param byte the value to output on the bus
wim 0:2467aed99127 102 */
wim 0:2467aed99127 103 void PCF8574_EnableBus::_write(char byte) {
wim 0:2467aed99127 104 char data[1];
wim 0:2467aed99127 105
wim 0:2467aed99127 106 data[0] = byte;
wim 0:2467aed99127 107 _i2c.write(_writeOpcode, data, 1); // Write value to bus
wim 0:2467aed99127 108 }
wim 0:2467aed99127 109
wim 0:2467aed99127 110 /** Optimised EnableBus write operation.
wim 0:2467aed99127 111 * @param
wim 0:2467aed99127 112 */
wim 0:2467aed99127 113 void PCF8574_EnableBus::_write() {
wim 0:2467aed99127 114 char data[1];
wim 0:2467aed99127 115
wim 0:2467aed99127 116 data[0] = (_enable_bus & D_ENABLE_MSK) | _reset_pin | _nogo_pin; // Combine enable bits and control bits
wim 0:2467aed99127 117 _i2c.write(_writeOpcode, data, 1); // Write value to bus
wim 0:2467aed99127 118 }
wim 0:2467aed99127 119
wim 0:2467aed99127 120
wim 0:2467aed99127 121 /** Init PCF8574_EnableBus
wim 0:2467aed99127 122 * @param
wim 0:2467aed99127 123 * @returns
wim 0:2467aed99127 124 */
wim 0:2467aed99127 125 void PCF8574_EnableBus::_init() {
wim 0:2467aed99127 126 _enable_bus = 0xFF; // Make sure that all CS pins are disabled
wim 0:2467aed99127 127 _reset_pin = D_RESET; // Make sure that Reset pin is disabled
wim 0:2467aed99127 128 _nogo_pin = D_NOGO; // Make sure that NoGo pin is disabled
wim 0:2467aed99127 129 _write(); // Write value to bus
wim 0:2467aed99127 130 }