Norimasa Okamoto / Mbed 2 deprecated lpcterm2

semihost server example program

Dependencies:   SWD mbed USBLocalFileSystem BaseDAP USBDAP

/media/uploads/va009039/kl46z-lpc800-360x480.jpg

LPCXpresso
LPC11U68		LPCXpresso
LPC1549		FRDM-KL46ZEA LPC4088 QSB
app-board		LPC1768
app-board		LPC810LPC1114FN28
serverserverserverserverserverclientclient
SWDIOD12D12D12p25p21p4(P0_2)p12
SWCLKD10D10D10p26p22p3(P0_3)p3
nRESET
*option		D6D6D6p34p30p1(P0_5)p23
GNDGNDGNDGNDp1p1p7p22
3.3VP3V3P3V3P3V3p44p40p6p21
flash writeSW2(P0_1)SW3(P1_9)SW1p14
joystick
center		p14
joystick
center

client example:

Import programlpc810-semihost_helloworld

semihost client example program

Last commit 20 Feb 2014 by Norimasa Okamoto

tests/test1_Target2.cpp@18:5ed1759e863b, 2014-06-22 (annotated)

Committer:
va009039
Date:
Sun Jun 22 12:04:16 2014 +0000
Revision:
18:5ed1759e863b
Parent:
5:2774358f5e4f 
add LPC11U68 interface.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
va009039 5:2774358f5e4f 1 // test1_Target2.cpp 2013/9/14
va009039 5:2774358f5e4f 2 #if 0
va009039 5:2774358f5e4f 3 #include "Target2.h"
va009039 5:2774358f5e4f 4 #include "mytest.h"
va009039 5:2774358f5e4f 5
va009039 5:2774358f5e4f 6 Serial pc(USBTX, USBRX);
va009039 5:2774358f5e4f 7 #ifdef TARGET_LPC1768
va009039 5:2774358f5e4f 8 Target2 target(p21,p22,p17); // SWDIO(dp12),SWCLK(dp3),nReset(dp23)
va009039 5:2774358f5e4f 9 #endif
va009039 5:2774358f5e4f 10 #ifdef TARGET_KL25Z
va009039 5:2774358f5e4f 11 Target2 target(PTB8,PTB9,PTB10); // SWDIO(dp12),SWCLK(dp3),nReset(dp23)
va009039 5:2774358f5e4f 12 #endif
va009039 5:2774358f5e4f 13
va009039 5:2774358f5e4f 14 TEST(Target2,setup) {
va009039 5:2774358f5e4f 15 ASSERT_TRUE(target.setup());
va009039 5:2774358f5e4f 16 }
va009039 5:2774358f5e4f 17
va009039 5:2774358f5e4f 18 TEST(Target2,readMemory1) {
va009039 5:2774358f5e4f 19 uint32_t data = target.readMemory(0); // sp
va009039 5:2774358f5e4f 20 ASSERT_TRUE(data == 0x10001000);
va009039 5:2774358f5e4f 21 }
va009039 5:2774358f5e4f 22
va009039 5:2774358f5e4f 23 TEST(Target2,readMemory2) {
va009039 5:2774358f5e4f 24 for(uint32_t addr = 0; addr < 0x1c; addr += 4) {
va009039 5:2774358f5e4f 25 uint32_t data = target.readMemory(addr);
va009039 5:2774358f5e4f 26 //TEST_PRINT("addr=%08x data=%08x\n", addr, data);
va009039 5:2774358f5e4f 27 }
va009039 5:2774358f5e4f 28 }
va009039 5:2774358f5e4f 29
va009039 5:2774358f5e4f 30 TEST(Target2,readMemory3) {
va009039 5:2774358f5e4f 31 for(uint32_t addr = 0; addr < 0x100; addr += 4) {
va009039 5:2774358f5e4f 32 uint32_t data = target.readMemory(addr);
va009039 5:2774358f5e4f 33 }
va009039 5:2774358f5e4f 34 }
va009039 5:2774358f5e4f 35
va009039 5:2774358f5e4f 36 TEST(Target2,DHCSR1) {
va009039 5:2774358f5e4f 37 uint32_t data = target.readMemory(0xE000EDF0);
va009039 5:2774358f5e4f 38
va009039 5:2774358f5e4f 39 }
va009039 5:2774358f5e4f 40
va009039 5:2774358f5e4f 41 TEST(Target2,getStatus1) {
va009039 5:2774358f5e4f 42 int status = target.getStatus();
va009039 5:2774358f5e4f 43 ASSERT_TRUE(status == TARGET_RUNNING);
va009039 5:2774358f5e4f 44 }
va009039 5:2774358f5e4f 45
va009039 5:2774358f5e4f 46 TEST(Target2,halt1) {
va009039 5:2774358f5e4f 47 target.halt();
va009039 5:2774358f5e4f 48 int status = target.getStatus();
va009039 5:2774358f5e4f 49 ASSERT_TRUE(status == TARGET_HALTED);
va009039 5:2774358f5e4f 50 }
va009039 5:2774358f5e4f 51
va009039 5:2774358f5e4f 52 TEST(Target2,resume1) {
va009039 5:2774358f5e4f 53 target.resume();
va009039 5:2774358f5e4f 54 int status = target.getStatus();
va009039 5:2774358f5e4f 55 ASSERT_TRUE(status == TARGET_RUNNING);
va009039 5:2774358f5e4f 56 }
va009039 5:2774358f5e4f 57
va009039 5:2774358f5e4f 58 TEST(Target2,writeMemory1) {
va009039 5:2774358f5e4f 59 uint32_t addr = 0x10000000;
va009039 5:2774358f5e4f 60 target.halt();
va009039 5:2774358f5e4f 61 int status = target.getStatus();
va009039 5:2774358f5e4f 62 ASSERT_TRUE(status == TARGET_HALTED);
va009039 5:2774358f5e4f 63
va009039 5:2774358f5e4f 64 uint32_t data = target.readMemory(addr);
va009039 5:2774358f5e4f 65 target.writeMemory(addr, 0x12345678);
va009039 5:2774358f5e4f 66 ASSERT_TRUE(target.readMemory(addr) == 0x12345678);
va009039 5:2774358f5e4f 67 target.writeMemory(addr, data);
va009039 5:2774358f5e4f 68 ASSERT_TRUE(target.readMemory(addr) == data);
va009039 5:2774358f5e4f 69
va009039 5:2774358f5e4f 70 target.resume();
va009039 5:2774358f5e4f 71 status = target.getStatus();
va009039 5:2774358f5e4f 72 ASSERT_TRUE(status == TARGET_RUNNING);
va009039 5:2774358f5e4f 73 }
va009039 5:2774358f5e4f 74
va009039 5:2774358f5e4f 75 TEST(Target2,writeMemory2) {
va009039 5:2774358f5e4f 76 uint32_t addr = 0x10001000-4;
va009039 5:2774358f5e4f 77 uint32_t data = target.readMemory(addr);
va009039 5:2774358f5e4f 78 target.writeMemory(addr, 0x12345678);
va009039 5:2774358f5e4f 79 ASSERT_TRUE(target.readMemory(addr) == 0x12345678);
va009039 5:2774358f5e4f 80 target.writeMemory(addr, data);
va009039 5:2774358f5e4f 81 ASSERT_TRUE(target.readMemory(addr) == data);
va009039 5:2774358f5e4f 82 }
va009039 5:2774358f5e4f 83
va009039 5:2774358f5e4f 84 TEST(CoreReg,r0) {
va009039 5:2774358f5e4f 85 uint32_t r0 = target.r0.read();
va009039 5:2774358f5e4f 86 }
va009039 5:2774358f5e4f 87
va009039 5:2774358f5e4f 88 TEST(CoreReg,r1) {
va009039 5:2774358f5e4f 89 target.halt();
va009039 5:2774358f5e4f 90 uint32_t backup = target.r1.read();
va009039 5:2774358f5e4f 91 target.r1.write(0x11223344);
va009039 5:2774358f5e4f 92 uint32_t data = target.r1.read();
va009039 5:2774358f5e4f 93 ASSERT_TRUE(data == 0x11223344);
va009039 5:2774358f5e4f 94 target.r1.write(backup);
va009039 5:2774358f5e4f 95 target.resume();
va009039 5:2774358f5e4f 96 }
va009039 5:2774358f5e4f 97
va009039 5:2774358f5e4f 98 TEST(CoreReg,r2) {
va009039 5:2774358f5e4f 99 target.halt();
va009039 5:2774358f5e4f 100 uint32_t backup = target.r2;
va009039 5:2774358f5e4f 101 target.r2 = 0x11223344;
va009039 5:2774358f5e4f 102 ASSERT_TRUE(target.r2 == 0x11223344);
va009039 5:2774358f5e4f 103 target.r2 = backup;
va009039 5:2774358f5e4f 104 target.resume();
va009039 5:2774358f5e4f 105 }
va009039 5:2774358f5e4f 106
va009039 5:2774358f5e4f 107 TEST(CoreReg,pc) {
va009039 5:2774358f5e4f 108 uint32_t pc = target.pc.read();
va009039 5:2774358f5e4f 109 //TEST_PRINT("pc=%08x\n", pc);
va009039 5:2774358f5e4f 110 }
va009039 5:2774358f5e4f 111
va009039 5:2774358f5e4f 112 TEST(Target2,wait_status1) {
va009039 5:2774358f5e4f 113 target.halt();
va009039 5:2774358f5e4f 114 bool r = target.wait_status(TARGET_HALTED);
va009039 5:2774358f5e4f 115 ASSERT_TRUE(r);
va009039 5:2774358f5e4f 116 target.resume();
va009039 5:2774358f5e4f 117 r = target.wait_status(TARGET_HALTED, 50);
va009039 5:2774358f5e4f 118 ASSERT_TRUE(!r);
va009039 5:2774358f5e4f 119 }
va009039 5:2774358f5e4f 120
va009039 5:2774358f5e4f 121 TEST(Target2,writeMemory3) {
va009039 5:2774358f5e4f 122 target.halt();
va009039 5:2774358f5e4f 123 bool r = target.wait_status(TARGET_HALTED);
va009039 5:2774358f5e4f 124 ASSERT_TRUE(r);
va009039 5:2774358f5e4f 125
va009039 5:2774358f5e4f 126 uint8_t buf[256];
va009039 5:2774358f5e4f 127 for(int i = 0; i < sizeof(buf); i++) {
va009039 5:2774358f5e4f 128 buf[i] = i;
va009039 5:2774358f5e4f 129 }
va009039 5:2774358f5e4f 130 uint32_t addr = 0x10000000;
va009039 5:2774358f5e4f 131 target.writeMemory(addr, (uint32_t*)buf, sizeof(buf)/sizeof(uint32_t));
va009039 5:2774358f5e4f 132
va009039 5:2774358f5e4f 133 uint8_t rbuf[256];
va009039 5:2774358f5e4f 134 target.readMemory(addr, (uint32_t*)rbuf, sizeof(rbuf)/sizeof(uint32_t));
va009039 5:2774358f5e4f 135
va009039 5:2774358f5e4f 136 ASSERT_TRUE(memcmp(buf, rbuf, sizeof(buf)) == 0);
va009039 5:2774358f5e4f 137 }
va009039 5:2774358f5e4f 138
va009039 5:2774358f5e4f 139 #define SYST_CSR 0xe000e010
va009039 5:2774358f5e4f 140
va009039 5:2774358f5e4f 141 #define ICER 0xe000e180
va009039 5:2774358f5e4f 142 #define ICPR 0xe000e280
va009039 5:2774358f5e4f 143
va009039 5:2774358f5e4f 144 #define CPUID 0xe000ed00
va009039 5:2774358f5e4f 145 #define ICSR 0xe000ed04
va009039 5:2774358f5e4f 146
va009039 5:2774358f5e4f 147 TEST(Target2,test_SCB) {
va009039 5:2774358f5e4f 148 target.resume();
va009039 5:2774358f5e4f 149 for(int i = 0; i < 3; i++) {
va009039 5:2774358f5e4f 150 uint32_t pc = target.pc.read();
va009039 5:2774358f5e4f 151 TEST_PRINT("pc=%08x", pc);
va009039 5:2774358f5e4f 152
va009039 5:2774358f5e4f 153 uint32_t syst_csr = target.readMemory(SYST_CSR);
va009039 5:2774358f5e4f 154 TEST_PRINT("SYST_CSR=%08x", syst_csr);
va009039 5:2774358f5e4f 155 uint32_t icer = target.readMemory(ICER);
va009039 5:2774358f5e4f 156 TEST_PRINT("ICER=%08x", icer);
va009039 5:2774358f5e4f 157 uint32_t icpr = target.readMemory(ICPR);
va009039 5:2774358f5e4f 158 TEST_PRINT("ICPR=%08x", icpr);
va009039 5:2774358f5e4f 159 uint32_t cpuid = target.readMemory(CPUID);
va009039 5:2774358f5e4f 160 TEST_PRINT("CPUID=%08x", cpuid);
va009039 5:2774358f5e4f 161 uint32_t icsr = target.readMemory(ICSR);
va009039 5:2774358f5e4f 162 TEST_PRINT("ICSR=%08x", icsr);
va009039 5:2774358f5e4f 163 }
va009039 5:2774358f5e4f 164 for(int i = 0; i < 100; i++) {
va009039 5:2774358f5e4f 165 uint32_t syst_csr = target.readMemory(SYST_CSR);
va009039 5:2774358f5e4f 166 if (syst_csr != 0) {
va009039 5:2774358f5e4f 167 TEST_PRINT("SYST_CSR=%08x", syst_csr);
va009039 5:2774358f5e4f 168 break;
va009039 5:2774358f5e4f 169 }
va009039 5:2774358f5e4f 170 }
va009039 5:2774358f5e4f 171 }
va009039 5:2774358f5e4f 172
va009039 5:2774358f5e4f 173 int main() {
va009039 5:2774358f5e4f 174 //pc.baud(921600);
va009039 5:2774358f5e4f 175 pc.baud(9600);
va009039 5:2774358f5e4f 176 DBG("%s", __FILE__);
va009039 5:2774358f5e4f 177
va009039 5:2774358f5e4f 178 RUN_ALL_TESTS();
va009039 5:2774358f5e4f 179 }
va009039 5:2774358f5e4f 180 #endif
va009039 5:2774358f5e4f 181