WIZ820io(W5200) network interface、EthernetNetIf compatible.

/media/uploads/va009039/wiz820ionetif.jpg

example

#include "WIZ820ioNetIf.h"
#include "HTTPClient.h"
#include "HTTPServer.h"

#if defined(TARGET_KL25Z)
WIZ820ioNetIf eth(PTD2,PTD3,PTD1,PTD0,PTD5);
#endif
HTTPClient http;
HTTPStream stream;

void callback(HTTPResult r){
    printf("callback %d %s\n", r, HTTPClient::ResultStr(r));
}

int main() {
    int err = eth.setup();
    if (err < 0) {
        printf("setup error %d\n", err);
        exit(-1);
    }    

    HTTPServer svr;
    svr.addHandler<SimpleHandler>("/");
    svr.bind(80);

    const char* uri = "http://va009039-mbed.appspot.com/kl25z/";
    http.get(uri, &stream, callback);
    uint8_t buf[256];
    int total = 0;
    stream.readNext(buf, sizeof(buf));
    while(1) {
        if(stream.readable()) {
            int len = stream.readLen();
            total += len;
            printf("%d %d\n", total, len);
            stream.readNext(buf, sizeof(buf));
        }
        Net::poll();
    }
}
Committer:
va009039
Date:
Sun Mar 24 11:25:31 2013 +0000
Revision:
1:22b9052d864d
WIZ820io(W8200) ethernet interface, EthernetNetIf compatible.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
va009039 1:22b9052d864d 1 /*
va009039 1:22b9052d864d 2 * Copyright (c) 2010 by Cristian Maglie <c.maglie@bug.st>
va009039 1:22b9052d864d 3 *
va009039 1:22b9052d864d 4 * This file is free software; you can redistribute it and/or modify
va009039 1:22b9052d864d 5 * it under the terms of either the GNU General Public License version 2
va009039 1:22b9052d864d 6 * or the GNU Lesser General Public License version 2.1, both as
va009039 1:22b9052d864d 7 * published by the Free Software Foundation.
va009039 1:22b9052d864d 8 */
va009039 1:22b9052d864d 9
va009039 1:22b9052d864d 10 #include <stdio.h>
va009039 1:22b9052d864d 11 #include <string.h>
va009039 1:22b9052d864d 12 #include "mbed.h"
va009039 1:22b9052d864d 13 #include "w5200.h"
va009039 1:22b9052d864d 14
va009039 1:22b9052d864d 15 SPI* pSPI;
va009039 1:22b9052d864d 16 DigitalOut* pCS;
va009039 1:22b9052d864d 17 void initSS(){ pCS->write(1); }
va009039 1:22b9052d864d 18 void setSS() { pCS->write(0); }
va009039 1:22b9052d864d 19 void resetSS() { pCS->write(1); }
va009039 1:22b9052d864d 20
va009039 1:22b9052d864d 21 // W5200 controller instance
va009039 1:22b9052d864d 22 W5200Class W5200;
va009039 1:22b9052d864d 23
va009039 1:22b9052d864d 24 #define TX_RX_MAX_BUF_SIZE 2048
va009039 1:22b9052d864d 25 #define TX_BUF 0x1100
va009039 1:22b9052d864d 26 #define RX_BUF (TX_BUF + TX_RX_MAX_BUF_SIZE)
va009039 1:22b9052d864d 27
va009039 1:22b9052d864d 28 #define TXBUF_BASE 0x8000
va009039 1:22b9052d864d 29 #define RXBUF_BASE 0xC000
va009039 1:22b9052d864d 30
va009039 1:22b9052d864d 31 #if defined(TARGET_KL25Z)
va009039 1:22b9052d864d 32 #define RESET_PIN PTD5
va009039 1:22b9052d864d 33 #define CS_PIN PTD0
va009039 1:22b9052d864d 34 #define MOSI_PIN PTD2
va009039 1:22b9052d864d 35 #define MISO_PIN PTD3
va009039 1:22b9052d864d 36 #define SCLK_PIN PTD1
va009039 1:22b9052d864d 37 #endif
va009039 1:22b9052d864d 38
va009039 1:22b9052d864d 39 void W5200Class::init(void)
va009039 1:22b9052d864d 40 {
va009039 1:22b9052d864d 41 if (!pSPI) {
va009039 1:22b9052d864d 42 pSPI = new SPI(MOSI_PIN, MISO_PIN, SCLK_PIN); // mosi, miso, sclk
va009039 1:22b9052d864d 43 }
va009039 1:22b9052d864d 44 if (!pCS) {
va009039 1:22b9052d864d 45 pCS = new DigitalOut(CS_PIN);
va009039 1:22b9052d864d 46 }
va009039 1:22b9052d864d 47 initSS();
va009039 1:22b9052d864d 48 writeMR(1<<RST);
va009039 1:22b9052d864d 49
va009039 1:22b9052d864d 50 for (int i=0; i<MAX_SOCK_NUM; i++) {
va009039 1:22b9052d864d 51 write((0x4000 + i * 0x100 + 0x001F), 2);
va009039 1:22b9052d864d 52 write((0x4000 + i * 0x100 + 0x001E), 2);
va009039 1:22b9052d864d 53 }
va009039 1:22b9052d864d 54
va009039 1:22b9052d864d 55 for (int i=0; i<MAX_SOCK_NUM; i++) {
va009039 1:22b9052d864d 56 SBASE[i] = TXBUF_BASE + SSIZE * i;
va009039 1:22b9052d864d 57 RBASE[i] = RXBUF_BASE + RSIZE * i;
va009039 1:22b9052d864d 58 }
va009039 1:22b9052d864d 59 }
va009039 1:22b9052d864d 60
va009039 1:22b9052d864d 61 uint16_t W5200Class::getTXFreeSize(SOCKET s)
va009039 1:22b9052d864d 62 {
va009039 1:22b9052d864d 63 uint16_t val=0, val1=0;
va009039 1:22b9052d864d 64 do {
va009039 1:22b9052d864d 65 val1 = readSnTX_FSR(s);
va009039 1:22b9052d864d 66 if (val1 != 0)
va009039 1:22b9052d864d 67 val = readSnTX_FSR(s);
va009039 1:22b9052d864d 68 }
va009039 1:22b9052d864d 69 while (val != val1);
va009039 1:22b9052d864d 70 return val;
va009039 1:22b9052d864d 71 }
va009039 1:22b9052d864d 72
va009039 1:22b9052d864d 73 uint16_t W5200Class::getRXReceivedSize(SOCKET s)
va009039 1:22b9052d864d 74 {
va009039 1:22b9052d864d 75 uint16_t val=0,val1=0;
va009039 1:22b9052d864d 76 do {
va009039 1:22b9052d864d 77 val1 = readSnRX_RSR(s);
va009039 1:22b9052d864d 78 if (val1 != 0)
va009039 1:22b9052d864d 79 val = readSnRX_RSR(s);
va009039 1:22b9052d864d 80 }
va009039 1:22b9052d864d 81 while (val != val1);
va009039 1:22b9052d864d 82 return val;
va009039 1:22b9052d864d 83 }
va009039 1:22b9052d864d 84
va009039 1:22b9052d864d 85
va009039 1:22b9052d864d 86 void W5200Class::send_data_processing(SOCKET s, const uint8_t *data, uint16_t len)
va009039 1:22b9052d864d 87 {
va009039 1:22b9052d864d 88 // This is same as having no offset in a call to send_data_processing_offset
va009039 1:22b9052d864d 89 send_data_processing_offset(s, 0, data, len);
va009039 1:22b9052d864d 90 }
va009039 1:22b9052d864d 91
va009039 1:22b9052d864d 92 void W5200Class::send_data_processing_offset(SOCKET s, uint16_t data_offset, const uint8_t *data, uint16_t len)
va009039 1:22b9052d864d 93 {
va009039 1:22b9052d864d 94 uint16_t ptr = readSnTX_WR(s);
va009039 1:22b9052d864d 95 ptr += data_offset;
va009039 1:22b9052d864d 96 uint16_t offset = ptr & SMASK;
va009039 1:22b9052d864d 97 uint16_t dstAddr = offset + SBASE[s];
va009039 1:22b9052d864d 98
va009039 1:22b9052d864d 99 if (offset + len > SSIZE)
va009039 1:22b9052d864d 100 {
va009039 1:22b9052d864d 101 // Wrap around circular buffer
va009039 1:22b9052d864d 102 uint16_t size = SSIZE - offset;
va009039 1:22b9052d864d 103 write(dstAddr, data, size);
va009039 1:22b9052d864d 104 write(SBASE[s], data + size, len - size);
va009039 1:22b9052d864d 105 }
va009039 1:22b9052d864d 106 else {
va009039 1:22b9052d864d 107 write(dstAddr, data, len);
va009039 1:22b9052d864d 108 }
va009039 1:22b9052d864d 109
va009039 1:22b9052d864d 110 ptr += len;
va009039 1:22b9052d864d 111 writeSnTX_WR(s, ptr);
va009039 1:22b9052d864d 112 }
va009039 1:22b9052d864d 113
va009039 1:22b9052d864d 114
va009039 1:22b9052d864d 115 void W5200Class::recv_data_processing(SOCKET s, uint8_t *data, uint16_t len, uint8_t peek)
va009039 1:22b9052d864d 116 {
va009039 1:22b9052d864d 117 uint16_t ptr;
va009039 1:22b9052d864d 118 ptr = readSnRX_RD(s);
va009039 1:22b9052d864d 119 read_data(s, (uint8_t *)ptr, data, len);
va009039 1:22b9052d864d 120 if (!peek)
va009039 1:22b9052d864d 121 {
va009039 1:22b9052d864d 122 ptr += len;
va009039 1:22b9052d864d 123 writeSnRX_RD(s, ptr);
va009039 1:22b9052d864d 124 }
va009039 1:22b9052d864d 125 }
va009039 1:22b9052d864d 126
va009039 1:22b9052d864d 127 void W5200Class::read_data(SOCKET s, volatile uint8_t *src, volatile uint8_t *dst, uint16_t len)
va009039 1:22b9052d864d 128 {
va009039 1:22b9052d864d 129 uint16_t size;
va009039 1:22b9052d864d 130 uint16_t src_mask;
va009039 1:22b9052d864d 131 uint16_t src_ptr;
va009039 1:22b9052d864d 132
va009039 1:22b9052d864d 133 //src_mask = (uint16_t)src & RMASK;
va009039 1:22b9052d864d 134 src_mask = (int)src & RMASK;
va009039 1:22b9052d864d 135 src_ptr = RBASE[s] + src_mask;
va009039 1:22b9052d864d 136
va009039 1:22b9052d864d 137 if( (src_mask + len) > RSIZE )
va009039 1:22b9052d864d 138 {
va009039 1:22b9052d864d 139 size = RSIZE - src_mask;
va009039 1:22b9052d864d 140 read(src_ptr, (uint8_t *)dst, size);
va009039 1:22b9052d864d 141 dst += size;
va009039 1:22b9052d864d 142 read(RBASE[s], (uint8_t *) dst, len - size);
va009039 1:22b9052d864d 143 }
va009039 1:22b9052d864d 144 else
va009039 1:22b9052d864d 145 read(src_ptr, (uint8_t *) dst, len);
va009039 1:22b9052d864d 146 }
va009039 1:22b9052d864d 147
va009039 1:22b9052d864d 148
va009039 1:22b9052d864d 149 uint8_t W5200Class::write(uint16_t _addr, uint8_t _data)
va009039 1:22b9052d864d 150 {
va009039 1:22b9052d864d 151 setSS();
va009039 1:22b9052d864d 152
va009039 1:22b9052d864d 153 pSPI->write(_addr >> 8);
va009039 1:22b9052d864d 154 pSPI->write(_addr & 0xFF);
va009039 1:22b9052d864d 155 pSPI->write(0x80);
va009039 1:22b9052d864d 156 pSPI->write(0x01);
va009039 1:22b9052d864d 157 pSPI->write(_data);
va009039 1:22b9052d864d 158 resetSS();
va009039 1:22b9052d864d 159 return 1;
va009039 1:22b9052d864d 160 }
va009039 1:22b9052d864d 161
va009039 1:22b9052d864d 162 uint16_t W5200Class::write(uint16_t _addr, const uint8_t *_buf, uint16_t _len)
va009039 1:22b9052d864d 163 {
va009039 1:22b9052d864d 164 setSS();
va009039 1:22b9052d864d 165 pSPI->write(_addr >> 8);
va009039 1:22b9052d864d 166 pSPI->write(_addr & 0xFF);
va009039 1:22b9052d864d 167 pSPI->write((0x80 | ((_len & 0x7F00) >> 8)));
va009039 1:22b9052d864d 168 pSPI->write(_len & 0x00FF);
va009039 1:22b9052d864d 169
va009039 1:22b9052d864d 170 for (uint16_t i=0; i<_len; i++)
va009039 1:22b9052d864d 171 {
va009039 1:22b9052d864d 172 pSPI->write(_buf[i]);
va009039 1:22b9052d864d 173 }
va009039 1:22b9052d864d 174 resetSS();
va009039 1:22b9052d864d 175
va009039 1:22b9052d864d 176 return _len;
va009039 1:22b9052d864d 177 }
va009039 1:22b9052d864d 178
va009039 1:22b9052d864d 179 uint8_t W5200Class::read(uint16_t _addr)
va009039 1:22b9052d864d 180 {
va009039 1:22b9052d864d 181 setSS();
va009039 1:22b9052d864d 182 pSPI->write(_addr >> 8);
va009039 1:22b9052d864d 183 pSPI->write(_addr & 0xFF);
va009039 1:22b9052d864d 184 pSPI->write(0x00);
va009039 1:22b9052d864d 185 pSPI->write(0x01);
va009039 1:22b9052d864d 186 uint8_t _data = pSPI->write(0);
va009039 1:22b9052d864d 187 resetSS();
va009039 1:22b9052d864d 188 return _data;
va009039 1:22b9052d864d 189 }
va009039 1:22b9052d864d 190
va009039 1:22b9052d864d 191 uint16_t W5200Class::read(uint16_t _addr, uint8_t *_buf, uint16_t _len)
va009039 1:22b9052d864d 192 {
va009039 1:22b9052d864d 193 setSS();
va009039 1:22b9052d864d 194 pSPI->write(_addr >> 8);
va009039 1:22b9052d864d 195 pSPI->write(_addr & 0xFF);
va009039 1:22b9052d864d 196 pSPI->write((0x00 | ((_len & 0x7F00) >> 8)));
va009039 1:22b9052d864d 197 pSPI->write(_len & 0x00FF);
va009039 1:22b9052d864d 198
va009039 1:22b9052d864d 199 for (uint16_t i=0; i<_len; i++)
va009039 1:22b9052d864d 200 {
va009039 1:22b9052d864d 201 _buf[i] = pSPI->write(0);
va009039 1:22b9052d864d 202 }
va009039 1:22b9052d864d 203 resetSS();
va009039 1:22b9052d864d 204 return _len;
va009039 1:22b9052d864d 205 }
va009039 1:22b9052d864d 206
va009039 1:22b9052d864d 207 void W5200Class::execCmdSn(SOCKET s, SockCMD _cmd) {
va009039 1:22b9052d864d 208 // Send command to socket
va009039 1:22b9052d864d 209 writeSnCR(s, _cmd);
va009039 1:22b9052d864d 210 // Wait for command to complete
va009039 1:22b9052d864d 211 while (readSnCR(s))
va009039 1:22b9052d864d 212 ;
va009039 1:22b9052d864d 213 }