Tomas Cerskus / USBDevice

USB device stack with Nucleo F401RE support. NOTE: the default clock config needs to be changed to in order for USB to work.

Fork of USBDevice by Tomas Cerskus

Slightly modified original USBDevice library to support F401RE.

On F401RE the data pins of your USB connector should be attached to PA12 (D+) and PA11(D-). It is also required to connect the +5V USB line to PA9.

F401RE requires 48MHz clock for USB. Therefore in order for this to work you will need to change the default clock settings:

Clock settings for USB

#include "stm32f4xx_hal.h"

RCC_OscInitTypeDef RCC_OscInitStruct;
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = 16;
RCC_OscInitStruct.PLL.PLLN = 336;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
RCC_OscInitStruct.PLL.PLLQ = 7;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
    error("RTC error: LSI clock initialization failed."); 
}

NOTE: Changing the clock frequency might affect the behavior of other libraries. I only tested the Serial library.

UPDATE: Clock settings should not to be changed anymore! Looks like the newer mbed library has the required clock enabled.

USBDevice/USBRegs_STM32.h@24:4ed3e25c3edc, 2014-03-30 (annotated)

Committer:
tolaipner
Date:
Sun Mar 30 07:30:18 2014 +0000
Revision:
24:4ed3e25c3edc
Parent:
16:4f6df64750bd 
Added Nucleo F401RE support

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 16:4f6df64750bd 1 /**
mbed_official 16:4f6df64750bd 2 ******************************************************************************
mbed_official 16:4f6df64750bd 3 * @file usb_regs.h
mbed_official 16:4f6df64750bd 4 * @author MCD Application Team
mbed_official 16:4f6df64750bd 5 * @version V2.1.0
mbed_official 16:4f6df64750bd 6 * @date 19-March-2012
mbed_official 16:4f6df64750bd 7 * @brief hardware registers
mbed_official 16:4f6df64750bd 8 ******************************************************************************
mbed_official 16:4f6df64750bd 9 * @attention
mbed_official 16:4f6df64750bd 10 *
mbed_official 16:4f6df64750bd 11 * <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
mbed_official 16:4f6df64750bd 12 *
mbed_official 16:4f6df64750bd 13 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
mbed_official 16:4f6df64750bd 14 * You may not use this file except in compliance with the License.
mbed_official 16:4f6df64750bd 15 * You may obtain a copy of the License at:
mbed_official 16:4f6df64750bd 16 *
mbed_official 16:4f6df64750bd 17 * http://www.st.com/software_license_agreement_liberty_v2
mbed_official 16:4f6df64750bd 18 *
mbed_official 16:4f6df64750bd 19 * Unless required by applicable law or agreed to in writing, software
mbed_official 16:4f6df64750bd 20 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 16:4f6df64750bd 21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 16:4f6df64750bd 22 * See the License for the specific language governing permissions and
mbed_official 16:4f6df64750bd 23 * limitations under the License.
mbed_official 16:4f6df64750bd 24 *
mbed_official 16:4f6df64750bd 25 ******************************************************************************
mbed_official 16:4f6df64750bd 26 */
mbed_official 16:4f6df64750bd 27
mbed_official 16:4f6df64750bd 28 #ifndef __USB_OTG_REGS_H__
mbed_official 16:4f6df64750bd 29 #define __USB_OTG_REGS_H__
mbed_official 16:4f6df64750bd 30
mbed_official 16:4f6df64750bd 31 typedef struct //000h
mbed_official 16:4f6df64750bd 32 {
mbed_official 16:4f6df64750bd 33 __IO uint32_t GOTGCTL; /* USB_OTG Control and Status Register 000h*/
mbed_official 16:4f6df64750bd 34 __IO uint32_t GOTGINT; /* USB_OTG Interrupt Register 004h*/
mbed_official 16:4f6df64750bd 35 __IO uint32_t GAHBCFG; /* Core AHB Configuration Register 008h*/
mbed_official 16:4f6df64750bd 36 __IO uint32_t GUSBCFG; /* Core USB Configuration Register 00Ch*/
mbed_official 16:4f6df64750bd 37 __IO uint32_t GRSTCTL; /* Core Reset Register 010h*/
mbed_official 16:4f6df64750bd 38 __IO uint32_t GINTSTS; /* Core Interrupt Register 014h*/
mbed_official 16:4f6df64750bd 39 __IO uint32_t GINTMSK; /* Core Interrupt Mask Register 018h*/
mbed_official 16:4f6df64750bd 40 __IO uint32_t GRXSTSR; /* Receive Sts Q Read Register 01Ch*/
mbed_official 16:4f6df64750bd 41 __IO uint32_t GRXSTSP; /* Receive Sts Q Read & POP Register 020h*/
mbed_official 16:4f6df64750bd 42 __IO uint32_t GRXFSIZ; /* Receive FIFO Size Register 024h*/
mbed_official 16:4f6df64750bd 43 __IO uint32_t DIEPTXF0_HNPTXFSIZ; /* EP0 / Non Periodic Tx FIFO Size Register 028h*/
mbed_official 16:4f6df64750bd 44 __IO uint32_t HNPTXSTS; /* Non Periodic Tx FIFO/Queue Sts reg 02Ch*/
mbed_official 16:4f6df64750bd 45 uint32_t Reserved30[2]; /* Reserved 030h*/
mbed_official 16:4f6df64750bd 46 __IO uint32_t GCCFG; /* General Purpose IO Register 038h*/
mbed_official 16:4f6df64750bd 47 __IO uint32_t CID; /* User ID Register 03Ch*/
mbed_official 16:4f6df64750bd 48 uint32_t Reserved40[48]; /* Reserved 040h-0FFh*/
mbed_official 16:4f6df64750bd 49 __IO uint32_t HPTXFSIZ; /* Host Periodic Tx FIFO Size Reg 100h*/
mbed_official 16:4f6df64750bd 50 __IO uint32_t DIEPTXF[3];/* dev Periodic Transmit FIFO */
mbed_official 16:4f6df64750bd 51 }
mbed_official 16:4f6df64750bd 52 USB_OTG_GREGS;
mbed_official 16:4f6df64750bd 53
mbed_official 16:4f6df64750bd 54 typedef struct // 800h
mbed_official 16:4f6df64750bd 55 {
mbed_official 16:4f6df64750bd 56 __IO uint32_t DCFG; /* dev Configuration Register 800h*/
mbed_official 16:4f6df64750bd 57 __IO uint32_t DCTL; /* dev Control Register 804h*/
mbed_official 16:4f6df64750bd 58 __IO uint32_t DSTS; /* dev Status Register (RO) 808h*/
mbed_official 16:4f6df64750bd 59 uint32_t Reserved0C; /* Reserved 80Ch*/
mbed_official 16:4f6df64750bd 60 __IO uint32_t DIEPMSK; /* dev IN Endpoint Mask 810h*/
mbed_official 16:4f6df64750bd 61 __IO uint32_t DOEPMSK; /* dev OUT Endpoint Mask 814h*/
mbed_official 16:4f6df64750bd 62 __IO uint32_t DAINT; /* dev All Endpoints Itr Reg 818h*/
mbed_official 16:4f6df64750bd 63 __IO uint32_t DAINTMSK; /* dev All Endpoints Itr Mask 81Ch*/
mbed_official 16:4f6df64750bd 64 uint32_t Reserved20; /* Reserved 820h*/
mbed_official 16:4f6df64750bd 65 uint32_t Reserved9; /* Reserved 824h*/
mbed_official 16:4f6df64750bd 66 __IO uint32_t DVBUSDIS; /* dev VBUS discharge Register 828h*/
mbed_official 16:4f6df64750bd 67 __IO uint32_t DVBUSPULSE; /* dev VBUS Pulse Register 82Ch*/
mbed_official 16:4f6df64750bd 68 __IO uint32_t DTHRCTL; /* dev thr 830h*/
mbed_official 16:4f6df64750bd 69 __IO uint32_t DIEPEMPMSK; /* dev empty msk 834h*/
mbed_official 16:4f6df64750bd 70 }
mbed_official 16:4f6df64750bd 71 USB_OTG_DREGS;
mbed_official 16:4f6df64750bd 72
mbed_official 16:4f6df64750bd 73 typedef struct
mbed_official 16:4f6df64750bd 74 {
mbed_official 16:4f6df64750bd 75 __IO uint32_t DIEPCTL; /* dev IN Endpoint Control Reg 900h + (ep_num * 20h) + 00h*/
mbed_official 16:4f6df64750bd 76 uint32_t Reserved04; /* Reserved 900h + (ep_num * 20h) + 04h*/
mbed_official 16:4f6df64750bd 77 __IO uint32_t DIEPINT; /* dev IN Endpoint Itr Reg 900h + (ep_num * 20h) + 08h*/
mbed_official 16:4f6df64750bd 78 uint32_t Reserved0C; /* Reserved 900h + (ep_num * 20h) + 0Ch*/
mbed_official 16:4f6df64750bd 79 __IO uint32_t DIEPTSIZ; /* IN Endpoint Txfer Size 900h + (ep_num * 20h) + 10h*/
mbed_official 16:4f6df64750bd 80 uint32_t Reserved14;
mbed_official 16:4f6df64750bd 81 __IO uint32_t DTXFSTS;/*IN Endpoint Tx FIFO Status Reg 900h + (ep_num * 20h) + 18h*/
mbed_official 16:4f6df64750bd 82 uint32_t Reserved1C; /* Reserved 900h+(ep_num*20h)+1Ch-900h+ (ep_num * 20h) + 1Ch*/
mbed_official 16:4f6df64750bd 83 }
mbed_official 16:4f6df64750bd 84 USB_OTG_INEPREGS;
mbed_official 16:4f6df64750bd 85
mbed_official 16:4f6df64750bd 86 typedef struct
mbed_official 16:4f6df64750bd 87 {
mbed_official 16:4f6df64750bd 88 __IO uint32_t DOEPCTL; /* dev OUT Endpoint Control Reg B00h + (ep_num * 20h) + 00h*/
mbed_official 16:4f6df64750bd 89 uint32_t Reserved04; /* Reserved B00h + (ep_num * 20h) + 04h*/
mbed_official 16:4f6df64750bd 90 __IO uint32_t DOEPINT; /* dev OUT Endpoint Itr Reg B00h + (ep_num * 20h) + 08h*/
mbed_official 16:4f6df64750bd 91 uint32_t Reserved0C; /* Reserved B00h + (ep_num * 20h) + 0Ch*/
mbed_official 16:4f6df64750bd 92 __IO uint32_t DOEPTSIZ; /* dev OUT Endpoint Txfer Size B00h + (ep_num * 20h) + 10h*/
mbed_official 16:4f6df64750bd 93 uint32_t Reserved14[3];
mbed_official 16:4f6df64750bd 94 }
mbed_official 16:4f6df64750bd 95 USB_OTG_OUTEPREGS;
mbed_official 16:4f6df64750bd 96
mbed_official 16:4f6df64750bd 97 typedef struct
mbed_official 16:4f6df64750bd 98 {
mbed_official 16:4f6df64750bd 99 __IO uint32_t HCFG; /* Host Configuration Register 400h*/
mbed_official 16:4f6df64750bd 100 __IO uint32_t HFIR; /* Host Frame Interval Register 404h*/
mbed_official 16:4f6df64750bd 101 __IO uint32_t HFNUM; /* Host Frame Nbr/Frame Remaining 408h*/
mbed_official 16:4f6df64750bd 102 uint32_t Reserved40C; /* Reserved 40Ch*/
mbed_official 16:4f6df64750bd 103 __IO uint32_t HPTXSTS; /* Host Periodic Tx FIFO/ Queue Status 410h*/
mbed_official 16:4f6df64750bd 104 __IO uint32_t HAINT; /* Host All Channels Interrupt Register 414h*/
mbed_official 16:4f6df64750bd 105 __IO uint32_t HAINTMSK; /* Host All Channels Interrupt Mask 418h*/
mbed_official 16:4f6df64750bd 106 }
mbed_official 16:4f6df64750bd 107 USB_OTG_HREGS;
mbed_official 16:4f6df64750bd 108
mbed_official 16:4f6df64750bd 109 typedef struct
mbed_official 16:4f6df64750bd 110 {
mbed_official 16:4f6df64750bd 111 __IO uint32_t HCCHAR;
mbed_official 16:4f6df64750bd 112 __IO uint32_t HCSPLT;
mbed_official 16:4f6df64750bd 113 __IO uint32_t HCINT;
mbed_official 16:4f6df64750bd 114 __IO uint32_t HCINTMSK;
mbed_official 16:4f6df64750bd 115 __IO uint32_t HCTSIZ;
mbed_official 16:4f6df64750bd 116 uint32_t Reserved[3];
mbed_official 16:4f6df64750bd 117 }
mbed_official 16:4f6df64750bd 118 USB_OTG_HC_REGS;
mbed_official 16:4f6df64750bd 119
mbed_official 16:4f6df64750bd 120 typedef struct
mbed_official 16:4f6df64750bd 121 {
mbed_official 16:4f6df64750bd 122 USB_OTG_GREGS GREGS;
mbed_official 16:4f6df64750bd 123 uint32_t RESERVED0[188];
mbed_official 16:4f6df64750bd 124 USB_OTG_HREGS HREGS;
mbed_official 16:4f6df64750bd 125 uint32_t RESERVED1[9];
mbed_official 16:4f6df64750bd 126 __IO uint32_t HPRT;
mbed_official 16:4f6df64750bd 127 uint32_t RESERVED2[47];
mbed_official 16:4f6df64750bd 128 USB_OTG_HC_REGS HC_REGS[8];
mbed_official 16:4f6df64750bd 129 uint32_t RESERVED3[128];
mbed_official 16:4f6df64750bd 130 USB_OTG_DREGS DREGS;
mbed_official 16:4f6df64750bd 131 uint32_t RESERVED4[50];
mbed_official 16:4f6df64750bd 132 USB_OTG_INEPREGS INEP_REGS[4];
mbed_official 16:4f6df64750bd 133 uint32_t RESERVED5[96];
mbed_official 16:4f6df64750bd 134 USB_OTG_OUTEPREGS OUTEP_REGS[4];
mbed_official 16:4f6df64750bd 135 uint32_t RESERVED6[160];
mbed_official 16:4f6df64750bd 136 __IO uint32_t PCGCCTL;
mbed_official 16:4f6df64750bd 137 uint32_t RESERVED7[127];
mbed_official 16:4f6df64750bd 138 __IO uint32_t FIFO[4][1024];
mbed_official 16:4f6df64750bd 139 }
mbed_official 16:4f6df64750bd 140 USB_OTG_CORE_REGS;
mbed_official 16:4f6df64750bd 141
mbed_official 16:4f6df64750bd 142
mbed_official 16:4f6df64750bd 143 #define OTG_FS_BASE (AHB2PERIPH_BASE + 0x0000)
mbed_official 16:4f6df64750bd 144 #define OTG_FS ((USB_OTG_CORE_REGS *) OTG_FS_BASE)
mbed_official 16:4f6df64750bd 145
mbed_official 16:4f6df64750bd 146 #endif //__USB_OTG_REGS_H__
mbed_official 16:4f6df64750bd 147
mbed_official 16:4f6df64750bd 148 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
mbed_official 16:4f6df64750bd 149