Sigve Sebastian Farstad / mbed-src

mbed w/ spi bug fig

Dependents:   display-puck

Fork of mbed-src by mbed official

targets/cmsis/TARGET_STM/TARGET_NUCLEO_F072RB/stm32f0xx_hal_dma.c@205:c41fc65bcfb4, 2014-05-22 (annotated)

Committer:
mbed_official
Date:
Thu May 22 20:00:09 2014 +0100
Revision:
205:c41fc65bcfb4
Child:
218:44081b78fdc2
Synchronized with git revision ea4b6f76efab17a3f7d7777b0cc1ef05fec6d1cb



Full URL: https://github.com/mbedmicro/mbed/commit/ea4b6f76efab17a3f7d7777b0cc1ef05fec6d1cb/



[NUCLEO_F072RB] cmsis files

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 205:c41fc65bcfb4 1 /**
mbed_official 205:c41fc65bcfb4 2 ******************************************************************************
mbed_official 205:c41fc65bcfb4 3 * @file stm32f0xx_hal_dma.c
mbed_official 205:c41fc65bcfb4 4 * @author MCD Application Team
mbed_official 205:c41fc65bcfb4 5 * @version V1.0.0
mbed_official 205:c41fc65bcfb4 6 * @date 20-May-2014
mbed_official 205:c41fc65bcfb4 7 * @brief DMA HAL module driver.
mbed_official 205:c41fc65bcfb4 8 *
mbed_official 205:c41fc65bcfb4 9 * This file provides firmware functions to manage the following
mbed_official 205:c41fc65bcfb4 10 * functionalities of the Direct Memory Access (DMA) peripheral:
mbed_official 205:c41fc65bcfb4 11 * + Initialization and de-initialization functions
mbed_official 205:c41fc65bcfb4 12 * + IO operation functions
mbed_official 205:c41fc65bcfb4 13 * + Peripheral State and errors functions
mbed_official 205:c41fc65bcfb4 14 @verbatim
mbed_official 205:c41fc65bcfb4 15 ==============================================================================
mbed_official 205:c41fc65bcfb4 16 ##### How to use this driver #####
mbed_official 205:c41fc65bcfb4 17 ==============================================================================
mbed_official 205:c41fc65bcfb4 18 [..]
mbed_official 205:c41fc65bcfb4 19 (#) Enable and configure the peripheral to be connected to the DMA Channel
mbed_official 205:c41fc65bcfb4 20 (except for internal SRAM / FLASH memories: no initialization is
mbed_official 205:c41fc65bcfb4 21 necessary) please refer to Reference manual for connection between peripherals
mbed_official 205:c41fc65bcfb4 22 and DMA requests .
mbed_official 205:c41fc65bcfb4 23
mbed_official 205:c41fc65bcfb4 24 (#) For a given Channel, program the required configuration through the following parameters:
mbed_official 205:c41fc65bcfb4 25 Transfer Direction, Source and Destination data formats,
mbed_official 205:c41fc65bcfb4 26 Circular, Normal or peripheral flow control mode, Channel Priority level,
mbed_official 205:c41fc65bcfb4 27 Source and Destination Increment mode, FIFO mode and its Threshold (if needed),
mbed_official 205:c41fc65bcfb4 28 Burst mode for Source and/or Destination (if needed) using HAL_DMA_Init() function.
mbed_official 205:c41fc65bcfb4 29
mbed_official 205:c41fc65bcfb4 30 *** Polling mode IO operation ***
mbed_official 205:c41fc65bcfb4 31 =================================
mbed_official 205:c41fc65bcfb4 32 [..]
mbed_official 205:c41fc65bcfb4 33 (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source
mbed_official 205:c41fc65bcfb4 34 address and destination address and the Length of data to be transferred
mbed_official 205:c41fc65bcfb4 35 (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this
mbed_official 205:c41fc65bcfb4 36 case a fixed Timeout can be configured by User depending from his application.
mbed_official 205:c41fc65bcfb4 37
mbed_official 205:c41fc65bcfb4 38 *** Interrupt mode IO operation ***
mbed_official 205:c41fc65bcfb4 39 ===================================
mbed_official 205:c41fc65bcfb4 40 [..]
mbed_official 205:c41fc65bcfb4 41 (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
mbed_official 205:c41fc65bcfb4 42 (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()
mbed_official 205:c41fc65bcfb4 43 (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of
mbed_official 205:c41fc65bcfb4 44 Source address and destination address and the Length of data to be transferred. In this
mbed_official 205:c41fc65bcfb4 45 case the DMA interrupt is configured
mbed_official 205:c41fc65bcfb4 46 (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
mbed_official 205:c41fc65bcfb4 47 (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can
mbed_official 205:c41fc65bcfb4 48 add his own function by customization of function pointer XferCpltCallback and
mbed_official 205:c41fc65bcfb4 49 XferErrorCallback (i.e a member of DMA handle structure).
mbed_official 205:c41fc65bcfb4 50
mbed_official 205:c41fc65bcfb4 51 (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error
mbed_official 205:c41fc65bcfb4 52 detection.
mbed_official 205:c41fc65bcfb4 53
mbed_official 205:c41fc65bcfb4 54 (#) Use HAL_DMA_Abort() function to abort the current transfer
mbed_official 205:c41fc65bcfb4 55
mbed_official 205:c41fc65bcfb4 56 -@- In Memory-to-Memory transfer mode, Circular mode is not allowed.
mbed_official 205:c41fc65bcfb4 57
mbed_official 205:c41fc65bcfb4 58 *** DMA HAL driver macros list ***
mbed_official 205:c41fc65bcfb4 59 =============================================
mbed_official 205:c41fc65bcfb4 60 [..]
mbed_official 205:c41fc65bcfb4 61 Below the list of most used macros in DMA HAL driver.
mbed_official 205:c41fc65bcfb4 62
mbed_official 205:c41fc65bcfb4 63 (+) __HAL_DMA_ENABLE: Enable the specified DMA Channel.
mbed_official 205:c41fc65bcfb4 64 (+) __HAL_DMA_DISABLE: Disable the specified DMA Channel.
mbed_official 205:c41fc65bcfb4 65 (+) __HAL_DMA_GET_FLAG: Get the DMA Channel pending flags.
mbed_official 205:c41fc65bcfb4 66 (+) __HAL_DMA_CLEAR_FLAG: Clear the DMA Channel pending flags.
mbed_official 205:c41fc65bcfb4 67 (+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Channel interrupts.
mbed_official 205:c41fc65bcfb4 68 (+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Channel interrupts.
mbed_official 205:c41fc65bcfb4 69 (+) __HAL_DMA_IT_STATUS: Check whether the specified DMA Channel interrupt has occurred or not.
mbed_official 205:c41fc65bcfb4 70
mbed_official 205:c41fc65bcfb4 71 [..]
mbed_official 205:c41fc65bcfb4 72 (@) You can refer to the DMA HAL driver header file for more useful macros
mbed_official 205:c41fc65bcfb4 73
mbed_official 205:c41fc65bcfb4 74 @endverbatim
mbed_official 205:c41fc65bcfb4 75 ******************************************************************************
mbed_official 205:c41fc65bcfb4 76 * @attention
mbed_official 205:c41fc65bcfb4 77 *
mbed_official 205:c41fc65bcfb4 78 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 205:c41fc65bcfb4 79 *
mbed_official 205:c41fc65bcfb4 80 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 205:c41fc65bcfb4 81 * are permitted provided that the following conditions are met:
mbed_official 205:c41fc65bcfb4 82 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 205:c41fc65bcfb4 83 * this list of conditions and the following disclaimer.
mbed_official 205:c41fc65bcfb4 84 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 205:c41fc65bcfb4 85 * this list of conditions and the following disclaimer in the documentation
mbed_official 205:c41fc65bcfb4 86 * and/or other materials provided with the distribution.
mbed_official 205:c41fc65bcfb4 87 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 205:c41fc65bcfb4 88 * may be used to endorse or promote products derived from this software
mbed_official 205:c41fc65bcfb4 89 * without specific prior written permission.
mbed_official 205:c41fc65bcfb4 90 *
mbed_official 205:c41fc65bcfb4 91 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 205:c41fc65bcfb4 92 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 205:c41fc65bcfb4 93 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 205:c41fc65bcfb4 94 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 205:c41fc65bcfb4 95 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 205:c41fc65bcfb4 96 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 205:c41fc65bcfb4 97 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 205:c41fc65bcfb4 98 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 205:c41fc65bcfb4 99 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 205:c41fc65bcfb4 100 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 205:c41fc65bcfb4 101 *
mbed_official 205:c41fc65bcfb4 102 ******************************************************************************
mbed_official 205:c41fc65bcfb4 103 */
mbed_official 205:c41fc65bcfb4 104
mbed_official 205:c41fc65bcfb4 105 /* Includes ------------------------------------------------------------------*/
mbed_official 205:c41fc65bcfb4 106 #include "stm32f0xx_hal.h"
mbed_official 205:c41fc65bcfb4 107
mbed_official 205:c41fc65bcfb4 108 /** @addtogroup STM32F0xx_HAL_Driver
mbed_official 205:c41fc65bcfb4 109 * @{
mbed_official 205:c41fc65bcfb4 110 */
mbed_official 205:c41fc65bcfb4 111
mbed_official 205:c41fc65bcfb4 112 /** @defgroup DMA
mbed_official 205:c41fc65bcfb4 113 * @brief DMA HAL module driver
mbed_official 205:c41fc65bcfb4 114 * @{
mbed_official 205:c41fc65bcfb4 115 */
mbed_official 205:c41fc65bcfb4 116
mbed_official 205:c41fc65bcfb4 117 #ifdef HAL_DMA_MODULE_ENABLED
mbed_official 205:c41fc65bcfb4 118
mbed_official 205:c41fc65bcfb4 119 /* Private typedef -----------------------------------------------------------*/
mbed_official 205:c41fc65bcfb4 120 /* Private define ------------------------------------------------------------*/
mbed_official 205:c41fc65bcfb4 121 #define HAL_TIMEOUT_DMA_ABORT ((uint32_t)1000) /* 1s */
mbed_official 205:c41fc65bcfb4 122 /* Private macro -------------------------------------------------------------*/
mbed_official 205:c41fc65bcfb4 123 /* Private variables ---------------------------------------------------------*/
mbed_official 205:c41fc65bcfb4 124 /* Private function prototypes -----------------------------------------------*/
mbed_official 205:c41fc65bcfb4 125 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
mbed_official 205:c41fc65bcfb4 126
mbed_official 205:c41fc65bcfb4 127 /* Private functions ---------------------------------------------------------*/
mbed_official 205:c41fc65bcfb4 128
mbed_official 205:c41fc65bcfb4 129 /** @defgroup DMA_Private_Functions
mbed_official 205:c41fc65bcfb4 130 * @{
mbed_official 205:c41fc65bcfb4 131 */
mbed_official 205:c41fc65bcfb4 132
mbed_official 205:c41fc65bcfb4 133 /** @defgroup DMA_Group1 Initialization and de-initialization functions
mbed_official 205:c41fc65bcfb4 134 * @brief Initialization and de-initialization functions
mbed_official 205:c41fc65bcfb4 135 *
mbed_official 205:c41fc65bcfb4 136 @verbatim
mbed_official 205:c41fc65bcfb4 137 ===============================================================================
mbed_official 205:c41fc65bcfb4 138 ##### Initialization and de-initialization functions #####
mbed_official 205:c41fc65bcfb4 139 ===============================================================================
mbed_official 205:c41fc65bcfb4 140 [..]
mbed_official 205:c41fc65bcfb4 141 This section provides functions allowing to initialize the DMA Channel source
mbed_official 205:c41fc65bcfb4 142 and destination addresses, incrementation and data sizes, transfer direction,
mbed_official 205:c41fc65bcfb4 143 circular/normal mode selection, memory-to-memory mode selection and Channel priority value.
mbed_official 205:c41fc65bcfb4 144 [..]
mbed_official 205:c41fc65bcfb4 145 The HAL_DMA_Init() function follows the DMA configuration procedures as described in
mbed_official 205:c41fc65bcfb4 146 reference manual.
mbed_official 205:c41fc65bcfb4 147
mbed_official 205:c41fc65bcfb4 148 @endverbatim
mbed_official 205:c41fc65bcfb4 149 * @{
mbed_official 205:c41fc65bcfb4 150 */
mbed_official 205:c41fc65bcfb4 151
mbed_official 205:c41fc65bcfb4 152 /**
mbed_official 205:c41fc65bcfb4 153 * @brief Initializes the DMA according to the specified
mbed_official 205:c41fc65bcfb4 154 * parameters in the DMA_InitTypeDef and create the associated handle.
mbed_official 205:c41fc65bcfb4 155 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
mbed_official 205:c41fc65bcfb4 156 * the configuration information for the specified DMA Channel.
mbed_official 205:c41fc65bcfb4 157 * @retval HAL status
mbed_official 205:c41fc65bcfb4 158 */
mbed_official 205:c41fc65bcfb4 159 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
mbed_official 205:c41fc65bcfb4 160 {
mbed_official 205:c41fc65bcfb4 161 uint32_t tmp = 0;
mbed_official 205:c41fc65bcfb4 162
mbed_official 205:c41fc65bcfb4 163 /* Check the DMA peripheral state */
mbed_official 205:c41fc65bcfb4 164 if(hdma == NULL)
mbed_official 205:c41fc65bcfb4 165 {
mbed_official 205:c41fc65bcfb4 166 return HAL_ERROR;
mbed_official 205:c41fc65bcfb4 167 }
mbed_official 205:c41fc65bcfb4 168
mbed_official 205:c41fc65bcfb4 169 /* Check the parameters */
mbed_official 205:c41fc65bcfb4 170 assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
mbed_official 205:c41fc65bcfb4 171 assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
mbed_official 205:c41fc65bcfb4 172 assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
mbed_official 205:c41fc65bcfb4 173 assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
mbed_official 205:c41fc65bcfb4 174 assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
mbed_official 205:c41fc65bcfb4 175 assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
mbed_official 205:c41fc65bcfb4 176 assert_param(IS_DMA_MODE(hdma->Init.Mode));
mbed_official 205:c41fc65bcfb4 177 assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
mbed_official 205:c41fc65bcfb4 178
mbed_official 205:c41fc65bcfb4 179 /* Change DMA peripheral state */
mbed_official 205:c41fc65bcfb4 180 hdma->State = HAL_DMA_STATE_BUSY;
mbed_official 205:c41fc65bcfb4 181
mbed_official 205:c41fc65bcfb4 182 /* Get the CR register value */
mbed_official 205:c41fc65bcfb4 183 tmp = hdma->Instance->CCR;
mbed_official 205:c41fc65bcfb4 184
mbed_official 205:c41fc65bcfb4 185 /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */
mbed_official 205:c41fc65bcfb4 186 tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \
mbed_official 205:c41fc65bcfb4 187 DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \
mbed_official 205:c41fc65bcfb4 188 DMA_CCR_DIR));
mbed_official 205:c41fc65bcfb4 189
mbed_official 205:c41fc65bcfb4 190 /* Prepare the DMA Channel configuration */
mbed_official 205:c41fc65bcfb4 191 tmp |= hdma->Init.Direction |
mbed_official 205:c41fc65bcfb4 192 hdma->Init.PeriphInc | hdma->Init.MemInc |
mbed_official 205:c41fc65bcfb4 193 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
mbed_official 205:c41fc65bcfb4 194 hdma->Init.Mode | hdma->Init.Priority;
mbed_official 205:c41fc65bcfb4 195
mbed_official 205:c41fc65bcfb4 196 /* Write to DMA Channel CR register */
mbed_official 205:c41fc65bcfb4 197 hdma->Instance->CCR = tmp;
mbed_official 205:c41fc65bcfb4 198
mbed_official 205:c41fc65bcfb4 199 /* Initialise the error code */
mbed_official 205:c41fc65bcfb4 200 hdma->ErrorCode = HAL_DMA_ERROR_NONE;
mbed_official 205:c41fc65bcfb4 201
mbed_official 205:c41fc65bcfb4 202 /* Initialize the DMA state*/
mbed_official 205:c41fc65bcfb4 203 hdma->State = HAL_DMA_STATE_READY;
mbed_official 205:c41fc65bcfb4 204
mbed_official 205:c41fc65bcfb4 205 return HAL_OK;
mbed_official 205:c41fc65bcfb4 206 }
mbed_official 205:c41fc65bcfb4 207
mbed_official 205:c41fc65bcfb4 208 /**
mbed_official 205:c41fc65bcfb4 209 * @brief DeInitializes the DMA peripheral
mbed_official 205:c41fc65bcfb4 210 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 205:c41fc65bcfb4 211 * the configuration information for the specified DMA Channel.
mbed_official 205:c41fc65bcfb4 212 * @retval HAL status
mbed_official 205:c41fc65bcfb4 213 */
mbed_official 205:c41fc65bcfb4 214 HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
mbed_official 205:c41fc65bcfb4 215 {
mbed_official 205:c41fc65bcfb4 216 /* Check the DMA peripheral state */
mbed_official 205:c41fc65bcfb4 217 if(hdma == NULL)
mbed_official 205:c41fc65bcfb4 218 {
mbed_official 205:c41fc65bcfb4 219 return HAL_ERROR;
mbed_official 205:c41fc65bcfb4 220 }
mbed_official 205:c41fc65bcfb4 221
mbed_official 205:c41fc65bcfb4 222 /* Check the DMA peripheral state */
mbed_official 205:c41fc65bcfb4 223 if(hdma->State == HAL_DMA_STATE_BUSY)
mbed_official 205:c41fc65bcfb4 224 {
mbed_official 205:c41fc65bcfb4 225 return HAL_ERROR;
mbed_official 205:c41fc65bcfb4 226 }
mbed_official 205:c41fc65bcfb4 227
mbed_official 205:c41fc65bcfb4 228 /* Disable the selected DMA Channelx */
mbed_official 205:c41fc65bcfb4 229 __HAL_DMA_DISABLE(hdma);
mbed_official 205:c41fc65bcfb4 230
mbed_official 205:c41fc65bcfb4 231 /* Reset DMA Channel control register */
mbed_official 205:c41fc65bcfb4 232 hdma->Instance->CCR = 0;
mbed_official 205:c41fc65bcfb4 233
mbed_official 205:c41fc65bcfb4 234 /* Reset DMA Channel Number of Data to Transfer register */
mbed_official 205:c41fc65bcfb4 235 hdma->Instance->CNDTR = 0;
mbed_official 205:c41fc65bcfb4 236
mbed_official 205:c41fc65bcfb4 237 /* Reset DMA Channel peripheral address register */
mbed_official 205:c41fc65bcfb4 238 hdma->Instance->CPAR = 0;
mbed_official 205:c41fc65bcfb4 239
mbed_official 205:c41fc65bcfb4 240 /* Reset DMA Channel memory address register */
mbed_official 205:c41fc65bcfb4 241 hdma->Instance->CMAR = 0;
mbed_official 205:c41fc65bcfb4 242
mbed_official 205:c41fc65bcfb4 243 /* Clear all flags */
mbed_official 205:c41fc65bcfb4 244 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
mbed_official 205:c41fc65bcfb4 245 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
mbed_official 205:c41fc65bcfb4 246 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 205:c41fc65bcfb4 247
mbed_official 205:c41fc65bcfb4 248 /* Initialise the error code */
mbed_official 205:c41fc65bcfb4 249 hdma->ErrorCode = HAL_DMA_ERROR_NONE;
mbed_official 205:c41fc65bcfb4 250
mbed_official 205:c41fc65bcfb4 251 /* Initialize the DMA state */
mbed_official 205:c41fc65bcfb4 252 hdma->State = HAL_DMA_STATE_RESET;
mbed_official 205:c41fc65bcfb4 253
mbed_official 205:c41fc65bcfb4 254 /* Release Lock */
mbed_official 205:c41fc65bcfb4 255 __HAL_UNLOCK(hdma);
mbed_official 205:c41fc65bcfb4 256
mbed_official 205:c41fc65bcfb4 257 return HAL_OK;
mbed_official 205:c41fc65bcfb4 258 }
mbed_official 205:c41fc65bcfb4 259
mbed_official 205:c41fc65bcfb4 260 /**
mbed_official 205:c41fc65bcfb4 261 * @}
mbed_official 205:c41fc65bcfb4 262 */
mbed_official 205:c41fc65bcfb4 263
mbed_official 205:c41fc65bcfb4 264 /** @defgroup DMA_Group2 I/O operation functions
mbed_official 205:c41fc65bcfb4 265 * @brief I/O operation functions
mbed_official 205:c41fc65bcfb4 266 *
mbed_official 205:c41fc65bcfb4 267 @verbatim
mbed_official 205:c41fc65bcfb4 268 ===============================================================================
mbed_official 205:c41fc65bcfb4 269 ##### IO operation functions #####
mbed_official 205:c41fc65bcfb4 270 ===============================================================================
mbed_official 205:c41fc65bcfb4 271 [..] This section provides functions allowing to:
mbed_official 205:c41fc65bcfb4 272 (+) Configure the source, destination address and data length and Start DMA transfer
mbed_official 205:c41fc65bcfb4 273 (+) Configure the source, destination address and data length and
mbed_official 205:c41fc65bcfb4 274 Start DMA transfer with interrupt
mbed_official 205:c41fc65bcfb4 275 (+) Abort DMA transfer
mbed_official 205:c41fc65bcfb4 276 (+) Poll for transfer complete
mbed_official 205:c41fc65bcfb4 277 (+) Handle DMA interrupt request
mbed_official 205:c41fc65bcfb4 278
mbed_official 205:c41fc65bcfb4 279 @endverbatim
mbed_official 205:c41fc65bcfb4 280 * @{
mbed_official 205:c41fc65bcfb4 281 */
mbed_official 205:c41fc65bcfb4 282
mbed_official 205:c41fc65bcfb4 283 /**
mbed_official 205:c41fc65bcfb4 284 * @brief Starts the DMA Transfer.
mbed_official 205:c41fc65bcfb4 285 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
mbed_official 205:c41fc65bcfb4 286 * the configuration information for the specified DMA Channel.
mbed_official 205:c41fc65bcfb4 287 * @param SrcAddress: The source memory Buffer address
mbed_official 205:c41fc65bcfb4 288 * @param DstAddress: The destination memory Buffer address
mbed_official 205:c41fc65bcfb4 289 * @param DataLength: The length of data to be transferred from source to destination
mbed_official 205:c41fc65bcfb4 290 * @retval HAL status
mbed_official 205:c41fc65bcfb4 291 */
mbed_official 205:c41fc65bcfb4 292 HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
mbed_official 205:c41fc65bcfb4 293 {
mbed_official 205:c41fc65bcfb4 294 /* Process locked */
mbed_official 205:c41fc65bcfb4 295 __HAL_LOCK(hdma);
mbed_official 205:c41fc65bcfb4 296
mbed_official 205:c41fc65bcfb4 297 /* Change DMA peripheral state */
mbed_official 205:c41fc65bcfb4 298 hdma->State = HAL_DMA_STATE_BUSY;
mbed_official 205:c41fc65bcfb4 299
mbed_official 205:c41fc65bcfb4 300 /* Check the parameters */
mbed_official 205:c41fc65bcfb4 301 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
mbed_official 205:c41fc65bcfb4 302
mbed_official 205:c41fc65bcfb4 303 /* Disable the peripheral */
mbed_official 205:c41fc65bcfb4 304 __HAL_DMA_DISABLE(hdma);
mbed_official 205:c41fc65bcfb4 305
mbed_official 205:c41fc65bcfb4 306 /* Configure the source, destination address and the data length */
mbed_official 205:c41fc65bcfb4 307 DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
mbed_official 205:c41fc65bcfb4 308
mbed_official 205:c41fc65bcfb4 309 /* Enable the Peripheral */
mbed_official 205:c41fc65bcfb4 310 __HAL_DMA_ENABLE(hdma);
mbed_official 205:c41fc65bcfb4 311
mbed_official 205:c41fc65bcfb4 312 return HAL_OK;
mbed_official 205:c41fc65bcfb4 313 }
mbed_official 205:c41fc65bcfb4 314
mbed_official 205:c41fc65bcfb4 315 /**
mbed_official 205:c41fc65bcfb4 316 * @brief Start the DMA Transfer with interrupt enabled.
mbed_official 205:c41fc65bcfb4 317 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 205:c41fc65bcfb4 318 * the configuration information for the specified DMA Channel.
mbed_official 205:c41fc65bcfb4 319 * @param SrcAddress: The source memory Buffer address
mbed_official 205:c41fc65bcfb4 320 * @param DstAddress: The destination memory Buffer address
mbed_official 205:c41fc65bcfb4 321 * @param DataLength: The length of data to be transferred from source to destination
mbed_official 205:c41fc65bcfb4 322 * @retval HAL status
mbed_official 205:c41fc65bcfb4 323 */
mbed_official 205:c41fc65bcfb4 324 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
mbed_official 205:c41fc65bcfb4 325 {
mbed_official 205:c41fc65bcfb4 326 /* Process locked */
mbed_official 205:c41fc65bcfb4 327 __HAL_LOCK(hdma);
mbed_official 205:c41fc65bcfb4 328
mbed_official 205:c41fc65bcfb4 329 /* Change DMA peripheral state */
mbed_official 205:c41fc65bcfb4 330 hdma->State = HAL_DMA_STATE_BUSY;
mbed_official 205:c41fc65bcfb4 331
mbed_official 205:c41fc65bcfb4 332 /* Check the parameters */
mbed_official 205:c41fc65bcfb4 333 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
mbed_official 205:c41fc65bcfb4 334
mbed_official 205:c41fc65bcfb4 335 /* Disable the peripheral */
mbed_official 205:c41fc65bcfb4 336 __HAL_DMA_DISABLE(hdma);
mbed_official 205:c41fc65bcfb4 337
mbed_official 205:c41fc65bcfb4 338 /* Configure the source, destination address and the data length */
mbed_official 205:c41fc65bcfb4 339 DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
mbed_official 205:c41fc65bcfb4 340
mbed_official 205:c41fc65bcfb4 341 /* Enable the transfer complete interrupt */
mbed_official 205:c41fc65bcfb4 342 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TC);
mbed_official 205:c41fc65bcfb4 343
mbed_official 205:c41fc65bcfb4 344 /* Enable the Half transfer complete interrupt */
mbed_official 205:c41fc65bcfb4 345 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_HT);
mbed_official 205:c41fc65bcfb4 346
mbed_official 205:c41fc65bcfb4 347 /* Enable the transfer Error interrupt */
mbed_official 205:c41fc65bcfb4 348 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TE);
mbed_official 205:c41fc65bcfb4 349
mbed_official 205:c41fc65bcfb4 350 /* Enable the Peripheral */
mbed_official 205:c41fc65bcfb4 351 __HAL_DMA_ENABLE(hdma);
mbed_official 205:c41fc65bcfb4 352
mbed_official 205:c41fc65bcfb4 353 return HAL_OK;
mbed_official 205:c41fc65bcfb4 354 }
mbed_official 205:c41fc65bcfb4 355
mbed_official 205:c41fc65bcfb4 356 /**
mbed_official 205:c41fc65bcfb4 357 * @brief Aborts the DMA Transfer.
mbed_official 205:c41fc65bcfb4 358 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
mbed_official 205:c41fc65bcfb4 359 * the configuration information for the specified DMA Channel.
mbed_official 205:c41fc65bcfb4 360 *
mbed_official 205:c41fc65bcfb4 361 * @note After disabling a DMA Channel, a check for wait until the DMA Channel is
mbed_official 205:c41fc65bcfb4 362 * effectively disabled is added. If a Channel is disabled
mbed_official 205:c41fc65bcfb4 363 * while a data transfer is ongoing, the current data will be transferred
mbed_official 205:c41fc65bcfb4 364 * and the Channel will be effectively disabled only after the transfer of
mbed_official 205:c41fc65bcfb4 365 * this single data is finished.
mbed_official 205:c41fc65bcfb4 366 * @retval HAL status
mbed_official 205:c41fc65bcfb4 367 */
mbed_official 205:c41fc65bcfb4 368 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
mbed_official 205:c41fc65bcfb4 369 {
mbed_official 205:c41fc65bcfb4 370 uint32_t tickstart = 0x00;
mbed_official 205:c41fc65bcfb4 371
mbed_official 205:c41fc65bcfb4 372 /* Disable the channel */
mbed_official 205:c41fc65bcfb4 373 __HAL_DMA_DISABLE(hdma);
mbed_official 205:c41fc65bcfb4 374
mbed_official 205:c41fc65bcfb4 375 /* Get timeout */
mbed_official 205:c41fc65bcfb4 376 tickstart = HAL_GetTick();
mbed_official 205:c41fc65bcfb4 377
mbed_official 205:c41fc65bcfb4 378 /* Check if the DMA Channel is effectively disabled */
mbed_official 205:c41fc65bcfb4 379 while((hdma->Instance->CCR & DMA_CCR_EN) != 0)
mbed_official 205:c41fc65bcfb4 380 {
mbed_official 205:c41fc65bcfb4 381 /* Check for the Timeout */
mbed_official 205:c41fc65bcfb4 382 if((HAL_GetTick() - tickstart) > HAL_TIMEOUT_DMA_ABORT)
mbed_official 205:c41fc65bcfb4 383 {
mbed_official 205:c41fc65bcfb4 384 /* Update error code */
mbed_official 205:c41fc65bcfb4 385 hdma->ErrorCode |= HAL_DMA_ERROR_TIMEOUT;
mbed_official 205:c41fc65bcfb4 386
mbed_official 205:c41fc65bcfb4 387 /* Process Unlocked */
mbed_official 205:c41fc65bcfb4 388 __HAL_UNLOCK(hdma);
mbed_official 205:c41fc65bcfb4 389
mbed_official 205:c41fc65bcfb4 390 /* Change the DMA state */
mbed_official 205:c41fc65bcfb4 391 hdma->State = HAL_DMA_STATE_TIMEOUT;
mbed_official 205:c41fc65bcfb4 392
mbed_official 205:c41fc65bcfb4 393 return HAL_TIMEOUT;
mbed_official 205:c41fc65bcfb4 394 }
mbed_official 205:c41fc65bcfb4 395 }
mbed_official 205:c41fc65bcfb4 396 /* Process Unlocked */
mbed_official 205:c41fc65bcfb4 397 __HAL_UNLOCK(hdma);
mbed_official 205:c41fc65bcfb4 398
mbed_official 205:c41fc65bcfb4 399 /* Change the DMA state*/
mbed_official 205:c41fc65bcfb4 400 hdma->State = HAL_DMA_STATE_READY;
mbed_official 205:c41fc65bcfb4 401
mbed_official 205:c41fc65bcfb4 402 return HAL_OK;
mbed_official 205:c41fc65bcfb4 403 }
mbed_official 205:c41fc65bcfb4 404
mbed_official 205:c41fc65bcfb4 405 /**
mbed_official 205:c41fc65bcfb4 406 * @brief Polling for transfer complete.
mbed_official 205:c41fc65bcfb4 407 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 205:c41fc65bcfb4 408 * the configuration information for the specified DMA Channel.
mbed_official 205:c41fc65bcfb4 409 * @param CompleteLevel: Specifies the DMA level complete.
mbed_official 205:c41fc65bcfb4 410 * @param Timeout: Timeout duration.
mbed_official 205:c41fc65bcfb4 411 * @retval HAL status
mbed_official 205:c41fc65bcfb4 412 */
mbed_official 205:c41fc65bcfb4 413 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout)
mbed_official 205:c41fc65bcfb4 414 {
mbed_official 205:c41fc65bcfb4 415 uint32_t temp;
mbed_official 205:c41fc65bcfb4 416 uint32_t tickstart = 0x00;
mbed_official 205:c41fc65bcfb4 417
mbed_official 205:c41fc65bcfb4 418 /* Get the level transfer complete flag */
mbed_official 205:c41fc65bcfb4 419 if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
mbed_official 205:c41fc65bcfb4 420 {
mbed_official 205:c41fc65bcfb4 421 /* Transfer Complete flag */
mbed_official 205:c41fc65bcfb4 422 temp = __HAL_DMA_GET_TC_FLAG_INDEX(hdma);
mbed_official 205:c41fc65bcfb4 423 }
mbed_official 205:c41fc65bcfb4 424 else
mbed_official 205:c41fc65bcfb4 425 {
mbed_official 205:c41fc65bcfb4 426 /* Half Transfer Complete flag */
mbed_official 205:c41fc65bcfb4 427 temp = __HAL_DMA_GET_HT_FLAG_INDEX(hdma);
mbed_official 205:c41fc65bcfb4 428 }
mbed_official 205:c41fc65bcfb4 429
mbed_official 205:c41fc65bcfb4 430 /* Get timeout */
mbed_official 205:c41fc65bcfb4 431 tickstart = HAL_GetTick();
mbed_official 205:c41fc65bcfb4 432
mbed_official 205:c41fc65bcfb4 433 while(__HAL_DMA_GET_FLAG(hdma, temp) == RESET)
mbed_official 205:c41fc65bcfb4 434 {
mbed_official 205:c41fc65bcfb4 435 if((__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET))
mbed_official 205:c41fc65bcfb4 436 {
mbed_official 205:c41fc65bcfb4 437 /* Clear the transfer error flags */
mbed_official 205:c41fc65bcfb4 438 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
mbed_official 205:c41fc65bcfb4 439
mbed_official 205:c41fc65bcfb4 440 /* Change the DMA state */
mbed_official 205:c41fc65bcfb4 441 hdma->State= HAL_DMA_STATE_ERROR;
mbed_official 205:c41fc65bcfb4 442
mbed_official 205:c41fc65bcfb4 443 /* Process Unlocked */
mbed_official 205:c41fc65bcfb4 444 __HAL_UNLOCK(hdma);
mbed_official 205:c41fc65bcfb4 445
mbed_official 205:c41fc65bcfb4 446 return HAL_ERROR;
mbed_official 205:c41fc65bcfb4 447 }
mbed_official 205:c41fc65bcfb4 448 /* Check for the Timeout */
mbed_official 205:c41fc65bcfb4 449 if(Timeout != HAL_MAX_DELAY)
mbed_official 205:c41fc65bcfb4 450 {
mbed_official 205:c41fc65bcfb4 451 if((HAL_GetTick() - tickstart) > Timeout)
mbed_official 205:c41fc65bcfb4 452 {
mbed_official 205:c41fc65bcfb4 453 /* Update error code */
mbed_official 205:c41fc65bcfb4 454 hdma->ErrorCode |= HAL_DMA_ERROR_TIMEOUT;
mbed_official 205:c41fc65bcfb4 455
mbed_official 205:c41fc65bcfb4 456 /* Process Unlocked */
mbed_official 205:c41fc65bcfb4 457 __HAL_UNLOCK(hdma);
mbed_official 205:c41fc65bcfb4 458
mbed_official 205:c41fc65bcfb4 459 /* Change the DMA state */
mbed_official 205:c41fc65bcfb4 460 hdma->State = HAL_DMA_STATE_TIMEOUT;
mbed_official 205:c41fc65bcfb4 461
mbed_official 205:c41fc65bcfb4 462 return HAL_TIMEOUT;
mbed_official 205:c41fc65bcfb4 463 }
mbed_official 205:c41fc65bcfb4 464 }
mbed_official 205:c41fc65bcfb4 465 }
mbed_official 205:c41fc65bcfb4 466 /* Clear the half transfer complete flag */
mbed_official 205:c41fc65bcfb4 467 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 205:c41fc65bcfb4 468
mbed_official 205:c41fc65bcfb4 469 /* Change DMA peripheral state */
mbed_official 205:c41fc65bcfb4 470 hdma->State = HAL_DMA_STATE_READY_HALF;
mbed_official 205:c41fc65bcfb4 471
mbed_official 205:c41fc65bcfb4 472 if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
mbed_official 205:c41fc65bcfb4 473 {
mbed_official 205:c41fc65bcfb4 474 /* Clear the transfer complete flag */
mbed_official 205:c41fc65bcfb4 475 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
mbed_official 205:c41fc65bcfb4 476
mbed_official 205:c41fc65bcfb4 477 /* The selected Channelx EN bit is cleared (DMA is disabled and
mbed_official 205:c41fc65bcfb4 478 all transfers are complete) */
mbed_official 205:c41fc65bcfb4 479 hdma->State = HAL_DMA_STATE_READY;
mbed_official 205:c41fc65bcfb4 480
mbed_official 205:c41fc65bcfb4 481 /* Process unlocked */
mbed_official 205:c41fc65bcfb4 482 __HAL_UNLOCK(hdma);
mbed_official 205:c41fc65bcfb4 483 }
mbed_official 205:c41fc65bcfb4 484 else
mbed_official 205:c41fc65bcfb4 485 {
mbed_official 205:c41fc65bcfb4 486 /* Clear the half transfer complete flag */
mbed_official 205:c41fc65bcfb4 487 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 205:c41fc65bcfb4 488
mbed_official 205:c41fc65bcfb4 489 /* The selected Channelx EN bit is cleared (DMA is disabled and
mbed_official 205:c41fc65bcfb4 490 all transfers are complete) */
mbed_official 205:c41fc65bcfb4 491 hdma->State = HAL_DMA_STATE_READY_HALF;
mbed_official 205:c41fc65bcfb4 492 }
mbed_official 205:c41fc65bcfb4 493
mbed_official 205:c41fc65bcfb4 494 return HAL_OK;
mbed_official 205:c41fc65bcfb4 495 }
mbed_official 205:c41fc65bcfb4 496
mbed_official 205:c41fc65bcfb4 497 /**
mbed_official 205:c41fc65bcfb4 498 * @brief Handles DMA interrupt request.
mbed_official 205:c41fc65bcfb4 499 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 205:c41fc65bcfb4 500 * the configuration information for the specified DMA Channel.
mbed_official 205:c41fc65bcfb4 501 * @retval None
mbed_official 205:c41fc65bcfb4 502 */
mbed_official 205:c41fc65bcfb4 503 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
mbed_official 205:c41fc65bcfb4 504 {
mbed_official 205:c41fc65bcfb4 505 /* Transfer Error Interrupt management ***************************************/
mbed_official 205:c41fc65bcfb4 506 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET)
mbed_official 205:c41fc65bcfb4 507 {
mbed_official 205:c41fc65bcfb4 508 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != RESET)
mbed_official 205:c41fc65bcfb4 509 {
mbed_official 205:c41fc65bcfb4 510 /* Disable the transfer error interrupt */
mbed_official 205:c41fc65bcfb4 511 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE);
mbed_official 205:c41fc65bcfb4 512
mbed_official 205:c41fc65bcfb4 513 /* Clear the transfer error flag */
mbed_official 205:c41fc65bcfb4 514 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
mbed_official 205:c41fc65bcfb4 515
mbed_official 205:c41fc65bcfb4 516 /* Update error code */
mbed_official 205:c41fc65bcfb4 517 hdma->ErrorCode |= HAL_DMA_ERROR_TE;
mbed_official 205:c41fc65bcfb4 518
mbed_official 205:c41fc65bcfb4 519 /* Change the DMA state */
mbed_official 205:c41fc65bcfb4 520 hdma->State = HAL_DMA_STATE_ERROR;
mbed_official 205:c41fc65bcfb4 521
mbed_official 205:c41fc65bcfb4 522 /* Process Unlocked */
mbed_official 205:c41fc65bcfb4 523 __HAL_UNLOCK(hdma);
mbed_official 205:c41fc65bcfb4 524
mbed_official 205:c41fc65bcfb4 525 if (hdma->XferErrorCallback != NULL)
mbed_official 205:c41fc65bcfb4 526 {
mbed_official 205:c41fc65bcfb4 527 /* Transfer error callback */
mbed_official 205:c41fc65bcfb4 528 hdma->XferErrorCallback(hdma);
mbed_official 205:c41fc65bcfb4 529 }
mbed_official 205:c41fc65bcfb4 530 }
mbed_official 205:c41fc65bcfb4 531 }
mbed_official 205:c41fc65bcfb4 532
mbed_official 205:c41fc65bcfb4 533 /* Half Transfer Complete Interrupt management ******************************/
mbed_official 205:c41fc65bcfb4 534 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)) != RESET)
mbed_official 205:c41fc65bcfb4 535 {
mbed_official 205:c41fc65bcfb4 536 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != RESET)
mbed_official 205:c41fc65bcfb4 537 {
mbed_official 205:c41fc65bcfb4 538 /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
mbed_official 205:c41fc65bcfb4 539 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
mbed_official 205:c41fc65bcfb4 540 {
mbed_official 205:c41fc65bcfb4 541 /* Disable the half transfer interrupt */
mbed_official 205:c41fc65bcfb4 542 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
mbed_official 205:c41fc65bcfb4 543 }
mbed_official 205:c41fc65bcfb4 544 /* Clear the half transfer complete flag */
mbed_official 205:c41fc65bcfb4 545 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 205:c41fc65bcfb4 546
mbed_official 205:c41fc65bcfb4 547 /* Change DMA peripheral state */
mbed_official 205:c41fc65bcfb4 548 hdma->State = HAL_DMA_STATE_READY_HALF;
mbed_official 205:c41fc65bcfb4 549
mbed_official 205:c41fc65bcfb4 550 if(hdma->XferHalfCpltCallback != NULL)
mbed_official 205:c41fc65bcfb4 551 {
mbed_official 205:c41fc65bcfb4 552 /* Half transfer callback */
mbed_official 205:c41fc65bcfb4 553 hdma->XferHalfCpltCallback(hdma);
mbed_official 205:c41fc65bcfb4 554 }
mbed_official 205:c41fc65bcfb4 555 }
mbed_official 205:c41fc65bcfb4 556 }
mbed_official 205:c41fc65bcfb4 557
mbed_official 205:c41fc65bcfb4 558 /* Transfer Complete Interrupt management ***********************************/
mbed_official 205:c41fc65bcfb4 559 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)) != RESET)
mbed_official 205:c41fc65bcfb4 560 {
mbed_official 205:c41fc65bcfb4 561 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != RESET)
mbed_official 205:c41fc65bcfb4 562 {
mbed_official 205:c41fc65bcfb4 563 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
mbed_official 205:c41fc65bcfb4 564 {
mbed_official 205:c41fc65bcfb4 565 /* Disable the transfer complete interrupt */
mbed_official 205:c41fc65bcfb4 566 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TC);
mbed_official 205:c41fc65bcfb4 567 }
mbed_official 205:c41fc65bcfb4 568 /* Clear the transfer complete flag */
mbed_official 205:c41fc65bcfb4 569 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
mbed_official 205:c41fc65bcfb4 570
mbed_official 205:c41fc65bcfb4 571 /* Update error code */
mbed_official 205:c41fc65bcfb4 572 hdma->ErrorCode |= HAL_DMA_ERROR_NONE;
mbed_official 205:c41fc65bcfb4 573
mbed_official 205:c41fc65bcfb4 574 /* Change the DMA state */
mbed_official 205:c41fc65bcfb4 575 hdma->State = HAL_DMA_STATE_READY;
mbed_official 205:c41fc65bcfb4 576
mbed_official 205:c41fc65bcfb4 577 /* Process Unlocked */
mbed_official 205:c41fc65bcfb4 578 __HAL_UNLOCK(hdma);
mbed_official 205:c41fc65bcfb4 579
mbed_official 205:c41fc65bcfb4 580 if(hdma->XferCpltCallback != NULL)
mbed_official 205:c41fc65bcfb4 581 {
mbed_official 205:c41fc65bcfb4 582 /* Transfer complete callback */
mbed_official 205:c41fc65bcfb4 583 hdma->XferCpltCallback(hdma);
mbed_official 205:c41fc65bcfb4 584 }
mbed_official 205:c41fc65bcfb4 585 }
mbed_official 205:c41fc65bcfb4 586 }
mbed_official 205:c41fc65bcfb4 587 }
mbed_official 205:c41fc65bcfb4 588
mbed_official 205:c41fc65bcfb4 589 /**
mbed_official 205:c41fc65bcfb4 590 * @}
mbed_official 205:c41fc65bcfb4 591 */
mbed_official 205:c41fc65bcfb4 592
mbed_official 205:c41fc65bcfb4 593 /** @defgroup DMA_Group3 Peripheral State functions
mbed_official 205:c41fc65bcfb4 594 * @brief Peripheral State functions
mbed_official 205:c41fc65bcfb4 595 *
mbed_official 205:c41fc65bcfb4 596 @verbatim
mbed_official 205:c41fc65bcfb4 597 ===============================================================================
mbed_official 205:c41fc65bcfb4 598 ##### State and Errors functions #####
mbed_official 205:c41fc65bcfb4 599 ===============================================================================
mbed_official 205:c41fc65bcfb4 600 [..]
mbed_official 205:c41fc65bcfb4 601 This subsection provides functions allowing to
mbed_official 205:c41fc65bcfb4 602 (+) Check the DMA state
mbed_official 205:c41fc65bcfb4 603 (+) Get error code
mbed_official 205:c41fc65bcfb4 604
mbed_official 205:c41fc65bcfb4 605 @endverbatim
mbed_official 205:c41fc65bcfb4 606 * @{
mbed_official 205:c41fc65bcfb4 607 */
mbed_official 205:c41fc65bcfb4 608
mbed_official 205:c41fc65bcfb4 609 /**
mbed_official 205:c41fc65bcfb4 610 * @brief Returns the DMA state.
mbed_official 205:c41fc65bcfb4 611 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 205:c41fc65bcfb4 612 * the configuration information for the specified DMA Channel.
mbed_official 205:c41fc65bcfb4 613 * @retval HAL state
mbed_official 205:c41fc65bcfb4 614 */
mbed_official 205:c41fc65bcfb4 615 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
mbed_official 205:c41fc65bcfb4 616 {
mbed_official 205:c41fc65bcfb4 617 return hdma->State;
mbed_official 205:c41fc65bcfb4 618 }
mbed_official 205:c41fc65bcfb4 619
mbed_official 205:c41fc65bcfb4 620 /**
mbed_official 205:c41fc65bcfb4 621 * @brief Return the DMA error code
mbed_official 205:c41fc65bcfb4 622 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
mbed_official 205:c41fc65bcfb4 623 * the configuration information for the specified DMA Channel.
mbed_official 205:c41fc65bcfb4 624 * @retval DMA Error Code
mbed_official 205:c41fc65bcfb4 625 */
mbed_official 205:c41fc65bcfb4 626 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
mbed_official 205:c41fc65bcfb4 627 {
mbed_official 205:c41fc65bcfb4 628 return hdma->ErrorCode;
mbed_official 205:c41fc65bcfb4 629 }
mbed_official 205:c41fc65bcfb4 630
mbed_official 205:c41fc65bcfb4 631 /**
mbed_official 205:c41fc65bcfb4 632 * @}
mbed_official 205:c41fc65bcfb4 633 */
mbed_official 205:c41fc65bcfb4 634
mbed_official 205:c41fc65bcfb4 635 /**
mbed_official 205:c41fc65bcfb4 636 * @brief Sets the DMA Transfer parameter.
mbed_official 205:c41fc65bcfb4 637 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 205:c41fc65bcfb4 638 * the configuration information for the specified DMA Channel.
mbed_official 205:c41fc65bcfb4 639 * @param SrcAddress: The source memory Buffer address
mbed_official 205:c41fc65bcfb4 640 * @param DstAddress: The destination memory Buffer address
mbed_official 205:c41fc65bcfb4 641 * @param DataLength: The length of data to be transferred from source to destination
mbed_official 205:c41fc65bcfb4 642 * @retval HAL status
mbed_official 205:c41fc65bcfb4 643 */
mbed_official 205:c41fc65bcfb4 644 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
mbed_official 205:c41fc65bcfb4 645 {
mbed_official 205:c41fc65bcfb4 646 /* Configure DMA Channel data length */
mbed_official 205:c41fc65bcfb4 647 hdma->Instance->CNDTR = DataLength;
mbed_official 205:c41fc65bcfb4 648
mbed_official 205:c41fc65bcfb4 649 /* Peripheral to Memory */
mbed_official 205:c41fc65bcfb4 650 if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
mbed_official 205:c41fc65bcfb4 651 {
mbed_official 205:c41fc65bcfb4 652 /* Configure DMA Channel destination address */
mbed_official 205:c41fc65bcfb4 653 hdma->Instance->CPAR = DstAddress;
mbed_official 205:c41fc65bcfb4 654
mbed_official 205:c41fc65bcfb4 655 /* Configure DMA Channel source address */
mbed_official 205:c41fc65bcfb4 656 hdma->Instance->CMAR = SrcAddress;
mbed_official 205:c41fc65bcfb4 657 }
mbed_official 205:c41fc65bcfb4 658 /* Memory to Peripheral */
mbed_official 205:c41fc65bcfb4 659 else
mbed_official 205:c41fc65bcfb4 660 {
mbed_official 205:c41fc65bcfb4 661 /* Configure DMA Channel source address */
mbed_official 205:c41fc65bcfb4 662 hdma->Instance->CPAR = SrcAddress;
mbed_official 205:c41fc65bcfb4 663
mbed_official 205:c41fc65bcfb4 664 /* Configure DMA Channel destination address */
mbed_official 205:c41fc65bcfb4 665 hdma->Instance->CMAR = DstAddress;
mbed_official 205:c41fc65bcfb4 666 }
mbed_official 205:c41fc65bcfb4 667 }
mbed_official 205:c41fc65bcfb4 668
mbed_official 205:c41fc65bcfb4 669 /**
mbed_official 205:c41fc65bcfb4 670 * @}
mbed_official 205:c41fc65bcfb4 671 */
mbed_official 205:c41fc65bcfb4 672
mbed_official 205:c41fc65bcfb4 673 #endif /* HAL_DMA_MODULE_ENABLED */
mbed_official 205:c41fc65bcfb4 674 /**
mbed_official 205:c41fc65bcfb4 675 * @}
mbed_official 205:c41fc65bcfb4 676 */
mbed_official 205:c41fc65bcfb4 677
mbed_official 205:c41fc65bcfb4 678 /**
mbed_official 205:c41fc65bcfb4 679 * @}
mbed_official 205:c41fc65bcfb4 680 */
mbed_official 205:c41fc65bcfb4 681
mbed_official 205:c41fc65bcfb4 682 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/