Paul Law / 7SegSRDriver

7-Segment Display Driver class, via an 8-bit shift register (such as the 74HC595)

7SegSRDriver.cpp@1:e55f543bc06b, 2011-05-01 (annotated)

Committer:
paul80nd
Date:
Sun May 01 17:34:00 2011 +0000
Revision:
1:e55f543bc06b
Parent:
0:1832d0ed8da8 
Gettin\ me 7 and 8\s mixed up

Who changed what in which revision?

UserRevisionLine numberNew contents of line
paul80nd 0:1832d0ed8da8 1 #include "mbed.h"
paul80nd 0:1832d0ed8da8 2 #include "7SegSRDriver.h"
paul80nd 0:1832d0ed8da8 3
paul80nd 0:1832d0ed8da8 4 /* mbed 7-Segment Display Driver Library (via an 8bit Shift Register)
paul80nd 0:1832d0ed8da8 5 * Copyright (c) 2011 Paul Law
paul80nd 0:1832d0ed8da8 6 *
paul80nd 0:1832d0ed8da8 7 * Permission is hereby granted, free of charge, to any person obtaining a copy
paul80nd 0:1832d0ed8da8 8 * of this software and associated documentation files (the "Software"), to deal
paul80nd 0:1832d0ed8da8 9 * in the Software without restriction, including without limitation the rights
paul80nd 0:1832d0ed8da8 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
paul80nd 0:1832d0ed8da8 11 * copies of the Software, and to permit persons to whom the Software is
paul80nd 0:1832d0ed8da8 12 * furnished to do so, subject to the following conditions:
paul80nd 0:1832d0ed8da8 13 *
paul80nd 0:1832d0ed8da8 14 * The above copyright notice and this permission notice shall be included in
paul80nd 0:1832d0ed8da8 15 * all copies or substantial portions of the Software.
paul80nd 0:1832d0ed8da8 16 *
paul80nd 0:1832d0ed8da8 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
paul80nd 0:1832d0ed8da8 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
paul80nd 0:1832d0ed8da8 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
paul80nd 0:1832d0ed8da8 20 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
paul80nd 0:1832d0ed8da8 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
paul80nd 0:1832d0ed8da8 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
paul80nd 0:1832d0ed8da8 23 * THE SOFTWARE.
paul80nd 0:1832d0ed8da8 24 */
paul80nd 0:1832d0ed8da8 25
paul80nd 0:1832d0ed8da8 26 // Display should be hooked up to shift register as follows:
paul80nd 0:1832d0ed8da8 27 // Q0 : Decimal Point, Q1-Q7 : Segments a-g
paul80nd 0:1832d0ed8da8 28
paul80nd 0:1832d0ed8da8 29 SSegSRDriver::SSegSRDriver(PinName srData, PinName srClock, PinName srLatch, bool disp_type): _srData(srData), _srClock(srClock), _srLatch(srLatch) {
paul80nd 0:1832d0ed8da8 30 _disp_type = disp_type;
paul80nd 0:1832d0ed8da8 31 write_raw(0);
paul80nd 0:1832d0ed8da8 32 }
paul80nd 0:1832d0ed8da8 33
paul80nd 0:1832d0ed8da8 34 void SSegSRDriver::set_type(bool disp_type) {
paul80nd 0:1832d0ed8da8 35 _disp_type = disp_type;
paul80nd 0:1832d0ed8da8 36 }
paul80nd 0:1832d0ed8da8 37
paul80nd 0:1832d0ed8da8 38 void SSegSRDriver::clear() {
paul80nd 0:1832d0ed8da8 39 write_raw(0);
paul80nd 0:1832d0ed8da8 40 }
paul80nd 0:1832d0ed8da8 41
paul80nd 0:1832d0ed8da8 42 void SSegSRDriver::write(unsigned char number) {
paul80nd 0:1832d0ed8da8 43 write(number,0);
paul80nd 0:1832d0ed8da8 44 }
paul80nd 0:1832d0ed8da8 45
paul80nd 0:1832d0ed8da8 46 void SSegSRDriver::write(unsigned char number, bool dp) {
paul80nd 0:1832d0ed8da8 47 if (number<16) {
paul80nd 0:1832d0ed8da8 48 // Find the definition of the number in chardefs, shift left, set dp (LSB)
paul80nd 0:1832d0ed8da8 49 write_raw((SSegSRDriver_chardefs[number] << 1) | dp);
paul80nd 0:1832d0ed8da8 50 }
paul80nd 0:1832d0ed8da8 51 }
paul80nd 0:1832d0ed8da8 52
paul80nd 0:1832d0ed8da8 53 void SSegSRDriver::write_raw(unsigned char bValue) {
paul80nd 0:1832d0ed8da8 54
paul80nd 0:1832d0ed8da8 55 if (!_disp_type) bValue = ~bValue; // Reverse value for Common Anode
paul80nd 0:1832d0ed8da8 56
paul80nd 0:1832d0ed8da8 57 if (bValue<=0xFF) {
paul80nd 0:1832d0ed8da8 58 // Push value to shift register and latch
paul80nd 0:1832d0ed8da8 59 _srLatch = 0;
paul80nd 0:1832d0ed8da8 60 for (int i=7;i>=0;i--) { // Output MSB to LSB
paul80nd 0:1832d0ed8da8 61 _srClock = 0;
paul80nd 0:1832d0ed8da8 62 _srData = (bValue & (1<<i));
paul80nd 0:1832d0ed8da8 63 _srClock = 1;
paul80nd 0:1832d0ed8da8 64 }
paul80nd 0:1832d0ed8da8 65 _srLatch = 1;
paul80nd 0:1832d0ed8da8 66 _srData = 0;
paul80nd 0:1832d0ed8da8 67 }
paul80nd 0:1832d0ed8da8 68 }