Ryo Iizuka / libMiMic

This is Webservice SDK for mbed. LPCXpresso1769/LPC1768/FRDM-K64F/LPC4088

Dependents:   MbedFileServer_1768MiniDK2 RedWireBridge IssueDebug_gcc MiMicRemoteMCU-for-Mbed ... more

libMiMic(MiMic library for mbed)は、WebService機能を提供するSDKです。 mbedでWebAPIに対応したネットワークデバイスを簡単に作ることが出来ます。

libMiMicはMiMic projectで開発しています。MiMic projectについてはこちらをご覧ください。 http://nyatla.jp/mimic/wp/

構成

libMiMicはmbedRTOS上で動作し、ユーザアプリケーションにAPIを提供します。コアAPIはC言語で記述されていますが、使用頻度の高いものについてはmbed向けのC++APIが準備されています。

/media/uploads/nyatla/libmimic-sdk.png

※libMiMicはmbedの標準イーサネットドライバをしようしていません。

標準イーサネットドライバと同時に使用することはできません。

  • MiMicIP - IPv4スタックです。レテンシとメモリ消費量を抑えたuipベースのライブラリです。
  • ARP/ICMP/UDP/TCP - 基礎的なソケットAPIを提供します。APIは独自です。
  • HTTP/1.1 Server - HTTP/1.1に対応したサーバです。マルチセッション・Chunked・持続性接続に対応しています。
  • HTTP Modules - HTTP/1.1の機能モジュールです。以下のモジュールがあります。
    • ROM file provider - ROMに格納したファイルイメージを公開します。
    • File system provider - mbedファイルシステムを公開します。
    • Onchip configuration - プログラムフラッシュを利用して設定を保存します。
    • MiMicVM processor - RPCリクエスト(MiMicVM)を処理します。
    • FileUpload - ファイルアップロードを受け取ります。
    • URL decoder - HTTPリクエストを解析します。
    • UPnP handler -UPnPメッセージを処理します。
    • WebSocket - Websocketサーバです。
  • mDNS - マルチキャストDNSサービスです。
  • UPnP - UPnP/1.0の機能を提供します。UPnP handlerと協調して動作します。(現在はデバイス探索(SSDP)・デスクリプション(Description)のみ実装してあります。)
  • DHCP/APIPA - ゼロコンフィギュレーション用のモジュールです。
  • HTTP/1.1 Client
  • mbed C++ class library - mbed向けのC++CPIです。C言語のものより簡単です。

対応機種

  • mbed(mbed LPC1768)
  • LPCXpresso1769

プログラム

Import programMiMicRemoteMCU-for-Mbed

MiMic RemoteMCU for mbed. This program provides MCU control API over REST API. It can control MCU from Javascript,PHP or any HTTP rest client directly. And, The application has self development environment.

Last commit 30 May 2014 by Ryo Iizuka

Import programMbedFileServer

The program publishes files at local directory and SD filesystem. It is a full-fledged webServer somewhat.

Last commit 15 Sep 2015 by Ryo Iizuka

サンプル

Import programMiMicSimpleHttpd

This is a simplest HTTP server made ​​of libMiMic. It will echo back a request path.

Last commit 15 Sep 2015 by Ryo Iizuka

Import programUPnPBasicDevice

Simplest UPnP basic device example. This program to run UPnP basic device on the mbed.

Last commit 15 Sep 2015 by Ryo Iizuka

Import programWebSocketSample

MiMicSDK Websocket module sample program.

Last commit 15 Sep 2015 by Ryo Iizuka

Import programHttpClientSamlpe

A http client sample program.

Last commit 15 Sep 2015 by Ryo Iizuka

Import programTcpSocketClientSamlpe

MiMicSDK Tcp client socket sample program.

Last commit 15 Sep 2015 by Ryo Iizuka

Import programUdpSocketSamlpe

Udp socket sample program. This program will send back the received packet.

Last commit 15 Sep 2015 by Ryo Iizuka

チュートリアル

English

libMiMic(MiMic library for mbed) is SDK which provides Webservice functions. It can be created networking device easily using mbed.

See more MiMic information, See MiMic project website. http://nyatla.jp/mimic/wp/

Structure

libMiMic run on mbed RTOS and provides networking API to user application. This library has C++ class API for the mbed, and low-level C language API.

/media/uploads/nyatla/libmimic-sdk.png

For WebService general, it can be written in a simple C + + API.

libMiMic does not have the standard Ethernet driver of mbed.　It is not possible that will be used with the standard Ethernet driver.

  • MiMicIP - IPv4 protocol stack. This is based uip which is reduced memory and latency.
  • ARP / ICMP / UDP / TCP - Those are provide basic IP protocols.
  • HTTP/1.1 Server - The Http server compatible HTTP/1.1. It supports multi-session, chunked transport, persistent connection.
  • HTTP Modules - There are addon-module for HTTP server. The following modules.
    • ROM file module - Publish the file images in ROM.
    • File system module - Publish thefiles in mbed file system.
    • Onchip configuration module - To save the network settings to the program flash via REST.
    • MiMicVM module - To handle the (MiMicVM) RPC request.
    • FileUpload module - Accept a file via HTTP POST.
    • URL dedoce module - A versatility URL decoder.
    • UPnP handle module - To handle UPnP messages.
    • UPnP - This provides UPnP/1.0 device functions. It works together with UPnP handler.
    • Websocket - websocket (version13) server
  • mDNS Service - DNS-SD protocol server.
  • UPnP - This provides UPnP/1.0 device functions which works with UPnP handler. (You have been implemented (SSDP) ? description only (Description) device search now.) It is a module zero configuration for - DHCP / APIPA. mbed C + + class library - C of mbed for + + is the CPI. It is simple than that of the C language.
  • DHCP/APIPA - It support zero-cpnfigulation.
  • mbed C++ class library. Almost APIs for Web applications are available.
  • HTTP/1.1 Client

Supported target

  • mbed(mbed LPC1768)
  • LPCXpresso1769

Application

Import programMiMicRemoteMCU-for-Mbed

MiMic RemoteMCU for mbed. This program provides MCU control API over REST API. It can control MCU from Javascript,PHP or any HTTP rest client directly. And, The application has self development environment.

Last commit 30 May 2014 by Ryo Iizuka

Import programMbedFileServer

The program publishes files at local directory and SD filesystem. It is a full-fledged webServer somewhat.

Last commit 15 Sep 2015 by Ryo Iizuka

Sample

Import programMiMicSimpleHttpd

This is a simplest HTTP server made ​​of libMiMic. It will echo back a request path.

Last commit 15 Sep 2015 by Ryo Iizuka

Import programUPnPBasicDevice

Simplest UPnP basic device example. This program to run UPnP basic device on the mbed.

Last commit 15 Sep 2015 by Ryo Iizuka

Import programWebSocketSample

MiMicSDK Websocket module sample program.

Last commit 15 Sep 2015 by Ryo Iizuka

Import programHttpClientSamlpe

A http client sample program.

Last commit 15 Sep 2015 by Ryo Iizuka

Import programTcpSocketClientSamlpe

MiMicSDK Tcp client socket sample program.

Last commit 15 Sep 2015 by Ryo Iizuka

Import programUdpSocketSamlpe

Udp socket sample program. This program will send back the received packet.

Last commit 15 Sep 2015 by Ryo Iizuka

Tutorial

core/driver/ethernet/lpc4088/copy_of_ethernet_api.h@90:d35c976570fc, 2014-09-06 (annotated)

Committer:
nyatla
Date:
Sat Sep 06 02:41:20 2014 +0000
Revision:
90:d35c976570fc
Parent:
69:8c5f220441f5 
delete error.h

Who changed what in which revision?

UserRevisionLine numberNew contents of line
nyatla 69:8c5f220441f5 1 //Copy from mbed HAL
nyatla 69:8c5f220441f5 2 //https://github.com/mbedmicro/mbed/blob/master/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/ethernet_api.c
nyatla 69:8c5f220441f5 3
nyatla 69:8c5f220441f5 4 #include <string.h>
nyatla 69:8c5f220441f5 5
nyatla 69:8c5f220441f5 6 #include "ethernet_api.h"
nyatla 69:8c5f220441f5 7 #include "cmsis.h"
nyatla 69:8c5f220441f5 8 #include "mbed_interface.h"
nyatla 69:8c5f220441f5 9 #include "toolchain.h"
nyatla 90:d35c976570fc 10 //#include "error.h"
nyatla 69:8c5f220441f5 11
nyatla 69:8c5f220441f5 12 #define NUM_RX_FRAG 3 /* Num.of RX Fragments. */
nyatla 69:8c5f220441f5 13 #define NUM_TX_FRAG 16 /* Num.of TX Fragments. */
nyatla 69:8c5f220441f5 14 #define ETH_FRAG_SIZE 1536 /* Packet Fragment size 1536 Bytes */
nyatla 69:8c5f220441f5 15
nyatla 69:8c5f220441f5 16 #define ETH_MAX_FLEN 1536 /* Max. Ethernet Frame Size */
nyatla 69:8c5f220441f5 17
nyatla 69:8c5f220441f5 18 #define ETHERNET_ADDR_SIZE 6
nyatla 69:8c5f220441f5 19
nyatla 69:8c5f220441f5 20 PACKED struct RX_DESC_TypeDef { /* RX Descriptor struct */
nyatla 69:8c5f220441f5 21 unsigned int Packet;
nyatla 69:8c5f220441f5 22 unsigned int Ctrl;
nyatla 69:8c5f220441f5 23 };
nyatla 69:8c5f220441f5 24 typedef struct RX_DESC_TypeDef RX_DESC_TypeDef;
nyatla 69:8c5f220441f5 25
nyatla 69:8c5f220441f5 26 PACKED struct RX_STAT_TypeDef { /* RX Status struct */
nyatla 69:8c5f220441f5 27 unsigned int Info;
nyatla 69:8c5f220441f5 28 unsigned int HashCRC;
nyatla 69:8c5f220441f5 29 };
nyatla 69:8c5f220441f5 30 typedef struct RX_STAT_TypeDef RX_STAT_TypeDef;
nyatla 69:8c5f220441f5 31
nyatla 69:8c5f220441f5 32 PACKED struct TX_DESC_TypeDef { /* TX Descriptor struct */
nyatla 69:8c5f220441f5 33 unsigned int Packet;
nyatla 69:8c5f220441f5 34 unsigned int Ctrl;
nyatla 69:8c5f220441f5 35 };
nyatla 69:8c5f220441f5 36 typedef struct TX_DESC_TypeDef TX_DESC_TypeDef;
nyatla 69:8c5f220441f5 37
nyatla 69:8c5f220441f5 38 PACKED struct TX_STAT_TypeDef { /* TX Status struct */
nyatla 69:8c5f220441f5 39 unsigned int Info;
nyatla 69:8c5f220441f5 40 };
nyatla 69:8c5f220441f5 41 typedef struct TX_STAT_TypeDef TX_STAT_TypeDef;
nyatla 69:8c5f220441f5 42
nyatla 69:8c5f220441f5 43 /* MAC Configuration Register 1 */
nyatla 69:8c5f220441f5 44 #define MAC1_REC_EN 0x00000001 /* Receive Enable */
nyatla 69:8c5f220441f5 45 #define MAC1_PASS_ALL 0x00000002 /* Pass All Receive Frames */
nyatla 69:8c5f220441f5 46 #define MAC1_RX_FLOWC 0x00000004 /* RX Flow Control */
nyatla 69:8c5f220441f5 47 #define MAC1_TX_FLOWC 0x00000008 /* TX Flow Control */
nyatla 69:8c5f220441f5 48 #define MAC1_LOOPB 0x00000010 /* Loop Back Mode */
nyatla 69:8c5f220441f5 49 #define MAC1_RES_TX 0x00000100 /* Reset TX Logic */
nyatla 69:8c5f220441f5 50 #define MAC1_RES_MCS_TX 0x00000200 /* Reset MAC TX Control Sublayer */
nyatla 69:8c5f220441f5 51 #define MAC1_RES_RX 0x00000400 /* Reset RX Logic */
nyatla 69:8c5f220441f5 52 #define MAC1_RES_MCS_RX 0x00000800 /* Reset MAC RX Control Sublayer */
nyatla 69:8c5f220441f5 53 #define MAC1_SIM_RES 0x00004000 /* Simulation Reset */
nyatla 69:8c5f220441f5 54 #define MAC1_SOFT_RES 0x00008000 /* Soft Reset MAC */
nyatla 69:8c5f220441f5 55
nyatla 69:8c5f220441f5 56 /* MAC Configuration Register 2 */
nyatla 69:8c5f220441f5 57 #define MAC2_FULL_DUP 0x00000001 /* Full Duplex Mode */
nyatla 69:8c5f220441f5 58 #define MAC2_FRM_LEN_CHK 0x00000002 /* Frame Length Checking */
nyatla 69:8c5f220441f5 59 #define MAC2_HUGE_FRM_EN 0x00000004 /* Huge Frame Enable */
nyatla 69:8c5f220441f5 60 #define MAC2_DLY_CRC 0x00000008 /* Delayed CRC Mode */
nyatla 69:8c5f220441f5 61 #define MAC2_CRC_EN 0x00000010 /* Append CRC to every Frame */
nyatla 69:8c5f220441f5 62 #define MAC2_PAD_EN 0x00000020 /* Pad all Short Frames */
nyatla 69:8c5f220441f5 63 #define MAC2_VLAN_PAD_EN 0x00000040 /* VLAN Pad Enable */
nyatla 69:8c5f220441f5 64 #define MAC2_ADET_PAD_EN 0x00000080 /* Auto Detect Pad Enable */
nyatla 69:8c5f220441f5 65 #define MAC2_PPREAM_ENF 0x00000100 /* Pure Preamble Enforcement */
nyatla 69:8c5f220441f5 66 #define MAC2_LPREAM_ENF 0x00000200 /* Long Preamble Enforcement */
nyatla 69:8c5f220441f5 67 #define MAC2_NO_BACKOFF 0x00001000 /* No Backoff Algorithm */
nyatla 69:8c5f220441f5 68 #define MAC2_BACK_PRESSURE 0x00002000 /* Backoff Presurre / No Backoff */
nyatla 69:8c5f220441f5 69 #define MAC2_EXCESS_DEF 0x00004000 /* Excess Defer */
nyatla 69:8c5f220441f5 70
nyatla 69:8c5f220441f5 71 /* Back-to-Back Inter-Packet-Gap Register */
nyatla 69:8c5f220441f5 72 #define IPGT_FULL_DUP 0x00000015 /* Recommended value for Full Duplex */
nyatla 69:8c5f220441f5 73 #define IPGT_HALF_DUP 0x00000012 /* Recommended value for Half Duplex */
nyatla 69:8c5f220441f5 74
nyatla 69:8c5f220441f5 75 /* Non Back-to-Back Inter-Packet-Gap Register */
nyatla 69:8c5f220441f5 76 #define IPGR_DEF 0x00000012 /* Recommended value */
nyatla 69:8c5f220441f5 77
nyatla 69:8c5f220441f5 78 /* Collision Window/Retry Register */
nyatla 69:8c5f220441f5 79 #define CLRT_DEF 0x0000370F /* Default value */
nyatla 69:8c5f220441f5 80
nyatla 69:8c5f220441f5 81 /* PHY Support Register */
nyatla 69:8c5f220441f5 82 #define SUPP_SPEED 0x00000100 /* Reduced MII Logic Current Speed */
nyatla 69:8c5f220441f5 83 //#define SUPP_RES_RMII 0x00000800 /* Reset Reduced MII Logic */
nyatla 69:8c5f220441f5 84 #define SUPP_RES_RMII 0x00000000 /* Reset Reduced MII Logic */
nyatla 69:8c5f220441f5 85
nyatla 69:8c5f220441f5 86 /* Test Register */
nyatla 69:8c5f220441f5 87 #define TEST_SHCUT_PQUANTA 0x00000001 /* Shortcut Pause Quanta */
nyatla 69:8c5f220441f5 88 #define TEST_TST_PAUSE 0x00000002 /* Test Pause */
nyatla 69:8c5f220441f5 89 #define TEST_TST_BACKP 0x00000004 /* Test Back Pressure */
nyatla 69:8c5f220441f5 90
nyatla 69:8c5f220441f5 91 /* MII Management Configuration Register */
nyatla 69:8c5f220441f5 92 #define MCFG_SCAN_INC 0x00000001 /* Scan Increment PHY Address */
nyatla 69:8c5f220441f5 93 #define MCFG_SUPP_PREAM 0x00000002 /* Suppress Preamble */
nyatla 69:8c5f220441f5 94 #define MCFG_CLK_SEL 0x0000003C /* Clock Select Mask */
nyatla 69:8c5f220441f5 95 #define MCFG_RES_MII 0x00008000 /* Reset MII Management Hardware */
nyatla 69:8c5f220441f5 96
nyatla 69:8c5f220441f5 97 /* MII Management Command Register */
nyatla 69:8c5f220441f5 98 #define MCMD_READ 0x00000001 /* MII Read */
nyatla 69:8c5f220441f5 99 #define MCMD_SCAN 0x00000002 /* MII Scan continuously */
nyatla 69:8c5f220441f5 100
nyatla 69:8c5f220441f5 101 #define MII_WR_TOUT 0x00050000 /* MII Write timeout count */
nyatla 69:8c5f220441f5 102 #define MII_RD_TOUT 0x00050000 /* MII Read timeout count */
nyatla 69:8c5f220441f5 103
nyatla 69:8c5f220441f5 104 /* MII Management Address Register */
nyatla 69:8c5f220441f5 105 #define MADR_REG_ADR 0x0000001F /* MII Register Address Mask */
nyatla 69:8c5f220441f5 106 #define MADR_PHY_ADR 0x00001F00 /* PHY Address Mask */
nyatla 69:8c5f220441f5 107
nyatla 69:8c5f220441f5 108 /* MII Management Indicators Register */
nyatla 69:8c5f220441f5 109 #define MIND_BUSY 0x00000001 /* MII is Busy */
nyatla 69:8c5f220441f5 110 #define MIND_SCAN 0x00000002 /* MII Scanning in Progress */
nyatla 69:8c5f220441f5 111 #define MIND_NOT_VAL 0x00000004 /* MII Read Data not valid */
nyatla 69:8c5f220441f5 112 #define MIND_MII_LINK_FAIL 0x00000008 /* MII Link Failed */
nyatla 69:8c5f220441f5 113
nyatla 69:8c5f220441f5 114 /* Command Register */
nyatla 69:8c5f220441f5 115 #define CR_RX_EN 0x00000001 /* Enable Receive */
nyatla 69:8c5f220441f5 116 #define CR_TX_EN 0x00000002 /* Enable Transmit */
nyatla 69:8c5f220441f5 117 #define CR_REG_RES 0x00000008 /* Reset Host Registers */
nyatla 69:8c5f220441f5 118 #define CR_TX_RES 0x00000010 /* Reset Transmit Datapath */
nyatla 69:8c5f220441f5 119 #define CR_RX_RES 0x00000020 /* Reset Receive Datapath */
nyatla 69:8c5f220441f5 120 #define CR_PASS_RUNT_FRM 0x00000040 /* Pass Runt Frames */
nyatla 69:8c5f220441f5 121 #define CR_PASS_RX_FILT 0x00000080 /* Pass RX Filter */
nyatla 69:8c5f220441f5 122 #define CR_TX_FLOW_CTRL 0x00000100 /* TX Flow Control */
nyatla 69:8c5f220441f5 123 #define CR_RMII 0x00000200 /* Reduced MII Interface */
nyatla 69:8c5f220441f5 124 #define CR_FULL_DUP 0x00000400 /* Full Duplex */
nyatla 69:8c5f220441f5 125
nyatla 69:8c5f220441f5 126 /* Status Register */
nyatla 69:8c5f220441f5 127 #define SR_RX_EN 0x00000001 /* Enable Receive */
nyatla 69:8c5f220441f5 128 #define SR_TX_EN 0x00000002 /* Enable Transmit */
nyatla 69:8c5f220441f5 129
nyatla 69:8c5f220441f5 130 /* Transmit Status Vector 0 Register */
nyatla 69:8c5f220441f5 131 #define TSV0_CRC_ERR 0x00000001 /* CRC error */
nyatla 69:8c5f220441f5 132 #define TSV0_LEN_CHKERR 0x00000002 /* Length Check Error */
nyatla 69:8c5f220441f5 133 #define TSV0_LEN_OUTRNG 0x00000004 /* Length Out of Range */
nyatla 69:8c5f220441f5 134 #define TSV0_DONE 0x00000008 /* Tramsmission Completed */
nyatla 69:8c5f220441f5 135 #define TSV0_MCAST 0x00000010 /* Multicast Destination */
nyatla 69:8c5f220441f5 136 #define TSV0_BCAST 0x00000020 /* Broadcast Destination */
nyatla 69:8c5f220441f5 137 #define TSV0_PKT_DEFER 0x00000040 /* Packet Deferred */
nyatla 69:8c5f220441f5 138 #define TSV0_EXC_DEFER 0x00000080 /* Excessive Packet Deferral */
nyatla 69:8c5f220441f5 139 #define TSV0_EXC_COLL 0x00000100 /* Excessive Collision */
nyatla 69:8c5f220441f5 140 #define TSV0_LATE_COLL 0x00000200 /* Late Collision Occured */
nyatla 69:8c5f220441f5 141 #define TSV0_GIANT 0x00000400 /* Giant Frame */
nyatla 69:8c5f220441f5 142 #define TSV0_UNDERRUN 0x00000800 /* Buffer Underrun */
nyatla 69:8c5f220441f5 143 #define TSV0_BYTES 0x0FFFF000 /* Total Bytes Transferred */
nyatla 69:8c5f220441f5 144 #define TSV0_CTRL_FRAME 0x10000000 /* Control Frame */
nyatla 69:8c5f220441f5 145 #define TSV0_PAUSE 0x20000000 /* Pause Frame */
nyatla 69:8c5f220441f5 146 #define TSV0_BACK_PRESS 0x40000000 /* Backpressure Method Applied */
nyatla 69:8c5f220441f5 147 #define TSV0_VLAN 0x80000000 /* VLAN Frame */
nyatla 69:8c5f220441f5 148
nyatla 69:8c5f220441f5 149 /* Transmit Status Vector 1 Register */
nyatla 69:8c5f220441f5 150 #define TSV1_BYTE_CNT 0x0000FFFF /* Transmit Byte Count */
nyatla 69:8c5f220441f5 151 #define TSV1_COLL_CNT 0x000F0000 /* Transmit Collision Count */
nyatla 69:8c5f220441f5 152
nyatla 69:8c5f220441f5 153 /* Receive Status Vector Register */
nyatla 69:8c5f220441f5 154 #define RSV_BYTE_CNT 0x0000FFFF /* Receive Byte Count */
nyatla 69:8c5f220441f5 155 #define RSV_PKT_IGNORED 0x00010000 /* Packet Previously Ignored */
nyatla 69:8c5f220441f5 156 #define RSV_RXDV_SEEN 0x00020000 /* RXDV Event Previously Seen */
nyatla 69:8c5f220441f5 157 #define RSV_CARR_SEEN 0x00040000 /* Carrier Event Previously Seen */
nyatla 69:8c5f220441f5 158 #define RSV_REC_CODEV 0x00080000 /* Receive Code Violation */
nyatla 69:8c5f220441f5 159 #define RSV_CRC_ERR 0x00100000 /* CRC Error */
nyatla 69:8c5f220441f5 160 #define RSV_LEN_CHKERR 0x00200000 /* Length Check Error */
nyatla 69:8c5f220441f5 161 #define RSV_LEN_OUTRNG 0x00400000 /* Length Out of Range */
nyatla 69:8c5f220441f5 162 #define RSV_REC_OK 0x00800000 /* Frame Received OK */
nyatla 69:8c5f220441f5 163 #define RSV_MCAST 0x01000000 /* Multicast Frame */
nyatla 69:8c5f220441f5 164 #define RSV_BCAST 0x02000000 /* Broadcast Frame */
nyatla 69:8c5f220441f5 165 #define RSV_DRIB_NIBB 0x04000000 /* Dribble Nibble */
nyatla 69:8c5f220441f5 166 #define RSV_CTRL_FRAME 0x08000000 /* Control Frame */
nyatla 69:8c5f220441f5 167 #define RSV_PAUSE 0x10000000 /* Pause Frame */
nyatla 69:8c5f220441f5 168 #define RSV_UNSUPP_OPC 0x20000000 /* Unsupported Opcode */
nyatla 69:8c5f220441f5 169 #define RSV_VLAN 0x40000000 /* VLAN Frame */
nyatla 69:8c5f220441f5 170
nyatla 69:8c5f220441f5 171 /* Flow Control Counter Register */
nyatla 69:8c5f220441f5 172 #define FCC_MIRR_CNT 0x0000FFFF /* Mirror Counter */
nyatla 69:8c5f220441f5 173 #define FCC_PAUSE_TIM 0xFFFF0000 /* Pause Timer */
nyatla 69:8c5f220441f5 174
nyatla 69:8c5f220441f5 175 /* Flow Control Status Register */
nyatla 69:8c5f220441f5 176 #define FCS_MIRR_CNT 0x0000FFFF /* Mirror Counter Current */
nyatla 69:8c5f220441f5 177
nyatla 69:8c5f220441f5 178 /* Receive Filter Control Register */
nyatla 69:8c5f220441f5 179 #define RFC_UCAST_EN 0x00000001 /* Accept Unicast Frames Enable */
nyatla 69:8c5f220441f5 180 #define RFC_BCAST_EN 0x00000002 /* Accept Broadcast Frames Enable */
nyatla 69:8c5f220441f5 181 #define RFC_MCAST_EN 0x00000004 /* Accept Multicast Frames Enable */
nyatla 69:8c5f220441f5 182 #define RFC_UCAST_HASH_EN 0x00000008 /* Accept Unicast Hash Filter Frames */
nyatla 69:8c5f220441f5 183 #define RFC_MCAST_HASH_EN 0x00000010 /* Accept Multicast Hash Filter Fram.*/
nyatla 69:8c5f220441f5 184 #define RFC_PERFECT_EN 0x00000020 /* Accept Perfect Match Enable */
nyatla 69:8c5f220441f5 185 #define RFC_MAGP_WOL_EN 0x00001000 /* Magic Packet Filter WoL Enable */
nyatla 69:8c5f220441f5 186 #define RFC_PFILT_WOL_EN 0x00002000 /* Perfect Filter WoL Enable */
nyatla 69:8c5f220441f5 187
nyatla 69:8c5f220441f5 188 /* Receive Filter WoL Status/Clear Registers */
nyatla 69:8c5f220441f5 189 #define WOL_UCAST 0x00000001 /* Unicast Frame caused WoL */
nyatla 69:8c5f220441f5 190 #define WOL_BCAST 0x00000002 /* Broadcast Frame caused WoL */
nyatla 69:8c5f220441f5 191 #define WOL_MCAST 0x00000004 /* Multicast Frame caused WoL */
nyatla 69:8c5f220441f5 192 #define WOL_UCAST_HASH 0x00000008 /* Unicast Hash Filter Frame WoL */
nyatla 69:8c5f220441f5 193 #define WOL_MCAST_HASH 0x00000010 /* Multicast Hash Filter Frame WoL */
nyatla 69:8c5f220441f5 194 #define WOL_PERFECT 0x00000020 /* Perfect Filter WoL */
nyatla 69:8c5f220441f5 195 #define WOL_RX_FILTER 0x00000080 /* RX Filter caused WoL */
nyatla 69:8c5f220441f5 196 #define WOL_MAG_PACKET 0x00000100 /* Magic Packet Filter caused WoL */
nyatla 69:8c5f220441f5 197
nyatla 69:8c5f220441f5 198 /* Interrupt Status/Enable/Clear/Set Registers */
nyatla 69:8c5f220441f5 199 #define INT_RX_OVERRUN 0x00000001 /* Overrun Error in RX Queue */
nyatla 69:8c5f220441f5 200 #define INT_RX_ERR 0x00000002 /* Receive Error */
nyatla 69:8c5f220441f5 201 #define INT_RX_FIN 0x00000004 /* RX Finished Process Descriptors */
nyatla 69:8c5f220441f5 202 #define INT_RX_DONE 0x00000008 /* Receive Done */
nyatla 69:8c5f220441f5 203 #define INT_TX_UNDERRUN 0x00000010 /* Transmit Underrun */
nyatla 69:8c5f220441f5 204 #define INT_TX_ERR 0x00000020 /* Transmit Error */
nyatla 69:8c5f220441f5 205 #define INT_TX_FIN 0x00000040 /* TX Finished Process Descriptors */
nyatla 69:8c5f220441f5 206 #define INT_TX_DONE 0x00000080 /* Transmit Done */
nyatla 69:8c5f220441f5 207 #define INT_SOFT_INT 0x00001000 /* Software Triggered Interrupt */
nyatla 69:8c5f220441f5 208 #define INT_WAKEUP 0x00002000 /* Wakeup Event Interrupt */
nyatla 69:8c5f220441f5 209
nyatla 69:8c5f220441f5 210 /* Power Down Register */
nyatla 69:8c5f220441f5 211 #define PD_POWER_DOWN 0x80000000 /* Power Down MAC */
nyatla 69:8c5f220441f5 212
nyatla 69:8c5f220441f5 213 /* RX Descriptor Control Word */
nyatla 69:8c5f220441f5 214 #define RCTRL_SIZE 0x000007FF /* Buffer size mask */
nyatla 69:8c5f220441f5 215 #define RCTRL_INT 0x80000000 /* Generate RxDone Interrupt */
nyatla 69:8c5f220441f5 216
nyatla 69:8c5f220441f5 217 /* RX Status Hash CRC Word */
nyatla 69:8c5f220441f5 218 #define RHASH_SA 0x000001FF /* Hash CRC for Source Address */
nyatla 69:8c5f220441f5 219 #define RHASH_DA 0x001FF000 /* Hash CRC for Destination Address */
nyatla 69:8c5f220441f5 220
nyatla 69:8c5f220441f5 221 /* RX Status Information Word */
nyatla 69:8c5f220441f5 222 #define RINFO_SIZE 0x000007FF /* Data size in bytes */
nyatla 69:8c5f220441f5 223 #define RINFO_CTRL_FRAME 0x00040000 /* Control Frame */
nyatla 69:8c5f220441f5 224 #define RINFO_VLAN 0x00080000 /* VLAN Frame */
nyatla 69:8c5f220441f5 225 #define RINFO_FAIL_FILT 0x00100000 /* RX Filter Failed */
nyatla 69:8c5f220441f5 226 #define RINFO_MCAST 0x00200000 /* Multicast Frame */
nyatla 69:8c5f220441f5 227 #define RINFO_BCAST 0x00400000 /* Broadcast Frame */
nyatla 69:8c5f220441f5 228 #define RINFO_CRC_ERR 0x00800000 /* CRC Error in Frame */
nyatla 69:8c5f220441f5 229 #define RINFO_SYM_ERR 0x01000000 /* Symbol Error from PHY */
nyatla 69:8c5f220441f5 230 #define RINFO_LEN_ERR 0x02000000 /* Length Error */
nyatla 69:8c5f220441f5 231 #define RINFO_RANGE_ERR 0x04000000 /* Range Error (exceeded max. size) */
nyatla 69:8c5f220441f5 232 #define RINFO_ALIGN_ERR 0x08000000 /* Alignment Error */
nyatla 69:8c5f220441f5 233 #define RINFO_OVERRUN 0x10000000 /* Receive overrun */
nyatla 69:8c5f220441f5 234 #define RINFO_NO_DESCR 0x20000000 /* No new Descriptor available */
nyatla 69:8c5f220441f5 235 #define RINFO_LAST_FLAG 0x40000000 /* Last Fragment in Frame */
nyatla 69:8c5f220441f5 236 #define RINFO_ERR 0x80000000 /* Error Occured (OR of all errors) */
nyatla 69:8c5f220441f5 237
nyatla 69:8c5f220441f5 238 //#define RINFO_ERR_MASK (RINFO_FAIL_FILT | RINFO_CRC_ERR | RINFO_SYM_ERR | RINFO_LEN_ERR | RINFO_ALIGN_ERR | RINFO_OVERRUN)
nyatla 69:8c5f220441f5 239 #define RINFO_ERR_MASK (RINFO_FAIL_FILT | RINFO_SYM_ERR | RINFO_LEN_ERR | RINFO_ALIGN_ERR | RINFO_OVERRUN)
nyatla 69:8c5f220441f5 240
nyatla 69:8c5f220441f5 241
nyatla 69:8c5f220441f5 242 /* TX Descriptor Control Word */
nyatla 69:8c5f220441f5 243 #define TCTRL_SIZE 0x000007FF /* Size of data buffer in bytes */
nyatla 69:8c5f220441f5 244 #define TCTRL_OVERRIDE 0x04000000 /* Override Default MAC Registers */
nyatla 69:8c5f220441f5 245 #define TCTRL_HUGE 0x08000000 /* Enable Huge Frame */
nyatla 69:8c5f220441f5 246 #define TCTRL_PAD 0x10000000 /* Pad short Frames to 64 bytes */
nyatla 69:8c5f220441f5 247 #define TCTRL_CRC 0x20000000 /* Append a hardware CRC to Frame */
nyatla 69:8c5f220441f5 248 #define TCTRL_LAST 0x40000000 /* Last Descriptor for TX Frame */
nyatla 69:8c5f220441f5 249 #define TCTRL_INT 0x80000000 /* Generate TxDone Interrupt */
nyatla 69:8c5f220441f5 250
nyatla 69:8c5f220441f5 251 /* TX Status Information Word */
nyatla 69:8c5f220441f5 252 #define TINFO_COL_CNT 0x01E00000 /* Collision Count */
nyatla 69:8c5f220441f5 253 #define TINFO_DEFER 0x02000000 /* Packet Deferred (not an error) */
nyatla 69:8c5f220441f5 254 #define TINFO_EXCESS_DEF 0x04000000 /* Excessive Deferral */
nyatla 69:8c5f220441f5 255 #define TINFO_EXCESS_COL 0x08000000 /* Excessive Collision */
nyatla 69:8c5f220441f5 256 #define TINFO_LATE_COL 0x10000000 /* Late Collision Occured */
nyatla 69:8c5f220441f5 257 #define TINFO_UNDERRUN 0x20000000 /* Transmit Underrun */
nyatla 69:8c5f220441f5 258 #define TINFO_NO_DESCR 0x40000000 /* No new Descriptor available */
nyatla 69:8c5f220441f5 259 #define TINFO_ERR 0x80000000 /* Error Occured (OR of all errors) */
nyatla 69:8c5f220441f5 260
nyatla 69:8c5f220441f5 261 /* ENET Device Revision ID */
nyatla 69:8c5f220441f5 262 #define OLD_EMAC_MODULE_ID 0x39022000 /* Rev. ID for first rev '-' */
nyatla 69:8c5f220441f5 263
nyatla 69:8c5f220441f5 264 /* DP83848C PHY Registers */
nyatla 69:8c5f220441f5 265 #define PHY_REG_BMCR 0x00 /* Basic Mode Control Register */
nyatla 69:8c5f220441f5 266 #define PHY_REG_BMSR 0x01 /* Basic Mode Status Register */
nyatla 69:8c5f220441f5 267 #define PHY_REG_IDR1 0x02 /* PHY Identifier 1 */
nyatla 69:8c5f220441f5 268 #define PHY_REG_IDR2 0x03 /* PHY Identifier 2 */
nyatla 69:8c5f220441f5 269 #define PHY_REG_ANAR 0x04 /* Auto-Negotiation Advertisement */
nyatla 69:8c5f220441f5 270 #define PHY_REG_ANLPAR 0x05 /* Auto-Neg. Link Partner Abitily */
nyatla 69:8c5f220441f5 271 #define PHY_REG_ANER 0x06 /* Auto-Neg. Expansion Register */
nyatla 69:8c5f220441f5 272 #define PHY_REG_ANNPTR 0x07 /* Auto-Neg. Next Page TX */
nyatla 69:8c5f220441f5 273
nyatla 69:8c5f220441f5 274 /* PHY Extended Registers */
nyatla 69:8c5f220441f5 275 #define PHY_REG_STS 0x10 /* Status Register */
nyatla 69:8c5f220441f5 276 #define PHY_REG_MICR 0x11 /* MII Interrupt Control Register */
nyatla 69:8c5f220441f5 277 #define PHY_REG_MISR 0x12 /* MII Interrupt Status Register */
nyatla 69:8c5f220441f5 278 #define PHY_REG_FCSCR 0x14 /* False Carrier Sense Counter */
nyatla 69:8c5f220441f5 279 #define PHY_REG_RECR 0x15 /* Receive Error Counter */
nyatla 69:8c5f220441f5 280 #define PHY_REG_PCSR 0x16 /* PCS Sublayer Config. and Status */
nyatla 69:8c5f220441f5 281 #define PHY_REG_RBR 0x17 /* RMII and Bypass Register */
nyatla 69:8c5f220441f5 282 #define PHY_REG_LEDCR 0x18 /* LED Direct Control Register */
nyatla 69:8c5f220441f5 283 #define PHY_REG_PHYCR 0x19 /* PHY Control Register */
nyatla 69:8c5f220441f5 284 #define PHY_REG_10BTSCR 0x1A /* 10Base-T Status/Control Register */
nyatla 69:8c5f220441f5 285 #define PHY_REG_CDCTRL1 0x1B /* CD Test Control and BIST Extens. */
nyatla 69:8c5f220441f5 286 #define PHY_REG_EDCR 0x1D /* Energy Detect Control Register */
nyatla 69:8c5f220441f5 287
nyatla 69:8c5f220441f5 288 #define PHY_REG_SCSR 0x1F /* PHY Special Control/Status Register */
nyatla 69:8c5f220441f5 289
nyatla 69:8c5f220441f5 290 #define PHY_FULLD_100M 0x2100 /* Full Duplex 100Mbit */
nyatla 69:8c5f220441f5 291 #define PHY_HALFD_100M 0x2000 /* Half Duplex 100Mbit */
nyatla 69:8c5f220441f5 292 #define PHY_FULLD_10M 0x0100 /* Full Duplex 10Mbit */
nyatla 69:8c5f220441f5 293 #define PHY_HALFD_10M 0x0000 /* Half Duplex 10MBit */
nyatla 69:8c5f220441f5 294 #define PHY_AUTO_NEG 0x3000 /* Select Auto Negotiation */
nyatla 69:8c5f220441f5 295
nyatla 69:8c5f220441f5 296 #define DP83848C_DEF_ADR 0x0100 /* Default PHY device address */
nyatla 69:8c5f220441f5 297 #define DP83848C_ID 0x20005C90 /* PHY Identifier - DP83848C */
nyatla 69:8c5f220441f5 298
nyatla 69:8c5f220441f5 299 #define LAN8720_ID 0x0007C0F0 /* PHY Identifier - LAN8720 */
nyatla 69:8c5f220441f5 300
nyatla 69:8c5f220441f5 301 #define PHY_STS_LINK 0x0001 /* PHY Status Link Mask */
nyatla 69:8c5f220441f5 302 #define PHY_STS_SPEED 0x0002 /* PHY Status Speed Mask */
nyatla 69:8c5f220441f5 303 #define PHY_STS_DUPLEX 0x0004 /* PHY Status Duplex Mask */
nyatla 69:8c5f220441f5 304
nyatla 69:8c5f220441f5 305 #define PHY_BMCR_RESET 0x8000 /* PHY Reset */
nyatla 69:8c5f220441f5 306
nyatla 69:8c5f220441f5 307 #define PHY_BMSR_LINK 0x0004 /* PHY BMSR Link valid */
nyatla 69:8c5f220441f5 308
nyatla 69:8c5f220441f5 309 #define PHY_SCSR_100MBIT 0x0008 /* Speed: 1=100 MBit, 0=10Mbit */
nyatla 69:8c5f220441f5 310 #define PHY_SCSR_DUPLEX 0x0010 /* PHY Duplex Mask */