mini board PCU9669 (and PCA9665) sample code

Dependencies:   mbed PCU9669 utility PCA9665 I2C_slaves parallel_bus

Fork of mini_board_PCU9669_old by InetrfaceProducts NXP

Sample code for PCU9669 (PCU9661, PCA9663, PCA9661 and PCA9665) evaluation board.

PCU9669 evaluation board: Mini board PCU9669
User manual is available -> http://www.nxp.com/documents/user_manual/UM10580.pdf

Committer:
nxp_ip
Date:
Wed Mar 28 04:32:50 2012 +0000
Revision:
8:6120bbbe3636
correction for comment on header part of each files (date: 26-Mar-2011 --> 26-Mar-2012)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
nxp_ip 8:6120bbbe3636 1 /** A sample code for "mini board PCU9669/PCA9665"
nxp_ip 8:6120bbbe3636 2 *
nxp_ip 8:6120bbbe3636 3 * @author Akifumi (Tedd) OKANO, NXP Semiconductors
nxp_ip 8:6120bbbe3636 4 * @version 1.0
nxp_ip 8:6120bbbe3636 5 * @date 26-Mar-2012
nxp_ip 8:6120bbbe3636 6 *
nxp_ip 8:6120bbbe3636 7 * Released under the MIT License: http://mbed.org/license/mit
nxp_ip 8:6120bbbe3636 8 *
nxp_ip 8:6120bbbe3636 9 * An operation sample of PCU9669/PCA9665 I2C bus controller.
nxp_ip 8:6120bbbe3636 10 * The mbed accesses the bus controller's parallel port (8/2 bit address and 8 bit data) by bit-banging.
nxp_ip 8:6120bbbe3636 11 * The bit-banging is poerformed by PortInOut function of mbed library.
nxp_ip 8:6120bbbe3636 12 *
nxp_ip 8:6120bbbe3636 13 * To make the code porting easier, all codes are partitioned into layers to abstract other parts.
nxp_ip 8:6120bbbe3636 14 * The mbed specific parts are concentrated in lowest layer: "hardware_abs.*".
nxp_ip 8:6120bbbe3636 15 * This module may need to be modified for the porting.
nxp_ip 8:6120bbbe3636 16 *
nxp_ip 8:6120bbbe3636 17 * All other upper layers are writen in standard-C.
nxp_ip 8:6120bbbe3636 18 *
nxp_ip 8:6120bbbe3636 19 * base code is written from 05-Sep-2011 to 09-Sep-2011.
nxp_ip 8:6120bbbe3636 20 * And demo code has been build on 11-Sep-2011.
nxp_ip 8:6120bbbe3636 21 * Debug and code adjustment has been done on 08-Sep-2011.
nxp_ip 8:6120bbbe3636 22 * Small sanitization for main.cpp. All mbed related codes are moved in to "hardware_abs.*". 13-Oct-2011
nxp_ip 8:6120bbbe3636 23 * hardware_abs are moved into parallel_bus library folder, 3 LED driver operation sample 13-Feb.-2012
nxp_ip 8:6120bbbe3636 24 * PCU9669 and PCA9665 codes are packed in a project 14-Feb-2012.
nxp_ip 8:6120bbbe3636 25 *
nxp_ip 8:6120bbbe3636 26 * Before builidng the code, please edit the file mini_board_PCU9669/config.h
nxp_ip 8:6120bbbe3636 27 * Un-comment the target name what you want to target.
nxp_ip 8:6120bbbe3636 28 */
nxp_ip 8:6120bbbe3636 29
nxp_ip 8:6120bbbe3636 30 /*
nxp_ip 8:6120bbbe3636 31 * "transfer_manager" is a module to manage I2C bus transfers.
nxp_ip 8:6120bbbe3636 32 * In this sample code, single slave access (from START or RESTART condition to STOP or next RESTART
nxp_ip 8:6120bbbe3636 33 * condition) is called transaction.
nxp_ip 8:6120bbbe3636 34 *
nxp_ip 8:6120bbbe3636 35 * In this software, the transaction is a struct (the struct is defined in "transfer_manager.h")
nxp_ip 8:6120bbbe3636 36 *
nxp_ip 8:6120bbbe3636 37 * typedef struct transaction_st {
nxp_ip 8:6120bbbe3636 38 * char i2c_address __attribute__((packed));
nxp_ip 8:6120bbbe3636 39 * char *data __attribute__((packed));
nxp_ip 8:6120bbbe3636 40 * char length __attribute__((packed));
nxp_ip 8:6120bbbe3636 41 * }
nxp_ip 8:6120bbbe3636 42 * transaction;
nxp_ip 8:6120bbbe3636 43 *
nxp_ip 8:6120bbbe3636 44 * The transaction has target I2C slave address pointer to the data array and the data length.
nxp_ip 8:6120bbbe3636 45 * Read/write drection is maneged by LSB of the i2c_address.
nxp_ip 8:6120bbbe3636 46 *
nxp_ip 8:6120bbbe3636 47 * For the reading, in this version, a dummy data array can be used but it need to have actual data
nxp_ip 8:6120bbbe3636 48 * because it will be accessed for buffer filling.
nxp_ip 8:6120bbbe3636 49 * And transfer manager doesn't readback the buffer. So user need to readback by "buffer_read()"
nxp_ip 8:6120bbbe3636 50 * function after transaction executed.
nxp_ip 8:6120bbbe3636 51 *
nxp_ip 8:6120bbbe3636 52 * A transfer can be represented by array of transaction, i.e...
nxp_ip 8:6120bbbe3636 53 *
nxp_ip 8:6120bbbe3636 54 * transaction a_sample_of_transfer[];
nxp_ip 8:6120bbbe3636 55 *
nxp_ip 8:6120bbbe3636 56 * This array_of_transaction: "transfer" is used for the setting of the registers and buffers.
nxp_ip 8:6120bbbe3636 57 *
nxp_ip 8:6120bbbe3636 58 * See "main.cpp" for the actual sample of those transfer/transaction usage
nxp_ip 8:6120bbbe3636 59 */
nxp_ip 8:6120bbbe3636 60
nxp_ip 8:6120bbbe3636 61 #include "transfer_manager.h"
nxp_ip 8:6120bbbe3636 62 #include "PCU9669_access.h" // PCU9669 chip access interface
nxp_ip 8:6120bbbe3636 63
nxp_ip 8:6120bbbe3636 64 void setup_transfer( char ch, transaction *t, char n_of_transaction ) {
nxp_ip 8:6120bbbe3636 65 int i;
nxp_ip 8:6120bbbe3636 66 #ifdef PCU9969_BURST_DATA_ACCESS
nxp_ip 8:6120bbbe3636 67 #else
nxp_ip 8:6120bbbe3636 68 int j;
nxp_ip 8:6120bbbe3636 69 #endif
nxp_ip 8:6120bbbe3636 70
nxp_ip 8:6120bbbe3636 71 write_ch_register( ch, CONTROL, 0x02 ); // AIPTRRST : AutoIncrementPointerReset (for SLATABLE TRANCONFIG and DATA)
nxp_ip 8:6120bbbe3636 72
nxp_ip 8:6120bbbe3636 73 for ( i = 0; i < n_of_transaction; i++ )
nxp_ip 8:6120bbbe3636 74 write_ch_register( ch, SLATABLE, (t + i)->i2c_address ); //
nxp_ip 8:6120bbbe3636 75
nxp_ip 8:6120bbbe3636 76 write_ch_register( ch, TRANCONFIG, n_of_transaction ); // first byte of TRANCONFIG sets to # of transactions
nxp_ip 8:6120bbbe3636 77 write_ch_register( ch, TRANSEL, 0 ); // select #0 transaction
nxp_ip 8:6120bbbe3636 78
nxp_ip 8:6120bbbe3636 79 for ( i = 0; i < n_of_transaction; i++ )
nxp_ip 8:6120bbbe3636 80 write_ch_register( ch, TRANCONFIG, (t + i)->length );
nxp_ip 8:6120bbbe3636 81
nxp_ip 8:6120bbbe3636 82
nxp_ip 8:6120bbbe3636 83 #ifdef PCU9969_BURST_DATA_ACCESS
nxp_ip 8:6120bbbe3636 84 for ( i = 0; i < n_of_transaction; i++ )
nxp_ip 8:6120bbbe3636 85 write_ch_register_burst( ch, DATA, ((t + i)->data), (t + i)->length );
nxp_ip 8:6120bbbe3636 86
nxp_ip 8:6120bbbe3636 87 #else
nxp_ip 8:6120bbbe3636 88 for ( i = 0; i < n_of_transaction; i++ )
nxp_ip 8:6120bbbe3636 89 for ( j = 0; j < (t + i)->length; j++ )
nxp_ip 8:6120bbbe3636 90 write_ch_register( ch, DATA, *(((t + i)->data) + j) );
nxp_ip 8:6120bbbe3636 91 #endif
nxp_ip 8:6120bbbe3636 92 }
nxp_ip 8:6120bbbe3636 93
nxp_ip 8:6120bbbe3636 94
nxp_ip 8:6120bbbe3636 95 void set_n_of_transaction( char ch, char n_of_transaction )
nxp_ip 8:6120bbbe3636 96 {
nxp_ip 8:6120bbbe3636 97 write_ch_register( ch, CONTROL, 0x02 ); // AIPTRRST : AutoIncrementPointerReset (for SLATABLE TRANCONFIG and DATA)
nxp_ip 8:6120bbbe3636 98 write_ch_register( ch, TRANCONFIG, n_of_transaction ); // first byte of TRANCONFIG sets to # of transactions
nxp_ip 8:6120bbbe3636 99 }
nxp_ip 8:6120bbbe3636 100
nxp_ip 8:6120bbbe3636 101
nxp_ip 8:6120bbbe3636 102 void buffer_overwrite( char ch, char transaction_number, char offset, char *data, char length ) {
nxp_ip 8:6120bbbe3636 103 #ifdef PCU9969_BURST_DATA_ACCESS
nxp_ip 8:6120bbbe3636 104 #else
nxp_ip 8:6120bbbe3636 105 int i;
nxp_ip 8:6120bbbe3636 106 #endif
nxp_ip 8:6120bbbe3636 107
nxp_ip 8:6120bbbe3636 108 write_ch_register( ch, TRANSEL, transaction_number );
nxp_ip 8:6120bbbe3636 109 write_ch_register( ch, TRANOFS, offset );
nxp_ip 8:6120bbbe3636 110
nxp_ip 8:6120bbbe3636 111 #ifdef PCU9969_BURST_DATA_ACCESS
nxp_ip 8:6120bbbe3636 112 write_ch_register_burst( ch, DATA, data, length );
nxp_ip 8:6120bbbe3636 113 #else
nxp_ip 8:6120bbbe3636 114 for ( i = 0; i < length; i++ )
nxp_ip 8:6120bbbe3636 115 write_ch_register( ch, DATA, *data++ );
nxp_ip 8:6120bbbe3636 116 #endif
nxp_ip 8:6120bbbe3636 117 }
nxp_ip 8:6120bbbe3636 118
nxp_ip 8:6120bbbe3636 119 void buffer_read( char ch, char transaction_number, char offset, char *data, char length ) {
nxp_ip 8:6120bbbe3636 120 #ifdef PCU9969_BURST_DATA_ACCESS
nxp_ip 8:6120bbbe3636 121 #else
nxp_ip 8:6120bbbe3636 122 int i;
nxp_ip 8:6120bbbe3636 123 #endif
nxp_ip 8:6120bbbe3636 124
nxp_ip 8:6120bbbe3636 125 write_ch_register( ch, TRANSEL, transaction_number );
nxp_ip 8:6120bbbe3636 126 write_ch_register( ch, TRANOFS, offset );
nxp_ip 8:6120bbbe3636 127
nxp_ip 8:6120bbbe3636 128 #ifdef PCU9969_BURST_DATA_ACCESS
nxp_ip 8:6120bbbe3636 129 read_ch_register_burst( ch, DATA, data, length );
nxp_ip 8:6120bbbe3636 130 #else
nxp_ip 8:6120bbbe3636 131 for ( i = 0; i < length; i++ )
nxp_ip 8:6120bbbe3636 132 *data++ = read_ch_register( ch, DATA );
nxp_ip 8:6120bbbe3636 133 #endif
nxp_ip 8:6120bbbe3636 134 }
nxp_ip 8:6120bbbe3636 135
nxp_ip 8:6120bbbe3636 136 void start( char ch ) {
nxp_ip 8:6120bbbe3636 137 write_ch_register( ch, CONTROL, 0x40 );
nxp_ip 8:6120bbbe3636 138 }
nxp_ip 8:6120bbbe3636 139
nxp_ip 8:6120bbbe3636 140 void start_by_trigger( char ch, char polarity ) {
nxp_ip 8:6120bbbe3636 141 write_ch_register( ch, CONTROL, 0x48 | (polarity ? 0x10 : 0x00 ) );
nxp_ip 8:6120bbbe3636 142 }
nxp_ip 8:6120bbbe3636 143
nxp_ip 8:6120bbbe3636 144 void stop( char ch ) {
nxp_ip 8:6120bbbe3636 145 write_ch_register( ch, CONTROL, 0x20 ); // set STO bit
nxp_ip 8:6120bbbe3636 146 }
nxp_ip 8:6120bbbe3636 147
nxp_ip 8:6120bbbe3636 148 /* for test of register access order variation */
nxp_ip 8:6120bbbe3636 149 /*
nxp_ip 8:6120bbbe3636 150 void setup_transfer( char ch, transaction *t, char n_of_transaction ) {
nxp_ip 8:6120bbbe3636 151 int i;
nxp_ip 8:6120bbbe3636 152 int j;
nxp_ip 8:6120bbbe3636 153
nxp_ip 8:6120bbbe3636 154 write_ch_register( ch, CONTROL, 0x02 ); // AIPTRRST : AutoIncrementPointerReset (for SLATABLE TRANCONFIG and DATA)
nxp_ip 8:6120bbbe3636 155 write_ch_register( ch, TRANCONFIG, n_of_transaction ); // first byte of TRANCONFIG sets to # of transactions
nxp_ip 8:6120bbbe3636 156 write_ch_register( ch, TRANSEL, 0 ); // select #0 transaction
nxp_ip 8:6120bbbe3636 157
nxp_ip 8:6120bbbe3636 158 for ( i = 0; i < n_of_transaction; i++ ) {
nxp_ip 8:6120bbbe3636 159 write_ch_register( ch, SLATABLE, (t + i)->i2c_address ); //
nxp_ip 8:6120bbbe3636 160 write_ch_register( ch, TRANCONFIG, (t + i)->length );
nxp_ip 8:6120bbbe3636 161 write_ch_register_burst( ch, DATA, ((t + i)->data), (t + i)->length );
nxp_ip 8:6120bbbe3636 162 }
nxp_ip 8:6120bbbe3636 163 }
nxp_ip 8:6120bbbe3636 164 */
nxp_ip 8:6120bbbe3636 165
nxp_ip 8:6120bbbe3636 166 /*
nxp_ip 8:6120bbbe3636 167 void single_transaction_buffer_fill( char ch, char slot, transaction *tp ) {
nxp_ip 8:6120bbbe3636 168 int i;
nxp_ip 8:6120bbbe3636 169
nxp_ip 8:6120bbbe3636 170 write_ch_register( ch, CONTROL, 0x02 ); // AIPTRRST : AutoIncrementPointerReset (for SLATABLE TRANCONFIG and DATA)
nxp_ip 8:6120bbbe3636 171 write_ch_register( ch, TRANSEL, slot ); // select #0 transfer
nxp_ip 8:6120bbbe3636 172 write_ch_register( ch, TRANCONFIG, 1 ); // first byte of TRANCONFIG sets to # of transactions
nxp_ip 8:6120bbbe3636 173 write_ch_register( ch, TRANCONFIG, tp->length ); // length of first transaction
nxp_ip 8:6120bbbe3636 174 write_ch_register( ch, SLATABLE, tp->i2c_address ); //
nxp_ip 8:6120bbbe3636 175
nxp_ip 8:6120bbbe3636 176 for ( i = 0; i < length; i++ )
nxp_ip 8:6120bbbe3636 177 write_ch_register( ch, DATA, *data++ ); //
nxp_ip 8:6120bbbe3636 178 }
nxp_ip 8:6120bbbe3636 179 */