en 129 / mbed-src

[11U68]fix P0_11 to use GPIO

Fork of mbed-src by mbed official

targets/hal/TARGET_NXP/TARGET_LPC2460/gpio_irq_api.c@554:edd95c0879f8, 2015-06-01 (annotated)

Committer:
mbed_official
Date:
Mon Jun 01 11:00:11 2015 +0100
Revision:
554:edd95c0879f8
Synchronized with git revision 7a1d25e3dfbe5bc1457774d4af3c73383a0ff81d



Full URL: https://github.com/mbedmicro/mbed/commit/7a1d25e3dfbe5bc1457774d4af3c73383a0ff81d/



Silicon Labs - Initial test framework pin definitions for EFM32 platforms

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 554:edd95c0879f8 1 /* mbed Microcontroller Library
mbed_official 554:edd95c0879f8 2 * Copyright (c) 2006-2015 ARM Limited
mbed_official 554:edd95c0879f8 3 *
mbed_official 554:edd95c0879f8 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 554:edd95c0879f8 5 * you may not use this file except in compliance with the License.
mbed_official 554:edd95c0879f8 6 * You may obtain a copy of the License at
mbed_official 554:edd95c0879f8 7 *
mbed_official 554:edd95c0879f8 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 554:edd95c0879f8 9 *
mbed_official 554:edd95c0879f8 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 554:edd95c0879f8 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 554:edd95c0879f8 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 554:edd95c0879f8 13 * See the License for the specific language governing permissions and
mbed_official 554:edd95c0879f8 14 * limitations under the License.
mbed_official 554:edd95c0879f8 15 */
mbed_official 554:edd95c0879f8 16 #include "gpio_irq_api.h"
mbed_official 554:edd95c0879f8 17 #include "mbed_error.h"
mbed_official 554:edd95c0879f8 18 #include <stddef.h>
mbed_official 554:edd95c0879f8 19 #include "cmsis.h"
mbed_official 554:edd95c0879f8 20
mbed_official 554:edd95c0879f8 21 #define CHANNEL_NUM 48
mbed_official 554:edd95c0879f8 22
mbed_official 554:edd95c0879f8 23 static uint32_t channel_ids[CHANNEL_NUM] = {0};
mbed_official 554:edd95c0879f8 24 static gpio_irq_handler irq_handler;
mbed_official 554:edd95c0879f8 25
mbed_official 554:edd95c0879f8 26 static void handle_interrupt_in(void) {
mbed_official 554:edd95c0879f8 27 // Read in all current interrupt registers. We do this once as the
mbed_official 554:edd95c0879f8 28 // GPIO interrupt registers are on the APB bus, and this is slow.
mbed_official 554:edd95c0879f8 29 uint32_t rise0 = LPC_GPIOINT->IO0IntStatR;
mbed_official 554:edd95c0879f8 30 uint32_t fall0 = LPC_GPIOINT->IO0IntStatF;
mbed_official 554:edd95c0879f8 31 uint32_t rise2 = LPC_GPIOINT->IO2IntStatR;
mbed_official 554:edd95c0879f8 32 uint32_t fall2 = LPC_GPIOINT->IO2IntStatF;
mbed_official 554:edd95c0879f8 33 uint32_t mask0 = 0;
mbed_official 554:edd95c0879f8 34 uint32_t mask2 = 0;
mbed_official 554:edd95c0879f8 35 int i;
mbed_official 554:edd95c0879f8 36
mbed_official 554:edd95c0879f8 37 // P0.0-0.31
mbed_official 554:edd95c0879f8 38 for (i = 0; i < 32; i++) {
mbed_official 554:edd95c0879f8 39 uint32_t pmask = (1 << i);
mbed_official 554:edd95c0879f8 40 if (rise0 & pmask) {
mbed_official 554:edd95c0879f8 41 mask0 |= pmask;
mbed_official 554:edd95c0879f8 42 if (channel_ids[i] != 0)
mbed_official 554:edd95c0879f8 43 irq_handler(channel_ids[i], IRQ_RISE);
mbed_official 554:edd95c0879f8 44 }
mbed_official 554:edd95c0879f8 45 if (fall0 & pmask) {
mbed_official 554:edd95c0879f8 46 mask0 |= pmask;
mbed_official 554:edd95c0879f8 47 if (channel_ids[i] != 0)
mbed_official 554:edd95c0879f8 48 irq_handler(channel_ids[i], IRQ_FALL);
mbed_official 554:edd95c0879f8 49 }
mbed_official 554:edd95c0879f8 50 }
mbed_official 554:edd95c0879f8 51
mbed_official 554:edd95c0879f8 52 // P2.0-2.15
mbed_official 554:edd95c0879f8 53 for (i = 0; i < 16; i++) {
mbed_official 554:edd95c0879f8 54 uint32_t pmask = (1 << i);
mbed_official 554:edd95c0879f8 55 int channel_index = i + 32;
mbed_official 554:edd95c0879f8 56 if (rise2 & pmask) {
mbed_official 554:edd95c0879f8 57 mask2 |= pmask;
mbed_official 554:edd95c0879f8 58 if (channel_ids[channel_index] != 0)
mbed_official 554:edd95c0879f8 59 irq_handler(channel_ids[channel_index], IRQ_RISE);
mbed_official 554:edd95c0879f8 60 }
mbed_official 554:edd95c0879f8 61 if (fall2 & pmask) {
mbed_official 554:edd95c0879f8 62 mask2 |= pmask;
mbed_official 554:edd95c0879f8 63 if (channel_ids[channel_index] != 0)
mbed_official 554:edd95c0879f8 64 irq_handler(channel_ids[channel_index], IRQ_FALL);
mbed_official 554:edd95c0879f8 65 }
mbed_official 554:edd95c0879f8 66 }
mbed_official 554:edd95c0879f8 67
mbed_official 554:edd95c0879f8 68 // Clear the interrupts we just handled
mbed_official 554:edd95c0879f8 69 LPC_GPIOINT->IO0IntClr = mask0;
mbed_official 554:edd95c0879f8 70 LPC_GPIOINT->IO2IntClr = mask2;
mbed_official 554:edd95c0879f8 71 }
mbed_official 554:edd95c0879f8 72
mbed_official 554:edd95c0879f8 73 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
mbed_official 554:edd95c0879f8 74 if (pin == NC) return -1;
mbed_official 554:edd95c0879f8 75
mbed_official 554:edd95c0879f8 76 irq_handler = handler;
mbed_official 554:edd95c0879f8 77
mbed_official 554:edd95c0879f8 78 obj->port = (int)pin & ~0x1F;
mbed_official 554:edd95c0879f8 79 obj->pin = (int)pin & 0x1F;
mbed_official 554:edd95c0879f8 80
mbed_official 554:edd95c0879f8 81 // Interrupts available only on GPIO0 and GPIO2
mbed_official 554:edd95c0879f8 82 if (obj->port != LPC_GPIO0_BASE && obj->port != LPC_GPIO2_BASE) {
mbed_official 554:edd95c0879f8 83 error("pins on this port cannot generate interrupts");
mbed_official 554:edd95c0879f8 84 }
mbed_official 554:edd95c0879f8 85
mbed_official 554:edd95c0879f8 86 // put us in the interrupt table
mbed_official 554:edd95c0879f8 87 int index = (obj->port == LPC_GPIO0_BASE) ? obj->pin : obj->pin + 32;
mbed_official 554:edd95c0879f8 88 channel_ids[index] = id;
mbed_official 554:edd95c0879f8 89 obj->ch = index;
mbed_official 554:edd95c0879f8 90
mbed_official 554:edd95c0879f8 91 NVIC_SetVector(EINT3_IRQn, (uint32_t)handle_interrupt_in);
mbed_official 554:edd95c0879f8 92 NVIC_EnableIRQ(EINT3_IRQn);
mbed_official 554:edd95c0879f8 93
mbed_official 554:edd95c0879f8 94 return 0;
mbed_official 554:edd95c0879f8 95 }
mbed_official 554:edd95c0879f8 96
mbed_official 554:edd95c0879f8 97 void gpio_irq_free(gpio_irq_t *obj) {
mbed_official 554:edd95c0879f8 98 channel_ids[obj->ch] = 0;
mbed_official 554:edd95c0879f8 99 }
mbed_official 554:edd95c0879f8 100
mbed_official 554:edd95c0879f8 101 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
mbed_official 554:edd95c0879f8 102 // ensure nothing is pending
mbed_official 554:edd95c0879f8 103 switch (obj->port) {
mbed_official 554:edd95c0879f8 104 case LPC_GPIO0_BASE: LPC_GPIOINT->IO0IntClr = 1 << obj->pin; break;
mbed_official 554:edd95c0879f8 105 case LPC_GPIO2_BASE: LPC_GPIOINT->IO2IntClr = 1 << obj->pin; break;
mbed_official 554:edd95c0879f8 106 }
mbed_official 554:edd95c0879f8 107
mbed_official 554:edd95c0879f8 108 // enable the pin interrupt
mbed_official 554:edd95c0879f8 109 if (event == IRQ_RISE) {
mbed_official 554:edd95c0879f8 110 switch (obj->port) {
mbed_official 554:edd95c0879f8 111 case LPC_GPIO0_BASE:
mbed_official 554:edd95c0879f8 112 if (enable) {
mbed_official 554:edd95c0879f8 113 LPC_GPIOINT->IO0IntEnR |= 1 << obj->pin;
mbed_official 554:edd95c0879f8 114 } else {
mbed_official 554:edd95c0879f8 115 LPC_GPIOINT->IO0IntEnR &= ~(1 << obj->pin);
mbed_official 554:edd95c0879f8 116 }
mbed_official 554:edd95c0879f8 117 break;
mbed_official 554:edd95c0879f8 118 case LPC_GPIO2_BASE:
mbed_official 554:edd95c0879f8 119 if (enable) {
mbed_official 554:edd95c0879f8 120 LPC_GPIOINT->IO2IntEnR |= 1 << obj->pin;
mbed_official 554:edd95c0879f8 121 } else {
mbed_official 554:edd95c0879f8 122 LPC_GPIOINT->IO2IntEnR &= ~(1 << obj->pin);
mbed_official 554:edd95c0879f8 123 }
mbed_official 554:edd95c0879f8 124 break;
mbed_official 554:edd95c0879f8 125 }
mbed_official 554:edd95c0879f8 126 } else {
mbed_official 554:edd95c0879f8 127 switch (obj->port) {
mbed_official 554:edd95c0879f8 128 case LPC_GPIO0_BASE:
mbed_official 554:edd95c0879f8 129 if (enable) {
mbed_official 554:edd95c0879f8 130 LPC_GPIOINT->IO0IntEnF |= 1 << obj->pin;
mbed_official 554:edd95c0879f8 131 } else {
mbed_official 554:edd95c0879f8 132 LPC_GPIOINT->IO0IntEnF &= ~(1 << obj->pin);
mbed_official 554:edd95c0879f8 133 }
mbed_official 554:edd95c0879f8 134 break;
mbed_official 554:edd95c0879f8 135
mbed_official 554:edd95c0879f8 136 case LPC_GPIO2_BASE:
mbed_official 554:edd95c0879f8 137 if (enable) {
mbed_official 554:edd95c0879f8 138 LPC_GPIOINT->IO2IntEnF |= 1 << obj->pin;
mbed_official 554:edd95c0879f8 139 } else {
mbed_official 554:edd95c0879f8 140 LPC_GPIOINT->IO2IntEnF &= ~(1 << obj->pin);
mbed_official 554:edd95c0879f8 141 }
mbed_official 554:edd95c0879f8 142 break;
mbed_official 554:edd95c0879f8 143 }
mbed_official 554:edd95c0879f8 144 }
mbed_official 554:edd95c0879f8 145 }
mbed_official 554:edd95c0879f8 146
mbed_official 554:edd95c0879f8 147 void gpio_irq_enable(gpio_irq_t *obj) {
mbed_official 554:edd95c0879f8 148 NVIC_EnableIRQ(EINT3_IRQn);
mbed_official 554:edd95c0879f8 149 }
mbed_official 554:edd95c0879f8 150
mbed_official 554:edd95c0879f8 151 void gpio_irq_disable(gpio_irq_t *obj) {
mbed_official 554:edd95c0879f8 152 NVIC_DisableIRQ(EINT3_IRQn);
mbed_official 554:edd95c0879f8 153 }
mbed_official 554:edd95c0879f8 154