en 129 / mbed-src

[11U68]fix P0_11 to use GPIO

Fork of mbed-src by mbed official

targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/can_api.c@574:8e5b2476066a, 2015-06-19 (annotated)

Committer:
mbed_official
Date:
Fri Jun 19 09:30:08 2015 +0100
Revision:
574:8e5b2476066a
Synchronized with git revision bb7d4bd4db3ad908ddcef72df3709e421318e28d



Full URL: https://github.com/mbedmicro/mbed/commit/bb7d4bd4db3ad908ddcef72df3709e421318e28d/



RZ_A1H - Add CAN driver.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 574:8e5b2476066a 1 /* mbed Microcontroller Library
mbed_official 574:8e5b2476066a 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 574:8e5b2476066a 3 *
mbed_official 574:8e5b2476066a 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 574:8e5b2476066a 5 * you may not use this file except in compliance with the License.
mbed_official 574:8e5b2476066a 6 * You may obtain a copy of the License at
mbed_official 574:8e5b2476066a 7 *
mbed_official 574:8e5b2476066a 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 574:8e5b2476066a 9 *
mbed_official 574:8e5b2476066a 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 574:8e5b2476066a 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 574:8e5b2476066a 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 574:8e5b2476066a 13 * See the License for the specific language governing permissions and
mbed_official 574:8e5b2476066a 14 * limitations under the License.
mbed_official 574:8e5b2476066a 15 */
mbed_official 574:8e5b2476066a 16 #include <string.h>
mbed_official 574:8e5b2476066a 17 #include "mbed_assert.h"
mbed_official 574:8e5b2476066a 18 #include "can_api.h"
mbed_official 574:8e5b2476066a 19 #include "RZ_A1_Init.h"
mbed_official 574:8e5b2476066a 20 #include "cmsis.h"
mbed_official 574:8e5b2476066a 21 #include "pinmap.h"
mbed_official 574:8e5b2476066a 22 #include "rscan0_iodefine.h"
mbed_official 574:8e5b2476066a 23 #include "r_typedefs.h"
mbed_official 574:8e5b2476066a 24 #include "MBRZA1H.h"
mbed_official 574:8e5b2476066a 25
mbed_official 574:8e5b2476066a 26 #define CAN_NUM 5
mbed_official 574:8e5b2476066a 27 #define CAN_SND_RCV 2
mbed_official 574:8e5b2476066a 28 #define IRQ_NUM 8
mbed_official 574:8e5b2476066a 29
mbed_official 574:8e5b2476066a 30 static void can_rec_irq(uint32_t ch);
mbed_official 574:8e5b2476066a 31 static void can_trx_irq(uint32_t ch);
mbed_official 574:8e5b2476066a 32 static void can_err_irq(uint32_t ch, CanIrqType type);
mbed_official 574:8e5b2476066a 33 static void can0_rec_irq(void);
mbed_official 574:8e5b2476066a 34 static void can1_rec_irq(void);
mbed_official 574:8e5b2476066a 35 static void can2_rec_irq(void);
mbed_official 574:8e5b2476066a 36 static void can3_rec_irq(void);
mbed_official 574:8e5b2476066a 37 static void can4_rec_irq(void);
mbed_official 574:8e5b2476066a 38 static void can0_trx_irq(void);
mbed_official 574:8e5b2476066a 39 static void can1_trx_irq(void);
mbed_official 574:8e5b2476066a 40 static void can2_trx_irq(void);
mbed_official 574:8e5b2476066a 41 static void can3_trx_irq(void);
mbed_official 574:8e5b2476066a 42 static void can4_trx_irq(void);
mbed_official 574:8e5b2476066a 43 static void can0_err_warning_irq(void);
mbed_official 574:8e5b2476066a 44 static void can1_err_warning_irq(void);
mbed_official 574:8e5b2476066a 45 static void can2_err_warning_irq(void);
mbed_official 574:8e5b2476066a 46 static void can3_err_warning_irq(void);
mbed_official 574:8e5b2476066a 47 static void can4_err_warning_irq(void);
mbed_official 574:8e5b2476066a 48 static void can0_overrun_irq(void);
mbed_official 574:8e5b2476066a 49 static void can1_overrun_irq(void);
mbed_official 574:8e5b2476066a 50 static void can2_overrun_irq(void);
mbed_official 574:8e5b2476066a 51 static void can3_overrun_irq(void);
mbed_official 574:8e5b2476066a 52 static void can4_overrun_irq(void);
mbed_official 574:8e5b2476066a 53 static void can0_passive_irq(void);
mbed_official 574:8e5b2476066a 54 static void can1_passive_irq(void);
mbed_official 574:8e5b2476066a 55 static void can2_passive_irq(void);
mbed_official 574:8e5b2476066a 56 static void can3_passive_irq(void);
mbed_official 574:8e5b2476066a 57 static void can4_passive_irq(void);
mbed_official 574:8e5b2476066a 58 static void can0_arb_lost_irq(void);
mbed_official 574:8e5b2476066a 59 static void can1_arb_lost_irq(void);
mbed_official 574:8e5b2476066a 60 static void can2_arb_lost_irq(void);
mbed_official 574:8e5b2476066a 61 static void can3_arb_lost_irq(void);
mbed_official 574:8e5b2476066a 62 static void can4_arb_lost_irq(void);
mbed_official 574:8e5b2476066a 63 static void can0_bus_err_irq(void);
mbed_official 574:8e5b2476066a 64 static void can1_bus_err_irq(void);
mbed_official 574:8e5b2476066a 65 static void can2_bus_err_irq(void);
mbed_official 574:8e5b2476066a 66 static void can3_bus_err_irq(void);
mbed_official 574:8e5b2476066a 67 static void can4_bus_err_irq(void);
mbed_official 574:8e5b2476066a 68 static void can_reset_reg(can_t *obj);
mbed_official 574:8e5b2476066a 69 static void can_reset_recv_rule(can_t *obj);
mbed_official 574:8e5b2476066a 70 static void can_reset_buffer(can_t *obj);
mbed_official 574:8e5b2476066a 71 static void can_reconfigure_channel(void);
mbed_official 574:8e5b2476066a 72 static void can_set_frequency(can_t *obj, int f);
mbed_official 574:8e5b2476066a 73 static void can_set_global_mode(int mode);
mbed_official 574:8e5b2476066a 74 static void can_set_channel_mode(uint32_t ch, int mode);
mbed_official 574:8e5b2476066a 75
mbed_official 574:8e5b2476066a 76 typedef enum {
mbed_official 574:8e5b2476066a 77 CAN_SEND = 0,
mbed_official 574:8e5b2476066a 78 CAN_RECV
mbed_official 574:8e5b2476066a 79 } CANfunc;
mbed_official 574:8e5b2476066a 80
mbed_official 574:8e5b2476066a 81 typedef enum {
mbed_official 574:8e5b2476066a 82 GL_OPE = 0,
mbed_official 574:8e5b2476066a 83 GL_RESET,
mbed_official 574:8e5b2476066a 84 GL_TEST
mbed_official 574:8e5b2476066a 85 } Globalmode;
mbed_official 574:8e5b2476066a 86
mbed_official 574:8e5b2476066a 87 typedef enum {
mbed_official 574:8e5b2476066a 88 CH_COMM = 0,
mbed_official 574:8e5b2476066a 89 CH_RESET,
mbed_official 574:8e5b2476066a 90 CH_HOLD
mbed_official 574:8e5b2476066a 91 } Channelmode;
mbed_official 574:8e5b2476066a 92
mbed_official 574:8e5b2476066a 93 typedef struct {
mbed_official 574:8e5b2476066a 94 IRQn_Type int_num; /* Interrupt number */
mbed_official 574:8e5b2476066a 95 IRQHandler handler; /* Interrupt handler */
mbed_official 574:8e5b2476066a 96 } can_info_int_t;
mbed_official 574:8e5b2476066a 97
mbed_official 574:8e5b2476066a 98 static can_irq_handler irq_handler;
mbed_official 574:8e5b2476066a 99 static uint32_t can_irq_id[CAN_NUM];
mbed_official 574:8e5b2476066a 100 static int can_initialized[CAN_NUM] = {0};
mbed_official 574:8e5b2476066a 101
mbed_official 574:8e5b2476066a 102 static const PinMap PinMap_CAN_RD[] = {
mbed_official 574:8e5b2476066a 103 {P7_8 , CAN_0, 4},
mbed_official 574:8e5b2476066a 104 {P9_1 , CAN_0, 3},
mbed_official 574:8e5b2476066a 105 {P1_4 , CAN_1, 3},
mbed_official 574:8e5b2476066a 106 {P5_9 , CAN_1, 5},
mbed_official 574:8e5b2476066a 107 {P7_11 , CAN_1, 4},
mbed_official 574:8e5b2476066a 108 {P11_12, CAN_1, 1},
mbed_official 574:8e5b2476066a 109 {P4_9 , CAN_2, 6},
mbed_official 574:8e5b2476066a 110 {P6_4 , CAN_2, 3},
mbed_official 574:8e5b2476066a 111 {P7_2 , CAN_2, 5},
mbed_official 574:8e5b2476066a 112 {P2_12 , CAN_3, 5},
mbed_official 574:8e5b2476066a 113 {P4_2 , CAN_3, 4},
mbed_official 574:8e5b2476066a 114 {P1_5 , CAN_4, 3},
mbed_official 574:8e5b2476066a 115 {P2_14 , CAN_4, 5},
mbed_official 574:8e5b2476066a 116 {NC , NC , 0}
mbed_official 574:8e5b2476066a 117 };
mbed_official 574:8e5b2476066a 118
mbed_official 574:8e5b2476066a 119 static const PinMap PinMap_CAN_TD[] = {
mbed_official 574:8e5b2476066a 120 {P7_9 , CAN_0, 4},
mbed_official 574:8e5b2476066a 121 {P9_0 , CAN_0, 3},
mbed_official 574:8e5b2476066a 122 {P5_10 , CAN_1, 5},
mbed_official 574:8e5b2476066a 123 {P7_10 , CAN_1, 4},
mbed_official 574:8e5b2476066a 124 {P11_13, CAN_1, 1},
mbed_official 574:8e5b2476066a 125 {P4_8 , CAN_2, 6},
mbed_official 574:8e5b2476066a 126 {P6_5 , CAN_2, 3},
mbed_official 574:8e5b2476066a 127 {P7_3 , CAN_2, 5},
mbed_official 574:8e5b2476066a 128 {P2_13 , CAN_3, 5},
mbed_official 574:8e5b2476066a 129 {P4_3 , CAN_3, 4},
mbed_official 574:8e5b2476066a 130 {P4_11 , CAN_4, 6},
mbed_official 574:8e5b2476066a 131 {P8_10 , CAN_4, 5},
mbed_official 574:8e5b2476066a 132 {NC , NC , 0}
mbed_official 574:8e5b2476066a 133 };
mbed_official 574:8e5b2476066a 134
mbed_official 574:8e5b2476066a 135 static __IO uint32_t *CTR_MATCH[] = {
mbed_official 574:8e5b2476066a 136 &RSCAN0C0CTR,
mbed_official 574:8e5b2476066a 137 &RSCAN0C1CTR,
mbed_official 574:8e5b2476066a 138 &RSCAN0C2CTR,
mbed_official 574:8e5b2476066a 139 &RSCAN0C3CTR,
mbed_official 574:8e5b2476066a 140 &RSCAN0C4CTR,
mbed_official 574:8e5b2476066a 141 };
mbed_official 574:8e5b2476066a 142
mbed_official 574:8e5b2476066a 143 static __IO uint32_t *CFG_MATCH[] = {
mbed_official 574:8e5b2476066a 144 &RSCAN0C0CFG,
mbed_official 574:8e5b2476066a 145 &RSCAN0C1CFG,
mbed_official 574:8e5b2476066a 146 &RSCAN0C2CFG,
mbed_official 574:8e5b2476066a 147 &RSCAN0C3CFG,
mbed_official 574:8e5b2476066a 148 &RSCAN0C4CFG,
mbed_official 574:8e5b2476066a 149 };
mbed_official 574:8e5b2476066a 150
mbed_official 574:8e5b2476066a 151 static __IO uint32_t *RFCC_MATCH[] = {
mbed_official 574:8e5b2476066a 152 &RSCAN0RFCC0,
mbed_official 574:8e5b2476066a 153 &RSCAN0RFCC1,
mbed_official 574:8e5b2476066a 154 &RSCAN0RFCC2,
mbed_official 574:8e5b2476066a 155 &RSCAN0RFCC3,
mbed_official 574:8e5b2476066a 156 &RSCAN0RFCC4,
mbed_official 574:8e5b2476066a 157 &RSCAN0RFCC5,
mbed_official 574:8e5b2476066a 158 &RSCAN0RFCC6,
mbed_official 574:8e5b2476066a 159 &RSCAN0RFCC7
mbed_official 574:8e5b2476066a 160 };
mbed_official 574:8e5b2476066a 161
mbed_official 574:8e5b2476066a 162 static __IO uint32_t *TXQCC_MATCH[] = {
mbed_official 574:8e5b2476066a 163 &RSCAN0TXQCC0,
mbed_official 574:8e5b2476066a 164 &RSCAN0TXQCC1,
mbed_official 574:8e5b2476066a 165 &RSCAN0TXQCC2,
mbed_official 574:8e5b2476066a 166 &RSCAN0TXQCC3,
mbed_official 574:8e5b2476066a 167 &RSCAN0TXQCC4,
mbed_official 574:8e5b2476066a 168 };
mbed_official 574:8e5b2476066a 169
mbed_official 574:8e5b2476066a 170 static __IO uint32_t *THLCC_MATCH[] = {
mbed_official 574:8e5b2476066a 171 &RSCAN0THLCC0,
mbed_official 574:8e5b2476066a 172 &RSCAN0THLCC1,
mbed_official 574:8e5b2476066a 173 &RSCAN0THLCC2,
mbed_official 574:8e5b2476066a 174 &RSCAN0THLCC3,
mbed_official 574:8e5b2476066a 175 &RSCAN0THLCC4,
mbed_official 574:8e5b2476066a 176 };
mbed_official 574:8e5b2476066a 177
mbed_official 574:8e5b2476066a 178 static __IO uint32_t *STS_MATCH[] = {
mbed_official 574:8e5b2476066a 179 &RSCAN0C0STS,
mbed_official 574:8e5b2476066a 180 &RSCAN0C1STS,
mbed_official 574:8e5b2476066a 181 &RSCAN0C2STS,
mbed_official 574:8e5b2476066a 182 &RSCAN0C3STS,
mbed_official 574:8e5b2476066a 183 &RSCAN0C4STS,
mbed_official 574:8e5b2476066a 184 };
mbed_official 574:8e5b2476066a 185
mbed_official 574:8e5b2476066a 186 static __IO uint32_t *ERFL_MATCH[] = {
mbed_official 574:8e5b2476066a 187 &RSCAN0C0ERFL,
mbed_official 574:8e5b2476066a 188 &RSCAN0C1ERFL,
mbed_official 574:8e5b2476066a 189 &RSCAN0C2ERFL,
mbed_official 574:8e5b2476066a 190 &RSCAN0C3ERFL,
mbed_official 574:8e5b2476066a 191 &RSCAN0C4ERFL,
mbed_official 574:8e5b2476066a 192 };
mbed_official 574:8e5b2476066a 193
mbed_official 574:8e5b2476066a 194 static __IO uint32_t *CFCC_TBL[CAN_NUM][CAN_SND_RCV] = {
mbed_official 574:8e5b2476066a 195 { &RSCAN0CFCC0 , &RSCAN0CFCC1 },
mbed_official 574:8e5b2476066a 196 { &RSCAN0CFCC3 , &RSCAN0CFCC4 },
mbed_official 574:8e5b2476066a 197 { &RSCAN0CFCC6 , &RSCAN0CFCC7 },
mbed_official 574:8e5b2476066a 198 { &RSCAN0CFCC9 , &RSCAN0CFCC10 },
mbed_official 574:8e5b2476066a 199 { &RSCAN0CFCC12, &RSCAN0CFCC13 }
mbed_official 574:8e5b2476066a 200 };
mbed_official 574:8e5b2476066a 201
mbed_official 574:8e5b2476066a 202 static __IO uint32_t *CFSTS_TBL[CAN_NUM][CAN_SND_RCV] = {
mbed_official 574:8e5b2476066a 203 { &RSCAN0CFSTS0 , &RSCAN0CFSTS1 },
mbed_official 574:8e5b2476066a 204 { &RSCAN0CFSTS3 , &RSCAN0CFSTS4 },
mbed_official 574:8e5b2476066a 205 { &RSCAN0CFSTS6 , &RSCAN0CFSTS7 },
mbed_official 574:8e5b2476066a 206 { &RSCAN0CFSTS9 , &RSCAN0CFSTS10 },
mbed_official 574:8e5b2476066a 207 { &RSCAN0CFSTS12, &RSCAN0CFSTS13 }
mbed_official 574:8e5b2476066a 208 };
mbed_official 574:8e5b2476066a 209
mbed_official 574:8e5b2476066a 210 static __IO uint32_t *CFPCTR_TBL[CAN_NUM][CAN_SND_RCV] = {
mbed_official 574:8e5b2476066a 211 { &RSCAN0CFPCTR0 , &RSCAN0CFPCTR1 },
mbed_official 574:8e5b2476066a 212 { &RSCAN0CFPCTR3 , &RSCAN0CFPCTR4 },
mbed_official 574:8e5b2476066a 213 { &RSCAN0CFPCTR6 , &RSCAN0CFPCTR7 },
mbed_official 574:8e5b2476066a 214 { &RSCAN0CFPCTR9 , &RSCAN0CFPCTR10 },
mbed_official 574:8e5b2476066a 215 { &RSCAN0CFPCTR12, &RSCAN0CFPCTR13 }
mbed_official 574:8e5b2476066a 216 };
mbed_official 574:8e5b2476066a 217
mbed_official 574:8e5b2476066a 218 static __IO uint32_t *CFID_TBL[CAN_NUM][CAN_SND_RCV] = {
mbed_official 574:8e5b2476066a 219 { &RSCAN0CFID0 , &RSCAN0CFID1 },
mbed_official 574:8e5b2476066a 220 { &RSCAN0CFID3 , &RSCAN0CFID4 },
mbed_official 574:8e5b2476066a 221 { &RSCAN0CFID6 , &RSCAN0CFID7 },
mbed_official 574:8e5b2476066a 222 { &RSCAN0CFID9 , &RSCAN0CFID10 },
mbed_official 574:8e5b2476066a 223 { &RSCAN0CFID12, &RSCAN0CFID13 }
mbed_official 574:8e5b2476066a 224 };
mbed_official 574:8e5b2476066a 225
mbed_official 574:8e5b2476066a 226 static __IO uint32_t *CFPTR_TBL[CAN_NUM][CAN_SND_RCV] = {
mbed_official 574:8e5b2476066a 227 { &RSCAN0CFPTR0 , &RSCAN0CFPTR1 },
mbed_official 574:8e5b2476066a 228 { &RSCAN0CFPTR3 , &RSCAN0CFPTR4 },
mbed_official 574:8e5b2476066a 229 { &RSCAN0CFPTR6 , &RSCAN0CFPTR7 },
mbed_official 574:8e5b2476066a 230 { &RSCAN0CFPTR9 , &RSCAN0CFPTR10 },
mbed_official 574:8e5b2476066a 231 { &RSCAN0CFPTR12, &RSCAN0CFPTR13 }
mbed_official 574:8e5b2476066a 232 };
mbed_official 574:8e5b2476066a 233
mbed_official 574:8e5b2476066a 234 static __IO uint32_t *CFDF0_TBL[CAN_NUM][CAN_SND_RCV] = {
mbed_official 574:8e5b2476066a 235 { &RSCAN0CFDF00 , &RSCAN0CFDF01 },
mbed_official 574:8e5b2476066a 236 { &RSCAN0CFDF03 , &RSCAN0CFDF04 },
mbed_official 574:8e5b2476066a 237 { &RSCAN0CFDF06 , &RSCAN0CFDF07 },
mbed_official 574:8e5b2476066a 238 { &RSCAN0CFDF09 , &RSCAN0CFDF010 },
mbed_official 574:8e5b2476066a 239 { &RSCAN0CFDF012, &RSCAN0CFDF013 }
mbed_official 574:8e5b2476066a 240 };
mbed_official 574:8e5b2476066a 241
mbed_official 574:8e5b2476066a 242 static __IO uint32_t *CFDF1_TBL[CAN_NUM][CAN_SND_RCV] = {
mbed_official 574:8e5b2476066a 243 { &RSCAN0CFDF10 , &RSCAN0CFDF11 },
mbed_official 574:8e5b2476066a 244 { &RSCAN0CFDF13 , &RSCAN0CFDF14 },
mbed_official 574:8e5b2476066a 245 { &RSCAN0CFDF16 , &RSCAN0CFDF17 },
mbed_official 574:8e5b2476066a 246 { &RSCAN0CFDF19 , &RSCAN0CFDF110 },
mbed_official 574:8e5b2476066a 247 { &RSCAN0CFDF112, &RSCAN0CFDF113 }
mbed_official 574:8e5b2476066a 248 };
mbed_official 574:8e5b2476066a 249
mbed_official 574:8e5b2476066a 250 static const can_info_int_t can_int_info[CAN_NUM][IRQ_NUM] =
mbed_official 574:8e5b2476066a 251 {
mbed_official 574:8e5b2476066a 252 { /* ch0 */
mbed_official 574:8e5b2476066a 253 { INTRCAN0REC_IRQn, can0_rec_irq }, /* RxIrq */
mbed_official 574:8e5b2476066a 254 { INTRCAN0TRX_IRQn, can0_trx_irq }, /* TxIrq */
mbed_official 574:8e5b2476066a 255 { INTRCAN0ERR_IRQn, can0_err_warning_irq }, /* EwIrq */
mbed_official 574:8e5b2476066a 256 { INTRCAN0ERR_IRQn, can0_overrun_irq }, /* DoIrq */
mbed_official 574:8e5b2476066a 257 { INTRCAN0ERR_IRQn, NULL }, /* WuIrq(not supported) */
mbed_official 574:8e5b2476066a 258 { INTRCAN0ERR_IRQn, can0_passive_irq }, /* EpIrq */
mbed_official 574:8e5b2476066a 259 { INTRCAN0ERR_IRQn, can0_arb_lost_irq }, /* AlIrq */
mbed_official 574:8e5b2476066a 260 { INTRCAN0ERR_IRQn, can0_bus_err_irq } /* BeIrq */
mbed_official 574:8e5b2476066a 261 },
mbed_official 574:8e5b2476066a 262 { /* ch1 */
mbed_official 574:8e5b2476066a 263 { INTRCAN1REC_IRQn, can1_rec_irq }, /* RxIrq */
mbed_official 574:8e5b2476066a 264 { INTRCAN1TRX_IRQn, can1_trx_irq }, /* TxIrq */
mbed_official 574:8e5b2476066a 265 { INTRCAN1ERR_IRQn, can1_err_warning_irq }, /* EwIrq */
mbed_official 574:8e5b2476066a 266 { INTRCAN1ERR_IRQn, can1_overrun_irq }, /* DoIrq */
mbed_official 574:8e5b2476066a 267 { INTRCAN1ERR_IRQn, NULL }, /* WuIrq(not supported) */
mbed_official 574:8e5b2476066a 268 { INTRCAN1ERR_IRQn, can1_passive_irq }, /* EpIrq */
mbed_official 574:8e5b2476066a 269 { INTRCAN1ERR_IRQn, can1_arb_lost_irq }, /* AlIrq */
mbed_official 574:8e5b2476066a 270 { INTRCAN1ERR_IRQn, can1_bus_err_irq } /* BeIrq */
mbed_official 574:8e5b2476066a 271 },
mbed_official 574:8e5b2476066a 272 { /* ch2 */
mbed_official 574:8e5b2476066a 273 { INTRCAN2REC_IRQn, can2_rec_irq }, /* RxIrq */
mbed_official 574:8e5b2476066a 274 { INTRCAN2TRX_IRQn, can2_trx_irq }, /* TxIrq */
mbed_official 574:8e5b2476066a 275 { INTRCAN2ERR_IRQn, can2_err_warning_irq }, /* EwIrq */
mbed_official 574:8e5b2476066a 276 { INTRCAN2ERR_IRQn, can2_overrun_irq }, /* DoIrq */
mbed_official 574:8e5b2476066a 277 { INTRCAN2ERR_IRQn, NULL }, /* WuIrq(not supported) */
mbed_official 574:8e5b2476066a 278 { INTRCAN2ERR_IRQn, can2_passive_irq }, /* EpIrq */
mbed_official 574:8e5b2476066a 279 { INTRCAN2ERR_IRQn, can2_arb_lost_irq }, /* AlIrq */
mbed_official 574:8e5b2476066a 280 { INTRCAN2ERR_IRQn, can2_bus_err_irq } /* BeIrq */
mbed_official 574:8e5b2476066a 281 },
mbed_official 574:8e5b2476066a 282 { /* ch3 */
mbed_official 574:8e5b2476066a 283 { INTRCAN3REC_IRQn, can3_rec_irq }, /* RxIrq */
mbed_official 574:8e5b2476066a 284 { INTRCAN3TRX_IRQn, can3_trx_irq }, /* TxIrq */
mbed_official 574:8e5b2476066a 285 { INTRCAN3ERR_IRQn, can3_err_warning_irq }, /* EwIrq */
mbed_official 574:8e5b2476066a 286 { INTRCAN3ERR_IRQn, can3_overrun_irq }, /* DoIrq */
mbed_official 574:8e5b2476066a 287 { INTRCAN3ERR_IRQn, NULL }, /* WuIrq(not supported) */
mbed_official 574:8e5b2476066a 288 { INTRCAN3ERR_IRQn, can3_passive_irq }, /* EpIrq */
mbed_official 574:8e5b2476066a 289 { INTRCAN3ERR_IRQn, can3_arb_lost_irq }, /* AlIrq */
mbed_official 574:8e5b2476066a 290 { INTRCAN3ERR_IRQn, can3_bus_err_irq } /* BeIrq */
mbed_official 574:8e5b2476066a 291 },
mbed_official 574:8e5b2476066a 292 { /* ch4 */
mbed_official 574:8e5b2476066a 293 { INTRCAN4REC_IRQn, can4_rec_irq }, /* RxIrq */
mbed_official 574:8e5b2476066a 294 { INTRCAN4TRX_IRQn, can4_trx_irq }, /* TxIrq */
mbed_official 574:8e5b2476066a 295 { INTRCAN4ERR_IRQn, can4_err_warning_irq }, /* EwIrq */
mbed_official 574:8e5b2476066a 296 { INTRCAN4ERR_IRQn, can4_overrun_irq }, /* DoIrq */
mbed_official 574:8e5b2476066a 297 { INTRCAN4ERR_IRQn, NULL }, /* WuIrq(not supported) */
mbed_official 574:8e5b2476066a 298 { INTRCAN4ERR_IRQn, can4_passive_irq }, /* EpIrq */
mbed_official 574:8e5b2476066a 299 { INTRCAN4ERR_IRQn, can4_arb_lost_irq }, /* AlIrq */
mbed_official 574:8e5b2476066a 300 { INTRCAN4ERR_IRQn, can4_bus_err_irq } /* BeIrq */
mbed_official 574:8e5b2476066a 301 }
mbed_official 574:8e5b2476066a 302 };
mbed_official 574:8e5b2476066a 303
mbed_official 574:8e5b2476066a 304 static __IO uint32_t *dmy_gaflid = &RSCAN0GAFLID0;
mbed_official 574:8e5b2476066a 305 static __IO uint32_t *dmy_gaflm = &RSCAN0GAFLM0;
mbed_official 574:8e5b2476066a 306 static __IO uint32_t *dmy_gaflp0 = &RSCAN0GAFLP00;
mbed_official 574:8e5b2476066a 307 static __IO uint32_t *dmy_gaflp1 = &RSCAN0GAFLP10;
mbed_official 574:8e5b2476066a 308
mbed_official 574:8e5b2476066a 309 void can_irq_init(can_t *obj, can_irq_handler handler, uint32_t id) {
mbed_official 574:8e5b2476066a 310 irq_handler = handler;
mbed_official 574:8e5b2476066a 311 can_irq_id[obj->ch] = id;
mbed_official 574:8e5b2476066a 312 }
mbed_official 574:8e5b2476066a 313
mbed_official 574:8e5b2476066a 314 void can_irq_free(can_t *obj) {
mbed_official 574:8e5b2476066a 315 can_irq_id[obj->ch] = 0;
mbed_official 574:8e5b2476066a 316 }
mbed_official 574:8e5b2476066a 317
mbed_official 574:8e5b2476066a 318 void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable) {
mbed_official 574:8e5b2476066a 319 __IO uint32_t *dmy_ctr;
mbed_official 574:8e5b2476066a 320
mbed_official 574:8e5b2476066a 321 /* Wake-up Irq is not supported */
mbed_official 574:8e5b2476066a 322 if (type != IRQ_WAKEUP) {
mbed_official 574:8e5b2476066a 323 if (enable) {
mbed_official 574:8e5b2476066a 324 dmy_ctr = CTR_MATCH[obj->ch];
mbed_official 574:8e5b2476066a 325 if (type == IRQ_ERROR) {
mbed_official 574:8e5b2476066a 326 /* EWIE interrupts is enable */
mbed_official 574:8e5b2476066a 327 *dmy_ctr |= 0x00000200;
mbed_official 574:8e5b2476066a 328 } else if (type == IRQ_OVERRUN) {
mbed_official 574:8e5b2476066a 329 /* OLIE interrupts is enable */
mbed_official 574:8e5b2476066a 330 *dmy_ctr |= 0x00002000;
mbed_official 574:8e5b2476066a 331 } else if (type == IRQ_PASSIVE) {
mbed_official 574:8e5b2476066a 332 /* EPIE interrupts is enable */
mbed_official 574:8e5b2476066a 333 *dmy_ctr |= 0x00000400;
mbed_official 574:8e5b2476066a 334 } else if (type == IRQ_ARB) {
mbed_official 574:8e5b2476066a 335 /* ALIE interrupts is enable */
mbed_official 574:8e5b2476066a 336 *dmy_ctr |= 0x00008000;
mbed_official 574:8e5b2476066a 337 } else if (type == IRQ_BUS) {
mbed_official 574:8e5b2476066a 338 /* BEIE interrupts is enable */
mbed_official 574:8e5b2476066a 339 *dmy_ctr |= 0x00000100;
mbed_official 574:8e5b2476066a 340 }
mbed_official 574:8e5b2476066a 341 InterruptHandlerRegister(can_int_info[obj->ch][type].int_num, can_int_info[obj->ch][type].handler);
mbed_official 574:8e5b2476066a 342 GIC_SetPriority(can_int_info[obj->ch][type].int_num, 5);
mbed_official 574:8e5b2476066a 343 GIC_EnableIRQ(can_int_info[obj->ch][type].int_num);
mbed_official 574:8e5b2476066a 344 } else {
mbed_official 574:8e5b2476066a 345 GIC_DisableIRQ(can_int_info[obj->ch][type].int_num);
mbed_official 574:8e5b2476066a 346 }
mbed_official 574:8e5b2476066a 347 }
mbed_official 574:8e5b2476066a 348 }
mbed_official 574:8e5b2476066a 349
mbed_official 574:8e5b2476066a 350 static void can_rec_irq(uint32_t ch) {
mbed_official 574:8e5b2476066a 351 __IO uint32_t *dmy_cfsts;
mbed_official 574:8e5b2476066a 352
mbed_official 574:8e5b2476066a 353 dmy_cfsts = CFSTS_TBL[ch][CAN_RECV];
mbed_official 574:8e5b2476066a 354 *dmy_cfsts &= 0xFFFFFFF7; // Clear CFRXIF
mbed_official 574:8e5b2476066a 355
mbed_official 574:8e5b2476066a 356 irq_handler(can_irq_id[ch], IRQ_RX);
mbed_official 574:8e5b2476066a 357 }
mbed_official 574:8e5b2476066a 358
mbed_official 574:8e5b2476066a 359 static void can_trx_irq(uint32_t ch) {
mbed_official 574:8e5b2476066a 360 __IO uint32_t *dmy_cfsts;
mbed_official 574:8e5b2476066a 361
mbed_official 574:8e5b2476066a 362 dmy_cfsts = CFSTS_TBL[ch][CAN_SEND];
mbed_official 574:8e5b2476066a 363 *dmy_cfsts &= 0xFFFFFFEF; // Clear CFTXIF
mbed_official 574:8e5b2476066a 364
mbed_official 574:8e5b2476066a 365 irq_handler(can_irq_id[ch], IRQ_TX);
mbed_official 574:8e5b2476066a 366 }
mbed_official 574:8e5b2476066a 367
mbed_official 574:8e5b2476066a 368 static void can_err_irq(uint32_t ch, CanIrqType type) {
mbed_official 574:8e5b2476066a 369 __IO uint32_t *dmy_erfl;
mbed_official 574:8e5b2476066a 370 int val = 1;
mbed_official 574:8e5b2476066a 371
mbed_official 574:8e5b2476066a 372 dmy_erfl = ERFL_MATCH[ch];
mbed_official 574:8e5b2476066a 373 switch (type) {
mbed_official 574:8e5b2476066a 374 case IRQ_ERROR:
mbed_official 574:8e5b2476066a 375 *dmy_erfl &= 0xFFFFFFFD; // Clear EWF
mbed_official 574:8e5b2476066a 376 break;
mbed_official 574:8e5b2476066a 377 case IRQ_OVERRUN:
mbed_official 574:8e5b2476066a 378 *dmy_erfl &= 0xFFFFFFDF; // Clear OVLF
mbed_official 574:8e5b2476066a 379 break;
mbed_official 574:8e5b2476066a 380 case IRQ_PASSIVE:
mbed_official 574:8e5b2476066a 381 *dmy_erfl &= 0xFFFFFFFB; // Clear EPF
mbed_official 574:8e5b2476066a 382 break;
mbed_official 574:8e5b2476066a 383 case IRQ_ARB:
mbed_official 574:8e5b2476066a 384 *dmy_erfl &= 0xFFFFFF7F; // Clear ALF
mbed_official 574:8e5b2476066a 385 break;
mbed_official 574:8e5b2476066a 386 case IRQ_BUS:
mbed_official 574:8e5b2476066a 387 *dmy_erfl &= 0xFFFF00FF; // Clear ADERRAB0ERRAB1ERRACERRAAERRAFERRASERR
mbed_official 574:8e5b2476066a 388 *dmy_erfl &= 0xFFFFFFFE; // Clear BEF
mbed_official 574:8e5b2476066a 389 break;
mbed_official 574:8e5b2476066a 390 case IRQ_WAKEUP:
mbed_official 574:8e5b2476066a 391 /* not supported */
mbed_official 574:8e5b2476066a 392 /* fall through */
mbed_official 574:8e5b2476066a 393 default:
mbed_official 574:8e5b2476066a 394 val = 0;
mbed_official 574:8e5b2476066a 395 break;
mbed_official 574:8e5b2476066a 396 }
mbed_official 574:8e5b2476066a 397 if (val == 1) {
mbed_official 574:8e5b2476066a 398 irq_handler(can_irq_id[ch], type);
mbed_official 574:8e5b2476066a 399 }
mbed_official 574:8e5b2476066a 400 }
mbed_official 574:8e5b2476066a 401
mbed_official 574:8e5b2476066a 402 static void can0_rec_irq(void) {
mbed_official 574:8e5b2476066a 403 can_rec_irq(CAN_0);
mbed_official 574:8e5b2476066a 404 }
mbed_official 574:8e5b2476066a 405
mbed_official 574:8e5b2476066a 406 static void can1_rec_irq(void) {
mbed_official 574:8e5b2476066a 407 can_rec_irq(CAN_1);
mbed_official 574:8e5b2476066a 408 }
mbed_official 574:8e5b2476066a 409
mbed_official 574:8e5b2476066a 410 static void can2_rec_irq(void) {
mbed_official 574:8e5b2476066a 411 can_rec_irq(CAN_2);
mbed_official 574:8e5b2476066a 412 }
mbed_official 574:8e5b2476066a 413
mbed_official 574:8e5b2476066a 414 static void can3_rec_irq(void) {
mbed_official 574:8e5b2476066a 415 can_rec_irq(CAN_3);
mbed_official 574:8e5b2476066a 416 }
mbed_official 574:8e5b2476066a 417
mbed_official 574:8e5b2476066a 418 static void can4_rec_irq(void) {
mbed_official 574:8e5b2476066a 419 can_rec_irq(CAN_4);
mbed_official 574:8e5b2476066a 420 }
mbed_official 574:8e5b2476066a 421
mbed_official 574:8e5b2476066a 422 static void can0_trx_irq(void) {
mbed_official 574:8e5b2476066a 423 can_trx_irq(CAN_0);
mbed_official 574:8e5b2476066a 424 }
mbed_official 574:8e5b2476066a 425
mbed_official 574:8e5b2476066a 426 static void can1_trx_irq(void) {
mbed_official 574:8e5b2476066a 427 can_trx_irq(CAN_1);
mbed_official 574:8e5b2476066a 428 }
mbed_official 574:8e5b2476066a 429
mbed_official 574:8e5b2476066a 430 static void can2_trx_irq(void) {
mbed_official 574:8e5b2476066a 431 can_trx_irq(CAN_2);
mbed_official 574:8e5b2476066a 432 }
mbed_official 574:8e5b2476066a 433
mbed_official 574:8e5b2476066a 434 static void can3_trx_irq(void) {
mbed_official 574:8e5b2476066a 435 can_trx_irq(CAN_3);
mbed_official 574:8e5b2476066a 436 }
mbed_official 574:8e5b2476066a 437
mbed_official 574:8e5b2476066a 438 static void can4_trx_irq(void) {
mbed_official 574:8e5b2476066a 439 can_trx_irq(CAN_4);
mbed_official 574:8e5b2476066a 440 }
mbed_official 574:8e5b2476066a 441
mbed_official 574:8e5b2476066a 442 static void can0_err_warning_irq(void) {
mbed_official 574:8e5b2476066a 443 can_err_irq(CAN_0, IRQ_ERROR);
mbed_official 574:8e5b2476066a 444 }
mbed_official 574:8e5b2476066a 445
mbed_official 574:8e5b2476066a 446 static void can1_err_warning_irq(void) {
mbed_official 574:8e5b2476066a 447 can_err_irq(CAN_1, IRQ_ERROR);
mbed_official 574:8e5b2476066a 448 }
mbed_official 574:8e5b2476066a 449
mbed_official 574:8e5b2476066a 450 static void can2_err_warning_irq(void) {
mbed_official 574:8e5b2476066a 451 can_err_irq(CAN_2, IRQ_ERROR);
mbed_official 574:8e5b2476066a 452 }
mbed_official 574:8e5b2476066a 453
mbed_official 574:8e5b2476066a 454 static void can3_err_warning_irq(void) {
mbed_official 574:8e5b2476066a 455 can_err_irq(CAN_3, IRQ_ERROR);
mbed_official 574:8e5b2476066a 456 }
mbed_official 574:8e5b2476066a 457
mbed_official 574:8e5b2476066a 458 static void can4_err_warning_irq(void) {
mbed_official 574:8e5b2476066a 459 can_err_irq(CAN_4, IRQ_ERROR);
mbed_official 574:8e5b2476066a 460 }
mbed_official 574:8e5b2476066a 461
mbed_official 574:8e5b2476066a 462 static void can0_overrun_irq(void) {
mbed_official 574:8e5b2476066a 463 can_err_irq(CAN_0, IRQ_OVERRUN);
mbed_official 574:8e5b2476066a 464 }
mbed_official 574:8e5b2476066a 465
mbed_official 574:8e5b2476066a 466 static void can1_overrun_irq(void) {
mbed_official 574:8e5b2476066a 467 can_err_irq(CAN_1, IRQ_OVERRUN);
mbed_official 574:8e5b2476066a 468 }
mbed_official 574:8e5b2476066a 469
mbed_official 574:8e5b2476066a 470 static void can2_overrun_irq(void) {
mbed_official 574:8e5b2476066a 471 can_err_irq(CAN_2, IRQ_OVERRUN);
mbed_official 574:8e5b2476066a 472 }
mbed_official 574:8e5b2476066a 473
mbed_official 574:8e5b2476066a 474 static void can3_overrun_irq(void) {
mbed_official 574:8e5b2476066a 475 can_err_irq(CAN_3, IRQ_OVERRUN);
mbed_official 574:8e5b2476066a 476 }
mbed_official 574:8e5b2476066a 477
mbed_official 574:8e5b2476066a 478 static void can4_overrun_irq(void) {
mbed_official 574:8e5b2476066a 479 can_err_irq(CAN_4, IRQ_OVERRUN);
mbed_official 574:8e5b2476066a 480 }
mbed_official 574:8e5b2476066a 481
mbed_official 574:8e5b2476066a 482 static void can0_passive_irq(void) {
mbed_official 574:8e5b2476066a 483 can_err_irq(CAN_0, IRQ_PASSIVE);
mbed_official 574:8e5b2476066a 484 }
mbed_official 574:8e5b2476066a 485
mbed_official 574:8e5b2476066a 486 static void can1_passive_irq(void) {
mbed_official 574:8e5b2476066a 487 can_err_irq(CAN_1, IRQ_PASSIVE);
mbed_official 574:8e5b2476066a 488 }
mbed_official 574:8e5b2476066a 489
mbed_official 574:8e5b2476066a 490 static void can2_passive_irq(void) {
mbed_official 574:8e5b2476066a 491 can_err_irq(CAN_2, IRQ_PASSIVE);
mbed_official 574:8e5b2476066a 492 }
mbed_official 574:8e5b2476066a 493
mbed_official 574:8e5b2476066a 494 static void can3_passive_irq(void) {
mbed_official 574:8e5b2476066a 495 can_err_irq(CAN_3, IRQ_PASSIVE);
mbed_official 574:8e5b2476066a 496 }
mbed_official 574:8e5b2476066a 497
mbed_official 574:8e5b2476066a 498 static void can4_passive_irq(void) {
mbed_official 574:8e5b2476066a 499 can_err_irq(CAN_4, IRQ_PASSIVE);
mbed_official 574:8e5b2476066a 500 }
mbed_official 574:8e5b2476066a 501
mbed_official 574:8e5b2476066a 502 static void can0_arb_lost_irq(void) {
mbed_official 574:8e5b2476066a 503 can_err_irq(CAN_0, IRQ_ARB);
mbed_official 574:8e5b2476066a 504 }
mbed_official 574:8e5b2476066a 505
mbed_official 574:8e5b2476066a 506 static void can1_arb_lost_irq(void) {
mbed_official 574:8e5b2476066a 507 can_err_irq(CAN_1, IRQ_ARB);
mbed_official 574:8e5b2476066a 508 }
mbed_official 574:8e5b2476066a 509
mbed_official 574:8e5b2476066a 510 static void can2_arb_lost_irq(void) {
mbed_official 574:8e5b2476066a 511 can_err_irq(CAN_2, IRQ_ARB);
mbed_official 574:8e5b2476066a 512 }
mbed_official 574:8e5b2476066a 513
mbed_official 574:8e5b2476066a 514 static void can3_arb_lost_irq(void) {
mbed_official 574:8e5b2476066a 515 can_err_irq(CAN_3, IRQ_ARB);
mbed_official 574:8e5b2476066a 516 }
mbed_official 574:8e5b2476066a 517
mbed_official 574:8e5b2476066a 518 static void can4_arb_lost_irq(void) {
mbed_official 574:8e5b2476066a 519 can_err_irq(CAN_4, IRQ_ARB);
mbed_official 574:8e5b2476066a 520 }
mbed_official 574:8e5b2476066a 521
mbed_official 574:8e5b2476066a 522 static void can0_bus_err_irq(void) {
mbed_official 574:8e5b2476066a 523 can_err_irq(CAN_0, IRQ_BUS);
mbed_official 574:8e5b2476066a 524 }
mbed_official 574:8e5b2476066a 525
mbed_official 574:8e5b2476066a 526 static void can1_bus_err_irq(void) {
mbed_official 574:8e5b2476066a 527 can_err_irq(CAN_1, IRQ_BUS);
mbed_official 574:8e5b2476066a 528 }
mbed_official 574:8e5b2476066a 529
mbed_official 574:8e5b2476066a 530 static void can2_bus_err_irq(void) {
mbed_official 574:8e5b2476066a 531 can_err_irq(CAN_2, IRQ_BUS);
mbed_official 574:8e5b2476066a 532 }
mbed_official 574:8e5b2476066a 533
mbed_official 574:8e5b2476066a 534 static void can3_bus_err_irq(void) {
mbed_official 574:8e5b2476066a 535 can_err_irq(CAN_3, IRQ_BUS);
mbed_official 574:8e5b2476066a 536 }
mbed_official 574:8e5b2476066a 537
mbed_official 574:8e5b2476066a 538 static void can4_bus_err_irq(void) {
mbed_official 574:8e5b2476066a 539 can_err_irq(CAN_4, IRQ_BUS);
mbed_official 574:8e5b2476066a 540 }
mbed_official 574:8e5b2476066a 541
mbed_official 574:8e5b2476066a 542 void can_init(can_t *obj, PinName rd, PinName td) {
mbed_official 574:8e5b2476066a 543 __IO uint32_t *dmy_ctr;
mbed_official 574:8e5b2476066a 544
mbed_official 574:8e5b2476066a 545 /* determine the CAN to use */
mbed_official 574:8e5b2476066a 546 uint32_t can_rx = pinmap_peripheral(rd, PinMap_CAN_RD);
mbed_official 574:8e5b2476066a 547 uint32_t can_tx = pinmap_peripheral(td, PinMap_CAN_TD);
mbed_official 574:8e5b2476066a 548 obj->ch = pinmap_merge(can_tx, can_rx);
mbed_official 574:8e5b2476066a 549 MBED_ASSERT((int)obj->ch != NC);
mbed_official 574:8e5b2476066a 550
mbed_official 574:8e5b2476066a 551 /* enable CAN clock */
mbed_official 574:8e5b2476066a 552 CPGSTBCR3 &= ~(CPG_STBCR3_BIT_MSTP32);
mbed_official 574:8e5b2476066a 553 /* Has CAN RAM initialisation completed ? */
mbed_official 574:8e5b2476066a 554 while ((RSCAN0GSTS & 0x08) == 0x08) {
mbed_official 574:8e5b2476066a 555 __NOP();
mbed_official 574:8e5b2476066a 556 }
mbed_official 574:8e5b2476066a 557 /* clear Global Stop mode bit */
mbed_official 574:8e5b2476066a 558 RSCAN0GCTR &= 0xFFFFFFFB;
mbed_official 574:8e5b2476066a 559 /* clear Channel Stop mode bit */
mbed_official 574:8e5b2476066a 560 dmy_ctr = CTR_MATCH[obj->ch];
mbed_official 574:8e5b2476066a 561 *dmy_ctr &= 0xFFFFFFFB;
mbed_official 574:8e5b2476066a 562 /* Enter global reset mode */
mbed_official 574:8e5b2476066a 563 can_set_global_mode(GL_RESET);
mbed_official 574:8e5b2476066a 564 /* Enter channel reset mode */
mbed_official 574:8e5b2476066a 565 can_set_channel_mode(obj->ch, CH_RESET);
mbed_official 574:8e5b2476066a 566 /* reset register */
mbed_official 574:8e5b2476066a 567 can_reset_reg(obj);
mbed_official 574:8e5b2476066a 568
mbed_official 574:8e5b2476066a 569 can_initialized[obj->ch] = 1;
mbed_official 574:8e5b2476066a 570 /* reconfigure channel which is already initialized */
mbed_official 574:8e5b2476066a 571 can_reconfigure_channel();
mbed_official 574:8e5b2476066a 572
mbed_official 574:8e5b2476066a 573 /* pin out the can pins */
mbed_official 574:8e5b2476066a 574 pinmap_pinout(rd, PinMap_CAN_RD);
mbed_official 574:8e5b2476066a 575 pinmap_pinout(td, PinMap_CAN_TD);
mbed_official 574:8e5b2476066a 576 }
mbed_official 574:8e5b2476066a 577
mbed_official 574:8e5b2476066a 578 void can_free(can_t *obj) {
mbed_official 574:8e5b2476066a 579 /* disable CAN clock */
mbed_official 574:8e5b2476066a 580 CPGSTBCR3 |= CPG_STBCR3_BIT_MSTP32;
mbed_official 574:8e5b2476066a 581 }
mbed_official 574:8e5b2476066a 582
mbed_official 574:8e5b2476066a 583 int can_frequency(can_t *obj, int f) {
mbed_official 574:8e5b2476066a 584 int retval = 0;
mbed_official 574:8e5b2476066a 585
mbed_official 574:8e5b2476066a 586 if (f <= 1000000) {
mbed_official 574:8e5b2476066a 587 /* less than 1Mhz */
mbed_official 574:8e5b2476066a 588 /* set Channel Reset mode */
mbed_official 574:8e5b2476066a 589 can_set_channel_mode(obj->ch, CH_RESET);
mbed_official 574:8e5b2476066a 590 can_set_frequency(obj, f);
mbed_official 574:8e5b2476066a 591 /* set Channel Communication mode */
mbed_official 574:8e5b2476066a 592 can_set_channel_mode(obj->ch, CH_COMM);
mbed_official 574:8e5b2476066a 593 retval = 1;
mbed_official 574:8e5b2476066a 594 }
mbed_official 574:8e5b2476066a 595
mbed_official 574:8e5b2476066a 596 return retval;
mbed_official 574:8e5b2476066a 597 }
mbed_official 574:8e5b2476066a 598
mbed_official 574:8e5b2476066a 599 void can_reset(can_t *obj) {
mbed_official 574:8e5b2476066a 600 /* Enter global reset mode */
mbed_official 574:8e5b2476066a 601 can_set_global_mode(GL_RESET);
mbed_official 574:8e5b2476066a 602 /* Enter channel reset mode */
mbed_official 574:8e5b2476066a 603 can_set_channel_mode(obj->ch, CH_RESET);
mbed_official 574:8e5b2476066a 604 /* reset register */
mbed_official 574:8e5b2476066a 605 can_reset_reg(obj);
mbed_official 574:8e5b2476066a 606 /* reconfigure channel which is already initialized */
mbed_official 574:8e5b2476066a 607 can_reconfigure_channel();
mbed_official 574:8e5b2476066a 608 }
mbed_official 574:8e5b2476066a 609
mbed_official 574:8e5b2476066a 610 int can_write(can_t *obj, CAN_Message msg, int cc) {
mbed_official 574:8e5b2476066a 611 __IO uint32_t *dmy_sts;
mbed_official 574:8e5b2476066a 612 __IO uint32_t *dmy_cfsts;
mbed_official 574:8e5b2476066a 613 __IO uint32_t *dmy_cfid;
mbed_official 574:8e5b2476066a 614 __IO uint32_t *dmy_cfptr;
mbed_official 574:8e5b2476066a 615 __IO uint32_t *dmy_cfdf0;
mbed_official 574:8e5b2476066a 616 __IO uint32_t *dmy_cfdf1;
mbed_official 574:8e5b2476066a 617 __IO uint32_t *dmy_cfpctr;
mbed_official 574:8e5b2476066a 618 int retval = 0;
mbed_official 574:8e5b2476066a 619
mbed_official 574:8e5b2476066a 620 /* Wait to become channel communication mode */
mbed_official 574:8e5b2476066a 621 dmy_sts = STS_MATCH[obj->ch];
mbed_official 574:8e5b2476066a 622 while ((*dmy_sts & 0x07) != 0) {
mbed_official 574:8e5b2476066a 623 __NOP();
mbed_official 574:8e5b2476066a 624 }
mbed_official 574:8e5b2476066a 625
mbed_official 574:8e5b2476066a 626 if (((msg.format == CANStandard) && (msg.id <= 0x07FF)) || ((msg.format == CANExtended) && (msg.id <= 0x03FFFF))) {
mbed_official 574:8e5b2476066a 627 /* send/receive FIFO buffer isn't full */
mbed_official 574:8e5b2476066a 628 dmy_cfsts = CFSTS_TBL[obj->ch][CAN_SEND];
mbed_official 574:8e5b2476066a 629 if ((*dmy_cfsts & 0x02) != 0x02) {
mbed_official 574:8e5b2476066a 630 /* set format, frame type and send/receive FIFO buffer ID(b10-0 or b28-11) */
mbed_official 574:8e5b2476066a 631 dmy_cfid = CFID_TBL[obj->ch][CAN_SEND];
mbed_official 574:8e5b2476066a 632 *dmy_cfid = ((msg.format << 31) | (msg.type << 30));
mbed_official 574:8e5b2476066a 633 if (msg.format == CANStandard) {
mbed_official 574:8e5b2476066a 634 *dmy_cfid |= (msg.id & 0x07FF);
mbed_official 574:8e5b2476066a 635 } else {
mbed_official 574:8e5b2476066a 636 *dmy_cfid |= ((msg.id & 0x03FFFF) << 11);
mbed_official 574:8e5b2476066a 637 }
mbed_official 574:8e5b2476066a 638 /* set length */
mbed_official 574:8e5b2476066a 639 dmy_cfptr = CFPTR_TBL[obj->ch][CAN_SEND];
mbed_official 574:8e5b2476066a 640 *dmy_cfptr = msg.len << 28;
mbed_official 574:8e5b2476066a 641 /* set data */
mbed_official 574:8e5b2476066a 642 dmy_cfdf0 = CFDF0_TBL[obj->ch][CAN_SEND];
mbed_official 574:8e5b2476066a 643 memcpy((void *)dmy_cfdf0, &msg.data[0], 4);
mbed_official 574:8e5b2476066a 644 dmy_cfdf1 = CFDF1_TBL[obj->ch][CAN_SEND];
mbed_official 574:8e5b2476066a 645 memcpy((void *)dmy_cfdf1, &msg.data[4], 4);
mbed_official 574:8e5b2476066a 646 /* send request */
mbed_official 574:8e5b2476066a 647 dmy_cfpctr = CFPCTR_TBL[obj->ch][CAN_SEND];
mbed_official 574:8e5b2476066a 648 *dmy_cfpctr = 0xFF;
mbed_official 574:8e5b2476066a 649 retval = 1;
mbed_official 574:8e5b2476066a 650 }
mbed_official 574:8e5b2476066a 651 }
mbed_official 574:8e5b2476066a 652
mbed_official 574:8e5b2476066a 653 return retval;
mbed_official 574:8e5b2476066a 654 }
mbed_official 574:8e5b2476066a 655
mbed_official 574:8e5b2476066a 656 int can_read(can_t *obj, CAN_Message *msg, int handle) {
mbed_official 574:8e5b2476066a 657 __IO uint32_t *dmy_sts;
mbed_official 574:8e5b2476066a 658 __IO uint32_t *dmy_cfsts;
mbed_official 574:8e5b2476066a 659 __IO uint32_t *dmy_cfid;
mbed_official 574:8e5b2476066a 660 __IO uint32_t *dmy_cfptr;
mbed_official 574:8e5b2476066a 661 __IO uint32_t *dmy_cfdf0;
mbed_official 574:8e5b2476066a 662 __IO uint32_t *dmy_cfdf1;
mbed_official 574:8e5b2476066a 663 __IO uint32_t *dmy_cfpctr;
mbed_official 574:8e5b2476066a 664 int retval = 0;
mbed_official 574:8e5b2476066a 665
mbed_official 574:8e5b2476066a 666 /* Wait to become channel communication mode */
mbed_official 574:8e5b2476066a 667 dmy_sts = STS_MATCH[obj->ch];
mbed_official 574:8e5b2476066a 668 while ((*dmy_sts & 0x07) != 0) {
mbed_official 574:8e5b2476066a 669 __NOP();
mbed_official 574:8e5b2476066a 670 }
mbed_official 574:8e5b2476066a 671
mbed_official 574:8e5b2476066a 672 /* send/receive FIFO buffer isn't empty */
mbed_official 574:8e5b2476066a 673 dmy_cfsts = CFSTS_TBL[obj->ch][CAN_RECV];
mbed_official 574:8e5b2476066a 674 while ((*dmy_cfsts & 0x01) != 0x01) {
mbed_official 574:8e5b2476066a 675 /* get format, frame type and send/receive FIFO buffer ID(b10-0 or b28-11) */
mbed_official 574:8e5b2476066a 676 dmy_cfid = CFID_TBL[obj->ch][CAN_RECV];
mbed_official 574:8e5b2476066a 677 msg->format = (CANFormat)(*dmy_cfid >> 31);
mbed_official 574:8e5b2476066a 678 msg->type = (CANType)(*dmy_cfid >> 30);
mbed_official 574:8e5b2476066a 679 if (msg->format == CANStandard) {
mbed_official 574:8e5b2476066a 680 msg->id = (*dmy_cfid & 0x07FF);
mbed_official 574:8e5b2476066a 681 } else {
mbed_official 574:8e5b2476066a 682 msg->id = ((*dmy_cfid >> 11) & 0x03FFFF);
mbed_official 574:8e5b2476066a 683 }
mbed_official 574:8e5b2476066a 684 /* get length */
mbed_official 574:8e5b2476066a 685 dmy_cfptr = CFPTR_TBL[obj->ch][CAN_RECV];
mbed_official 574:8e5b2476066a 686 msg->len = (unsigned char)(*dmy_cfptr >> 28);
mbed_official 574:8e5b2476066a 687 /* get data */
mbed_official 574:8e5b2476066a 688 dmy_cfdf0 = CFDF0_TBL[obj->ch][CAN_RECV];
mbed_official 574:8e5b2476066a 689 memcpy(&msg->data[0], (void *)dmy_cfdf0, 4);
mbed_official 574:8e5b2476066a 690 dmy_cfdf1 = CFDF1_TBL[obj->ch][CAN_RECV];
mbed_official 574:8e5b2476066a 691 memcpy(&msg->data[4], (void *)dmy_cfdf1, 4);
mbed_official 574:8e5b2476066a 692 /* receive(next data) request */
mbed_official 574:8e5b2476066a 693 dmy_cfpctr = CFPCTR_TBL[obj->ch][CAN_RECV];
mbed_official 574:8e5b2476066a 694 *dmy_cfpctr = 0xFF;
mbed_official 574:8e5b2476066a 695 retval = 1;
mbed_official 574:8e5b2476066a 696 }
mbed_official 574:8e5b2476066a 697
mbed_official 574:8e5b2476066a 698 return retval;
mbed_official 574:8e5b2476066a 699 }
mbed_official 574:8e5b2476066a 700
mbed_official 574:8e5b2476066a 701 unsigned char can_rderror(can_t *obj) {
mbed_official 574:8e5b2476066a 702 __IO uint32_t *dmy_sts;
mbed_official 574:8e5b2476066a 703
mbed_official 574:8e5b2476066a 704 dmy_sts = STS_MATCH[obj->ch];
mbed_official 574:8e5b2476066a 705 return (unsigned char)((*dmy_sts >> 16) & 0xFF);
mbed_official 574:8e5b2476066a 706 }
mbed_official 574:8e5b2476066a 707
mbed_official 574:8e5b2476066a 708 unsigned char can_tderror(can_t *obj) {
mbed_official 574:8e5b2476066a 709 __IO uint32_t *dmy_sts;
mbed_official 574:8e5b2476066a 710
mbed_official 574:8e5b2476066a 711 dmy_sts = STS_MATCH[obj->ch];
mbed_official 574:8e5b2476066a 712 return (unsigned char)((*dmy_sts >> 24) & 0xFF);
mbed_official 574:8e5b2476066a 713 }
mbed_official 574:8e5b2476066a 714
mbed_official 574:8e5b2476066a 715 int can_mode(can_t *obj, CanMode mode) {
mbed_official 574:8e5b2476066a 716 __IO uint32_t *dmy_ctr;
mbed_official 574:8e5b2476066a 717 __IO uint32_t *dmy_sts;
mbed_official 574:8e5b2476066a 718 __IO uint32_t *dmy_cfcc;
mbed_official 574:8e5b2476066a 719 int ch_cnt;
mbed_official 574:8e5b2476066a 720 can_t *tmp_obj;
mbed_official 574:8e5b2476066a 721 tmp_obj = obj;
mbed_official 574:8e5b2476066a 722 int retval = 1;
mbed_official 574:8e5b2476066a 723
mbed_official 574:8e5b2476066a 724 switch (mode) {
mbed_official 574:8e5b2476066a 725 case MODE_RESET:
mbed_official 574:8e5b2476066a 726 can_set_global_mode(GL_RESET);
mbed_official 574:8e5b2476066a 727 can_set_channel_mode(obj->ch, CH_RESET);
mbed_official 574:8e5b2476066a 728 for (ch_cnt = 0; ch_cnt < CAN_NUM; ch_cnt++) {
mbed_official 574:8e5b2476066a 729 can_initialized[ch_cnt] = 0;
mbed_official 574:8e5b2476066a 730 }
mbed_official 574:8e5b2476066a 731 break;
mbed_official 574:8e5b2476066a 732 case MODE_NORMAL:
mbed_official 574:8e5b2476066a 733 can_set_global_mode(GL_OPE);
mbed_official 574:8e5b2476066a 734 can_set_channel_mode(obj->ch, CH_COMM);
mbed_official 574:8e5b2476066a 735 break;
mbed_official 574:8e5b2476066a 736 case MODE_SILENT:
mbed_official 574:8e5b2476066a 737 can_set_channel_mode(obj->ch, CH_HOLD);
mbed_official 574:8e5b2476066a 738 /* set listen only mode, enable communication test mode */
mbed_official 574:8e5b2476066a 739 dmy_ctr = CTR_MATCH[obj->ch];
mbed_official 574:8e5b2476066a 740 *dmy_ctr = ((*dmy_ctr & 0x00FFFFFF) | 0x03000000);
mbed_official 574:8e5b2476066a 741 can_set_channel_mode(obj->ch, CH_COMM);
mbed_official 574:8e5b2476066a 742 break;
mbed_official 574:8e5b2476066a 743 case MODE_TEST_LOCAL:
mbed_official 574:8e5b2476066a 744 can_set_channel_mode(obj->ch, CH_HOLD);
mbed_official 574:8e5b2476066a 745 /* set self test mode 0, enable communication test mode */
mbed_official 574:8e5b2476066a 746 dmy_ctr = CTR_MATCH[obj->ch];
mbed_official 574:8e5b2476066a 747 *dmy_ctr = ((*dmy_ctr & 0x00FFFFFF) | 0x05000000);
mbed_official 574:8e5b2476066a 748 can_set_channel_mode(obj->ch, CH_COMM);
mbed_official 574:8e5b2476066a 749 break;
mbed_official 574:8e5b2476066a 750 case MODE_TEST_GLOBAL:
mbed_official 574:8e5b2476066a 751 /* set the channel between the communication test on channel 1 and channel 2 */
mbed_official 574:8e5b2476066a 752 /* set Channel Hold mode */
mbed_official 574:8e5b2476066a 753 for (tmp_obj->ch = CAN_1; tmp_obj->ch <= CAN_2; tmp_obj->ch++) {
mbed_official 574:8e5b2476066a 754 dmy_sts = STS_MATCH[tmp_obj->ch];
mbed_official 574:8e5b2476066a 755 if ((*dmy_sts & 0x04) == 0x04) {
mbed_official 574:8e5b2476066a 756 /* Channel Stop mode */
mbed_official 574:8e5b2476066a 757 /* clear Channel Stop mode bit */
mbed_official 574:8e5b2476066a 758 dmy_ctr = CTR_MATCH[tmp_obj->ch];
mbed_official 574:8e5b2476066a 759 *dmy_ctr &= 0xFFFFFFFB;
mbed_official 574:8e5b2476066a 760 can_set_channel_mode(tmp_obj->ch, CH_RESET);
mbed_official 574:8e5b2476066a 761 }
mbed_official 574:8e5b2476066a 762 can_set_channel_mode(tmp_obj->ch, CH_HOLD);
mbed_official 574:8e5b2476066a 763 }
mbed_official 574:8e5b2476066a 764 can_set_global_mode(GL_TEST);
mbed_official 574:8e5b2476066a 765 /* enable communication test between channel1 and channel2 */
mbed_official 574:8e5b2476066a 766 RSCAN0GTSTCFG = 0x06;
mbed_official 574:8e5b2476066a 767 RSCAN0GTSTCTR = 0x01;
mbed_official 574:8e5b2476066a 768 /* send and receive setting of channel1 and channel2 */
mbed_official 574:8e5b2476066a 769 for (tmp_obj->ch = CAN_1; tmp_obj->ch <= CAN_2; tmp_obj->ch++) {
mbed_official 574:8e5b2476066a 770 can_reset_buffer(tmp_obj);
mbed_official 574:8e5b2476066a 771 /* set global interrrupt */
mbed_official 574:8e5b2476066a 772 /* THLEIE, MEIE and DEIE interrupts are disable */
mbed_official 574:8e5b2476066a 773 RSCAN0GCTR &= 0xFFFFF8FF;
mbed_official 574:8e5b2476066a 774 /* BLIE, OLIE, BORIE and BOEIE interrupts are disable */
mbed_official 574:8e5b2476066a 775 /* TAIE, ALIE, EPIE, EWIE and BEIE interrupts are enable */
mbed_official 574:8e5b2476066a 776 dmy_ctr = CTR_MATCH[tmp_obj->ch];
mbed_official 574:8e5b2476066a 777 *dmy_ctr &= 0x00018700;
mbed_official 574:8e5b2476066a 778 can_set_global_mode(GL_OPE);
mbed_official 574:8e5b2476066a 779 can_set_channel_mode(tmp_obj->ch, CH_COMM);
mbed_official 574:8e5b2476066a 780 /* Use send/receive FIFO buffer */
mbed_official 574:8e5b2476066a 781 dmy_cfcc = CFCC_TBL[tmp_obj->ch][CAN_SEND];
mbed_official 574:8e5b2476066a 782 *dmy_cfcc |= 0x01;
mbed_official 574:8e5b2476066a 783 dmy_cfcc = CFCC_TBL[tmp_obj->ch][CAN_RECV];
mbed_official 574:8e5b2476066a 784 *dmy_cfcc |= 0x01;
mbed_official 574:8e5b2476066a 785 }
mbed_official 574:8e5b2476066a 786 break;
mbed_official 574:8e5b2476066a 787 case MODE_TEST_SILENT:
mbed_official 574:8e5b2476066a 788 /* not supported */
mbed_official 574:8e5b2476066a 789 /* fall through */
mbed_official 574:8e5b2476066a 790 default:
mbed_official 574:8e5b2476066a 791 retval = 0;
mbed_official 574:8e5b2476066a 792 break;
mbed_official 574:8e5b2476066a 793 }
mbed_official 574:8e5b2476066a 794
mbed_official 574:8e5b2476066a 795 return retval;
mbed_official 574:8e5b2476066a 796 }
mbed_official 574:8e5b2476066a 797
mbed_official 574:8e5b2476066a 798 int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t handle) {
mbed_official 574:8e5b2476066a 799 int retval = 0;
mbed_official 574:8e5b2476066a 800
mbed_official 574:8e5b2476066a 801 if ((format == CANStandard) || (format == CANExtended)) {
mbed_official 574:8e5b2476066a 802 if (((format == CANStandard) && (id <= 0x07FF)) || ((format == CANExtended) && (id <= 0x03FFFF))) {
mbed_official 574:8e5b2476066a 803 /* set Global Reset mode and Channel Reset mode */
mbed_official 574:8e5b2476066a 804 can_set_global_mode(GL_RESET);
mbed_official 574:8e5b2476066a 805 can_set_channel_mode(obj->ch, CH_RESET);
mbed_official 574:8e5b2476066a 806 /* enable receive rule table writing */
mbed_official 574:8e5b2476066a 807 RSCAN0GAFLECTR = 0x00000100;
mbed_official 574:8e5b2476066a 808 /* set the page number of receive rule table(page number = 0) */
mbed_official 574:8e5b2476066a 809 RSCAN0GAFLECTR |= (obj->ch * 4);
mbed_official 574:8e5b2476066a 810 /* set IDE format */
mbed_official 574:8e5b2476066a 811 *dmy_gaflid = (format << 31);
mbed_official 574:8e5b2476066a 812 if (format == CANExtended) {
mbed_official 574:8e5b2476066a 813 /* set receive rule ID for bit28-11 */
mbed_official 574:8e5b2476066a 814 *dmy_gaflid |= (id << 11);
mbed_official 574:8e5b2476066a 815 } else {
mbed_official 574:8e5b2476066a 816 /* set receive rule ID for bit10-0 */
mbed_official 574:8e5b2476066a 817 *dmy_gaflid |= id;
mbed_official 574:8e5b2476066a 818 }
mbed_official 574:8e5b2476066a 819 /* set ID mask bit */
mbed_official 574:8e5b2476066a 820 *dmy_gaflm = (0xC0000000 | mask);
mbed_official 574:8e5b2476066a 821 /* disable receive rule table writing */
mbed_official 574:8e5b2476066a 822 RSCAN0GAFLECTR &= 0xFFFFFEFF;
mbed_official 574:8e5b2476066a 823 /* reconfigure channel which is already initialized */
mbed_official 574:8e5b2476066a 824 can_reconfigure_channel();
mbed_official 574:8e5b2476066a 825 retval = 1;
mbed_official 574:8e5b2476066a 826 }
mbed_official 574:8e5b2476066a 827 }
mbed_official 574:8e5b2476066a 828
mbed_official 574:8e5b2476066a 829 return retval;
mbed_official 574:8e5b2476066a 830 }
mbed_official 574:8e5b2476066a 831
mbed_official 574:8e5b2476066a 832 void can_monitor(can_t *obj, int silent) {
mbed_official 574:8e5b2476066a 833 __IO uint32_t *dmy_ctr;
mbed_official 574:8e5b2476066a 834
mbed_official 574:8e5b2476066a 835 /* set Channel Hold mode */
mbed_official 574:8e5b2476066a 836 can_set_channel_mode(obj->ch, CH_HOLD);
mbed_official 574:8e5b2476066a 837 if (silent) {
mbed_official 574:8e5b2476066a 838 /* set listen only mode, enable communication test mode */
mbed_official 574:8e5b2476066a 839 dmy_ctr = CTR_MATCH[obj->ch];
mbed_official 574:8e5b2476066a 840 *dmy_ctr = ((*dmy_ctr & 0x00FFFFFF) | 0x03000000);
mbed_official 574:8e5b2476066a 841 can_set_channel_mode(obj->ch, CH_COMM);
mbed_official 574:8e5b2476066a 842 } else {
mbed_official 574:8e5b2476066a 843 /* set normal test mode, disable communication test mode */
mbed_official 574:8e5b2476066a 844 dmy_ctr = CTR_MATCH[obj->ch];
mbed_official 574:8e5b2476066a 845 *dmy_ctr &= 0x00FFFFFF;
mbed_official 574:8e5b2476066a 846 /* reset register */
mbed_official 574:8e5b2476066a 847 can_reset_reg(obj);
mbed_official 574:8e5b2476066a 848 /* reconfigure channel which is already initialized */
mbed_official 574:8e5b2476066a 849 can_reconfigure_channel();
mbed_official 574:8e5b2476066a 850 }
mbed_official 574:8e5b2476066a 851 }
mbed_official 574:8e5b2476066a 852
mbed_official 574:8e5b2476066a 853 static void can_reset_reg(can_t *obj) {
mbed_official 574:8e5b2476066a 854 __IO uint32_t *dmy_ctr;
mbed_official 574:8e5b2476066a 855
mbed_official 574:8e5b2476066a 856 /* time stamp source uses peripheral clock (pclk(P1_phi)/2), CAN clock uses clkc(P1_phi/2), */
mbed_official 574:8e5b2476066a 857 /* mirror off, DLC not transfer, DLC check permit, transmit buffer priority, clock source not divided */
mbed_official 574:8e5b2476066a 858 RSCAN0GCFG = 0x00000003;
mbed_official 574:8e5b2476066a 859 /* set default frequency at 100k */
mbed_official 574:8e5b2476066a 860 can_set_frequency(obj, 100000);
mbed_official 574:8e5b2476066a 861 /* set receive rule */
mbed_official 574:8e5b2476066a 862 can_reset_recv_rule(obj);
mbed_official 574:8e5b2476066a 863 /* set buffer */
mbed_official 574:8e5b2476066a 864 can_reset_buffer(obj);
mbed_official 574:8e5b2476066a 865 /* set global interrrupt */
mbed_official 574:8e5b2476066a 866 /* THLEIE, MEIE and DEIE interrupts are disable */
mbed_official 574:8e5b2476066a 867 RSCAN0GCTR &= 0xFFFFF8FF;
mbed_official 574:8e5b2476066a 868 /* ALIE, BLIE, OLIE, BORIE, BOEIE, EPIE, EWIE and BEIE interrupts are disable */
mbed_official 574:8e5b2476066a 869 dmy_ctr = CTR_MATCH[obj->ch];
mbed_official 574:8e5b2476066a 870 *dmy_ctr &= 0xFFFF00FF;
mbed_official 574:8e5b2476066a 871 }
mbed_official 574:8e5b2476066a 872
mbed_official 574:8e5b2476066a 873 static void can_reset_recv_rule(can_t *obj) {
mbed_official 574:8e5b2476066a 874 /* number of receive rules of each chanel = 64 */
mbed_official 574:8e5b2476066a 875 RSCAN0GAFLCFG0 = 0x40404040;
mbed_official 574:8e5b2476066a 876 RSCAN0GAFLCFG1 = 0x40000000;
mbed_official 574:8e5b2476066a 877 /* enable receive rule table writing */
mbed_official 574:8e5b2476066a 878 RSCAN0GAFLECTR = 0x00000100;
mbed_official 574:8e5b2476066a 879 /* set the page number of receive rule table(ex: id ch = 1, page number = 4) */
mbed_official 574:8e5b2476066a 880 RSCAN0GAFLECTR |= (obj->ch * 4);
mbed_official 574:8e5b2476066a 881 /* set standard ID, data frame and receive rule ID */
mbed_official 574:8e5b2476066a 882 *dmy_gaflid = 0x07FF;
mbed_official 574:8e5b2476066a 883 /* IDE bit, RTR bit and ID bit(28-0) are not compared */
mbed_official 574:8e5b2476066a 884 *dmy_gaflm = 0;
mbed_official 574:8e5b2476066a 885 /* DLC check is 1 bytes, not use a receive buffer */
mbed_official 574:8e5b2476066a 886 *dmy_gaflp0 = 0x10000000;
mbed_official 574:8e5b2476066a 887 /* use a send/receive FIFO buffer(ex: if ch = 1, FIFO buffer number = 4 and bit = 12) */
mbed_official 574:8e5b2476066a 888 *dmy_gaflp1 = (1 << ((obj->ch + 3) * 3));
mbed_official 574:8e5b2476066a 889 /* disable receive rule table writing */
mbed_official 574:8e5b2476066a 890 RSCAN0GAFLECTR &= 0xFFFFFEFF;
mbed_official 574:8e5b2476066a 891 }
mbed_official 574:8e5b2476066a 892
mbed_official 574:8e5b2476066a 893 static void can_reset_buffer(can_t *obj) {
mbed_official 574:8e5b2476066a 894 __IO uint32_t *dmy_rfcc;
mbed_official 574:8e5b2476066a 895 __IO uint32_t *dmy_cfcc;
mbed_official 574:8e5b2476066a 896 __IO uint32_t *dmy_txqcc;
mbed_official 574:8e5b2476066a 897 __IO uint32_t *dmy_thlcc;
mbed_official 574:8e5b2476066a 898 int cnt;
mbed_official 574:8e5b2476066a 899
mbed_official 574:8e5b2476066a 900 /* set linked send buffer number(ex: if ch = 1 and mode = send, buffer number = 16), interval timer is pclk/2 */
mbed_official 574:8e5b2476066a 901 /* number of rows of send/receive FIFO buffer = 4 */
mbed_official 574:8e5b2476066a 902 dmy_cfcc = CFCC_TBL[obj->ch][CAN_SEND];
mbed_official 574:8e5b2476066a 903 *dmy_cfcc = 0x00011100; /* send/receive FIFO mode is send */
mbed_official 574:8e5b2476066a 904 dmy_cfcc = CFCC_TBL[obj->ch][CAN_RECV];
mbed_official 574:8e5b2476066a 905 *dmy_cfcc = 0x00001100; /* send/receive FIFO mode is receive */
mbed_official 574:8e5b2476066a 906 /* receive buffer is not used */
mbed_official 574:8e5b2476066a 907 RSCAN0RMNB = 0;
mbed_official 574:8e5b2476066a 908 /* receive FIFO buffer is not used */
mbed_official 574:8e5b2476066a 909 for (cnt = 0; cnt < 8; cnt++) {
mbed_official 574:8e5b2476066a 910 dmy_rfcc = RFCC_MATCH[cnt];
mbed_official 574:8e5b2476066a 911 *dmy_rfcc = 0;
mbed_official 574:8e5b2476066a 912 }
mbed_official 574:8e5b2476066a 913 /* send queue is not used */
mbed_official 574:8e5b2476066a 914 dmy_txqcc = TXQCC_MATCH[obj->ch];
mbed_official 574:8e5b2476066a 915 *dmy_txqcc = 0;
mbed_official 574:8e5b2476066a 916 /* send history is not used */
mbed_official 574:8e5b2476066a 917 dmy_thlcc = THLCC_MATCH[obj->ch];
mbed_official 574:8e5b2476066a 918 *dmy_thlcc = 0;
mbed_official 574:8e5b2476066a 919
mbed_official 574:8e5b2476066a 920 /* CFTXIE and CFRXIE interrupts are enable */
mbed_official 574:8e5b2476066a 921 dmy_cfcc = CFCC_TBL[obj->ch][CAN_SEND];
mbed_official 574:8e5b2476066a 922 *dmy_cfcc |= 0x04;
mbed_official 574:8e5b2476066a 923 dmy_cfcc = CFCC_TBL[obj->ch][CAN_RECV];
mbed_official 574:8e5b2476066a 924 *dmy_cfcc |= 0x02;
mbed_official 574:8e5b2476066a 925 /* TMIEp interrupt is disable */
mbed_official 574:8e5b2476066a 926 RSCAN0TMIEC0 = 0x00000000;
mbed_official 574:8e5b2476066a 927 RSCAN0TMIEC1 = 0x00000000;
mbed_official 574:8e5b2476066a 928 RSCAN0TMIEC2 = 0x00000000;
mbed_official 574:8e5b2476066a 929 }
mbed_official 574:8e5b2476066a 930
mbed_official 574:8e5b2476066a 931 static void can_reconfigure_channel(void) {
mbed_official 574:8e5b2476066a 932 __IO uint32_t *dmy_cfcc;
mbed_official 574:8e5b2476066a 933 int ch_cnt;
mbed_official 574:8e5b2476066a 934
mbed_official 574:8e5b2476066a 935 for (ch_cnt = 0; ch_cnt < CAN_NUM; ch_cnt++) {
mbed_official 574:8e5b2476066a 936 if (can_initialized[ch_cnt] == 1) {
mbed_official 574:8e5b2476066a 937 /* set Global Operation mode and Channel Communication mode */
mbed_official 574:8e5b2476066a 938 can_set_global_mode(GL_OPE);
mbed_official 574:8e5b2476066a 939 can_set_channel_mode(ch_cnt, CH_COMM);
mbed_official 574:8e5b2476066a 940 /* Use send/receive FIFO buffer */
mbed_official 574:8e5b2476066a 941 dmy_cfcc = CFCC_TBL[ch_cnt][CAN_SEND];
mbed_official 574:8e5b2476066a 942 *dmy_cfcc |= 0x01;
mbed_official 574:8e5b2476066a 943 dmy_cfcc = CFCC_TBL[ch_cnt][CAN_RECV];
mbed_official 574:8e5b2476066a 944 *dmy_cfcc |= 0x01;
mbed_official 574:8e5b2476066a 945 }
mbed_official 574:8e5b2476066a 946 }
mbed_official 574:8e5b2476066a 947 }
mbed_official 574:8e5b2476066a 948
mbed_official 574:8e5b2476066a 949 static void can_set_frequency(can_t *obj, int f) {
mbed_official 574:8e5b2476066a 950 __IO uint32_t *dmy_cfg;
mbed_official 574:8e5b2476066a 951 int oldfreq = 0;
mbed_official 574:8e5b2476066a 952 int newfreq = 0;
mbed_official 574:8e5b2476066a 953 uint32_t clkc_val;
mbed_official 574:8e5b2476066a 954 uint8_t tmp_tq;
mbed_official 574:8e5b2476066a 955 uint8_t tq = 0;
mbed_official 574:8e5b2476066a 956 uint8_t tmp_brp;
mbed_official 574:8e5b2476066a 957 uint8_t brp = 0;
mbed_official 574:8e5b2476066a 958 uint8_t tseg1 = 0;
mbed_official 574:8e5b2476066a 959 uint8_t tseg2 = 0;
mbed_official 574:8e5b2476066a 960
mbed_official 574:8e5b2476066a 961 /* set clkc */
mbed_official 574:8e5b2476066a 962 if (RZ_A1_IsClockMode0() == false) {
mbed_official 574:8e5b2476066a 963 clkc_val = CM1_RENESAS_RZ_A1_P1_CLK / 2;
mbed_official 574:8e5b2476066a 964 } else {
mbed_official 574:8e5b2476066a 965 clkc_val = CM0_RENESAS_RZ_A1_P1_CLK / 2;
mbed_official 574:8e5b2476066a 966 }
mbed_official 574:8e5b2476066a 967 /* calculate BRP bit and Choose max value of calculated frequency */
mbed_official 574:8e5b2476066a 968 for (tmp_tq = 8; tmp_tq <= 25; tmp_tq++) {
mbed_official 574:8e5b2476066a 969 /* f = fCAN / ((BRP+1) * Tq) */
mbed_official 574:8e5b2476066a 970 /* BRP = (fCAN / (f * Tq)) - 1 */
mbed_official 574:8e5b2476066a 971 tmp_brp = ((clkc_val / (f * tmp_tq)) - 1) + 1; // carry(decimal point is carry)
mbed_official 574:8e5b2476066a 972 newfreq = clkc_val / ((tmp_brp + 1) * tmp_tq);
mbed_official 574:8e5b2476066a 973 if (newfreq >= oldfreq) {
mbed_official 574:8e5b2476066a 974 oldfreq = newfreq;
mbed_official 574:8e5b2476066a 975 tq = tmp_tq;
mbed_official 574:8e5b2476066a 976 brp = tmp_brp;
mbed_official 574:8e5b2476066a 977 }
mbed_official 574:8e5b2476066a 978 }
mbed_official 574:8e5b2476066a 979 /* calculate TSEG1 bit and TSEG2 bit */
mbed_official 574:8e5b2476066a 980 tseg1 = (tq - 1) * 0.666666667;
mbed_official 574:8e5b2476066a 981 tseg2 = (tq - 1) - tseg1;
mbed_official 574:8e5b2476066a 982 /* set RSCAN0CmCFG register */
mbed_official 574:8e5b2476066a 983 dmy_cfg = CFG_MATCH[obj->ch];
mbed_official 574:8e5b2476066a 984 *dmy_cfg = ((tseg2 - 1) << 20) | ((tseg1 - 1) << 16) | brp;
mbed_official 574:8e5b2476066a 985 }
mbed_official 574:8e5b2476066a 986
mbed_official 574:8e5b2476066a 987 static void can_set_global_mode(int mode) {
mbed_official 574:8e5b2476066a 988 /* set Global mode */
mbed_official 574:8e5b2476066a 989 RSCAN0GCTR = ((RSCAN0GCTR & 0xFFFFFFFC) | mode);
mbed_official 574:8e5b2476066a 990 /* Wait to cahnge into Global XXXX mode */
mbed_official 574:8e5b2476066a 991 while ((RSCAN0GSTS & 0x07) != mode) {
mbed_official 574:8e5b2476066a 992 __NOP();
mbed_official 574:8e5b2476066a 993 }
mbed_official 574:8e5b2476066a 994 }
mbed_official 574:8e5b2476066a 995
mbed_official 574:8e5b2476066a 996 static void can_set_channel_mode(uint32_t ch, int mode) {
mbed_official 574:8e5b2476066a 997 __IO uint32_t *dmy_ctr;
mbed_official 574:8e5b2476066a 998 __IO uint32_t *dmy_sts;
mbed_official 574:8e5b2476066a 999
mbed_official 574:8e5b2476066a 1000 /* set Channel mode */
mbed_official 574:8e5b2476066a 1001 dmy_ctr = CTR_MATCH[ch];
mbed_official 574:8e5b2476066a 1002 *dmy_ctr = ((*dmy_ctr & 0xFFFFFFFC) | mode);
mbed_official 574:8e5b2476066a 1003 /* Wait to cahnge into Channel XXXX mode */
mbed_official 574:8e5b2476066a 1004 dmy_sts = STS_MATCH[ch];
mbed_official 574:8e5b2476066a 1005 while ((*dmy_sts & 0x07) != mode) {
mbed_official 574:8e5b2476066a 1006 __NOP();
mbed_official 574:8e5b2476066a 1007 }
mbed_official 574:8e5b2476066a 1008 }
mbed_official 574:8e5b2476066a 1009