fuyuno sakura / Mbed 2 deprecated OV7670_with_AL422B_QVGA_LCD_test

Dependencies:   mbed

spilcd_qvga.h@1:509676f3be32, 2012-02-17 (annotated)

Committer:
mio
Date:
Fri Feb 17 15:06:15 2012 +0000
Revision:
1:509676f3be32
Parent:
0:f3f80a0695ff 
Hflip Vflip init param support.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mio 0:f3f80a0695ff 1 //
mio 0:f3f80a0695ff 2 // SPILCD_QVGA -- mio
mio 0:f3f80a0695ff 3 // This code is based on http://mbed.org/users/Sim/programs/SPILCDsample
mio 0:f3f80a0695ff 4 //
mio 0:f3f80a0695ff 5 // 2010/06/16 - Now Supports only "LGDP4531" and screen fill test "filltest()" command only (Alpha level).
mio 0:f3f80a0695ff 6 //
mio 0:f3f80a0695ff 7
mio 0:f3f80a0695ff 8 #ifndef __SPILCD_QVGA_H__
mio 0:f3f80a0695ff 9 #define __SPILCD_QVGA_H__
mio 0:f3f80a0695ff 10
mio 0:f3f80a0695ff 11 #include "mbed.h"
mio 0:f3f80a0695ff 12
mio 0:f3f80a0695ff 13 typedef unsigned int u32 ;
mio 0:f3f80a0695ff 14 typedef unsigned short u16 ;
mio 0:f3f80a0695ff 15 typedef unsigned char u8 ;
mio 0:f3f80a0695ff 16
mio 0:f3f80a0695ff 17 class SPILCD_QVGA {
mio 0:f3f80a0695ff 18 private:
mio 0:f3f80a0695ff 19 int rs,rw;
mio 0:f3f80a0695ff 20
mio 0:f3f80a0695ff 21 DigitalOut cs, rst;
mio 0:f3f80a0695ff 22 SPI spi;
mio 0:f3f80a0695ff 23 public:
mio 0:f3f80a0695ff 24
mio 0:f3f80a0695ff 25 void reset(u16 data) {
mio 0:f3f80a0695ff 26 rst = data ;
mio 0:f3f80a0695ff 27 }
mio 0:f3f80a0695ff 28
mio 0:f3f80a0695ff 29 void DataToWriteBegin(void) {
mio 0:f3f80a0695ff 30 u8 d ;
mio 0:f3f80a0695ff 31 d = (0x70 | (rs ? 0x02 : 0x00) | (rw ? 0x01 : 0x00)) ;
mio 0:f3f80a0695ff 32 spi.write(d) ;
mio 0:f3f80a0695ff 33 // debug
mio 0:f3f80a0695ff 34 // pc.printf("%02X",d) ;
mio 0:f3f80a0695ff 35 }
mio 0:f3f80a0695ff 36
mio 0:f3f80a0695ff 37 u16 DataToWrite16(u16 data) {
mio 0:f3f80a0695ff 38 u8 hiout,loout ;
mio 0:f3f80a0695ff 39 u8 hi,lo ;
mio 0:f3f80a0695ff 40 hiout = (u8)((data & 0xFF00) >> 8) ;
mio 0:f3f80a0695ff 41 hi = spi.write(hiout);
mio 0:f3f80a0695ff 42 // debug
mio 0:f3f80a0695ff 43 // pc.printf("%02X",hi) ;
mio 0:f3f80a0695ff 44 loout = ((u8)(data & 0x00FF)) ;
mio 0:f3f80a0695ff 45 lo = spi.write(loout);
mio 0:f3f80a0695ff 46 // debug
mio 0:f3f80a0695ff 47 // pc.printf("%02X",lo) ;
mio 0:f3f80a0695ff 48 return (u16)((hi << 8) + lo) ;
mio 0:f3f80a0695ff 49 }
mio 0:f3f80a0695ff 50
mio 0:f3f80a0695ff 51 void DataToWrite(u16 data) {
mio 0:f3f80a0695ff 52 DataToWriteBegin() ;
mio 0:f3f80a0695ff 53 DataToWrite16(data) ;
mio 0:f3f80a0695ff 54 }
mio 0:f3f80a0695ff 55
mio 0:f3f80a0695ff 56 u16 DataToRead(u16 dummy) {
mio 0:f3f80a0695ff 57 rw = 1 ;
mio 0:f3f80a0695ff 58 DataToWriteBegin() ;
mio 0:f3f80a0695ff 59 rw = 0 ;
mio 0:f3f80a0695ff 60 // spi.write(0x00) ; // dummy 1 byte read ??
mio 0:f3f80a0695ff 61 return DataToWrite16(dummy) ;
mio 0:f3f80a0695ff 62 }
mio 0:f3f80a0695ff 63
mio 0:f3f80a0695ff 64 void LCD_WR_REG(u16 Index,u16 CongfigTemp) {
mio 0:f3f80a0695ff 65 csout(0) ;
mio 0:f3f80a0695ff 66 rs = 0 ;
mio 0:f3f80a0695ff 67 DataToWrite(Index);
mio 0:f3f80a0695ff 68 csout(1) ;
mio 0:f3f80a0695ff 69 wait_us(1);
mio 0:f3f80a0695ff 70 csout(0) ;
mio 0:f3f80a0695ff 71 rs = 1 ;
mio 0:f3f80a0695ff 72 DataToWrite(CongfigTemp);
mio 0:f3f80a0695ff 73 csout(1) ;
mio 0:f3f80a0695ff 74 }
mio 0:f3f80a0695ff 75
mio 0:f3f80a0695ff 76 u16 LCD_RD_REG(u16 Index) {
mio 0:f3f80a0695ff 77 u16 result ;
mio 0:f3f80a0695ff 78 csout(0) ;
mio 0:f3f80a0695ff 79 rs = 0 ;
mio 0:f3f80a0695ff 80 DataToWrite(Index);
mio 0:f3f80a0695ff 81 csout(1) ;
mio 0:f3f80a0695ff 82 wait_us(1);
mio 0:f3f80a0695ff 83 csout(0) ;
mio 0:f3f80a0695ff 84 rs = 1 ;
mio 0:f3f80a0695ff 85 result = DataToRead(0x0000);
mio 0:f3f80a0695ff 86 csout(1) ;
mio 0:f3f80a0695ff 87 return result ;
mio 0:f3f80a0695ff 88 }
mio 0:f3f80a0695ff 89
mio 0:f3f80a0695ff 90
mio 0:f3f80a0695ff 91 void Lcd_WR_Start(void) {
mio 0:f3f80a0695ff 92 csout(0) ;
mio 0:f3f80a0695ff 93 rs = 0 ;
mio 0:f3f80a0695ff 94 DataToWrite(0x0022);
mio 0:f3f80a0695ff 95 csout(1) ;
mio 0:f3f80a0695ff 96 wait_us(1);
mio 0:f3f80a0695ff 97 csout(0) ;
mio 0:f3f80a0695ff 98 rs = 1 ;
mio 0:f3f80a0695ff 99 }
mio 0:f3f80a0695ff 100
mio 0:f3f80a0695ff 101 void Lcd_SetCursor(u16 x,u16 y) {
mio 0:f3f80a0695ff 102 LCD_WR_REG(0x20,x);
mio 0:f3f80a0695ff 103 LCD_WR_REG(0x21,y);
mio 0:f3f80a0695ff 104 }
mio 0:f3f80a0695ff 105
mio 0:f3f80a0695ff 106 // boot up sequence
mio 0:f3f80a0695ff 107 void init() {
mio 0:f3f80a0695ff 108 spi.format(8,3); // SPI mode = 3
mio 0:f3f80a0695ff 109 spi.frequency(20000000);
mio 0:f3f80a0695ff 110
mio 0:f3f80a0695ff 111 // reset
mio 0:f3f80a0695ff 112 reset(1);
mio 0:f3f80a0695ff 113 wait_ms(200);
mio 0:f3f80a0695ff 114 reset(0);
mio 0:f3f80a0695ff 115 wait_ms(200);
mio 0:f3f80a0695ff 116 reset(1);
mio 0:f3f80a0695ff 117
mio 0:f3f80a0695ff 118 // initialize sequence
mio 0:f3f80a0695ff 119 DataToWrite16(0xffff);
mio 0:f3f80a0695ff 120 wait_ms(10);
mio 0:f3f80a0695ff 121 LCD_WR_REG(0x0000,0x0001);
mio 0:f3f80a0695ff 122 wait_ms(10);
mio 0:f3f80a0695ff 123
mio 0:f3f80a0695ff 124 u16 id = LCD_RD_REG(0x0000) ; // CHECK LCD TYPE (ID READ)
mio 0:f3f80a0695ff 125 printf("CHIP ID=%04X\r\n",id) ;
mio 0:f3f80a0695ff 126
mio 0:f3f80a0695ff 127 if (id == 0x4531) {
mio 0:f3f80a0695ff 128 csout(0);
mio 0:f3f80a0695ff 129 DataToWrite16(0x0);
mio 0:f3f80a0695ff 130 DataToWrite16(0x0);
mio 0:f3f80a0695ff 131 csout(1);
mio 0:f3f80a0695ff 132 wait_ms(10);
mio 0:f3f80a0695ff 133
mio 0:f3f80a0695ff 134 // Setup display
mio 0:f3f80a0695ff 135 LCD_WR_REG(0x10,0x0628);
mio 0:f3f80a0695ff 136 LCD_WR_REG(0x12,0x0006);
mio 0:f3f80a0695ff 137 LCD_WR_REG(0x13,0x0A32);
mio 0:f3f80a0695ff 138 LCD_WR_REG(0x11,0x0040);
mio 0:f3f80a0695ff 139 LCD_WR_REG(0x15,0x0050);
mio 0:f3f80a0695ff 140 LCD_WR_REG(0x12,0x0016);
mio 0:f3f80a0695ff 141 wait_ms(15);
mio 0:f3f80a0695ff 142 LCD_WR_REG(0x10,0x5660);
mio 0:f3f80a0695ff 143 wait_ms(15);
mio 0:f3f80a0695ff 144 LCD_WR_REG(0x13,0x2A4E);
mio 0:f3f80a0695ff 145
mio 0:f3f80a0695ff 146 LCD_WR_REG(0x01,0x0100);
mio 0:f3f80a0695ff 147 LCD_WR_REG(0x02,0x0300);
mio 0:f3f80a0695ff 148 LCD_WR_REG(0x03,0x1038);
mio 0:f3f80a0695ff 149
mio 0:f3f80a0695ff 150 LCD_WR_REG(0x08,0x0202);
mio 0:f3f80a0695ff 151 LCD_WR_REG(0x09,0x0000);
mio 0:f3f80a0695ff 152 LCD_WR_REG(0x0A,0x0000);
mio 0:f3f80a0695ff 153 LCD_WR_REG(0x0C,0x0001); // 16bit , Internal
mio 0:f3f80a0695ff 154
mio 0:f3f80a0695ff 155 LCD_WR_REG(0x30,0x0000);
mio 0:f3f80a0695ff 156 LCD_WR_REG(0x31,0x0402);
mio 0:f3f80a0695ff 157 LCD_WR_REG(0x32,0x0106);
mio 0:f3f80a0695ff 158 LCD_WR_REG(0x33,0x0700);
mio 0:f3f80a0695ff 159 LCD_WR_REG(0x34,0x0104);
mio 0:f3f80a0695ff 160 LCD_WR_REG(0x35,0x0301);
mio 0:f3f80a0695ff 161 LCD_WR_REG(0x36,0x0707);
mio 0:f3f80a0695ff 162 LCD_WR_REG(0x37,0x0305);
mio 0:f3f80a0695ff 163 LCD_WR_REG(0x38,0x0208);
mio 0:f3f80a0695ff 164 LCD_WR_REG(0x39,0x0F0B);
mio 0:f3f80a0695ff 165 wait_ms(15);
mio 0:f3f80a0695ff 166 LCD_WR_REG(0x41,0x0002);
mio 0:f3f80a0695ff 167 LCD_WR_REG(0x60,0x2700);
mio 0:f3f80a0695ff 168 LCD_WR_REG(0x61,0x0001);
mio 0:f3f80a0695ff 169 LCD_WR_REG(0x90,0x0119);
mio 0:f3f80a0695ff 170 LCD_WR_REG(0x92,0x010A);
mio 0:f3f80a0695ff 171 LCD_WR_REG(0x93,0x0004);
mio 0:f3f80a0695ff 172 LCD_WR_REG(0xA0,0x0100);
mio 0:f3f80a0695ff 173 LCD_WR_REG(0x07,0x0001);
mio 0:f3f80a0695ff 174 wait_ms(15);
mio 0:f3f80a0695ff 175 LCD_WR_REG(0x07,0x0021);
mio 0:f3f80a0695ff 176 wait_ms(15);
mio 0:f3f80a0695ff 177 LCD_WR_REG(0x07,0x0023);
mio 0:f3f80a0695ff 178 wait_ms(15);
mio 0:f3f80a0695ff 179 LCD_WR_REG(0x07,0x0033);
mio 0:f3f80a0695ff 180 wait_ms(15);
mio 0:f3f80a0695ff 181 LCD_WR_REG(0x07,0x0133);
mio 0:f3f80a0695ff 182 wait_ms(20);
mio 0:f3f80a0695ff 183 LCD_WR_REG(0xA0,0x0000);
mio 0:f3f80a0695ff 184 wait_ms(20);
mio 0:f3f80a0695ff 185 } else {
mio 0:f3f80a0695ff 186 printf("UNKNOWN LCD\r\n") ;
mio 0:f3f80a0695ff 187 }
mio 0:f3f80a0695ff 188 }
mio 0:f3f80a0695ff 189
mio 0:f3f80a0695ff 190 // constructor
mio 0:f3f80a0695ff 191 SPILCD_QVGA(PinName cs_pin, PinName rst_pin, PinName mosi_pin, PinName miso_pin, PinName sclk_pin)
mio 0:f3f80a0695ff 192 : cs(cs_pin), rst(rst_pin), spi(mosi_pin, miso_pin, sclk_pin) {
mio 0:f3f80a0695ff 193 rw = 0 ;
mio 0:f3f80a0695ff 194 rs = 0 ;
mio 0:f3f80a0695ff 195 init() ;
mio 0:f3f80a0695ff 196 }
mio 0:f3f80a0695ff 197
mio 0:f3f80a0695ff 198 void rsout(u16 data) {
mio 0:f3f80a0695ff 199 rs = data ;
mio 0:f3f80a0695ff 200 }
mio 0:f3f80a0695ff 201
mio 0:f3f80a0695ff 202 void csout(u16 data) {
mio 0:f3f80a0695ff 203 cs = data ;
mio 0:f3f80a0695ff 204 }
mio 0:f3f80a0695ff 205
mio 0:f3f80a0695ff 206 // wipe all screen
mio 0:f3f80a0695ff 207 void filltest(u16 Color) {
mio 0:f3f80a0695ff 208 u16 x,y ;
mio 0:f3f80a0695ff 209 Lcd_SetCursor(0,0);
mio 0:f3f80a0695ff 210 Lcd_WR_Start();
mio 0:f3f80a0695ff 211 rs = 1 ;
mio 0:f3f80a0695ff 212 for (x = 0;x < 240;x++) {
mio 0:f3f80a0695ff 213 for (y = 0;y < 320;y++) {
mio 0:f3f80a0695ff 214 // Lcd_SetCursor(x,y);
mio 0:f3f80a0695ff 215 // LCD_WR_REG(0x22,Color);
mio 0:f3f80a0695ff 216 csout(0) ;
mio 0:f3f80a0695ff 217 DataToWrite(Color);
mio 0:f3f80a0695ff 218 csout(1) ;
mio 0:f3f80a0695ff 219 Color++ ;
mio 0:f3f80a0695ff 220 }
mio 0:f3f80a0695ff 221 }
mio 0:f3f80a0695ff 222 rs = 0 ;
mio 0:f3f80a0695ff 223 }
mio 0:f3f80a0695ff 224 };
mio 0:f3f80a0695ff 225
mio 0:f3f80a0695ff 226 #endif