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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_KL25Z/PeripheralNames.h@64:e3affc9e7238, 2013-08-05 (annotated)

Committer:
bogdanm
Date:
Mon Aug 05 12:28:09 2013 +0300
Revision:
64:e3affc9e7238
Parent:
KL25Z/PeripheralNames.h@60:3d0ef94e36ec
Child:
65:5798e58a58b1
New build system structure, new target (LPC1347), bug fixes (I2C read/write errors, LPC11U24 memory map and others)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 60:3d0ef94e36ec 1 /* mbed Microcontroller Library
emilmont 60:3d0ef94e36ec 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 60:3d0ef94e36ec 3 *
emilmont 60:3d0ef94e36ec 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 60:3d0ef94e36ec 5 * you may not use this file except in compliance with the License.
emilmont 60:3d0ef94e36ec 6 * You may obtain a copy of the License at
emilmont 60:3d0ef94e36ec 7 *
emilmont 60:3d0ef94e36ec 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 60:3d0ef94e36ec 9 *
emilmont 60:3d0ef94e36ec 10 * Unless required by applicable law or agreed to in writing, software
emilmont 60:3d0ef94e36ec 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 60:3d0ef94e36ec 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 60:3d0ef94e36ec 13 * See the License for the specific language governing permissions and
emilmont 60:3d0ef94e36ec 14 * limitations under the License.
emilmont 60:3d0ef94e36ec 15 */
emilmont 60:3d0ef94e36ec 16 #ifndef MBED_PERIPHERALNAMES_H
emilmont 60:3d0ef94e36ec 17 #define MBED_PERIPHERALNAMES_H
emilmont 60:3d0ef94e36ec 18
emilmont 60:3d0ef94e36ec 19 #include "cmsis.h"
emilmont 60:3d0ef94e36ec 20
emilmont 60:3d0ef94e36ec 21 #ifdef __cplusplus
emilmont 60:3d0ef94e36ec 22 extern "C" {
emilmont 60:3d0ef94e36ec 23 #endif
emilmont 60:3d0ef94e36ec 24
emilmont 60:3d0ef94e36ec 25 typedef enum {
emilmont 60:3d0ef94e36ec 26 UART_0 = (int)UART0_BASE,
emilmont 60:3d0ef94e36ec 27 UART_1 = (int)UART1_BASE,
emilmont 60:3d0ef94e36ec 28 UART_2 = (int)UART2_BASE
emilmont 60:3d0ef94e36ec 29 } UARTName;
emilmont 60:3d0ef94e36ec 30 #define STDIO_UART_TX USBTX
emilmont 60:3d0ef94e36ec 31 #define STDIO_UART_RX USBRX
emilmont 60:3d0ef94e36ec 32 #define STDIO_UART UART_0
emilmont 60:3d0ef94e36ec 33
emilmont 60:3d0ef94e36ec 34 typedef enum {
emilmont 60:3d0ef94e36ec 35 I2C_0 = (int)I2C0_BASE,
emilmont 60:3d0ef94e36ec 36 I2C_1 = (int)I2C1_BASE,
emilmont 60:3d0ef94e36ec 37 } I2CName;
emilmont 60:3d0ef94e36ec 38
emilmont 60:3d0ef94e36ec 39 #define TPM_SHIFT 8
emilmont 60:3d0ef94e36ec 40 typedef enum {
emilmont 60:3d0ef94e36ec 41 PWM_1 = (0 << TPM_SHIFT) | (0), // TPM0 CH0
emilmont 60:3d0ef94e36ec 42 PWM_2 = (0 << TPM_SHIFT) | (1), // TPM0 CH1
emilmont 60:3d0ef94e36ec 43 PWM_3 = (0 << TPM_SHIFT) | (2), // TPM0 CH2
emilmont 60:3d0ef94e36ec 44 PWM_4 = (0 << TPM_SHIFT) | (3), // TPM0 CH3
emilmont 60:3d0ef94e36ec 45 PWM_5 = (0 << TPM_SHIFT) | (4), // TPM0 CH4
emilmont 60:3d0ef94e36ec 46 PWM_6 = (0 << TPM_SHIFT) | (5), // TPM0 CH5
emilmont 60:3d0ef94e36ec 47
emilmont 60:3d0ef94e36ec 48 PWM_7 = (1 << TPM_SHIFT) | (0), // TPM1 CH0
emilmont 60:3d0ef94e36ec 49 PWM_8 = (1 << TPM_SHIFT) | (1), // TPM1 CH1
emilmont 60:3d0ef94e36ec 50
emilmont 60:3d0ef94e36ec 51 PWM_9 = (2 << TPM_SHIFT) | (0), // TPM2 CH0
emilmont 60:3d0ef94e36ec 52 PWM_10 = (2 << TPM_SHIFT) | (1) // TPM2 CH1
emilmont 60:3d0ef94e36ec 53 } PWMName;
emilmont 60:3d0ef94e36ec 54
emilmont 60:3d0ef94e36ec 55 typedef enum {
emilmont 60:3d0ef94e36ec 56 ADC0_SE0 = 0,
emilmont 60:3d0ef94e36ec 57 ADC0_SE3 = 3,
emilmont 60:3d0ef94e36ec 58 ADC0_SE4b = 4,
emilmont 60:3d0ef94e36ec 59 ADC0_SE5b = 5,
emilmont 60:3d0ef94e36ec 60 ADC0_SE6b = 6,
emilmont 60:3d0ef94e36ec 61 ADC0_SE7b = 7,
emilmont 60:3d0ef94e36ec 62 ADC0_SE8 = 8,
emilmont 60:3d0ef94e36ec 63 ADC0_SE9 = 9,
emilmont 60:3d0ef94e36ec 64 ADC0_SE11 = 11,
emilmont 60:3d0ef94e36ec 65 ADC0_SE12 = 12,
emilmont 60:3d0ef94e36ec 66 ADC0_SE13 = 13,
emilmont 60:3d0ef94e36ec 67 ADC0_SE14 = 14,
emilmont 60:3d0ef94e36ec 68 ADC0_SE15 = 15,
emilmont 60:3d0ef94e36ec 69 ADC0_SE23 = 23
emilmont 60:3d0ef94e36ec 70 } ADCName;
emilmont 60:3d0ef94e36ec 71
emilmont 60:3d0ef94e36ec 72 typedef enum {
emilmont 60:3d0ef94e36ec 73 DAC_0 = 0
emilmont 60:3d0ef94e36ec 74 } DACName;
emilmont 60:3d0ef94e36ec 75
emilmont 60:3d0ef94e36ec 76
emilmont 60:3d0ef94e36ec 77 typedef enum {
emilmont 60:3d0ef94e36ec 78 SPI_0 = (int)SPI0_BASE,
emilmont 60:3d0ef94e36ec 79 SPI_1 = (int)SPI1_BASE,
emilmont 60:3d0ef94e36ec 80 } SPIName;
emilmont 60:3d0ef94e36ec 81
emilmont 60:3d0ef94e36ec 82 #ifdef __cplusplus
emilmont 60:3d0ef94e36ec 83 }
emilmont 60:3d0ef94e36ec 84 #endif
emilmont 60:3d0ef94e36ec 85
emilmont 60:3d0ef94e36ec 86 #endif