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TARGET_NUCLEO_F103RB/stm32f10x_gpio.h@80:8e73be2a2ac1, 2014-02-21 (annotated)

Committer:
emilmont
Date:
Fri Feb 21 12:21:39 2014 +0000
Revision:
80:8e73be2a2ac1
Parent:
77:869cf507173a 
First alpha release for the NRF51822 target (to be tested in the online IDE)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 73:1efda918f0ba 1 /**
bogdanm 73:1efda918f0ba 2 ******************************************************************************
bogdanm 73:1efda918f0ba 3 * @file stm32f10x_gpio.h
bogdanm 73:1efda918f0ba 4 * @author MCD Application Team
emilmont 77:869cf507173a 5 * @version V3.6.1
emilmont 77:869cf507173a 6 * @date 05-March-2012
bogdanm 73:1efda918f0ba 7 * @brief This file contains all the functions prototypes for the GPIO
bogdanm 73:1efda918f0ba 8 * firmware library.
bogdanm 76:824293ae5e43 9 *******************************************************************************
bogdanm 76:824293ae5e43 10 * Copyright (c) 2014, STMicroelectronics
bogdanm 76:824293ae5e43 11 * All rights reserved.
bogdanm 76:824293ae5e43 12 *
bogdanm 76:824293ae5e43 13 * Redistribution and use in source and binary forms, with or without
bogdanm 76:824293ae5e43 14 * modification, are permitted provided that the following conditions are met:
bogdanm 76:824293ae5e43 15 *
bogdanm 76:824293ae5e43 16 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 76:824293ae5e43 17 * this list of conditions and the following disclaimer.
bogdanm 76:824293ae5e43 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 76:824293ae5e43 19 * this list of conditions and the following disclaimer in the documentation
bogdanm 76:824293ae5e43 20 * and/or other materials provided with the distribution.
bogdanm 76:824293ae5e43 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 76:824293ae5e43 22 * may be used to endorse or promote products derived from this software
bogdanm 76:824293ae5e43 23 * without specific prior written permission.
bogdanm 76:824293ae5e43 24 *
bogdanm 76:824293ae5e43 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 76:824293ae5e43 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 76:824293ae5e43 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 76:824293ae5e43 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 76:824293ae5e43 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 76:824293ae5e43 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 76:824293ae5e43 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 76:824293ae5e43 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 76:824293ae5e43 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 76:824293ae5e43 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 76:824293ae5e43 35 *******************************************************************************
bogdanm 76:824293ae5e43 36 */
bogdanm 73:1efda918f0ba 37
bogdanm 73:1efda918f0ba 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 73:1efda918f0ba 39 #ifndef __STM32F10x_GPIO_H
bogdanm 73:1efda918f0ba 40 #define __STM32F10x_GPIO_H
bogdanm 73:1efda918f0ba 41
bogdanm 73:1efda918f0ba 42 #ifdef __cplusplus
bogdanm 73:1efda918f0ba 43 extern "C" {
bogdanm 73:1efda918f0ba 44 #endif
bogdanm 73:1efda918f0ba 45
bogdanm 73:1efda918f0ba 46 /* Includes ------------------------------------------------------------------*/
bogdanm 73:1efda918f0ba 47 #include "stm32f10x.h"
bogdanm 73:1efda918f0ba 48
bogdanm 73:1efda918f0ba 49 /** @addtogroup STM32F10x_StdPeriph_Driver
bogdanm 73:1efda918f0ba 50 * @{
bogdanm 73:1efda918f0ba 51 */
bogdanm 73:1efda918f0ba 52
bogdanm 73:1efda918f0ba 53 /** @addtogroup GPIO
bogdanm 73:1efda918f0ba 54 * @{
bogdanm 73:1efda918f0ba 55 */
bogdanm 73:1efda918f0ba 56
bogdanm 73:1efda918f0ba 57 /** @defgroup GPIO_Exported_Types
bogdanm 73:1efda918f0ba 58 * @{
bogdanm 73:1efda918f0ba 59 */
bogdanm 73:1efda918f0ba 60
bogdanm 73:1efda918f0ba 61 #define IS_GPIO_ALL_PERIPH(PERIPH) (((PERIPH) == GPIOA) || \
bogdanm 73:1efda918f0ba 62 ((PERIPH) == GPIOB) || \
bogdanm 73:1efda918f0ba 63 ((PERIPH) == GPIOC) || \
bogdanm 73:1efda918f0ba 64 ((PERIPH) == GPIOD) || \
bogdanm 73:1efda918f0ba 65 ((PERIPH) == GPIOE) || \
bogdanm 73:1efda918f0ba 66 ((PERIPH) == GPIOF) || \
bogdanm 73:1efda918f0ba 67 ((PERIPH) == GPIOG))
bogdanm 73:1efda918f0ba 68
bogdanm 73:1efda918f0ba 69 /**
bogdanm 73:1efda918f0ba 70 * @brief Output Maximum frequency selection
bogdanm 73:1efda918f0ba 71 */
bogdanm 73:1efda918f0ba 72
bogdanm 73:1efda918f0ba 73 typedef enum
bogdanm 73:1efda918f0ba 74 {
bogdanm 73:1efda918f0ba 75 GPIO_Speed_10MHz = 1,
bogdanm 73:1efda918f0ba 76 GPIO_Speed_2MHz,
bogdanm 73:1efda918f0ba 77 GPIO_Speed_50MHz
bogdanm 73:1efda918f0ba 78 }GPIOSpeed_TypeDef;
bogdanm 73:1efda918f0ba 79 #define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_10MHz) || ((SPEED) == GPIO_Speed_2MHz) || \
bogdanm 73:1efda918f0ba 80 ((SPEED) == GPIO_Speed_50MHz))
bogdanm 73:1efda918f0ba 81
bogdanm 73:1efda918f0ba 82 /**
bogdanm 73:1efda918f0ba 83 * @brief Configuration Mode enumeration
bogdanm 73:1efda918f0ba 84 */
bogdanm 73:1efda918f0ba 85
bogdanm 73:1efda918f0ba 86 typedef enum
bogdanm 73:1efda918f0ba 87 { GPIO_Mode_AIN = 0x0,
bogdanm 73:1efda918f0ba 88 GPIO_Mode_IN_FLOATING = 0x04,
bogdanm 73:1efda918f0ba 89 GPIO_Mode_IPD = 0x28,
bogdanm 73:1efda918f0ba 90 GPIO_Mode_IPU = 0x48,
bogdanm 73:1efda918f0ba 91 GPIO_Mode_Out_OD = 0x14,
bogdanm 73:1efda918f0ba 92 GPIO_Mode_Out_PP = 0x10,
bogdanm 73:1efda918f0ba 93 GPIO_Mode_AF_OD = 0x1C,
bogdanm 73:1efda918f0ba 94 GPIO_Mode_AF_PP = 0x18
bogdanm 73:1efda918f0ba 95 }GPIOMode_TypeDef;
bogdanm 73:1efda918f0ba 96
bogdanm 73:1efda918f0ba 97 #define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_AIN) || ((MODE) == GPIO_Mode_IN_FLOATING) || \
bogdanm 73:1efda918f0ba 98 ((MODE) == GPIO_Mode_IPD) || ((MODE) == GPIO_Mode_IPU) || \
bogdanm 73:1efda918f0ba 99 ((MODE) == GPIO_Mode_Out_OD) || ((MODE) == GPIO_Mode_Out_PP) || \
bogdanm 73:1efda918f0ba 100 ((MODE) == GPIO_Mode_AF_OD) || ((MODE) == GPIO_Mode_AF_PP))
bogdanm 73:1efda918f0ba 101
bogdanm 73:1efda918f0ba 102 /**
bogdanm 73:1efda918f0ba 103 * @brief GPIO Init structure definition
bogdanm 73:1efda918f0ba 104 */
bogdanm 73:1efda918f0ba 105
bogdanm 73:1efda918f0ba 106 typedef struct
bogdanm 73:1efda918f0ba 107 {
bogdanm 73:1efda918f0ba 108 uint16_t GPIO_Pin; /*!< Specifies the GPIO pins to be configured.
bogdanm 73:1efda918f0ba 109 This parameter can be any value of @ref GPIO_pins_define */
bogdanm 73:1efda918f0ba 110
bogdanm 73:1efda918f0ba 111 GPIOSpeed_TypeDef GPIO_Speed; /*!< Specifies the speed for the selected pins.
bogdanm 73:1efda918f0ba 112 This parameter can be a value of @ref GPIOSpeed_TypeDef */
bogdanm 73:1efda918f0ba 113
bogdanm 73:1efda918f0ba 114 GPIOMode_TypeDef GPIO_Mode; /*!< Specifies the operating mode for the selected pins.
bogdanm 73:1efda918f0ba 115 This parameter can be a value of @ref GPIOMode_TypeDef */
bogdanm 73:1efda918f0ba 116 }GPIO_InitTypeDef;
bogdanm 73:1efda918f0ba 117
bogdanm 73:1efda918f0ba 118
bogdanm 73:1efda918f0ba 119 /**
bogdanm 73:1efda918f0ba 120 * @brief Bit_SET and Bit_RESET enumeration
bogdanm 73:1efda918f0ba 121 */
bogdanm 73:1efda918f0ba 122
bogdanm 73:1efda918f0ba 123 typedef enum
bogdanm 73:1efda918f0ba 124 { Bit_RESET = 0,
bogdanm 73:1efda918f0ba 125 Bit_SET
bogdanm 73:1efda918f0ba 126 }BitAction;
bogdanm 73:1efda918f0ba 127
bogdanm 73:1efda918f0ba 128 #define IS_GPIO_BIT_ACTION(ACTION) (((ACTION) == Bit_RESET) || ((ACTION) == Bit_SET))
bogdanm 73:1efda918f0ba 129
bogdanm 73:1efda918f0ba 130 /**
bogdanm 73:1efda918f0ba 131 * @}
bogdanm 73:1efda918f0ba 132 */
bogdanm 73:1efda918f0ba 133
bogdanm 73:1efda918f0ba 134 /** @defgroup GPIO_Exported_Constants
bogdanm 73:1efda918f0ba 135 * @{
bogdanm 73:1efda918f0ba 136 */
bogdanm 73:1efda918f0ba 137
bogdanm 73:1efda918f0ba 138 /** @defgroup GPIO_pins_define
bogdanm 73:1efda918f0ba 139 * @{
bogdanm 73:1efda918f0ba 140 */
bogdanm 73:1efda918f0ba 141
bogdanm 73:1efda918f0ba 142 #define GPIO_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */
bogdanm 73:1efda918f0ba 143 #define GPIO_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */
bogdanm 73:1efda918f0ba 144 #define GPIO_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */
bogdanm 73:1efda918f0ba 145 #define GPIO_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */
bogdanm 73:1efda918f0ba 146 #define GPIO_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */
bogdanm 73:1efda918f0ba 147 #define GPIO_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */
bogdanm 73:1efda918f0ba 148 #define GPIO_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */
bogdanm 73:1efda918f0ba 149 #define GPIO_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */
bogdanm 73:1efda918f0ba 150 #define GPIO_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */
bogdanm 73:1efda918f0ba 151 #define GPIO_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */
bogdanm 73:1efda918f0ba 152 #define GPIO_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */
bogdanm 73:1efda918f0ba 153 #define GPIO_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */
bogdanm 73:1efda918f0ba 154 #define GPIO_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */
bogdanm 73:1efda918f0ba 155 #define GPIO_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */
bogdanm 73:1efda918f0ba 156 #define GPIO_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */
bogdanm 73:1efda918f0ba 157 #define GPIO_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */
bogdanm 73:1efda918f0ba 158 #define GPIO_Pin_All ((uint16_t)0xFFFF) /*!< All pins selected */
bogdanm 73:1efda918f0ba 159
bogdanm 73:1efda918f0ba 160 #define IS_GPIO_PIN(PIN) ((((PIN) & (uint16_t)0x00) == 0x00) && ((PIN) != (uint16_t)0x00))
bogdanm 73:1efda918f0ba 161
bogdanm 73:1efda918f0ba 162 #define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \
bogdanm 73:1efda918f0ba 163 ((PIN) == GPIO_Pin_1) || \
bogdanm 73:1efda918f0ba 164 ((PIN) == GPIO_Pin_2) || \
bogdanm 73:1efda918f0ba 165 ((PIN) == GPIO_Pin_3) || \
bogdanm 73:1efda918f0ba 166 ((PIN) == GPIO_Pin_4) || \
bogdanm 73:1efda918f0ba 167 ((PIN) == GPIO_Pin_5) || \
bogdanm 73:1efda918f0ba 168 ((PIN) == GPIO_Pin_6) || \
bogdanm 73:1efda918f0ba 169 ((PIN) == GPIO_Pin_7) || \
bogdanm 73:1efda918f0ba 170 ((PIN) == GPIO_Pin_8) || \
bogdanm 73:1efda918f0ba 171 ((PIN) == GPIO_Pin_9) || \
bogdanm 73:1efda918f0ba 172 ((PIN) == GPIO_Pin_10) || \
bogdanm 73:1efda918f0ba 173 ((PIN) == GPIO_Pin_11) || \
bogdanm 73:1efda918f0ba 174 ((PIN) == GPIO_Pin_12) || \
bogdanm 73:1efda918f0ba 175 ((PIN) == GPIO_Pin_13) || \
bogdanm 73:1efda918f0ba 176 ((PIN) == GPIO_Pin_14) || \
bogdanm 73:1efda918f0ba 177 ((PIN) == GPIO_Pin_15))
bogdanm 73:1efda918f0ba 178
bogdanm 73:1efda918f0ba 179 /**
bogdanm 73:1efda918f0ba 180 * @}
bogdanm 73:1efda918f0ba 181 */
bogdanm 73:1efda918f0ba 182
bogdanm 73:1efda918f0ba 183 /** @defgroup GPIO_Remap_define
bogdanm 73:1efda918f0ba 184 * @{
bogdanm 73:1efda918f0ba 185 */
bogdanm 73:1efda918f0ba 186
bogdanm 73:1efda918f0ba 187 #define GPIO_Remap_SPI1 ((uint32_t)0x00000001) /*!< SPI1 Alternate Function mapping */
bogdanm 73:1efda918f0ba 188 #define GPIO_Remap_I2C1 ((uint32_t)0x00000002) /*!< I2C1 Alternate Function mapping */
bogdanm 73:1efda918f0ba 189 #define GPIO_Remap_USART1 ((uint32_t)0x00000004) /*!< USART1 Alternate Function mapping */
bogdanm 73:1efda918f0ba 190 #define GPIO_Remap_USART2 ((uint32_t)0x00000008) /*!< USART2 Alternate Function mapping */
bogdanm 73:1efda918f0ba 191 #define GPIO_PartialRemap_USART3 ((uint32_t)0x00140010) /*!< USART3 Partial Alternate Function mapping */
bogdanm 73:1efda918f0ba 192 #define GPIO_FullRemap_USART3 ((uint32_t)0x00140030) /*!< USART3 Full Alternate Function mapping */
bogdanm 73:1efda918f0ba 193 #define GPIO_PartialRemap_TIM1 ((uint32_t)0x00160040) /*!< TIM1 Partial Alternate Function mapping */
bogdanm 73:1efda918f0ba 194 #define GPIO_FullRemap_TIM1 ((uint32_t)0x001600C0) /*!< TIM1 Full Alternate Function mapping */
bogdanm 73:1efda918f0ba 195 #define GPIO_PartialRemap1_TIM2 ((uint32_t)0x00180100) /*!< TIM2 Partial1 Alternate Function mapping */
bogdanm 73:1efda918f0ba 196 #define GPIO_PartialRemap2_TIM2 ((uint32_t)0x00180200) /*!< TIM2 Partial2 Alternate Function mapping */
bogdanm 73:1efda918f0ba 197 #define GPIO_FullRemap_TIM2 ((uint32_t)0x00180300) /*!< TIM2 Full Alternate Function mapping */
bogdanm 73:1efda918f0ba 198 #define GPIO_PartialRemap_TIM3 ((uint32_t)0x001A0800) /*!< TIM3 Partial Alternate Function mapping */
bogdanm 73:1efda918f0ba 199 #define GPIO_FullRemap_TIM3 ((uint32_t)0x001A0C00) /*!< TIM3 Full Alternate Function mapping */
bogdanm 73:1efda918f0ba 200 #define GPIO_Remap_TIM4 ((uint32_t)0x00001000) /*!< TIM4 Alternate Function mapping */
bogdanm 73:1efda918f0ba 201 #define GPIO_Remap1_CAN1 ((uint32_t)0x001D4000) /*!< CAN1 Alternate Function mapping */
bogdanm 73:1efda918f0ba 202 #define GPIO_Remap2_CAN1 ((uint32_t)0x001D6000) /*!< CAN1 Alternate Function mapping */
bogdanm 73:1efda918f0ba 203 #define GPIO_Remap_PD01 ((uint32_t)0x00008000) /*!< PD01 Alternate Function mapping */
bogdanm 73:1efda918f0ba 204 #define GPIO_Remap_TIM5CH4_LSI ((uint32_t)0x00200001) /*!< LSI connected to TIM5 Channel4 input capture for calibration */
bogdanm 73:1efda918f0ba 205 #define GPIO_Remap_ADC1_ETRGINJ ((uint32_t)0x00200002) /*!< ADC1 External Trigger Injected Conversion remapping */
bogdanm 73:1efda918f0ba 206 #define GPIO_Remap_ADC1_ETRGREG ((uint32_t)0x00200004) /*!< ADC1 External Trigger Regular Conversion remapping */
bogdanm 73:1efda918f0ba 207 #define GPIO_Remap_ADC2_ETRGINJ ((uint32_t)0x00200008) /*!< ADC2 External Trigger Injected Conversion remapping */
bogdanm 73:1efda918f0ba 208 #define GPIO_Remap_ADC2_ETRGREG ((uint32_t)0x00200010) /*!< ADC2 External Trigger Regular Conversion remapping */
bogdanm 73:1efda918f0ba 209 #define GPIO_Remap_ETH ((uint32_t)0x00200020) /*!< Ethernet remapping (only for Connectivity line devices) */
bogdanm 73:1efda918f0ba 210 #define GPIO_Remap_CAN2 ((uint32_t)0x00200040) /*!< CAN2 remapping (only for Connectivity line devices) */
bogdanm 73:1efda918f0ba 211 #define GPIO_Remap_SWJ_NoJTRST ((uint32_t)0x00300100) /*!< Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST */
bogdanm 73:1efda918f0ba 212 #define GPIO_Remap_SWJ_JTAGDisable ((uint32_t)0x00300200) /*!< JTAG-DP Disabled and SW-DP Enabled */
bogdanm 73:1efda918f0ba 213 #define GPIO_Remap_SWJ_Disable ((uint32_t)0x00300400) /*!< Full SWJ Disabled (JTAG-DP + SW-DP) */
bogdanm 73:1efda918f0ba 214 #define GPIO_Remap_SPI3 ((uint32_t)0x00201100) /*!< SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices) */
bogdanm 73:1efda918f0ba 215 #define GPIO_Remap_TIM2ITR1_PTP_SOF ((uint32_t)0x00202000) /*!< Ethernet PTP output or USB OTG SOF (Start of Frame) connected
bogdanm 73:1efda918f0ba 216 to TIM2 Internal Trigger 1 for calibration
bogdanm 73:1efda918f0ba 217 (only for Connectivity line devices) */
bogdanm 73:1efda918f0ba 218 #define GPIO_Remap_PTP_PPS ((uint32_t)0x00204000) /*!< Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices) */
bogdanm 73:1efda918f0ba 219
bogdanm 73:1efda918f0ba 220 #define GPIO_Remap_TIM15 ((uint32_t)0x80000001) /*!< TIM15 Alternate Function mapping (only for Value line devices) */
bogdanm 73:1efda918f0ba 221 #define GPIO_Remap_TIM16 ((uint32_t)0x80000002) /*!< TIM16 Alternate Function mapping (only for Value line devices) */
bogdanm 73:1efda918f0ba 222 #define GPIO_Remap_TIM17 ((uint32_t)0x80000004) /*!< TIM17 Alternate Function mapping (only for Value line devices) */
bogdanm 73:1efda918f0ba 223 #define GPIO_Remap_CEC ((uint32_t)0x80000008) /*!< CEC Alternate Function mapping (only for Value line devices) */
bogdanm 73:1efda918f0ba 224 #define GPIO_Remap_TIM1_DMA ((uint32_t)0x80000010) /*!< TIM1 DMA requests mapping (only for Value line devices) */
bogdanm 73:1efda918f0ba 225
bogdanm 73:1efda918f0ba 226 #define GPIO_Remap_TIM9 ((uint32_t)0x80000020) /*!< TIM9 Alternate Function mapping (only for XL-density devices) */
bogdanm 73:1efda918f0ba 227 #define GPIO_Remap_TIM10 ((uint32_t)0x80000040) /*!< TIM10 Alternate Function mapping (only for XL-density devices) */
bogdanm 73:1efda918f0ba 228 #define GPIO_Remap_TIM11 ((uint32_t)0x80000080) /*!< TIM11 Alternate Function mapping (only for XL-density devices) */
bogdanm 73:1efda918f0ba 229 #define GPIO_Remap_TIM13 ((uint32_t)0x80000100) /*!< TIM13 Alternate Function mapping (only for High density Value line and XL-density devices) */
bogdanm 73:1efda918f0ba 230 #define GPIO_Remap_TIM14 ((uint32_t)0x80000200) /*!< TIM14 Alternate Function mapping (only for High density Value line and XL-density devices) */
bogdanm 73:1efda918f0ba 231 #define GPIO_Remap_FSMC_NADV ((uint32_t)0x80000400) /*!< FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices) */
bogdanm 73:1efda918f0ba 232
bogdanm 73:1efda918f0ba 233 #define GPIO_Remap_TIM67_DAC_DMA ((uint32_t)0x80000800) /*!< TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices) */
bogdanm 73:1efda918f0ba 234 #define GPIO_Remap_TIM12 ((uint32_t)0x80001000) /*!< TIM12 Alternate Function mapping (only for High density Value line devices) */
bogdanm 73:1efda918f0ba 235 #define GPIO_Remap_MISC ((uint32_t)0x80002000) /*!< Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping,
bogdanm 73:1efda918f0ba 236 only for High density Value line devices) */
bogdanm 73:1efda918f0ba 237
bogdanm 73:1efda918f0ba 238 #define IS_GPIO_REMAP(REMAP) (((REMAP) == GPIO_Remap_SPI1) || ((REMAP) == GPIO_Remap_I2C1) || \
bogdanm 73:1efda918f0ba 239 ((REMAP) == GPIO_Remap_USART1) || ((REMAP) == GPIO_Remap_USART2) || \
bogdanm 73:1efda918f0ba 240 ((REMAP) == GPIO_PartialRemap_USART3) || ((REMAP) == GPIO_FullRemap_USART3) || \
bogdanm 73:1efda918f0ba 241 ((REMAP) == GPIO_PartialRemap_TIM1) || ((REMAP) == GPIO_FullRemap_TIM1) || \
bogdanm 73:1efda918f0ba 242 ((REMAP) == GPIO_PartialRemap1_TIM2) || ((REMAP) == GPIO_PartialRemap2_TIM2) || \
bogdanm 73:1efda918f0ba 243 ((REMAP) == GPIO_FullRemap_TIM2) || ((REMAP) == GPIO_PartialRemap_TIM3) || \
bogdanm 73:1efda918f0ba 244 ((REMAP) == GPIO_FullRemap_TIM3) || ((REMAP) == GPIO_Remap_TIM4) || \
bogdanm 73:1efda918f0ba 245 ((REMAP) == GPIO_Remap1_CAN1) || ((REMAP) == GPIO_Remap2_CAN1) || \
bogdanm 73:1efda918f0ba 246 ((REMAP) == GPIO_Remap_PD01) || ((REMAP) == GPIO_Remap_TIM5CH4_LSI) || \
bogdanm 73:1efda918f0ba 247 ((REMAP) == GPIO_Remap_ADC1_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC1_ETRGREG) || \
bogdanm 73:1efda918f0ba 248 ((REMAP) == GPIO_Remap_ADC2_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC2_ETRGREG) || \
bogdanm 73:1efda918f0ba 249 ((REMAP) == GPIO_Remap_ETH) ||((REMAP) == GPIO_Remap_CAN2) || \
bogdanm 73:1efda918f0ba 250 ((REMAP) == GPIO_Remap_SWJ_NoJTRST) || ((REMAP) == GPIO_Remap_SWJ_JTAGDisable) || \
bogdanm 73:1efda918f0ba 251 ((REMAP) == GPIO_Remap_SWJ_Disable)|| ((REMAP) == GPIO_Remap_SPI3) || \
bogdanm 73:1efda918f0ba 252 ((REMAP) == GPIO_Remap_TIM2ITR1_PTP_SOF) || ((REMAP) == GPIO_Remap_PTP_PPS) || \
bogdanm 73:1efda918f0ba 253 ((REMAP) == GPIO_Remap_TIM15) || ((REMAP) == GPIO_Remap_TIM16) || \
bogdanm 73:1efda918f0ba 254 ((REMAP) == GPIO_Remap_TIM17) || ((REMAP) == GPIO_Remap_CEC) || \
bogdanm 73:1efda918f0ba 255 ((REMAP) == GPIO_Remap_TIM1_DMA) || ((REMAP) == GPIO_Remap_TIM9) || \
bogdanm 73:1efda918f0ba 256 ((REMAP) == GPIO_Remap_TIM10) || ((REMAP) == GPIO_Remap_TIM11) || \
bogdanm 73:1efda918f0ba 257 ((REMAP) == GPIO_Remap_TIM13) || ((REMAP) == GPIO_Remap_TIM14) || \
bogdanm 73:1efda918f0ba 258 ((REMAP) == GPIO_Remap_FSMC_NADV) || ((REMAP) == GPIO_Remap_TIM67_DAC_DMA) || \
bogdanm 73:1efda918f0ba 259 ((REMAP) == GPIO_Remap_TIM12) || ((REMAP) == GPIO_Remap_MISC))
bogdanm 73:1efda918f0ba 260
bogdanm 73:1efda918f0ba 261 /**
bogdanm 73:1efda918f0ba 262 * @}
bogdanm 73:1efda918f0ba 263 */
bogdanm 73:1efda918f0ba 264
bogdanm 73:1efda918f0ba 265 /** @defgroup GPIO_Port_Sources
bogdanm 73:1efda918f0ba 266 * @{
bogdanm 73:1efda918f0ba 267 */
bogdanm 73:1efda918f0ba 268
bogdanm 73:1efda918f0ba 269 #define GPIO_PortSourceGPIOA ((uint8_t)0x00)
bogdanm 73:1efda918f0ba 270 #define GPIO_PortSourceGPIOB ((uint8_t)0x01)
bogdanm 73:1efda918f0ba 271 #define GPIO_PortSourceGPIOC ((uint8_t)0x02)
bogdanm 73:1efda918f0ba 272 #define GPIO_PortSourceGPIOD ((uint8_t)0x03)
bogdanm 73:1efda918f0ba 273 #define GPIO_PortSourceGPIOE ((uint8_t)0x04)
bogdanm 73:1efda918f0ba 274 #define GPIO_PortSourceGPIOF ((uint8_t)0x05)
bogdanm 73:1efda918f0ba 275 #define GPIO_PortSourceGPIOG ((uint8_t)0x06)
bogdanm 73:1efda918f0ba 276 #define IS_GPIO_EVENTOUT_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \
bogdanm 73:1efda918f0ba 277 ((PORTSOURCE) == GPIO_PortSourceGPIOB) || \
bogdanm 73:1efda918f0ba 278 ((PORTSOURCE) == GPIO_PortSourceGPIOC) || \
bogdanm 73:1efda918f0ba 279 ((PORTSOURCE) == GPIO_PortSourceGPIOD) || \
bogdanm 73:1efda918f0ba 280 ((PORTSOURCE) == GPIO_PortSourceGPIOE))
bogdanm 73:1efda918f0ba 281
bogdanm 73:1efda918f0ba 282 #define IS_GPIO_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \
bogdanm 73:1efda918f0ba 283 ((PORTSOURCE) == GPIO_PortSourceGPIOB) || \
bogdanm 73:1efda918f0ba 284 ((PORTSOURCE) == GPIO_PortSourceGPIOC) || \
bogdanm 73:1efda918f0ba 285 ((PORTSOURCE) == GPIO_PortSourceGPIOD) || \
bogdanm 73:1efda918f0ba 286 ((PORTSOURCE) == GPIO_PortSourceGPIOE) || \
bogdanm 73:1efda918f0ba 287 ((PORTSOURCE) == GPIO_PortSourceGPIOF) || \
bogdanm 73:1efda918f0ba 288 ((PORTSOURCE) == GPIO_PortSourceGPIOG))
bogdanm 73:1efda918f0ba 289
bogdanm 73:1efda918f0ba 290 /**
bogdanm 73:1efda918f0ba 291 * @}
bogdanm 73:1efda918f0ba 292 */
bogdanm 73:1efda918f0ba 293
bogdanm 73:1efda918f0ba 294 /** @defgroup GPIO_Pin_sources
bogdanm 73:1efda918f0ba 295 * @{
bogdanm 73:1efda918f0ba 296 */
bogdanm 73:1efda918f0ba 297
bogdanm 73:1efda918f0ba 298 #define GPIO_PinSource0 ((uint8_t)0x00)
bogdanm 73:1efda918f0ba 299 #define GPIO_PinSource1 ((uint8_t)0x01)
bogdanm 73:1efda918f0ba 300 #define GPIO_PinSource2 ((uint8_t)0x02)
bogdanm 73:1efda918f0ba 301 #define GPIO_PinSource3 ((uint8_t)0x03)
bogdanm 73:1efda918f0ba 302 #define GPIO_PinSource4 ((uint8_t)0x04)
bogdanm 73:1efda918f0ba 303 #define GPIO_PinSource5 ((uint8_t)0x05)
bogdanm 73:1efda918f0ba 304 #define GPIO_PinSource6 ((uint8_t)0x06)
bogdanm 73:1efda918f0ba 305 #define GPIO_PinSource7 ((uint8_t)0x07)
bogdanm 73:1efda918f0ba 306 #define GPIO_PinSource8 ((uint8_t)0x08)
bogdanm 73:1efda918f0ba 307 #define GPIO_PinSource9 ((uint8_t)0x09)
bogdanm 73:1efda918f0ba 308 #define GPIO_PinSource10 ((uint8_t)0x0A)
bogdanm 73:1efda918f0ba 309 #define GPIO_PinSource11 ((uint8_t)0x0B)
bogdanm 73:1efda918f0ba 310 #define GPIO_PinSource12 ((uint8_t)0x0C)
bogdanm 73:1efda918f0ba 311 #define GPIO_PinSource13 ((uint8_t)0x0D)
bogdanm 73:1efda918f0ba 312 #define GPIO_PinSource14 ((uint8_t)0x0E)
bogdanm 73:1efda918f0ba 313 #define GPIO_PinSource15 ((uint8_t)0x0F)
bogdanm 73:1efda918f0ba 314
bogdanm 73:1efda918f0ba 315 #define IS_GPIO_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == GPIO_PinSource0) || \
bogdanm 73:1efda918f0ba 316 ((PINSOURCE) == GPIO_PinSource1) || \
bogdanm 73:1efda918f0ba 317 ((PINSOURCE) == GPIO_PinSource2) || \
bogdanm 73:1efda918f0ba 318 ((PINSOURCE) == GPIO_PinSource3) || \
bogdanm 73:1efda918f0ba 319 ((PINSOURCE) == GPIO_PinSource4) || \
bogdanm 73:1efda918f0ba 320 ((PINSOURCE) == GPIO_PinSource5) || \
bogdanm 73:1efda918f0ba 321 ((PINSOURCE) == GPIO_PinSource6) || \
bogdanm 73:1efda918f0ba 322 ((PINSOURCE) == GPIO_PinSource7) || \
bogdanm 73:1efda918f0ba 323 ((PINSOURCE) == GPIO_PinSource8) || \
bogdanm 73:1efda918f0ba 324 ((PINSOURCE) == GPIO_PinSource9) || \
bogdanm 73:1efda918f0ba 325 ((PINSOURCE) == GPIO_PinSource10) || \
bogdanm 73:1efda918f0ba 326 ((PINSOURCE) == GPIO_PinSource11) || \
bogdanm 73:1efda918f0ba 327 ((PINSOURCE) == GPIO_PinSource12) || \
bogdanm 73:1efda918f0ba 328 ((PINSOURCE) == GPIO_PinSource13) || \
bogdanm 73:1efda918f0ba 329 ((PINSOURCE) == GPIO_PinSource14) || \
bogdanm 73:1efda918f0ba 330 ((PINSOURCE) == GPIO_PinSource15))
bogdanm 73:1efda918f0ba 331
bogdanm 73:1efda918f0ba 332 /**
bogdanm 73:1efda918f0ba 333 * @}
bogdanm 73:1efda918f0ba 334 */
bogdanm 73:1efda918f0ba 335
bogdanm 73:1efda918f0ba 336 /** @defgroup Ethernet_Media_Interface
bogdanm 73:1efda918f0ba 337 * @{
bogdanm 73:1efda918f0ba 338 */
bogdanm 73:1efda918f0ba 339 #define GPIO_ETH_MediaInterface_MII ((u32)0x00000000)
bogdanm 73:1efda918f0ba 340 #define GPIO_ETH_MediaInterface_RMII ((u32)0x00000001)
bogdanm 73:1efda918f0ba 341
bogdanm 73:1efda918f0ba 342 #define IS_GPIO_ETH_MEDIA_INTERFACE(INTERFACE) (((INTERFACE) == GPIO_ETH_MediaInterface_MII) || \
bogdanm 73:1efda918f0ba 343 ((INTERFACE) == GPIO_ETH_MediaInterface_RMII))
bogdanm 73:1efda918f0ba 344
bogdanm 73:1efda918f0ba 345 /**
bogdanm 73:1efda918f0ba 346 * @}
bogdanm 73:1efda918f0ba 347 */
bogdanm 73:1efda918f0ba 348 /**
bogdanm 73:1efda918f0ba 349 * @}
bogdanm 73:1efda918f0ba 350 */
bogdanm 73:1efda918f0ba 351
bogdanm 73:1efda918f0ba 352 /** @defgroup GPIO_Exported_Macros
bogdanm 73:1efda918f0ba 353 * @{
bogdanm 73:1efda918f0ba 354 */
bogdanm 73:1efda918f0ba 355
bogdanm 73:1efda918f0ba 356 /**
bogdanm 73:1efda918f0ba 357 * @}
bogdanm 73:1efda918f0ba 358 */
bogdanm 73:1efda918f0ba 359
bogdanm 73:1efda918f0ba 360 /** @defgroup GPIO_Exported_Functions
bogdanm 73:1efda918f0ba 361 * @{
bogdanm 73:1efda918f0ba 362 */
bogdanm 73:1efda918f0ba 363
bogdanm 73:1efda918f0ba 364 void GPIO_DeInit(GPIO_TypeDef* GPIOx);
bogdanm 73:1efda918f0ba 365 void GPIO_AFIODeInit(void);
bogdanm 73:1efda918f0ba 366 void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct);
bogdanm 73:1efda918f0ba 367 void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct);
bogdanm 73:1efda918f0ba 368 uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
bogdanm 73:1efda918f0ba 369 uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx);
bogdanm 73:1efda918f0ba 370 uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
bogdanm 73:1efda918f0ba 371 uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx);
bogdanm 73:1efda918f0ba 372 void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
bogdanm 73:1efda918f0ba 373 void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
bogdanm 73:1efda918f0ba 374 void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal);
bogdanm 73:1efda918f0ba 375 void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal);
bogdanm 73:1efda918f0ba 376 void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
bogdanm 73:1efda918f0ba 377 void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource);
bogdanm 73:1efda918f0ba 378 void GPIO_EventOutputCmd(FunctionalState NewState);
bogdanm 73:1efda918f0ba 379 void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState);
bogdanm 73:1efda918f0ba 380 void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource);
bogdanm 73:1efda918f0ba 381 void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface);
bogdanm 73:1efda918f0ba 382
bogdanm 73:1efda918f0ba 383 #ifdef __cplusplus
bogdanm 73:1efda918f0ba 384 }
bogdanm 73:1efda918f0ba 385 #endif
bogdanm 73:1efda918f0ba 386
bogdanm 73:1efda918f0ba 387 #endif /* __STM32F10x_GPIO_H */
bogdanm 73:1efda918f0ba 388 /**
bogdanm 73:1efda918f0ba 389 * @}
bogdanm 73:1efda918f0ba 390 */
bogdanm 73:1efda918f0ba 391
bogdanm 73:1efda918f0ba 392 /**
bogdanm 73:1efda918f0ba 393 * @}
bogdanm 73:1efda918f0ba 394 */
bogdanm 73:1efda918f0ba 395
bogdanm 73:1efda918f0ba 396 /**
bogdanm 73:1efda918f0ba 397 * @}
bogdanm 73:1efda918f0ba 398 */
bogdanm 73:1efda918f0ba 399
emilmont 77:869cf507173a 400 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/